A Hierarchical Coordinative Control Strategy for Solid State Transformer Based DC Microgrids

A solid state transformer (SST), as a kind of energy router in the Energy Internet, provides a unified access point for AC or DC distributed power subjects. However, the DC-link capacitors inside the SST will suffer huge voltage fluctuations when the output power of the microgrid changes dramatically. With respect to this problem, caused by the random and intermittent characteristics of distributed generation (DG), a hierarchical coordinative control strategy is proposed. Compared with the common independent control, the proposed method not only makes full use of the regulation capacity of super capacitors, but also enhances the dynamic power tracking speed and reduces the speed difference between different stages of an SST. The dynamic voltage response under the proposed method is analyzed in frequency domain and compared with the independent control. To validate the effectiveness of the coordinative control strategy, a simulation model of an SST-based grid-connected DC microgrid system is established, and the topology of the SST is improved. The voltage stability of the DC bus is compared under different control strategies, and the coordinative control strategy is also verified, effectively under transition conditions.


Introduction
The microgrid, as an economical and efficient form of electric energy organization, has attracted worldwide attention [1,2]. A solid state transformer (SST) can serve as a kind of energy router in microgrids [3], which not only coordinates the energy transmission between the utility grid and the microgrid, but also controls the interaction between the AC and DC microgrids. Compared with the traditional transformer, the multi-stage SST provides a direct interface to the DC microgrid, and the energy density can be improved through a high frequency transformer (HFT). The SST is expected as a crucial equipment for utilization of distributed generations (DGs) [4] and construction of the Energy Internet [5,6].
The multi-stage SST commonly contains three stages: input stage, isolation stage, and output stage, as shown in Figure 1. The input stage mainly adopts a modular multilevel converter (MMC) and a cascaded H-bridge (CHB) [7]. A dual active bridge (DAB) converter is often employed as the isolation stage. At present, the main factors affecting the practical application of SSTs are low-energy transmission efficiency and high cost. The efficiency of an SST can reach 93.72% with a CHB-type input stage [8], which is relatively low for practical application. However, the required number of power electronic switches and high-frequency transformers can be reduced by using an MMC as the input stage, which can significantly reduce the switching losses of power transistors and the cost of the SST [9] as well. Under the voltage level of the distribution network, power loss of the SST isolation stage is usually much higher than that of the input stage. Before extensive commercial use of power devices such as SiC and GaN, CLLC resonant converters can effectively solve for the inherent inefficiency of the DAB converter, whose conversion efficiency exceeds 96% [10]. In [11], a 5 kV CLLC resonant converter prototype was built and its efficiency reached 97%. In this paper, the efficiency of the CLLC resonant converter can reach beyond 98% at the rated power. Due to the randomness and intermittence of DGs, the power flow direction of an SST will change frequently, and the voltage across the port of each stage will suffer fluctuation, flicker, sag, and interruption [12], which brings serious damage to electric motors and, precisely, operated power electronic instruments and other power equipment [13,14]. Integration of DGs requires a comprehensive control of the SST. As for the multi-stage SST, traditional control at each stage is independent: the input stage is responsible for the voltage stability of the high-voltage DC (HVDC) bus, and the isolation stage is responsible for the voltage stability of the low-voltage DC (LVDC) bus [15][16][17][18]. In [15], an all-SIC device-based multistage SST was established, where the input stage of the SST adopted a front-end converter (FEC) and the isolation stage was with a DAB. The HVDC bus voltage and LVDC bus voltage were set as the control target of FEC and DAB, respectively. The control strategies of FEC and DAB do not interact with each other, which lacks collaborative operation between them. A global system control structure is described in [16], which can handle the different power flow directions and DC voltage unbalance using battery energy storage. The global control strategy is based on independent control strategy, and DC voltage fluctuation can be suppressed with assistance of the battery contribution, but it may increase the investment. In [17], a SiC-based multiple active bridge was chosen as the isolation stage of the SST to reduce the number of power devices, and a first order approximation-based mathematical model was analyzed, which helped to simplify a voltage balance controller design. The balance control of submodule DC voltage was also researched in [18] to solve the problem of unbalanced submodule voltage after using multilevel converter modules. The addressed control strategy focused on the input stage of the SST without collaboration among different stages. However, such independent control strategy ignores the inherent differences in the power response speed between different stages, which is prone to cause power difference on both sides of the DC-link capacitors and exacerbate the DC voltage fluctuation. Many efforts have been made to solve this problem. A coordinated control strategy is put forward in [19], to reduce the voltage fluctuations of the LVDC bus, that combines the isolation stage and the output stage. However, it focuses on the dual active bridge cascaded with an inverter (DABCI), which does not consider the input stage in a complete SST. The coordinated control in three stages of the SST should be further studied. Based on a simple SST model, an energy feed-forward scheme for the isolation stage and a direct power feed-forward scheme for the rectifier are proposed in [20], which improve the dynamic performance of the DC-link voltage during load fluctuation. A data-driven coordinated controller architecture for a multiple active bridge-based SST is proposed in [21]. This controller optimizes the target value by collecting and analyzing the global information of Due to the randomness and intermittence of DGs, the power flow direction of an SST will change frequently, and the voltage across the port of each stage will suffer fluctuation, flicker, sag, and interruption [12], which brings serious damage to electric motors and, precisely, operated power electronic instruments and other power equipment [13,14]. Integration of DGs requires a comprehensive control of the SST. As for the multi-stage SST, traditional control at each stage is independent: the input stage is responsible for the voltage stability of the high-voltage DC (HVDC) bus, and the isolation stage is responsible for the voltage stability of the low-voltage DC (LVDC) bus [15][16][17][18]. In [15], an all-SIC device-based multistage SST was established, where the input stage of the SST adopted a front-end converter (FEC) and the isolation stage was with a DAB. The HVDC bus voltage and LVDC bus voltage were set as the control target of FEC and DAB, respectively. The control strategies of FEC and DAB do not interact with each other, which lacks collaborative operation between them. A global system control structure is described in [16], which can handle the different power flow directions and DC voltage unbalance using battery energy storage. The global control strategy is based on independent control strategy, and DC voltage fluctuation can be suppressed with assistance of the battery contribution, but it may increase the investment. In [17], a SiC-based multiple active bridge was chosen as the isolation stage of the SST to reduce the number of power devices, and a first order approximation-based mathematical model was analyzed, which helped to simplify a voltage balance controller design. The balance control of submodule DC voltage was also researched in [18] to solve the problem of unbalanced submodule voltage after using multilevel converter modules. The addressed control strategy focused on the input stage of the SST without collaboration among different stages. However, such independent control strategy ignores the inherent differences in the power response speed between different stages, which is prone to cause power difference on both sides of the DC-link capacitors and exacerbate the DC voltage fluctuation. Many efforts have been made to solve this problem. A coordinated control strategy is put forward in [19], to reduce the voltage fluctuations of the LVDC bus, that combines the isolation stage and the output stage. However, it focuses on the dual active bridge cascaded with an inverter (DABCI), which does not consider the input stage in a complete SST. The coordinated control in three stages of the SST should be further studied. Based on a simple SST model, an energy feed-forward scheme for the isolation stage and a direct power feed-forward scheme for the rectifier are proposed in [20], which improve the dynamic performance of the DC-link voltage during load fluctuation. A data-driven coordinated controller architecture for a multiple active bridge-based SST is proposed in [21]. This controller optimizes the target value by collecting and analyzing the global information of the SST, and improves the MVDC-link and LVDC-link voltage quality of the SST under grid-side abnormal conditions.
In this paper, a three-stage SST that adopts an MMC as the input stage and a CLLC resonant converter, as the isolation stage is modeled, and a hierarchical coordinative control strategy is proposed. The control strategy aims to improve the DC port voltage quality of the SST when the microgrid output is fluctuating. Compared with other control strategies, a coordinated control strategy between DGs and local energy storage equipment is designed by utilizing super capacitors, which can quickly compensate the power fluctuation of DGs. In addition, the control loop proposed in this paper can eliminate the current imbalance at both ends of the buffer capacitor caused by the power response speed difference of the MMC and CLLC. This control strategy is not only applicable to the situation of power fluctuation in microgrids, but also effective to other kinds of transient conditions, such as the microgrid isolation during fault and the islanding process.
The rest of this paper is organized as follows: in Section 2, an overview of an SST-based microgrid is presented. The mathematical model and problems existing in the independent control strategy are introduced. In Section 3, a hierarchical coordinative control is proposed to improve the DC bus voltage stability. A detailed frequency-domain analysis, compared with independent control, is discussed. Finally, simulation results under different conditions are demonstrated in Section 4, followed by the conclusions in Section 5.

Mathematical Model of the SST
The topology of the solid state transformer used in this paper is shown in Figure 2. Compared with the traditional topology, a three-phase MMC is selected to replace the CHB as the input stage, and a CLLC resonant converter is used to replace the DAB converter as the isolation stage. As mentioned above, an MMC can reduce the number of power switching devices and high frequency transformers. Under the comparative conditions in the literature [22], an MMC can reduce the number of switching devices by 20% and the number of high-frequency transformers by 50%, in contrast to CHB. The CLLC resonant converter is a new type of structure, which has not been fully covered in the literature on SSTs. E a , E b , and E c are the voltages of the three-phase distribution network; i a , i b , and i c are the currents of distribution network; L s and L a represent the smoothing inductor on the grid side and the arm inductor of MMC, respectively; U a , U b , and U c are the AC output voltages of MMC; C H and C L are the series HVDC link capacitor and parallel CLLC output capacitor, respectively; C s represents the MMC submodule capacitor; N denotes the number of arm submodules of MMC, and the same number for the CLLC submodule; i o and i L represent output-stage load current and inductance current, respectively; and L f and C f represent the LC filter parameters.
The topology of the SST-based DC microgrid is shown in Figure 3. In this system, the SST functions as an energy center to balance the power flow among the regional distribution network, DC microgrid, and the household LVAC load. The voltage level of the distribution network is 10 kV. The DC microgrid consists of photovoltaic (PV) power supply, energy storage system (ESS), and DC loads. It is connected to the distribution grid through the 700 V LVDC port of the SST.  The topology of the SST-based DC microgrid is shown in Figure 3. In this system, the SST functions as an energy center to balance the power flow among the regional distribution network, DC microgrid, and the household LVAC load. The voltage level of the distribution network is 10 kV. The DC microgrid consists of photovoltaic (PV) power supply, energy storage system (ESS), and DC loads. It is connected to the distribution grid through the 700 V LVDC port of the SST.  In synchronous rotating coordinates (d-q coordinates), the dynamic equations of the MMC can be described in Equation (1):

AC
where E d and E q are the AC voltages of the distribution grid under d-q coordinates; i d and i q are the AC currents; U d and U q are the line-frequency output voltages of the MMC under d-q  The topology of the SST-based DC microgrid is shown in Figure 3. In this system, the SST functions as an energy center to balance the power flow among the regional distribution network, DC microgrid, and the household LVAC load. The voltage level of the distribution network is 10 kV. The DC microgrid consists of photovoltaic (PV) power supply, energy storage system (ESS), and DC loads. It is connected to the distribution grid through the 700 V LVDC port of the SST. In synchronous rotating coordinates (d-q coordinates), the dynamic equations of the MMC can be described in Equation (1): where E d and E q are the AC voltages of the distribution grid under d-q coordinates; i d and i q are the AC currents; U d and U q are the line-frequency output voltages of the MMC under d-q In synchronous rotating coordinates (d-q coordinates), the dynamic equations of the MMC can be described in Equation (1): where E d and E q are the AC voltages of the distribution grid under d-q coordinates; i d and i q are the AC currents; U d and U q are the line-frequency output voltages of the MMC under d-q coordinates; ω is the fundamental frequency; U dc is the HVDC bus voltage; C He is the equivalent shunt capacitor of the HVDC link; i 1i is the input current of the CLLC submodule i; and i 1 is the sum of the N submodule input currents of CLLC. The topology of a single submodule of the CLLC resonant converter is shown in Figure 4, where i dc is the input current of the HVDC link; U dci and U out are the input and output DC voltages of the submodule; i 1i and i 2i are the input and output currents; i Li is the outlet current of submodule i, and i L Appl. Sci. 2020, 10, 6853 5 of 17 is the outlet current of the overall input-series-output-parallel (ISOP) CLLC resonant converter; C r1 , L r1 and C r2 , L r2 are the resonant capacitors and inductors on the primary and secondary sides; L m is the magnetic inductor, which can be integrated inside the HFT; n is the transformation ratio of the HFT; NC L represents the equivalent parallel capacitance of the LVDC link; and i inv and i mc are the input currents of the output stage and local DC microgrid.
coordinates; ωis the fundamental frequency; U dc is the HVDC bus voltage; C He is the equivalent shunt capacitor of the HVDC link; i 1i is the input current of the CLLC submodule i; and i 1 is the sum of the N submodule input currents of CLLC.
The topology of a single submodule of the CLLC resonant converter is shown in Figure 4, where i dc is the input current of the HVDC link; U dci and U out are the input and output DC voltages of the submodule; i 1i and i 2i are the input and output currents; i Li is the outlet current of submodule i, and i L is the outlet current of the overall input-series-output-parallel (ISOP) CLLC resonant converter; C r1 , L r1 and C r2 , L r2 are the resonant capacitors and inductors on the primary and secondary sides; L m is the magnetic inductor, which can be integrated inside the HFT; n is the transformation ratio of the HFT; NC L represents the equivalent parallel capacitance of the LVDC link; and i inv and i mc are the input currents of the output stage and local DC microgrid. Under single-phase-shift control, the transmission power of the CLLC resonant converter can be obtained as: where P CLLCi is the transmission power of submodule i; φ i is the phase shift angle between two Hbridges; and |Z eqi | and θ i are the magnitude and phase of the equivalent impedance Z eqi , which can be calculated as: where Z 1 , Z 2 , Z m , and Z loadi represent the primary-side LC resonant impedance, secondary-side resonant impedance, the excitation impedance of the HFT, and load impedance (all equivalent to the primary side). From Equations (2) and (3), the input and output currents of the isolation stage can be calculated as: and the dynamic equation of output voltage can be expressed as: where i 2 is the sum of the output currents of N CLLC submodules. Without loss of generality, the voltage and power balance control between the CLLC submodules are not considered in this paper, that is to say, the operating variables of N submodules are assumed to be the same, so the ISOP CLLC resonant converter can be equivalent to one submodule. Under single-phase-shift control, the transmission power of the CLLC resonant converter can be obtained as: where P CLLCi is the transmission power of submodule i; ϕ i is the phase shift angle between two H-bridges; and |Z eqi and θ i are the magnitude and phase of the equivalent impedance Z eqi , which can be calculated as: where Z 1 , Z 2 , Z m , and Z loadi represent the primary-side LC resonant impedance, secondary-side resonant impedance, the excitation impedance of the HFT, and load impedance (all equivalent to the primary side). From Equations (2) and (3), the input and output currents of the isolation stage can be calculated as: and the dynamic equation of output voltage can be expressed as: where i 2 is the sum of the output currents of N CLLC submodules. Without loss of generality, the voltage and power balance control between the CLLC submodules are not considered in this paper, that is to say, the operating variables of N submodules are assumed to be the same, so the ISOP CLLC resonant converter can be equivalent to one submodule.

Problems Existing in the Independent Control Strategy
In the three-stage independent control, the input-stage MMC adopts voltage and current double-loop control to maintain the HVDC bus voltage and adjust the power factor on the distribution grid side; the CLLC adopts single-phase-shift control to regulate the parallel output voltage of the isolation stage. The control diagram is shown in Figure 5. In this figure, Q is the reactive power of the distribution network; G udc , G id , G q , and G iq represent the double-loop controller functions of the MMC; and G uo is the controller function for the CLLC, which adopts single voltage-loop control, so no high-precision current sensor is needed. The part inside the dotted box represents the relation between ϕ i and i 2i , which has been given by the second line of Equation (4). It is obvious that G ps is a nonlinear function, since the CLLC usually works near the resonant frequency point, which means that θ i ≈ 0. Therefore, a linear approximation for G ps is carried out in this paper. The approximate expression after linearization is as follows (0 < ϕ < π): Appl. Sci. 2020, 10, x FOR PEER REVIEW 6 of 18

Problems Existing in the Independent Control Strategy
In the three-stage independent control, the input-stage MMC adopts voltage and current doubleloop control to maintain the HVDC bus voltage and adjust the power factor on the distribution grid side; the CLLC adopts single-phase-shift control to regulate the parallel output voltage of the isolation stage. The control diagram is shown in Figure 5. In this figure, Q is the reactive power of the distribution network; G udc , G id , G q , and G iq represent the double-loop controller functions of the MMC; and G uo is the controller function for the CLLC, which adopts single voltage-loop control, so no high-precision current sensor is needed. The part inside the dotted box represents the relation between and i 2i , which has been given by the second line of Equation (4). It is obvious that G ps is a nonlinear function, since the CLLC usually works near the resonant frequency point, which means that θ i ≈ 0. Therefore, a linear approximation for G ps is carried out in this paper. The approximate expression after linearization is as follows (0 < φ < π): As mentioned previously, the topology of the grid-connected DC microgrid system is shown in Figure 3. A boost chopper circuit is usually adopted as the interfacing converter for PV to realize the maximum power point tracking (MPPT) control [23,24]. The topology and control diagram are shown in Figure 6a,b. For the energy storage system, which includes batteries and super capacitors, the interface converter must realize a bidirectional power transmission, so the current reversible chopper circuit is usually used. Common control methods include constant DC voltage control and voltage droop control. The topology and control diagram are shown in Figure 6c,d. As mentioned previously, the topology of the grid-connected DC microgrid system is shown in Figure 3. A boost chopper circuit is usually adopted as the interfacing converter for PV to realize the maximum power point tracking (MPPT) control [23,24]. The topology and control diagram are shown in Figure 6a,b. For the energy storage system, which includes batteries and super capacitors, the interface converter must realize a bidirectional power transmission, so the current reversible chopper circuit is usually used. Common control methods include constant DC voltage control and voltage droop control. The topology and control diagram are shown in Figure 6c In normal operation, the SST acts as the balance node of the system to provide the voltage and frequency support, the DGs output at maximum power, and the energy storage equipment responses to the control-center command. In this case, fast and continuous fluctuations of the distributed power output will be sufficiently compensated in real time by the SST. It can be seen from Figure 5 that the output current of the microgrid is the interference to the CLLC control loop, which means that the change of i Li leads to the fluctuation of i 2i and U out . The current of the CLLC port is the interference to the MMC active power control loop, which means that the change of i 2i will further lead to the fluctuation of U dc . In addition, the difference of power response speed between the MMC and CLLC resonant converter will aggravate the situation. From Figure 5, the transfer function of the CLLC output DC current i 2i to its load current i Li can be obtained. Since the CLLC can be equivalent to one submodule, so the transfer function of i 2 to i L will be the same as i 2i to i Li , as illustrated in Equation (7): Similarly, the transfer function of the MMC output DC current i dc to the CLLC input current i 1 can be expressed as: where G idd is the transfer function of the grid connected current in the d-axis, and its expression is: According to the control parameters listed in Table 1 and the system hardware simulation parameters listed in Table 2 in Section 4, the current response Bode diagrams of HVDC and LVDC links can be drawn, as shown in Figure 7. In Table 1, the proportion and integral parameters of PI controllers are distinguished by the subscripts P and I. For example, K uo = K Puo + K Iuo . It can be seen from Figure 7 that the closed-loop bandwidth of i 2 to i L is 2930.81 rad/s, which is much larger than the 547.19 rad/s of i dc to i 1 . It indicates that the power adjustment speed of the CLLC is much faster than that of the MMC. Therefore, when the output power of the microgrid fluctuates dramatically, In normal operation, the SST acts as the balance node of the system to provide the voltage and frequency support, the DGs output at maximum power, and the energy storage equipment responses to the control-center command. In this case, fast and continuous fluctuations of the distributed power output will be sufficiently compensated in real time by the SST. It can be seen from Figure 5 that the output current of the microgrid is the interference to the CLLC control loop, which means that the change of i Li leads to the fluctuation of i 2i and U out . The current of the CLLC port is the interference to the MMC active power control loop, which means that the change of i 2i will further lead to the fluctuation of U dc . In addition, the difference of power response speed between the MMC and CLLC resonant converter will aggravate the situation. From Figure 5, the transfer function of the CLLC output DC current i 2i to its load current i Li can be obtained. Since the CLLC can be equivalent to one submodule, so the transfer function of i 2 to i L will be the same as i 2i to i Li , as illustrated in Equation (7): Similarly, the transfer function of the MMC output DC current i dc to the CLLC input current i 1 can be expressed as: where G idd is the transfer function of the grid connected current in the d-axis, and its expression is: According to the control parameters listed in Table 1 and the system hardware simulation parameters listed in Table 2 in Section 4, the current response Bode diagrams of HVDC and LVDC links can be drawn, as shown in Figure 7. In Table 1, the proportion and integral parameters of PI controllers are distinguished by the subscripts P and I. For example, K uo = K Puo + K Iuo . It can be seen from Figure 7 that the closed-loop bandwidth of i 2 to i L is 2930.81 rad/s, which is much larger than the 547.19 rad/s of i dc to i 1 . It indicates that the power adjustment speed of the CLLC is much faster than that of the MMC. Therefore, when the output power of the microgrid fluctuates dramatically, such as switching from absorbing electricity to generating electricity to the distribution network, the power response speed of the CLLC is much faster than that of the MMC. such as switching from absorbing electricity to generating electricity to the distribution network, the power response speed of the CLLC is much faster than that of the MMC.  According to the dynamic Equation (1), the capacitance voltage fluctuation of the HVDC link depends on the current difference between its two sides, that is, the capacitance voltage itself is determined by the difference of the current integral value:

The Hierarchical Coordinative Control for the SST-Based DC Microgrid System
With respect to the problems existing in the independent control, a hierarchical coordinative control strategy for the SST and microgrid composite system is proposed. In general, the hierarchical coordinative control mitigates the local microgrid's external power fluctuation and realizes a joint action of the MMC and the CLLC during the dynamic process. The comparison of control logic between independent control and coordinative control is shown in Figure 8. According to the dynamic Equation (1), the capacitance voltage fluctuation of the HVDC link depends on the current difference between its two sides, that is, the capacitance voltage itself is determined by the difference of the current integral value:

The Hierarchical Coordinative Control for the SST-Based DC Microgrid System
With respect to the problems existing in the independent control, a hierarchical coordinative control strategy for the SST and microgrid composite system is proposed. In general, the hierarchical coordinative control mitigates the local microgrid's external power fluctuation and realizes a joint action of the MMC and the CLLC during the dynamic process. The comparison of control logic between independent control and coordinative control is shown in Figure 8.
The overall coordinative control diagram is shown in Figure 9. This novel control strategy contains two layers: the microgrid layer and the SST layer. In Figure 8a, G UES and G IES represent the ESS double-loop PI controller; G UPV and G IPV are the control functions for the PV controller; K PWMES and K PWMPV are the equivalent gain of the pulse width modulation (PWM) links for ESS and PV, respectively (K PWMES ≈ U dcES , K PWMPV ≈ U dcPV ); and d ES and d PV are the equivalent duty cycles. The meaning of the remaining parameters of Figure 9 has been given in Figure 6. The overall coordinative control diagram is shown in Figure 9. This novel control strategy contains two layers: the microgrid layer and the SST layer. In Figure 8a, G UES and G IES represent the ESS double-loop PI controller; G UPV and G IPV are the control functions for the PV controller; K PWMES and K PWMPV are the equivalent gain of the pulse width modulation (PWM) links for ESS and PV, respectively (K PWMES ≈ U dcES ,K PWMPV ≈ U dcPV ); and d ES and d PV are the equivalent duty cycles. The meaning of the remaining parameters of Figure 9 has been given in Figure 6. The overall coordinative control diagram is shown in Figure 9. This novel control strategy contains two layers: the microgrid layer and the SST layer. In Figure 8a, G UES and G IES represent the ESS double-loop PI controller; G UPV and G IPV are the control functions for the PV controller; K PWMES and K PWMPV are the equivalent gain of the pulse width modulation (PWM) links for ESS and PV, respectively (K PWMES ≈ U dcES ,K PWMPV ≈ U dcPV ); and d ES and d PV are the equivalent duty cycles. The meaning of the remaining parameters of Figure 9 has been given in Figure 6. In the microgrid layer control, the additional control branch feeds the variation of PV outlet current back to the inner current loop of super capacitors inside the ESS, giving full play to the fast regulation capability of super capacitors. Although mechanical and battery energy storage systems are still the key elements in system operation, super capacitors nowadays are drawing an increasing interest [25], due to the advantages of high efficiency and high power density [26]. This paper adopts a hybrid energy storage device combining super capacitors and batteries, as discussed in [27][28][29]. In the additional control branch, k mc is the coordinative control coefficient, which reflects the compensation degree of PV output fluctuation by the ESS. G mc is the coordinative transfer function, and the fluctuation inspection section represents the instruction-receiving and triggering module.
In the SST layer control, the control branch 1 feeds the load current of the CLLC forward to the inner current loop as a new control variable to improve the dynamic current response speed of the CLLC stage. The additional control branch 2 not only feeds the output of the CLLC voltage controller back to the inner loop of the MMC, bringing the two parts of the SST together to complete the task of LVDC bus voltage control, but also feeds the CLLC load current back, to eliminate the influence of the CLLC current fluctuation on the HVDC link at the same time. Similar to the microgrid layer control, k 1 and k 2 are additional control coefficients; G f b and G cc are the corresponding transfer functions. The expressions are as follows:

Comparative Analysis of Microgrid Power Fluctuation Response of the DC Link
From Figures 4, 5 and 9b, the voltage response functions of the SST DC links to the CLLC load current i L under the independent control can be given in Equation (12), where L 0 is equal to L s + L a 2 and is the equivalent inductance on the AC side of the MMC.
Since the independent control is only for three-stage SST converters, the proposed microgrid layer control is not considered in the comparative analysis. From Figure 9b, the corresponding disturbance response functions under the SST-layer coordinative control can be expressed as: As can be seen from Equations (12) and (13), the additional control branches change the numerator of the disturbance response functions. If the value of the control parameter k 1 is close to 1, the dynamic voltage fluctuation problem of HVDC and LVDC buses caused by microgrid output power swing can be completely solved in theory. The coefficient k 2 aims to improve the dynamic power tracking speed difference between the MMC and the CLLC, so as to realize the joint regulation of these two stages in the dynamic process. Although this effect is not clearly reflected in the above formulas, it can be seen from the disturbance transfer function of HVDC bus voltage to the CLLC input current i 1 before and after the introduction of the k 2 branch, as shown in Equation (14). The introduction of k 2 improves the tracking ability of the MMC to current i 1 , and the whole coordinative control branch (2) does not need additional sensors.
The system simulation parameters are shown in Table 2. According to Equations (12) and (13), the Bode diagrams of the disturbance response functions can be obtained, as shown in Figure 10.
From this figure, it can be seen that the coordinative control strategy proposed in this paper can significantly improve the low-frequency amplitude gain, indicating that this coordinative strategy has a better suppression for the DC bus voltage fluctuating during a same dynamic process. The Bode diagram of Equation (14) is similar to that of Equation (12), since the coefficient k 2 acts on the numerator, and so it is not repeated here.
The system simulation parameters are shown in Table 2. According to Equations (12) and (13), the Bode diagrams of the disturbance response functions can be obtained, as shown in Figure 10. From this figure, it can be seen that the coordinative control strategy proposed in this paper can significantly improve the low-frequency amplitude gain, indicating that this coordinative strategy has a better suppression for the DC bus voltage fluctuating during a same dynamic process. The Bode diagram of Equation (14) is similar to that of Equation (12), since the coefficient k 2 acts on the numerator, and so it is not repeated here.

Simulation Results
The model of the SST-based DC microgrid system, as shown in Figure 3, is built by PSCAD/EMTDC to verify the proposed coordinative control. PSCAD/EMTDC is a professional electromagnetic transient simulation software, which is also suitable for power electronics system simulations. The simulation parameters are listed in Table 2. The rated capacity of the SST is 1.5 MVA, and the distribution grid keeps running under unity power factor. In steady-state operation, the output stage of the SST has a 1 MW three-phase unbalanced load. At this time, the working waveform of the CLLC is shown in Figure 11. It can be seen that the voltage zero-crossing point of the primaryside switch is ahead of the turn-on signal, and the current zero-crossing point of the secondary-side switch is ahead of the turn-off signal, thereby reducing switching losses. Figure 12 shows the efficiency curve of the CLLC resonant converter under different load conditions. It can be seen that, when the power is transmitted bidirectionally, the half-load efficiency can reach above 97%, and the efficiency can reach above 98% at a rated power of 1.5 MW.

Simulation Results
The model of the SST-based DC microgrid system, as shown in Figure 3, is built by PSCAD/EMTDC to verify the proposed coordinative control. PSCAD/EMTDC is a professional electromagnetic transient simulation software, which is also suitable for power electronics system simulations. The simulation parameters are listed in Table 2. The rated capacity of the SST is 1.5 MVA, and the distribution grid keeps running under unity power factor. In steady-state operation, the output stage of the SST has a 1 MW three-phase unbalanced load. At this time, the working waveform of the CLLC is shown in Figure 11. It can be seen that the voltage zero-crossing point of the primary-side switch is ahead of the turn-on signal, and the current zero-crossing point of the secondary-side switch is ahead of the turn-off signal, thereby reducing switching losses. Figure 12 shows the efficiency curve of the CLLC resonant converter under different load conditions. It can be seen that, when the power is transmitted bidirectionally, the half-load efficiency can reach above 97%, and the efficiency can reach above 98% at a rated power of 1.5 MW.
Appl. Sci. 2020, 10, x FOR PEER REVIEW 12 of 18     At 1.5 s, the DC microgrid is connected to the system, the PV output is 0.3 MW, and the DC load is 0.2 MW. Starting from 2.7 s, the output power of the PV supply in the microgrid fluctuates continuously in a wide range, and the variation rule is 0.3 MW-2 MW-0.3 MW-2 MW. In this process, the power flow direction of the SST will change frequently under independent control. Figure 13 shows the response of the LVDC and HVDC bus voltages. It can be seen from the comparison that the hierarchical coordinative control strategy proposed in this paper can quickly stabilize the bus voltage and greatly improve the power quality in the dynamic process. Using traditional control strategy, the maximum transient voltage changes of the LVDC and HVDC links are about 47 V and 580 V, respectively. However, under the proposed coordinative control strategy, the DC bus voltage has almost no fluctuation.
The microgrid layer control utilizes the fast power response of super capacitors to smooth the power fluctuation of the DGs. The current waveform of the SST during power fluctuation is shown in Figure 14. It can be seen that the compensated DG output current does not cause frequent fluctuations in the SST power transmission direction, and the change of SST current is relatively smooth. At 1.5 s, the DC microgrid is connected to the system, the PV output is 0.3 MW, and the DC load is 0.2 MW. Starting from 2.7 s, the output power of the PV supply in the microgrid fluctuates continuously in a wide range, and the variation rule is 0.3 MW-2 MW-0.3 MW-2 MW. In this process, the power flow direction of the SST will change frequently under independent control. Figure 13 shows the response of the LVDC and HVDC bus voltages. It can be seen from the comparison that the hierarchical coordinative control strategy proposed in this paper can quickly stabilize the bus voltage and greatly improve the power quality in the dynamic process. Using traditional control strategy, the maximum transient voltage changes of the LVDC and HVDC links are about 47 V and 580 V, respectively. However, under the proposed coordinative control strategy, the DC bus voltage has almost no fluctuation.
The microgrid layer control utilizes the fast power response of super capacitors to smooth the power fluctuation of the DGs. The current waveform of the SST during power fluctuation is shown in Figure 14. It can be seen that the compensated DG output current does not cause frequent fluctuations in the SST power transmission direction, and the change of SST current is relatively smooth.  The microgrid layer control utilizes the fast power response of super capacitors to smooth the power fluctuation of the DGs. The current waveform of the SST during power fluctuation is shown in Figure 14. It can be seen that the compensated DG output current does not cause frequent fluctuations in the SST power transmission direction, and the change of SST current is relatively smooth. It is worth noting that the proposed coordinative control strategy can actually be applied to mitigate dynamic voltage fluctuation conditions. For example, when the system detects a fault in the DC microgrid and trips it off at 2.7 s, the corresponding voltage response is shown in Figure 15. Before removal, the output of the PV power supply is 1 MW. It can be seen from the figure that the SST layer coordinative control at this time can rapidly compensate for the power shortage and restore the DC It is worth noting that the proposed coordinative control strategy can actually be applied to mitigate dynamic voltage fluctuation conditions. For example, when the system detects a fault in the DC microgrid and trips it off at 2.7 s, the corresponding voltage response is shown in Figure 15. Before removal, the output of the PV power supply is 1 MW. It can be seen from the figure that the SST layer coordinative control at this time can rapidly compensate for the power shortage and restore the DC link voltages to the given value more quickly.
(c) It is worth noting that the proposed coordinative control strategy can actually be applied to mitigate dynamic voltage fluctuation conditions. For example, when the system detects a fault in the DC microgrid and trips it off at 2.7 s, the corresponding voltage response is shown in Figure 15. Before removal, the output of the PV power supply is 1 MW. It can be seen from the figure that the SST layer coordinative control at this time can rapidly compensate for the power shortage and restore the DC link voltages to the given value more quickly.  When the control strategy shown in Figure 9a is slightly changed to make the super capacitors dynamically compensate for the input current of the output-stage inverter in the island switching process, i.e., i inv in Figure 4, the coordinative control can also smooth the island switching process. The voltage waveform of the LVDC bus under this condition is shown in Figure 16. Although only the microgrid layer coordinative control plays a role at this time, the bus voltage fluctuation could still be suppressed by a considerable extent. Under the microgrid layer coordinative control, the maximum voltage sag is about 37 V. While under the independent control, the maximum voltage sag is about 90 V, and the voltage needs longer time to recover.
Appl. Sci. 2020, 10, x FOR PEER REVIEW 15 of 18 When the control strategy shown in Figure 9a is slightly changed to make the super capacitors dynamically compensate for the input current of the output-stage inverter in the island switching process, i.e., i inv in Figure 4, the coordinative control can also smooth the island switching process. The voltage waveform of the LVDC bus under this condition is shown in Figure 16. Although only the microgrid layer coordinative control plays a role at this time, the bus voltage fluctuation could still be suppressed by a considerable extent. Under the microgrid layer coordinative control, the maximum voltage sag is about 37 V. While under the independent control, the maximum voltage sag is about 90 V, and the voltage needs longer time to recover. The strategies to improve the SST power quality in previous studies are mostly considering the power-side disturbances [30] and load fluctuations [31]. However, power-side disturbances and load fluctuations do not directly act on the DC buses of the SST, and they can always be isolated by adjacent inverters. In both cases, independent control strategies can maintain good power quality. At present, there are few researches on the power quality problem of SST DC ports caused by the output fluctuation of microgrid. The strategies to improve the SST power quality in previous studies are mostly considering the power-side disturbances [30] and load fluctuations [31]. However, power-side disturbances and load fluctuations do not directly act on the DC buses of the SST, and they can always be isolated by adjacent inverters. In both cases, independent control strategies can maintain good power quality. At present, there are few researches on the power quality problem of SST DC ports caused by the output fluctuation of microgrid.

Conclusions
In this paper, the topology of the SST is improved, and a hierarchical coordinative control strategy for an SST integrated DC microgrid system is proposed to solve the dynamic voltage quality problem of SST DC ports caused by the random and intermittent characteristics of distributed generators. Through mathematical analysis and simulation, conclusions can be drawn as follows: (1) At present, the main factors affecting the practical application of SSTs are high cost and low energy transmission efficiency. The adopted input-stage MMC instead of cascaded H-bridge can significantly reduce the required number of power electronic switches and high-frequency transformers in the SST, thus reducing the system cost. As for the isolation stage that accounts primarily for SST power losses, the efficiency of the CLLC resonant converter adopted in this paper can reach above 98% at rated power, which is greatly improved, compared with the DAB converter, whose efficiency is only about 90%. (2) Under the independent control, the power response speed of the SST is slow, and the output fluctuation of the microgrid cannot be compensated quickly and timely, bringing serious dynamic voltage stability problems for the DC link voltages. The hierarchical coordinative control strategy proposed in this paper can not only improve the external power characteristics of the DC microgrid, but also realize a coordinated action between the input stage and isolation stage of the SST, which can greatly suppress the voltage fluctuation of the HVDC and LVDC bus.

Conflicts of Interest:
The authors declare that there are no conflicts of interest.