DC Converter with Wide Soft Switching Operation, Wide Input Voltage and Low Current Ripple

A soft switching current-source resonant converter is presented and implemented for wide voltage applications such as fuel cells and solar power. An LLC (inductor–inductor–capacitor) converter is adopted to accomplish zero voltage (current) operation on active switches (diodes). Thus, the circuit efficiency is increased. The interleaved pulse-width modulation (PWM) converter is employed on the input side to accomplish low input ripple current. A hybrid LLC converter is adopted to achieve wide voltage operation from Vin, min to 4Vin, min and to improve the weakness of a conventional LLC converter. Half-bridge diode rectification is employed on the output side to decrease power loss on the rectifier diode. To confirm the theoretical analysis and feasibility, experimental verifications with a 500-W prototype are demonstrated in this paper.


Introduction
A fuel cell or solar cell is the clean renewable power energy to change chemical or photovoltaic energy to utility power by using a power electronic circuit, such as dc-dc or dc-ac power converters [1]. The output voltage of single solar cell stack is low and related to solar illuminance (or intensity). Therefore, the high-frequency-link power electronic converters with wide voltage operation are essentially demanded to produce an sTable 400 V on a dc bus between PV (photovoltaic)panels and ac (or dc) grids. However, the input voltage range of the conventional dc-dc converters or dc-ac converters for solar power conversion applications is limited. For dc-dc converters, the allowed maximum input voltage is less than three times of the minimum input voltage, i.e., V in, max < 3V in, min , due to the available duty cycle control. The high-frequency-link dc-dc converters have two types: current source converters [2,3] and voltage source converters [4,5]. Current source converters have less input current ripple compared to the voltage source converters. To increase converter efficiency, the zero-voltage switching dc-dc converters have developed to decrease the turn-on switching losses on power switches. Soft switching flyback with active clamped pulse-width modulation (PWM) [6] have been implemented for adaptor applications with low power rating. Asymmetric PWM converters have been studied in [7,8] to accomplish high-efficiency power converters. However, the problems of an asymmetric half-bridge converter are unbalance current rating on power switches and rectifier diodes. Full-bridge PWM converters have been presented and discussed in [9,10] for high-power applications and a wide range of zero-voltage switching operationa. However, the drawbacks of this circuit topology are the large circulating current on the primary side under freewheeling state and the serious switching losses at low load condition. To solve the above problems, LLC (inductor-inductor-capacitor) resonant converters have been implemented in [11][12][13][14][15] to accomplish soft switching operation over a wide load range. Half-bridge and full-bridge LLC converters are adopted for low and medium power application due to the fundamental ac input voltage of a half-bridge LLC converter is only one-half of a full-bridge LLC converter. However, the input voltage operation of an LLC converter is limited. It is not easy for an LLC converter to be applied in fuel cells or solar power applications with wide input voltage variation.
A hybrid LLC circuit is proposed in this paper to implement wide voltage operation from V in, min to 4V in, min , zero-voltage switching for all power semiconductors and input current ripple-free. The interleaved PWM converter is used on the input side to realize current ripple reduction. The secondstage is a full-bridge (low voltage mode) or half-ridge (high voltage mode) LLC resonant circuit to realize wide input voltage capability and accomplish wide zero-voltage or zero-current switching operation on active devices or rectifier diodes. Due to the fundamental ac, the input voltage of the half-bridge LLC converter is only one-half of full-bridge LLC converter, half-bridge circuit topology is operated at a high input voltage range and full-bridge circuit topology is operated at a low input voltage range. The selection of a half-bridge or full-bridge converter is implemented with an additional switch to realize wide input voltage operation. The interleaved PWM circuits and full-bridge-type LLC converter share same power switches. Thus, the switch counts are reduced and the single-stage current source dc converter is implemented in the presented circuit. The voltage double rectification topology is adopted on the output side to decrease diode counts and voltage rating on diodes. Finally, experimental verifications based on a 500 W circuit are demonstrated to validate the performance of the studied single-stage dc-dc converter.

Circuit Diagram
The circuit configuration of the studied circuit is shown in Figure 1a with the abilities of wide voltage operation capability, wide zero-voltage switching load range and less input ripple current. In the presented circuit, S 1~S4 are MOSFET devices, S ac is an ac switch. L r is resonant inductor, C r is resonant capacitor, L 1 and L 2 are input inductors, T is the isolated transformer with the magnetizing inductance L m , D o1 and D o2 are rectifier diodes, C o1 and C o2 are the output capacitors and R o is a load resistor. The circuits (L 1 , S 1 , S 2 , C) and (L 2 , S 3 , S 4 , C) are two boost converters. The gating signals of S 2 and S 4 are interleaved by half of switching cycle. Thus, the resultant input current ripple ∆i in is reduced to zero. S 1~S4 have the same duty cycle and equal to 0.5. Therefore, the boost voltage V C is equal to 2V in . In order to realize wide voltage input capability, there are two operated modes (Figure 1b,c) in the studied circuit. When input voltage is under a low input voltage mode V in, min~2 V in, min , switch S ac is off, as shown in Figure 1b. Circuit components C, S 1~S4 , C r , L r , T, D o1 , D o2 , C o1 and C o2 are operated as a full-bridge structure LLC converter. The current ripple ∆i in is equal to zero. When 2V in, min < V in < 4V in, min (high voltage mode), active devices S ac and S 3 are turned off and S 4 is on (Figure 1c). Circuit components C, S 1 , S 2 , S 4 , C r , L r , T, D o1 , D o2 , C o1 and C o2 are operated as a half-bridge structure LLC converter to obtain lower voltage gain. Therefore, a current-fed and wide input voltage LLC converter is achieved. Owing to resonant behavior of the LLC converter, power switches and rectifier diodes have soft switching operation capability. voltage of a half-bridge LLC converter is only one-half of a full-bridge LLC converter. However, the input voltage operation of an LLC converter is limited. It is not easy for an LLC converter to be applied in fuel cells or solar power applications with wide input voltage variation. A hybrid LLC circuit is proposed in this paper to implement wide voltage operation from Vin, min to 4Vin, min, zero-voltage switching for all power semiconductors and input current ripple-free. The interleaved PWM converter is used on the input side to realize current ripple reduction. The secondstage is a full-bridge (low voltage mode) or half-ridge (high voltage mode) LLC resonant circuit to realize wide input voltage capability and accomplish wide zero-voltage or zero-current switching operation on active devices or rectifier diodes. Due to the fundamental ac, the input voltage of the half-bridge LLC converter is only one-half of full-bridge LLC converter, half-bridge circuit topology is operated at a high input voltage range and full-bridge circuit topology is operated at a low input voltage range. The selection of a half-bridge or full-bridge converter is implemented with an additional switch to realize wide input voltage operation. The interleaved PWM circuits and fullbridge-type LLC converter share same power switches. Thus, the switch counts are reduced and the single-stage current source dc converter is implemented in the presented circuit. The voltage double rectification topology is adopted on the output side to decrease diode counts and voltage rating on diodes. Finally, experimental verifications based on a 500W circuit are demonstrated to validate the performance of the studied single-stage dc-dc converter.

Circuit Diagram
The circuit configuration of the studied circuit is shown in Figure 1a with the abilities of wide voltage operation capability, wide zero-voltage switching load range and less input ripple current. In the presented circuit, S1~S4 are MOSFET devices, Sac is an ac switch. Lr is resonant inductor, Cr is resonant capacitor, L1 and L2 are input inductors, T is the isolated transformer with the magnetizing inductance Lm, Do1 and Do2 are rectifier diodes, Co1 and Co2 are the output capacitors and Ro is a load resistor. The circuits (L1, S1, S2, C) and (L2, S3, S4, C) are two boost converters. The gating signals of S2 and S4 are interleaved by half of switching cycle. Thus, the resultant input current ripple Δiin is reduced to zero. S1~S4 have the same duty cycle and equal to 0.5. Therefore, the boost voltage VC is equal to 2Vin. In order to realize wide voltage input capability, there are two operated modes (Figure 1b,c) in the studied circuit. When input voltage is under a low input voltage mode Vin, min~2Vin, min, switch Sac is off, as shown in Figure 1b. Circuit components C, S1~S4, Cr, Lr, T, Do1, Do2, Co1 and Co2 are operated as a full-bridge structure LLC converter. The current ripple Δiin is equal to zero. When 2Vin, min < Vin < 4Vin, min (high voltage mode), active devices Sac and S3 are turned off and S4 is on (Figure 1c). Circuit components C, S1, S2, S4, Cr, Lr, T, Do1, Do2, Co1 and Co2 are operated as a half-bridge structure LLC converter to obtain lower voltage gain. Therefore, a current-fed and wide input voltage LLC converter is achieved. Owing to resonant behavior of the LLC converter, power switches and rectifier diodes have soft switching operation capability. (a)

Principles of Operation
The variable switching frequency related to input voltage and load conditions is used to adjust load voltage. Sac is kept at on or off state according to the low (Vin, min~2Vin, min) or high (2Vin, min~4Vin, min) input voltage mode. Figures 2 and 3 illustrate the PWM signals for low and high input voltage modes. The studied LLC converter has six effective operating steps if the series resonant frequency (fr) is greater than the switching frequency (fsw). For low input voltage mode (Figure 1b), ac switch Sac is in the on-state. L1, L2, S1~S4 and C are operated as two interleaved boost converters to accomplish input current ripple-free. The boost capacitor voltage VC = 2Vin due to the duty ratio dS1 = dS2 = dS3 = dS4 = 0.5. Components S1~S4, Lr, Cr, T, Do1 and Do2 are operated as a full-bridge structure LLC converter. Figure  2a gives the pulse-width modulation waveforms and Figure 2b-g show the circuits for six operating steps. Under the low input voltage mode, the voltage gain of the full-bridge structure LLC converter is GL=nVo/Vin,L, where Vin,L denotes Vin,min < Vin < 2Vin,min and n denotes the transformer turns ratio.
is still increasing and iL2 is decreasing in step 2.

Principles of Operation
The variable switching frequency related to input voltage and load conditions is used to adjust load voltage. S ac is kept at on or off state according to the low (V in, min~2 V in, min ) or high (2V in, min~4 V in, min ) input voltage mode. Figures 2 and 3 illustrate the PWM signals for low and high input voltage modes. The studied LLC converter has six effective operating steps if the series resonant frequency (f r ) is greater than the switching frequency (f sw ). For low input voltage mode (Figure 1b), ac switch S ac is in the on-state. L 1 , L 2 , S 1~S4 and C are operated as two interleaved boost converters to accomplish input current ripple-free. The boost capacitor voltage V C = 2V in due to the duty ratio d S1 = d S2 = d S3 = d S4 = 0.5. Components S 1~S4 , L r , C r , T, D o1 and D o2 are operated as a full-bridge structure LLC converter. Figure 2a gives the pulse-width modulation waveforms and Figure 2b-g show the circuits for six operating steps. Under the low input voltage mode, the voltage gain of the full-bridge structure LLC converter is G L = nV o /V in,L , where V in,L denotes V in,min < V in < 2V in,min and n denotes the transformer turns ratio.
Step 1 [t 0 ≤ t < t 1 ]: At t 0 , v CS2 and v CS3 are decreased to zero voltage and D S2 and D S3 become on due to i S2 (t 0 ) < 0 and i S3 (t 0 ) < 0. Active semiconductors S 2 and S 3 are turned on after time t 0 to realize zero-voltage switching. The boost inductor voltages V L1 equals V in and : Because of f r > f sw , i Lm equals i Lr at time t 1 . Therefore, D o2 is reverse biased. L m , C r , L m and L r are resonant in step 2 with the other resonant frequency f p = 1/2π (L m + L r )C r < f r . i L1 is still increasing and i L2 is decreasing in step 2.
Step 3 [t 2 ≤ t < t 3 ]: At half of switching cycle (t 2 = T sw /2), switches S 2 and S 3 turn off. Since i L1 (t 2 ) − i Lr1 (t 2 ) is greater than zero current and i Lr1 (t 2 ) + i L2 (t 2 ) is less than zero current, capacitors C S1 and C S4 will be discharged at time t 2 . After time t 2 , i Lr > i Lm , D o1 is forward biased and v Lm = nV o1 = nV o /2.
Step 4 [t 3 ≤ t < t 4 ]: At t 3 , the voltages v CS1 and v CS4 are decreased to zero voltage. Owing to the fact that i S1 (t 3 ) and i S4 (t 3 ) are both less than zero, D S1 and D S4 become on. After t 3 , S 1 and S 4 turn on with Appl. Sci. 2020, 10, 4672 4 of 16 zero-voltage switching. In this step, i Lr > i Lm so that D o1 conducts and v Lm = nV o /2. L r and C r are resonant with resonant frequency f r in this step.
Thus, i L1 and i L2 are decreasing and increasing.
Step 5 [t 4 ≤ t < t 5 ]: Owing to f sw < f r , i Lm equals i Lr at time t 4 so that D o1 is reverse biased. i L1 and i L2 decrease and increase, respectively.
Step 5 [t4  t  t5]: Owing to fsw < fr, iLm equals iLr at time t4 so that Do1 is reverse biased. iL1 and iL2 decrease and increase, respectively.
Step 6 ends at t = Tsw + t0 (a) iLr vCr   For high input voltage mode (Figure 1c), Sac and S3 are off and S4 is on. Only active devices S1 and S2 are gated to adjust load voltage. Therefore, only one boost converter by L1, S1, S2 and C and the half-bridge structure LLC resonant converter by C, S1, S2, Lr, Cr, T and S4 are used to realize zerovoltage turn-on. In high input voltage mode, the LLC converter has voltage gain GH = 2nVo/Vin, H, where Vin, H denotes 2Vin, min < Vin < 4Vin, min. Based on the dc voltage gains GL = nVo/Vin, L (low input voltage mode) and GH = 2nVo/Vin,H (high input voltage mode), it can obtain GH = GL due to Vin, H = 2Vin, L. It means the proposed converter has the same circuit characteristics under low and high input voltage modes. Figure 3a gives the PWM signals and Figures 3b-g show the circuits for six operating steps.
Step 6 [t5  t  Tsw + t0]: Switch S1 turns off at time t5. Since iLr is less than iLm and iL1 is less than iLr(t5), diode Do2 conducts and CS2 is discharged. When the voltage of CS2 is decreased to zero voltage at time Tsw + t0. For high input voltage mode (Figure 1c), S ac and S 3 are off and S 4 is on. Only active devices S 1 and S 2 are gated to adjust load voltage. Therefore, only one boost converter by L 1 , S 1 , S 2 and C and the half-bridge structure LLC resonant converter by C, S 1 , S 2 , L r , C r , T and S 4 are used to realize zero-voltage turn-on. In high input voltage mode, the LLC converter has voltage gain Step 1 [t 0 ≤ t < t 1 ]: v CS2 = 0 at t 0 . Owing to i Lr (t 0 ) − i L1 (t 0 ) < 0, D S2 is forward bias and S 2 turns on after t > t 0 to accomplish zero-voltage switching. i L1 increases and C r and L r are resonant and v Lm = −nV o /2.
Step 2 [t 1 ≤ t < t 2 ]: D o2 is reverse biased owing to i Lr = i Lm at time t 1 . Thus, L m , C r and L r are resonant and i L1 increases due to V L1 = V in .
Step 4 [t 3 ≤ t < t 4 ]: v CS1 = 0 at time t 3 . Owing to i L1 (t 3 ) > i Lr (t 3 ), the body diode D S1 becomes on and S 1 can be turned on after t > t 3 to achieve soft switching turn-on. i L1 is decreasing in step 4 and D o1 conducts such that v Lm = nV o /2.
Step 5 [t 4 ≤ t < t 5 ]: At time t 4 , i Lm equals i Lr and D o1 becomes off. L m , C r and L r are resonant and i L1 decreases due to V L1 = V in − V C < 0.
Step 6 [t 5 ≤ t < T sw + t 0 ]: Switch S 1 turns off at time t 5 . Since i Lr is less than i Lm and i L1 is less than i Lr (t 5 ), diode D o2 conducts and C S2 is discharged. When the voltage of C S2 is decreased to zero voltage at time T sw + t 0 . (a)

Circuit Analysis
For low input voltage mode (Vin = Vin, min~2Vin, min), two boost converters and one full-bridge structure LLC converter is used to reduce input ripple current and obtain soft switching turn-on operation. However, only one boost converter and a half-bridge structure LLC converter are adopted for high input voltage mode (Vin = 2Vin, min~4Vin, min). According to voltage-second balance on L1 and L2, the output voltage VC of the boost converter is obtained in Equation (1).
where d = 0.5 for S1~S4 under low voltage mode and for S1 and S2 under high voltage mode. Since the PWM signals of S1 and S2 are phase shifted with respective to the signals of S3 and S4 by half switching cycle, the inductor current ripples iL1 and iL2 can be eliminated by each other. Therefore, the resultant input current ripple iin = iL1 + iL2 is reduced to zero. The voltage rating on S1~S4 is equal to the boost voltage VC (=2Vin). The frequency control scheme [16] is adopted to analysis the circuit features and voltage gain of the adopted LLC converter. To implement wide input voltage operation, two operating modes (low and high input voltage modes) are operated. The magnetizing inductor voltage at fundamental frequency is derived in (2).
Based on the full-bridge LLC converter (low voltage mode) and the half-bridge LLC converter (high voltage mode), the input voltage of the resonant converter at fundamental frequency Vab, rms is derived in (3).
The primary-side resistance of transformer T at fundamental switching frequency is derived in Equation (4).
The voltage gain of the equivalent resonant tank (Cr, Lr, Lm and Rac) is derived in Equation (5).

Circuit Analysis
For low input voltage mode (V in = V in, min~2 V in, min ), two boost converters and one full-bridge structure LLC converter is used to reduce input ripple current and obtain soft switching turn-on operation. However, only one boost converter and a half-bridge structure LLC converter are adopted for high input voltage mode (V in = 2V in, min~4 V in, min ). According to voltage-second balance on L 1 and L 2 , the output voltage V C of the boost converter is obtained in Equation (1).
where d = 0.5 for S 1~S4 under low voltage mode and for S 1 and S 2 under high voltage mode. Since the PWM signals of S 1 and S 2 are phase shifted with respective to the signals of S 3 and S 4 by half switching cycle, the inductor current ripples ∆i L1 and ∆i L2 can be eliminated by each other. Therefore, the resultant input current ripple ∆i in = ∆i L1 + ∆i L2 is reduced to zero. The voltage rating on S 1~S4 is equal to the boost voltage V C (=2V in ).
The frequency control scheme [16] is adopted to analysis the circuit features and voltage gain of the adopted LLC converter. To implement wide input voltage operation, two operating modes (low and high input voltage modes) are operated. The magnetizing inductor voltage at fundamental frequency is derived in (2).
Based on the full-bridge LLC converter (low voltage mode) and the half-bridge LLC converter (high voltage mode), the input voltage of the resonant converter at fundamental frequency V ab, rms is derived in (3).
The primary-side resistance of transformer T at fundamental switching frequency is derived in Equation (4).
Appl. Sci. 2020, 10, 4672 8 of 16 The voltage gain of the equivalent resonant tank (C r , L r , L m and R ac ) is derived in Equation (5).
where Q = √ L r /C r /R ac , L n = L m /L r and F = f sw /f r . The gain curves of |G| related to F and Q are shown in Figure 4 for the adopted prototype circuit. From Equation (5), the output voltage V o can be obtained and expressed in Equation (6).
It is clear that the output voltage is related to the frequency ration F, quality factor Q and inductor ratio L n . If F equals unity, V o is independent to l n and Q. Owing to the fact that V in,H is designed as two times of V in,L , two output voltage equations in (5) are identical. Therefore, the voltage gains V Lm,rms /V ab,rms of the half-bridge and half-bridge LLC converter in the developed circuit are identical. As a result of this, the LLC resonant converter is operated at inductive load impedance (negative slope of voltage gain curve). Thus, all active semiconductors S 1~S4 can be turned on at zero-voltage condition.  Figure 4 for the adopted prototype circuit. From Equation (5), the output voltage Vo can be obtained and expressed in Equation (6).
It is clear that the output voltage is related to the frequency ration F, quality factor Q and inductor ratio Ln. If F equals unity, Vo is independent to ln and Q. Owing to the fact that Vin,H is designed as two times of Vin,L, two output voltage equations in (5) are identical. Therefore, the voltage gains VLm,rms/Vab,rms of the half-bridge and half-bridge LLC converter in the developed circuit are identical. As a result of this, the LLC resonant converter is operated at inductive load impedance (negative slope of voltage gain curve). Thus, all active semiconductors S1~S4 can be turned on at zerovoltage condition.

Design Steps and Experimental Verifications
The proposed circuit was created and experimented in a laboratory prototype with Vin = 20~80 V (4:1 ratio), Vo = 400 V, series resonant frequency fr = 100 kHz and the maximum output power Po = 500 W. Two boost circuits with interleaved PWM are employed on the input side to achieve a ripplefree input current. For low input voltage mode, the input voltage range Vin is between 20 and 40 V. The full-bridge-type LLC converter is operated to control load voltage. When input voltage Vin = 40 V~80 V, the proposed circuit is worked under the high voltage mode with the half-bridge-type LLC converter. Since the duty cycle dS1 = dS2 = dS3 = dS4 = 0.5, the inductances L1 and L2 are obtained in

Design Steps and Experimental Verifications
The proposed circuit was created and experimented in a laboratory prototype with V in = 20~80 V (4:1 ratio), V o = 400 V, series resonant frequency f r = 100 kHz and the maximum output power P o = 500 W. Two boost circuits with interleaved PWM are employed on the input side to achieve a ripple-free input current. For low input voltage mode, the input voltage range V in is between 20 and 40 V. The full-bridge-type LLC converter is operated to control load voltage. When input voltage V in = 40 V~80 V, the proposed circuit is worked under the high voltage mode with the half-bridge-type LLC converter. Since the duty cycle d S1 = d S2 = d S3 = d S4 = 0.5, the inductances L 1 and L 2 are obtained in Equation (7) with the defined inductor ripple currents ∆i L1 = ∆i L2 = 4 A at resonant frequency f sw = 100 kHz.
To design the resonant converter, the inductor ratio L n = 5 is adopted at maximum power under the full-bridge converter. The curves of voltage gain at the presented converter are demonstrated in Figure 4 with the normalized gain G n = nV o /4V in . The transient voltage between high and low input voltage modes is set at 40 V. The voltage comparator (schmitt trigger circuit) with ±2 V voltage tolerance is used at 40 V to achieve transient voltage detector. Therefore, the input voltage range at low voltage mode operation is from 20 to 42 V. Similarly, the input voltage range at high voltage mode operation is from 38 to 80 V. The transfer function of voltage gain G for each voltage mode is expressed in (5). Since the input voltage range at high voltage mode is two times the input voltage range at low voltage mode V in, H = 2V in, L , it can obtain that voltage gain G H at high voltage mode is identical to the voltage gain G L at low voltage mode. Hence, the circuit design for two input voltage modes are identical. The full-bridge LLC converter is operated for low input voltage mode. S 1~S4 are controlled to make V o = 400 V. It is assumed that the voltage gain at 40 V input is unity. The necessary turn ratio n is calculated in Equation (8).
TDK (Tokyo Denki Kagaku) EER 42 core is used to implement transformer T with N p = 14 and N s = 35. The maximum and minimum voltage gain under low voltage mode operation are expressed in Equations (9) and (10).
The fundamental resistance R ac in (4) is calculated as: Based on voltage gain in Figure 4, the load voltage V o is controlled well under Q < 0.22. The circuit parameters L r , L m and C r are obtained in (12)- (14) according to the selected values f r = 100 kHz, L n = 5 and Q = 0.2.
L m = L n L r = 5 × 3.3 = 16.5µH (13) Owing to the fact that voltage double rectifier topology is used on the output side, the voltage ratings of switches and diodes are obtained in Equations (15)-(17).
The selected output split capacitances are C o1 = C o2 = 300 µF and the dc bus capacitance C = 2000 µF. Power MOSFETs n-channel IRFB4229 (250 V/46 A) are selected for switches S 1~S4 and S ac . Diodes BYC8-600 (600 V/8 A) are used for rectifier diodes D o1 and D o2 . The frequency modulation is implemented by an integrated circuit UCC25600. The input voltage mode detection is implemented by using schmitt trigger comparator. Figure 5 shows the photograph and the experimental setup of the prototype circuit. Figures 6-9 demonstrates the measured waveforms at low input voltage mode operation. Figures 6 and 7 demonstrate the test results at 20 V input voltage condition. Under low voltage mode operation, the switch S ac is turned on and the full-bridge-type LLC converter is worked to obtain high voltage gain. Two input boost converters are interleaved operation to achieve ripple-free input current. Figure 6a illustrates the gating signals of full bridge converter. Figure 6b provides the test results of i L1 , i L2 and i in . It can observe that the current ripples ∆i L1 and∆i L2 cancelled each other. Thus, the input current ripple ∆i in is close to zero. Figure 6c shows the measured results of resonant current i Lr , resonant voltage v Cr and the dc bus current i C . Since the switching frequency at 20 V input is less than the resonant frequency, the measured resonant current i Lr is a quasi-sinusoidal waveform. Figure 6d provides the diode currents and output capacitor voltages. It is clear that D o1 and D o2 are turned off at zero-current switching and V o1 = V o2 = 200 V. Figure 7a,b provides the test results of active device S 1 at 20% and 100% rated power, respectively. In the same way, the experimental results of active device S 2 at 20% and 100% rated power are demonstrated in Figure 7c,d. It can see that S 1 and S 2 turn on at zero voltage from 20% rated power. Figures 8 and 9 demonstrate the experimental results at 39 V input condition. Two input boost current ripples are cancelled so that the resultant input current ripple ∆i in ≈ 0 as shown in Figure 8b. Since the switching frequency at 39 V input condition is very close to resonant frequency, the current i Lr is a sinusoidal waveform as shown in Figure 8c and diodes D o1 and D o2 turn off at zero current switching (Figure 8d). The voltages V o1 and V o2 are balanced each other and V o1 = V o2 = 200 V. Figure 9 shows the experimental waveforms of the switches S 1 and S 2 at 39 V of input and 20% and 100% load conditions. It is clear that S 1 and S 2 all turn on at zero-voltage switching from 20% rated power. Figures 10-13 provide the measured waveforms at high input voltage mode operation (V in = 40 V~80 V). Under the high input voltage mode, S ac and S 3 are off and S 4 is on. Figures 10 and 11 illustrate the experimental results at V in = 41 V input condition. At 41 V input condition, the resonant frequency is greater than the switching frequency. Figure 10a demonstrates the test waveforms of v Cr , i Lr , v S1, g and v S2, g at the rated power. Figure 10b gives the test results of i L1 , i S1 , i S2 and −i Lr . The experimental waveforms i Do1 , i Do2 , V o1 and V o2 are provided in Figure 10c. Diodes D o1 and D o2 are turned off at zero current. The test results of S 1 and S 2 at 20% and the rated power are provided in Figure 11. It is clear that S 1 and S 2 turn on at zero-voltage voltage from 20% rated power. Similarly, the test waveforms at 80 V input case are shown in Figures 12 and 13. The resonant current i Lr (Figure 12a is a sinusoidal waveform and D o1 and D o2 (Figure 12c) turn off at zero-current switching. From the measured results in Figure 13, both switches S 1 and S 2 can achieve soft switching operation from 20% rated power.
The selected output split capacitances are Co1 = Co2 = 300 F and the dc bus capacitance C = 2000 F. Power MOSFETs n-channel IRFB4229 (250 V/46 A) are selected for switches S1~S4 and Sac. Diodes BYC8-600 (600 V/8 A) are used for rectifier diodes Do1 and Do2. The frequency modulation is implemented by an integrated circuit UCC25600. The input voltage mode detection is implemented by using schmitt trigger comparator. Figure 5 shows the photograph and the experimental setup of the prototype circuit. Figures 6-9 demonstrates the measured waveforms at low input voltage mode operation. Figures 6 and 7 demonstrate the test results at 20 V input voltage condition. Under low voltage mode operation, the switch Sac is turned on and the full-bridge-type LLC converter is worked to obtain high voltage gain. Two input boost converters are interleaved operation to achieve ripple-free input current. Figure 6a illustrates the gating signals of full bridge converter. Figure 6b provides the test results of iL1, iL2 and iin. It can observe that the current ripples ΔiL1 andΔiL2 cancelled each other. Thus, the input current ripple Δiin is close to zero. Figure 6c shows the measured results of resonant current iLr, resonant voltage vCr and the dc bus current iC. Since the switching frequency at 20 V input is less than the resonant frequency, the measured resonant current iLr is a quasi-sinusoidal waveform. Figure 6d provides the diode currents and output capacitor voltages. It is clear that Do1 and Do2 are turned off at zero-current switching and Vo1 = Vo2 = 200 V. Figures 7a,b provides the test results of active device S1 at 20% and 100% rated power, respectively. In the same way, the experimental results of active device S2 at 20% and 100% rated power are demonstrated in Figure 7c,d. It can see that S1 and S2 turn on at zero voltage from 20% rated power. Figures 8 and 9 demonstrate the experimental results at 39 V input condition. Two input boost current ripples are cancelled so that the resultant input current ripple iin  0 as shown in Figure 8b. Since the switching frequency at 39 V input condition is very close to resonant frequency, the current iLr is a sinusoidal waveform as shown in Figure 8c and diodes Do1 and Do2 turn off at zero current switching (Figure 8d). The voltages Vo1 and Vo2 are balanced each other and Vo1 = Vo2 = 200 V. Figure 9 shows the experimental waveforms of the switches S1 and S2 at 39 V of input and 20% and 100% load conditions. It is clear that S1 and S2 all turn on at zero-voltage switching from 20% rated power. Figures 10-13 provide the measured waveforms at high input voltage mode operation (Vin = 40 V~80 V). Under the high input voltage mode, Sac and S3 are off and S4 is on. Figures 10 and 11 illustrate the experimental results at Vin = 41 V input condition. At 41 V input condition, the resonant frequency is greater than the switching frequency. Figure 10a demonstrates the test waveforms of vCr, iLr, vS1, g and vS2, g at the rated power. Figure 10b gives the test results of iL1, iS1, iS2 and −iLr. The experimental waveforms iDo1, iDo2, Vo1 and Vo2 are provided in Figure  10c. Diodes Do1 and Do2 are turned off at zero current. The test results of S1 and S2 at 20% and the rated power are provided in Figure 11. It is clear that S1 and S2 turn on at zero-voltage voltage from 20% rated power. Similarly, the test waveforms at 80 V input case are shown in Figures 12 and 13. The resonant current iLr (Figure 12a is a sinusoidal waveform and Do1 and Do2 (Figure 12c) turn off at zerocurrent switching. From the measured results in Figure 13, both switches S1 and S2 can achieve soft switching operation from 20% rated power.      Experimental results of power switches S 1 and S 2 under low voltage mode operation and V in = 20 V: (a) v S1, g , v S1, d , i S1 at 20% rated power; (b) v S1, g , v S1, d , i S1 at 100% power; (c) v S2, g , v S2, d , i S2 at 20% rated power; (d) v S2, g , v S2, d , i S2 at 100% power.   (c) (d) . Experimental results of power switches S1 and S2 under low voltage mode operation and Vin = 39 V: (a) vS1, g, vS1, d, iS1 at 20% rated power; (b) vS1, g, vS1, d, iS1 at 100% power; (c) vS2, g, vS2, d, iS2 at 20% rated power; (d) vS2, g, vS2, d, iS2 at 100% power. Figure 9. Experimental results of power switches S 1 and S 2 under low voltage mode operation and V in = 39 V: (a) v S1, g , v S1, d , i S1 at 20% rated power; (b) v S1, g , v S1, d , i S1 at 100% power; (c) v S2, g , v S2, d , i S2 at 20% rated power; (d) v S2, g , v S2, d , i S2 at 100% power. (c)    . Experimental results of power switches S 1 and S 2 under high voltage mode operation and V in = 41 V: (a) v S1, g , v S1, d , i S1 at 20% rated power; (b) v S1, g , v S1, d , i S1 at 100% power; (c) v S2, g , v S2, d , i S2 at 20% rated power; (d) v S2, g , v S2, d , i S2 at 100% power.   Test waveforms at V in = 80 V and rated power: (a) v S1, g , v S2, g , v Cr , i Lr ; (b) i L1 , i S1 , i S2 , −i Cr ; (c) i Do1 , i Do2 , V o1 , V o2 .