Power Loss Analysis and a Control Strategy of an Active Cell Balancing System Based on a Bidirectional Flyback Converter

: This research proposes a power loss analysis and a control strategy of an active cell balancing system based on a bidirectional ﬂyback converter. The system aims to achieve an energy storage application with cells connected in 6 series and 1 parrarel (6S1P) design. To reduce the structural complexity, Metal-Oxide-Semiconductor Field E ﬀ ect Transistor (MOSFET) array commonly used in balancing system is replaced with the photovoltaic Metal-Oxide-Semiconductor (photoMOS) array. Power loss analysis is utilized for the system operating in the proper current to reach higher e ﬃ ciency. The proposed loss models are divided into conduction loss, switching loss, and copper and core loss of the transformer. Besides, the models are used to estimate the loss of converter operating in di ﬀ erent balance conditions to evaluate the system e ﬃ ciency and veriﬁed by the implemented balancing circuit. By way of the loss models, the balancing current can be determined to reach higher e ﬃ ciency of the proposed system. For further improvement of the balancing process, the system has also applied a control strategy to enhance the balancing performance that reduces 50% maximum voltage di ﬀ erence than traditional cell-to-pack architecture, and 47% balancing duration than traditional pack-to-cell architecture.


Introduction
In recent years, with the development of science and technology, the issue of energy shortages in island countries and outlying islands has been expanding. Based on energy shortage and environmental awareness, a microgrid with an energy storage system (ESS) has become one of the main projects for the development of science and technology [1]. Usually, ESS utilizes battery modules as energy storage devices, but the battery modules are not only expensive but also account for a relatively high proportion of the overall cost of ESS. Therefore, it is even more important to extend battery life. Battery modules are usually composed of cells in series and parallel. However, even the same batch of cells produced from the same manufactory have different characteristics from each other. These differences will become more apparent over time and reduce the life and safety of battery modules. To figure out this problem, it is essential to develop the technology of the battery management system (BMS). The BMS technology can increase the maximum capacity of the battery module and extend the life of the battery module. The principal function of BMS is to monitor, protect, and balance the battery module [2,3]. The BMS monitors various parameters such as voltage, current, and temperature of each module and reduce the efficiency of energy transfer. In contrast, the individual charging system performs more effectively than the other. It can reduce the balance time and increase the efficiency of energy transfer. The individual charging system has the following forms: buck-boost converter, quasi-resonant buck-boost converter, and flyback converter. Each type of individual method benefits from its structure, such as balancing duration, balancing times, the complexity of architecture, or cost. Taking all the factors into consideration, this research implements an active cell balancing circuit based on a bidirectional flyback converter. The proposed system further improves the system by applying a control strategy which is able to reduce the balancing duration. Moreover, this research also proposes loss models to estimate the bidirectional flyback converter to discuss how to determine the proper balancing current of the proposed circuit to achieve the highest efficiency of the bidirectional flyback converter and reduce the losses in the balancing process.

Hardware Description of the Proposed Cell Balancing System
In this research, the proposed system is developed for a cells connected in 6 series and 1 parrarel (6S1P) battery pack. The reason why the system is only for a small pack is that it can be series-connected to reach a higher voltages, such as 48 V or 400 V. The specification can be obtained in Section 4. Figure 1 shows the block diagram of the proposed cell balancing system, which consists of a bidirectional flyback converter, a microcontroller unit (MCU:dsPIC33FJ64GS606) manufactured by Microchip Technology in Chandler, Arizona, United States, a photoMOS array, an auxiliary power circuit, a differential voltage circuit, and driver circuits. In this research, the bidirectional flyback is the key part of the system, which can realize energy transfer in both directions, to achieve the balancing function with a simpler structure. The microcontroller unit (MCU) shown in Figure 1 not only provides the control signal for the photoMOS and bidirectional flyback converter but also receives all the voltage of cells by the differential voltage circuit, then applies the control strategy via the signal captured to complete the balancing process more efficiently. Its control strategy can be observed in Figure 2, where V Bn is the voltage of each cell, ∆V Bn is the voltage difference between each cell and the average voltage of all the cells, V er is the parameter of the minimum voltage error to activate the balancing process, and T 1 is the time duration for a single balancing process. The MCU will gather the voltages of the cells through a differential voltage circuit. By calculating the ∆V Bn of each cell, the system will decide which cell needs to be balanced. If the chosen cell has the highest voltage, the cell-to-pack solution will be carried out, and the balancing system will be operated in boost mode until the timer counts up to T 1 . If the chosen cell has the lowest voltage, the pack-to-cell solution will be carried out, and the balancing system will be operated in buck mode until the timer counts up to T 1 .
The common individual charge battery balance architecture can only realize energy transfer in one direction. For example, the pack-to-cell architecture has the ability to effectively charge the cell which capacity is low, but it cannot efficiently transfer the energy of the cell which capacity is high to the pack; the cell-to-pack architecture is able to transfer the energy from the cell which has a higher capacity to the pack effectually, but it is unable to charge the low capacity cell with the pack very efficaciously. The implemented cell balancing system has the most important feature that the energy can be extracted not only from pack to cell but also from cell to pack. To achieve the bidirectional balancing behavior, the implemented system replaces the rectifier diode in the traditional flyback converter with synchronous rectification MOSFET and simultaneously reduces the losses caused by the output rectifier diode. Compared with the system using a multi-winding transformer or multiple flyback converters [26], it simplifies the structure by applying a bidirectional flyback converter with a switch array instead and reduces the cost further by replacing MOSFET with photoMOS in the switch array. Furthermore, the commonly used converter in balancing systems operates with a low constant current, while the proposed solution can implement an adjustable balancing current not only for various control strategies, but also for efficiency measurement of the system operating in different curents.

Power Loss Analysis of the Cell Balancing System
The proposed cell balancing system, as shown in Figure 3, is realized through the bidirectional flyback converter topology where VBn is the voltage of nth cell, S n is the photoMOS array, L m is the field inductor of the transformer, N is the turn ratio of the transformer, and Q 1 and Q 2 are the MOSFET for switching. The designed cell balancing system utilizes a 6S1P lithium ternary battery module. The cells' state of charge will determine the operation mode of the photoMOS relay and the MOSFETs. Figure 4 shows that the proposed has two operation modes, where I 1 is the balancing current, and I 2 is the current at high side. Mode A is a boost mode. For example, when the voltage V B1 of the first cell is higher than the voltage of other cells in the module, the photoMOS S 1 will be turned on, and the MOSFET Q 1 will work as the main switch to control the circuit. The field inductor L m of the transformer will store the energy of the cell, and transfer it to the battery module. The MOSFET Q 2 will be operated with synchronous rectification control to reduce the conduction loss of the rectifier diode, as shown in Figure 4a; When the voltage V B1 of the first cell is less than the voltage of other cells in the module, the proposed system will operate in mode B. The photoMOS S 1 will turn on, and the MOSFET Q 2 will work as the main switch to control the circuit. The field inductor L m of the transformer will store the energy of the battery module, and then transfer it to the cell. At this time, the MOSFET Q 1 will be operated with synchronous rectification control to reduce the conduction loss of the rectifier diode, as shown in Figure 4b. By operating in these two modes alternately, after multiple balancing actions, the balancing system can achieve the equilibrium of the battery module.

Power Loss Analysis of the Cell Balancing System
The proposed cell balancing system, as shown in Figure 3, is realized through the bidirectional flyback converter topology where VBn is the voltage of nth cell, Sn is the photoMOS array, Lm is the field inductor of the transformer, N is the turn ratio of the transformer, and Q1 and Q2 are the MOSFET for switching. The designed cell balancing system utilizes a 6S1P lithium ternary battery module. The cells' state of charge will determine the operation mode of the photoMOS relay and the MOSFETs. Figure 4 shows that the proposed has two operation modes, where I1 is the balancing current, and I2 is the current at high side. Mode A is a boost mode. For example, when the voltage VB1 of the first cell is higher than the voltage of other cells in the module, the photoMOS S1 will be turned on, and the MOSFET Q1 will work as the main switch to control the circuit. The field inductor Lm of the transformer will store the energy of the cell, and transfer it to the battery module. The MOSFET Q2 will be operated with synchronous rectification control to reduce the conduction loss of the rectifier diode, as shown in Figure 4a; When the voltage VB1 of the first cell is less than the voltage of other cells in the module, the proposed system will operate in mode B. The photoMOS S1 will turn on, and the MOSFET Q2 will work as the main switch to control the circuit. The field inductor Lm of the transformer will store the energy of the battery module, and then transfer it to the cell. At this time, the MOSFET Q1 will be operated with synchronous rectification control to reduce the conduction loss of the rectifier diode, as shown in Figure 4b. By operating in these two modes alternately, after multiple balancing actions, the balancing system can achieve the equilibrium of the battery module.

Power Loss Analysis of the Cell Balancing System
The proposed cell balancing system, as shown in Figure 3, is realized through the bidirectional flyback converter topology where VBn is the voltage of nth cell, Sn is the photoMOS array, Lm is the field inductor of the transformer, N is the turn ratio of the transformer, and Q1 and Q2 are the MOSFET for switching. The designed cell balancing system utilizes a 6S1P lithium ternary battery module. The cells' state of charge will determine the operation mode of the photoMOS relay and the MOSFETs. Figure 4 shows that the proposed has two operation modes, where I1 is the balancing current, and I2 is the current at high side. Mode A is a boost mode. For example, when the voltage VB1 of the first cell is higher than the voltage of other cells in the module, the photoMOS S1 will be turned on, and the MOSFET Q1 will work as the main switch to control the circuit. The field inductor Lm of the transformer will store the energy of the cell, and transfer it to the battery module. The MOSFET Q2 will be operated with synchronous rectification control to reduce the conduction loss of the rectifier diode, as shown in Figure 4a; When the voltage VB1 of the first cell is less than the voltage of other cells in the module, the proposed system will operate in mode B. The photoMOS S1 will turn on, and the MOSFET Q2 will work as the main switch to control the circuit. The field inductor Lm of the transformer will store the energy of the battery module, and then transfer it to the cell. At this time, the MOSFET Q1 will be operated with synchronous rectification control to reduce the conduction loss of the rectifier diode, as shown in Figure 4b. By operating in these two modes alternately, after multiple balancing actions, the balancing system can achieve the equilibrium of the battery module.    To determine the best balance current to achieve the highest efficiency and the least losses of the proposed system, it is necessary to estimate the losses caused by each component of the balancing architecture during the energy transfer. In the cell balancing situation, to implement the bidirectional flyback converter, the designed converter will only operate in continuous conduction mode (CCM) to prevent the energy inversion. Therefore, all the losses are considered in CCM. The losses caused by gate drivers, differential voltage sensors, or photoMOS relays will not be taken into account either because the power loss analysis proposed by this research attempts to find the relation between operating current and the bidirectional flyback converter's efficiency. In this case, the auxiliary power of those components is supplied by DC power manufactured by Gwinstek Company. The losses are mainly composed of the conduction and switching losses of the power switch, the copper and iron loss of the transformer, and the line loss. This research discusses the loss model of the proposed circuit operating in buck mode. As shown in Figure 5, this loss model replaces the battery module with the ideal voltage source V pack . The cell is replaced by the ideal voltage source V Bn . R s is the wire resistance, R L is the resistance of the transformer, R ds1(on) is the on-resistance of MOSFET Q 1 , R ds2(on) is the on-resistance of MOSFET Q 2 , and L m is the field inductor of the transformer. The main voltage and current waveforms of the bidirectional flyback converter operating in buck mode can be obtained in Figure 6, where v gs1 is the MOSFET Q 1 gate signal, v gs2 is the MOSFET Q 2 gate signal, v ds1 is the voltage across the MOSFET Q 1 from drain to source, v ds2 is the voltage across the MOSFET Q 2 from drain to source, i L is the current passing through the L m , and i D is the current flowing through the MOSFET Q2.
Appl. Sci. 2020, 10, 4380 6 of 17 To determine the best balance current to achieve the highest efficiency and the least losses of the proposed system, it is necessary to estimate the losses caused by each component of the balancing architecture during the energy transfer. In the cell balancing situation, to implement the bidirectional flyback converter, the designed converter will only operate in continuous conduction mode (CCM) to prevent the energy inversion. Therefore, all the losses are considered in CCM. The losses caused by gate drivers, differential voltage sensors, or photoMOS relays will not be taken into account either because the power loss analysis proposed by this research attempts to find the relation between operating current and the bidirectional flyback converter's efficiency. In this case, the auxiliary power of those components is supplied by DC power manufactured by Gwinstek Company. The losses are mainly composed of the conduction and switching losses of the power switch, the copper and iron loss of the transformer, and the line loss. This research discusses the loss model of the proposed circuit operating in buck mode. As shown in Figure 5, this loss model replaces the battery module with the ideal voltage source Vpack. The cell is replaced by the ideal voltage source VBn. Rs is the wire resistance, RL is the resistance of the transformer, Rds1(on) is the on-resistance of MOSFET Q1, Rds2(on) is the on-resistance of MOSFET Q2, and Lm is the field inductor of the transformer. The main voltage and current waveforms of the bidirectional flyback converter operating in buck mode can be obtained in Figure 6, where vgs1 is the MOSFET Q1 gate signal, vgs2 is the MOSFET Q2 gate signal, vds1 is the voltage across the MOSFET Q1 from drain to source, vds2 is the voltage across the MOSFET Q2 from drain to source, iL is the current passing through the Lm, and iD is the current flowing through the MOSFET Q2.  First, the switching loss is loss caused by the current-voltage overlap region during the switching. Because this loss is very difficult to calculate accurately, this research uses the estimation method in the analysis of the MOSFET switching loss proposed by Z. John Shen to switch loss estimation [27], as shown in Figure 7 and Equation (1) where IDS is the current on the MOSFET when turning on, VDS is the voltage across the drain-source of the MOSFET, ton and toff are the time required for the MOSFET to switch on and off, fsw is the frequency of the MOSFET operation, and Coss is the parasitic capacitor of the MOSFET. In buck mode, due to the synchronous rectification technology in the bidirectional flyback converter, only the MOSFET Q1 will generate switching losses. First, the switching loss is loss caused by the current-voltage overlap region during the switching. Because this loss is very difficult to calculate accurately, this research uses the estimation method in the analysis of the MOSFET switching loss proposed by Z. John Shen to switch loss estimation [27], as shown in Figure 7 and Equation (1) where I DS is the current on the MOSFET when turning on, V DS is the voltage across the drain-source of the MOSFET, t on and t off are the time required for the MOSFET to switch on and off, f sw is the frequency of the MOSFET operation, and C oss is the parasitic capacitor of the MOSFET. In buck mode, due to the synchronous rectification technology in the bidirectional flyback converter, only the MOSFET Q 1 will generate switching losses. Secondly, the conduction loss is caused by the energy transferring through the transformer, the wire resistance, and the switch's on-resistance. The followings are two operating modes in a cycle. Utilizing the switching of MOSFET Q1 and Q2, these two modes will estimate the conduction loss caused by the energy transfer, as shown in Figure 6. Secondly, the conduction loss is caused by the energy transferring through the transformer, the wire resistance, and the switch's on-resistance. The followings are two operating modes in a cycle. Utilizing the switching of MOSFET Q 1 and Q 2 , these two modes will estimate the conduction loss caused by the energy transfer, as shown in Figure 6.
Interval I [t 0 -t 1 ]: In Interval I, the MOSFET Q 1 is on, and the field inductor L m of the transformer stores energy from battery module V pack via the current i L . Since the current i L rises linearly, in the loss calculation in this mode, the current i L is averaged. As shown in Figure 5a, the current will pass through the wire resistance R s and the on-resistance R ds1(on) of the MOSFET Q 1 . The loss formula is given in Equations (2) and (3) W when t = t 1 , the MOSFET Q 1 turns off, and the MOSFET Q 2 turns on. This mode ends.
Interval II [t 1 -t 2 ]: In Interval II, the MOSFET Q 2 is on, and the field inductor L m of the transformer charges the cell V Bn via the current i L . Since the current i L decreases linearly, in the loss calculation in this mode, the current i L is averaged. As shown in Figure 5b, the current will pass through the on-resistance R ds2(on) of the MOSFET Q 2 . The loss formula is given in Equation (4).
when t = t 2 , the MOSFET Q 2 turns off, and the MOSFET Q 1 turns on. This mode ends. Through the analysis above, the conduction loss in a cycle can be calculated as follows: Besides, the loss of the transformer is divided into the copper loss (P copper ) and the iron loss (P core ). The copper loss is mainly caused by the current passing through the AC impedance R L(AC) of the transformer. However, R L(AC) is hard to estimate with a simple mathematical model because it is affected by the skin effect and the proximity effect. Moreover, these two effects are also influenced by the thickness, stacking, and coupling coefficient of the wire. While the transformer DC impedance R L(DC) is relatively easy to measure, to simplify the calculation of R L(AC) , using the transformer AC impedance factor λ represents the relationship between R L(AC) and R L(DC) [28], as shown in Equation (10), and the copper loss is calculated as in Equation (11). The transformer iron loss calculation needs to query the corresponding transformer material, frequency, temperature, excitation current, etc. In the research, it is hard to obtain relevant parameters of the transformer used in the system, so the research takes the material of PC40 as an example, the iron loss formula provided by the manufacturer is as Equation (12) shown where B is the magnetic induction intensity variation of the transformer, and the V e is the effective volume of the transformer core.
P copper = i 2 L(rms) R L(AC) (11) The total loss of the system in a cycle can be obtained by summing up all the losses parts estimated above as P total = P sw + P R s + P R ds1(on) + P R ds2(on) + P copper + P core (13) The loss model of the proposed circuit operating in boost mode is similar to the proposed operating in buck mode. The only difference is the current direction and parameters. Therefore, the loss model of the proposed circuit operating in boost mode will not be discussed in this research.

Design Considerations
The key parameters of the bidirectional flyback converter in the proposed cell balancing system are listed in Table 1, where the lithium-ion battery module has a 6S1P configuration with a rated capacity of 2500 mAH and a voltage range of 2.5 V-4.2 V for each cell. To achieve the desired bidirectional flyback converter with adjustable current, some component values should be selected or determined, such as operating voltage, balancing current which refers to the current I 1 of the low side and is limited by the specification of the phototMOS (40 V, 2.5 A) for the safety, operating frequency, and duty cycle. The related design considerations are described below. (1) Determine the turn ratio N of the transformer The proposed system considers that it has a worse case in boost mode than in buck mode. According to the high-side voltage and low-side voltage, the turn ratio N from high side to low side will be designed in the worst case for operating in boost mode when high-side voltage V pack(max) is 25.2 V and low-side Voltage V Bn(max) is 2.5 V. Therefore, in the case of the maximum duty cycle D Lmax of the boost mode as 0.8, we can calculate the turn ratio as The turn ratio N as 0.396 means if the low side has one turn, the high side will have about 2.5 turns. In the practical design, the turn ratio N will be selected as 0.333 to make the high side have more turns to overcome the worse case and convenient for implementation.
(2) Determine the inductance of the field inductor in the transformer The designed bidirectional converter set the crossing power P critical between DCM and CCM in the condition as 20% load. The equation is shown as Hmax 2r f sw P Bn(critical) = 15V 2 * 0.45 2 2 * 0.2 * 100kHz * 10W = 108.4µH (17) where β represents the ratio of the power P critical to maximum low-side power P Bn(max) , the low-side maximum voltage V Bn(max) is 4.2 V, the maximum balancing current I 1(max) is 2 A, the high-side minimum voltage V pack(min) is 15 V, the maximum duty cycle D Hmax of the buck mode is 0.45, and the operation frequency is 100 kHz. The actual inductance of the implemented field inductor of the transformer is 111.7 µH.

Experimental Verification
As shown in Figure 8, the photo of the implemented cell balancing system is used to verify the loss model proposed in this study through the test results. This research measures the efficiency of the bidirectional flyback converter by adjusting the operating current. The type of cell used in this study is the lithium ternary cell UR18650NSX produced by Panasonic, with a rated capacity of 2500 mAH and a voltage range of 2.5 V-4.2 V. Through the test of the 6S1P battery module, which is composed of the series connection of these kinds of cells, the voltage V pack range at high side is 15 V~25.2 V, and the voltage V Bn range at low side is 2.5 V-4.2 V. In the experiment, the efficiency test is carried out under the condition that the voltage V pack is 20.9V and the voltage V Bn is 4.2 V at the low side. The balance current I 1 changes from 0.5 A to 2.0 A to observe the variety of efficiency. 0 shows the parameters and specifications of the model, where the model of MOSFET Q 1 and Q 2 is CSD18510KCS manufactured by TI company. It is worth mentioning that the parameter R ds(on) of MOSFET will change in different situations. In this research, the temperature of MOSFETs does not change much because the converter's power is just about 8.4. W and the losses caused by MOSFETs is only about 0.05 W which will not increase the temperature of MOSFETs during operation. According to the datasheet of CSD18510KCS, this research estimates R ds(on) as 1.4 mΩ based on MOSFETs' temperature as 25 • C and v gs as 15 V. The balancing system is implemented by utilizing TLP250H as gate drivers, LM358 as operational amplifier to achieve the voltage sensing, and LT318 as photoMOS relays. The loss analysis formula is shown in Equations (7)- (13). The results are shown in Figure 9 and compared with the hardware measurement which using the DC Power (62100H-600S) and DC Load (63204A-600-280) manufactured by Chroma Company to acquire the system efficiency in the different operating currents. It can be obtained that the balance current of the designed bidirectional flyback converter is proportional to the operation efficiency under the test conditions shown in Table 2.  Figure 9 shows the hardware waveforms of the developed prototype operating in buck mode with V pack as 15 V and balancing current I 1 as 1 A and is aimed to verify the veracity of the system, where v gs1 is the gate signal voltage of MOSFET Q 1 , v gs2 is the gate signal voltage of MOSFET Q 2 , v ds1 is the voltage across the MOSFET Q 1 from drain to source, v ds2 is the voltage across the MOSFET Q 2 from drain to source, i L is the current passing through the L m , and i D is the current flowing through the MOSFET Q2, and i 1 is the current at low side output and regards as the balancing current. Then, the prediction and actual measurement results are processed by the mean absolute error (MAE). The formula is shown in Equation (18), where n is the number of comparisons, η rea_i is the measured efficiency, and η est_i is the estimated efficiency. In Figure 10, it can be observed that the maximum error is 5.06%, the minimum error is 0.02%, and the average absolute error is 1.48%.  Figure 9 shows the hardware waveforms of the developed prototype operating in buck mode with Vpack as 15 V and balancing current I1 as 1 A and is aimed to verify the veracity of the system, where vgs1 is the gate signal voltage of MOSFET Q1, vgs2 is the gate signal voltage of MOSFET Q2, vds1 is the voltage across the MOSFET Q1 from drain to source, vds2 is the voltage across the MOSFET Q2 from drain to source, iL is the current passing through the Lm, and iD is the current flowing through the MOSFET Q2, and i1 is the current at low side output and regards as the balancing current. Then, the prediction and actual measurement results are processed by the mean absolute error (MAE). The formula is shown in Equation (18), where n is the number of comparisons, ηrea_i is the measured efficiency, and ηest_i is the estimated efficiency. In Figure 10, it can be observed that the maximum error is 5.06%, the minimum error is 0.02%, and the average absolute error is 1.48%.   Transformer's volume Ve 15.305 cm 3 Magnetic induction intensity variation △B 0.225 T Figure 9 shows the hardware waveforms of the developed prototype operating in buck mode with Vpack as 15 V and balancing current I1 as 1 A and is aimed to verify the veracity of the system, where vgs1 is the gate signal voltage of MOSFET Q1, vgs2 is the gate signal voltage of MOSFET Q2, vds1 is the voltage across the MOSFET Q1 from drain to source, vds2 is the voltage across the MOSFET Q2 from drain to source, iL is the current passing through the Lm, and iD is the current flowing through the MOSFET Q2, and i1 is the current at low side output and regards as the balancing current. Then, the prediction and actual measurement results are processed by the mean absolute error (MAE). The formula is shown in Equation (18), where n is the number of comparisons, ηrea_i is the measured efficiency, and ηest_i is the estimated efficiency. In Figure 10, it can be observed that the maximum error is 5.06%, the minimum error is 0.02%, and the average absolute error is 1.48%.   The efficiency distribution of the proposed can be obtained in Figure 9. In the literature, there is hardly any discussion about the relationship between balancing current and operation efficiency. Therefore, this research still collects the efficiency of the system mentioned in Section 1. The comparison is shown in Table 3, although they are all operated in different situations. The capacitor shuttle system like Wangxin Huang's design will have the highest efficiency, the system proposed by Ming Liu has a lower efficiency in his test condition, and the individual charging cell balancing systems in all the research mentioned own the system efficiency from 70% to 90%. Therefore, the purpose of the power loss analysis in this research is highly necessary to achieve higher efficiency in the system. Table 3. Cell voltage of the unbalanced 6S1P battery module for the testing condition.

System Designer
Efficiency (%) Kyung-Min Lee [6] 60-98% Ming Liu [7] 71.5-74.5% Federico Baronti [8] 70-90% Federico Baronti [9] 83-90% Wangxin Huang [10] 95-97% Mohammad Abdul Hannan [11] 90% Sang-Won Lee [12] 80% This work 54.5-83.1% Another important purpose of this research is to improve the performance of the proposed cell balancing system by applying the control strategy. To verify the effect of the control strategy, the experiments will be conducted under the conditions shown in Table 4. During the testing, Ver will be set as 50 mV, I1 as 1 A, and T1 as 30 s. To compare among the pack-to-cell, the cell-to-pack, and the bidirectional architecture, the proposed cell balancing system will operate in three diverse control strategies. First of all, the system will complete the balancing process the same as the pack-to-cell architecture by only carrying out the pack-to-cell procedure. Secondly, the proposed system will merely operate with the cell-to-pack program to reach battery module equilibrium in a similar way as the cell-to-pack architecture. The last one, implemented in this research, is that the system combines the cell-to-pack and the pack-to-cell functions, including both of the advantages, to get the battery module balanced. The experimental results will be shown in Figures 11-13, where Figures The efficiency distribution of the proposed can be obtained in Figure 9. In the literature, there is hardly any discussion about the relationship between balancing current and operation efficiency. Therefore, this research still collects the efficiency of the system mentioned in Section 1. The comparison is shown in Table 3, although they are all operated in different situations. The capacitor shuttle system like Wangxin Huang's design will have the highest efficiency, the system proposed by Ming Liu has a lower efficiency in his test condition, and the individual charging cell balancing systems in all the research mentioned own the system efficiency from 70% to 90%. Therefore, the purpose of the power loss analysis in this research is highly necessary to achieve higher efficiency in the system. Table 3. Cell voltage of the unbalanced 6S1P battery module for the testing condition.

System Designer Efficiency (%)
Kyung-Min Lee [6] 60-98% Ming Liu [7] 71.5-74.5% Federico Baronti [8] 70-90% Federico Baronti [9] 83-90% Wangxin Huang [10] 95-97% Mohammad Abdul Hannan [11] 90% Sang-Won Lee [12] 80% This work 54.5-83.1% Another important purpose of this research is to improve the performance of the proposed cell balancing system by applying the control strategy. To verify the effect of the control strategy, the experiments will be conducted under the conditions shown in Table 4. During the testing, V er will be set as 50 mV, I 1 as 1 A, and T 1 as 30 s. To compare among the pack-to-cell, the cell-to-pack, and the bidirectional architecture, the proposed cell balancing system will operate in three diverse control strategies. First of all, the system will complete the balancing process the same as the pack-to-cell architecture by only carrying out the pack-to-cell procedure. Secondly, the proposed system will merely operate with the cell-to-pack program to reach battery module equilibrium in a similar way as the cell-to-pack architecture. The last one, implemented in this research, is that the system combines the cell-to-pack and the pack-to-cell functions, including both of the advantages, to get the battery module balanced. The experimental results will be shown in Figures 11-13, where Figures 11a, 12a and 13a are the actual hardware measurements of each cell's voltage by the differential voltage circuit shown in Figure 1 for three different balancing processes. To obtain the trend of the voltage varieties in the battery module, Figures 11b, 12b and 13b show the processed results for the significant changes. 11a, 12a, 13a are the actual hardware measurements of each cell's voltage by the differential voltage circuit shown in Figure 1 for three different balancing processes. To obtain the trend of the voltage varieties in the battery module, Figures 11b, 12b, 13b show the processed results for the significant changes.   After the collation of the data shown above, this research gives a table, as shown in Table 5, to compare the balancing duration and maximum error among three balancing processes. The maximum voltage error is the voltage difference between the cell with the highest voltage and the cell with the lowest voltage. The cell-to-pack control takes 2783 s to complete the balancing process with a 100 mV voltage difference left. The pack-to-cell control spends 5175 s to balance the battery module, but its maximum voltage error can not be reduced anymore at 130 mV. The bidirectional control has the least balancing duration as 2727 s and it is able to decrease the maximum voltage error to 50 mV. It can be obtained that the implemented bidirectional control strategy, which will always balance the cell having the most voltage difference to the average cell voltage Vavg in the battery module, has a less balancing duration than the pack-to-cell and a less maximum voltage error between the cell with the highest voltage and the one with the lowest voltage. Table 5. Comparison among three measured results of balancing processes.

Control Strategy Balancing Duration Maximum Voltage Error
Cell-to-pack 2783 s 100 mV Pack-to-cell 5175 s 130 mV Bidirectional 2727 s 50 mV

Conclusions
In this paper, a power loss analysis and a control strategy of an active balancing circuit based on a bidirectional flyback converter are proposed and evaluated. From the analysis of the experimental data, the maximum error between the loss model and the measured results is 5.06%, the minimum error is 0.02%, and the average absolute error is 1.48%. Moreover, the designed bidirectional flyback converter has the highest efficiency when the balancing current reaches 2 A, and it can also reduce the time required for completing the balancing process. Therefore, we can derive the most important parameter in the balancing process by the proposed power loss model according to the desired conditions, such as balancing speed or system efficiency. Finally, the system applies a bidirectional control strategy, compared with the cell-to-pack and the pack-to-cell control, which has a less balancing duration as 2727 s and a less maximum voltage error 50 mV in the case of the balancing current as 1 A, to improve the efficiency of the balancing process.  After the collation of the data shown above, this research gives a table, as shown in Table 5, to compare the balancing duration and maximum error among three balancing processes. The maximum voltage error is the voltage difference between the cell with the highest voltage and the cell with the lowest voltage. The cell-to-pack control takes 2783 s to complete the balancing process with a 100 mV voltage difference left. The pack-to-cell control spends 5175 s to balance the battery module, but its maximum voltage error can not be reduced anymore at 130 mV. The bidirectional control has the least balancing duration as 2727 s and it is able to decrease the maximum voltage error to 50 mV. It can be obtained that the implemented bidirectional control strategy, which will always balance the cell having the most voltage difference to the average cell voltage V avg in the battery module, has a less balancing duration than the pack-to-cell and a less maximum voltage error between the cell with the highest voltage and the one with the lowest voltage. Table 5. Comparison among three measured results of balancing processes.

Control Strategy Balancing Duration Maximum Voltage Error
Cell-to-pack 2783 s 100 mV Pack-to-cell 5175 s 130 mV Bidirectional 2727 s 50 mV

Conclusions
In this paper, a power loss analysis and a control strategy of an active balancing circuit based on a bidirectional flyback converter are proposed and evaluated. From the analysis of the experimental data, the maximum error between the loss model and the measured results is 5.06%, the minimum error is 0.02%, and the average absolute error is 1.48%. Moreover, the designed bidirectional flyback converter has the highest efficiency when the balancing current reaches 2 A, and it can also reduce the time required for completing the balancing process. Therefore, we can derive the most important parameter in the balancing process by the proposed power loss model according to the desired conditions, such as balancing speed or system efficiency. Finally, the system applies a bidirectional control strategy, compared with the cell-to-pack and the pack-to-cell control, which has a less balancing duration as 2727 s and a less maximum voltage error 50 mV in the case of the balancing current as 1 A, to improve the efficiency of the balancing process.