Effect of Gate Dielectric Material on the Electrical Properties of MoSe 2 -Based Metal–Insulator–Semiconductor Field-Effect Transistor

: In this study, we fabricated metal–insulator–semiconductor ﬁeld-effect transistors (MIS-FETs) based on nanolayered molybdenum diselenide (MoSe 2 ) using two insulator materials, silicon dioxide (SiO 2 ) and silicon nitride (SiN). We performed morphological and electrical characterizations in which the devices showed good electronic performance, such as high mobility and high I on /I off ratios exceeding 10 4 . The subthreshold swing (ss) was somewhat high in all devices owing to the dimensions of our devices. In addition, the transfer curves showed good controllability as a function of gate voltage. The photogating effect was weakened in MoSe 2 /SiN/Si, indicating that SiN is a good alternative to silicon oxide as a gate dielectric material.


Introduction
Two-dimensional (2D) transition metal dichalcogenides (TMDCs) have attracted considerable attention because of their unique electronic [1], photonic [2], electrochemical [3], and mechanical [4] properties, which are significant advantages for the fabrication of nextgeneration electronic and optoelectronic devices [5]. Scaling down electronic device dimensions, in particular field-effect transistors (FETs) including metal-insulator-semiconductor field-effect transistors (MISFETs), is challenging owing to Moore's law, because the reduction in the channel size and in the thickness of the gate dielectric material cause short channel effects and increases in leakage current, respectively [6]. Moreover, devices with reduced dimensions require decreased power consumption; in other words, a low threshold voltage is necessary to achieve the best electronic performance [7]. Therefore, selecting a gate dielectric material with the best physical properties, such as a high dielectric constant and low mismatch with the channel material, is as important as selecting the 2D active layer in FET-based devices. We previously reported the investigation of van der Waals hexagonal boron nitride (h-BN) (indirect bandgap E g = 5.955 eV [8] and dielectric constant ε = 3.3 [9]) as an alternative gate dielectric material; however, the results showed low electrical performance and a kink effect due to carrier trapping at the interface between h-BN and molybdenum diselenide (MoSe 2 ) [10]. MoSe 2 -based FETs have been reported to have excellent device characteristics, such as an on/off ratio of 10 6 and Hall mobilities exceeding 250 cm 2 /V·s for both holes and electrons [11].
In this paper, we report the fabrication and characterization of MoSe 2 -based MISFET transistors using silicon dioxide (SiO 2 ) and silicon nitride (SiN) as gate dielectric materials. The aim of our research is to investigate the incorporation of SiN, which is a high-κ dielectric material [12] (with a dielectric constant ε = 7.5, almost two times higher than that of SiO 2 , ε = 3.9), as an insulator layer. We used the same fabrication process and device properties (i.e., device size, active-layer thickness, dielectric material thickness, etc.). The electrical characteristics of the MISFET devices were determined, and their mobilities, subthreshold swing (ss) values, and other parameters were calculated and analyzed.

Materials and Methods
We used two types of substrates in this study: SiO 2 /Si and SiN/Si substrates using p+-doped Si with a resistivity lower than 0.005 Ω·cm. The thicknesses of the SiO 2 and SiN were 300 nm. SiN (300 nm) was deposited using low-pressure chemical vapor deposition (LPCVD). Thereafter, Ti contacts with thicknesses of 50 nm were deposited by electronbeam evaporation. Then, nanolayered MoSe 2 flakes purchased from HQ Graphene were transferred onto the SiO 2 /Si and SiN/Si substrates using polydimethylsiloxane (PDMS, Sylgard 184 Dow silicones corporation, Carrollton, KY, USA). Four devices were fabricated on the SiO 2 /Si substrates using MoSe 2 flake thicknesses of 7, 21, 63, and 90 nm, and another four devices were fabricated on SiN/Si with MoSe 2 flake thicknesses of 29, 36, 47, and 87 nm. Finally, the MISFET devices were annealed at 400 • C for 2 h under Ar gas and atmospheric pressure. A semiconductor parameter analyzer (4155A, Hewlett Packard, Tokyo, Japan) and probe station were used for electrical characterization. Scanning electron microscopy (SEM, Hitachi, Jena, Germany) was used to observe the surface of the MoSe 2 flakes, and the thickness of MoSe 2 was determined using atomic force microscopy (AFM, XE-200, PSIA Corp., Seoul, Korea). Figure 1a,b show the drain current (I d ) dependence on the drain-source voltage (V ds ) curves of the MISFETs fabricated on SiO 2 /Si and SiN/Si substrates, respectively. All devices showed symmetric electrical characteristics, except for the device using the thinnest MoSe 2 layer (7 nm) on SiO 2 /Si because of the high electrical resistivity of the layer. Figure 1c,d depict the transfer curves of the same devices. All devices showed n-type behavior with normal turn-on behavior. The devices with thinner MoSe 2 flakes exhibited poor transfer curves. The electrical properties of all eight devices were extracted from the transfer curves and are presented in Table 1. In general, the devices showed good electrical properties, with the highest carrier mobility in MoSe 2 /SiN/Si with the MoSe 2 thickness of 87 nm; this device also showed a high on/off ratio exceeding 10 4 . The ss values were relatively lower in the MoSe 2 /SiN/Si-based devices, indicating that using SiN as a gate dielectric material enhanced the electrical properties. On/Off ratio 7.0 × 10 2 1.2 × 10 4 1.0 × 10 4 3.1 × 10 1 1.2 × 10 4 9 × 10 3 1.7 × 10 5 9.6 × 10 2

Electrical Characterization of All Samples
As shown in Table 1, MoSe 2 /SiO 2 /Si with the MoSe 2 thickness of 21 nm and MoSe 2 /SiN/Si with the MoSe 2 thickness of 29 nm had similar electrical properties; these were chosen for further investigation to determine the best gate dielectric material. The field-effect mobilities (µ eff ) of the devices were estimated using the equation µ eff = dI d /dV g × [L/(WC i V ds )], where C i is the gate capacitance calculated using the equation C i = ε 0 ε r /d; and ε r is equal to 7.5 and 3.9, respectively, in the cases of SiN and SiO 2 . The thicknesses of the SiN and SiO 2 were 300 nm, the gate capacitances were 1.15 × 10 −4 and 2.21 × 10 −4 F·m −2 , and L and W were the channel length and width, respectively.

Electrical and Optoelectronic Characterization
The I d -V ds characteristics of both devices as a function of gate voltage are shown in Figure 3a,b. The MoSe 2 /SiO 2 /Si device exhibited Schottky-like behavior, while MoSe 2 /SiN/Si exhibited better and almost ohmic contact. Both devices showed good gate-voltage controllability of their current-voltage curves.  Figure 4a,b show the variation in the transfer curves (I d -V G ) versus the V ds . The current was measured by setting V ds to 1, 5, 10, or 15 V and varying the back-gate voltage from −40 V to 40 V. When V G increased to a positive value, the carrier density increased, and the current increased. Kink effects were observed in the MoSe 2 /SiN/Si device (Figure 4b) at the polarization voltages of 10 and 15 V. Similar behavior was observed in a previously reported MoSe 2 /h-BN/Si-based FET device [10] and FET devices based on 2D materials such as black phosphorus [13] and graphene [14]. The kink effect in our device can be explained by the effect of carrier de-trapping from the interface at a high polarization voltage during carrier transport. The I on /I off values were 6.32 × 10 2 , 3.49 × 10 3 , 8.04 × 10 3 , and 1.22 × 10 4 at V ds values of 1, 5, 10, and 15 V, respectively, in the MoSe 2 /SiO 2 /Si device. However, in the MoSe 2 /SiN/Si device, the values were 5.92 × 10 1 , 5.88 × 10 2 , 5.27 × 10 2 , and 1.27 × 10 4 at 1, 5, 10, and 15 V, respectively. The I d -V ds curves in both devices, in the absence of an applied V G , are shown in Figure 5. Very narrow hysteresis was observed in both devices, which originated from the trapping and de-trapping effects of charges at the interfaces and surface of MoSe 2 . It is well known that when multilayered MoSe 2 is exposed to ambient air, oxygen molecules can be converted into chemisorbed oxygen anions (O 2 − ) on the surface of MoSe 2 , where they act as electron traps [15]. In addition to chemisorbed O 2 − , humidity can induce trapping center formation [16]. Annealing devices in Ar can remove surface-adsorbed water vapor and oxygen [17]. However, charged impurities at the channel/SiO 2 interface and charge traps in SiO 2 can limit the electrical performance of FET [16,18]. Similar to SiO 2 , SiN can exhibit extrinsic charges owing to defect density and impurities, including hosting trapped charges and surface adsorbates [19].  Figure 6a,b show the I d -V ds characteristics at different laser powers of the MoSe 2 /SiO 2 /Si and MoSe 2 /SiN/Si devices, respectively. As expected, the current increased with increasing laser power. Thereafter, we deduced the photocurrent I ph according to the equation I ph = I ds (illumination) − I ds (dark), then drew I ph as a function of the laser power (P) and interpolated the curve according to the equation I ph ∝ P α . Here, α can be used to determine the carrier transport origin [20,21], that is, if α is close to unity, the photoconductive effect dominates, and if α is close to zero, the photogating effect dominates. The photogating effect originates from the long-lived trap states [22,23]. As seen in Figure 6c,d, α is higher in the MoSe 2 /SiN/Si MISFET device, which means that the photoconductive effect is higher in this case. Photogating is dominant in the MoSe 2 /SiO 2 /Si MISFET (or MOSFET) device, which means that the trap concentration is higher in this case.

Conclusions
We fabricated eight MISFETs based on nanolayered MoSe 2 . We compared two devices with similar dimensions and different gate dielectric materials of SiO 2 and SiN. The MoSe 2 /SiO 2 /Si-and MoSe 2 /SiN/Si-based MISFETs showed good electrical performance with high carrier mobility and high on/off ratios exceeding 10 4 . Moreover, their current-voltage characteristics showed good gate-voltage controllability. In terms of carrier transport, the photoconductive effect is more apparent in the MoSe 2 /SiN/Si device, and the photogating effect is dominant in the MoSe 2 /SiO 2 /Si device; therefore, SiN can be a good alternative to SiO 2 , especially for optoelectronic devices such as high-speed photodetectors. In future research, the temperature dependence of the electrical properties of multilayered MoSe 2 -based MISFETs can be characterized with the aim of investigating the carrier trap density.

Conflicts of Interest:
The authors declare no conflict of interest.