Enhancement of Electrical Safe Operation Area of 60 V nLDMOS by Engineering of Reduced Surface Electrical Field in the Drift Region

To enhance the electrical safe operation area (eSOA) of laterally diffused metal oxide semiconductor (LDMOS) transistors, a novel reduced surface electric field (Resurf) structure in the n-drift region is proposed, which was fabricated by ion implantation at the surface of the LDMOS drift region and by drift region dimension optimization. Technology computer-aided design (TCAD) simulations show that the optimal value of Resurf ion implantation dose 1 × 1012 cm−2 can reduce the surface electric field in the n-drift region effectively, thereby improving the ON-state breakdown voltage of the device (BVon). In addition, the extended n-drift region length of the Ld design also improves device BVon significantly, and is aimed at reducing the current density and the electric field, and eventually suppressing the n-drift region impact ionization. The results show that the novel 60 V nLDMOS has a competitive BVon performance of 106.9 V, which is about 20% higher than that of the conventional one. Meanwhile, the OFF-state breakdown voltage of the device (BVoff) of 88.4 V and the specific ON-resistance (RON,sp) of 129.7 mΩ⋅mm2 exhibit only a slight sacrifice.


Introduction
Recently, high-performance silicon-based LDMOS transistors featuring low specific R ON,sp , high BV off [1,2], have been studied for various power management modes such as DC-DC converters [3], display drivers [4], and wireless chargers [5].In particular, the LDMOS device with a high eSOA is an effective candidate for high operating voltage and high-reliability applications such as automotive electronic fields [6].In practice, the BV on is usually regarded as an evaluation criterion for the eSOA capability of a device.In general, the BV on of LDMOS is determined by the Kirk effect, which gives rise to the depletion region broadening under the high-voltage and large-current conditions in the drift region, and parasitic bipolar junction transistor (p-BJT) turning on at the source and bulk regions.To enhance BV on , most LDMOS devices are fabricated by heavy doping in the source and bulk region to reduce the parasitic resistance (R B ) and suppress the formation of p-BJT [7][8][9][10][11][12].However, the resulting LDMOS devices have a higher threshold voltage, which deteriorates the device switching efficiency and enhances manufacturing difficulty due to the high-energy ion implantation.Therefore, some researchers have proposed optimizing the drift region structure or doping concentration to suppress the Kirk effect, thus manufacturing LDMOS with a high BV on [13][14][15][16][17].
Taur et al. used higher doping concentrations in the n-drift region of LDMOS to push the triggering of the Kirk effect to higher current levels to improve the BV on [12].However, increasing the total doping concentration in the n-drift region also degrades BV off performance [15].Therefore, selectively reducing the surface electric field implantation was proposed to improve the BV on ; however, the BV off will also be degraded if the Resurf ion implantation is not well-controlled [16].The TCAD simulation analysis shows that Micromachines 2024, 15, 815 2 of 9 the BV on is affected by not only the Kirk effect or the parasitic BJT characteristics, but also by the impact ionization weak point at the drift region of the device such as the field oxide corner or the surface near the drain side.As a result, it enables optimization of the impact ionization in the STI corner by adjusting the L d , and at the drain side by Resurf ion implantation doping and dimensions, thus achieving the optimized BV on while reducing the impact on the device V th , BV off , and R ON,sp .
In this work, a novel LDMOS structure with reduced surface field implantation in the n-drift region and an optimized drift region length is proposed that can effectively improve the BV on performance of the device.TCAD simulation results demonstrated that the current LDMOS device can exhibit a significantly superior tradeoff between BV on , BV off and R ON,sp than that of the conventional one.

Materials and Methods
Figure 1a,b shows the cross-sectional schematic diagrams of the conventional LDMOS and our proposed one, respectively.For the conventional structure, the effective lengths of the channel region L ch and the L d are 1 and 9 µm, respectively.Meanwhile, the length of the field oxide is 1.2 µm, and the thicknesses of the gate oxide and shallow trench isolation (STI) are 12 nm and 0.4 µm, respectively.For the proposed structure, the L ch and L d are the same as the conventional structure; the differences lie in the Resurf ion implantation in the n-drift region and the critical dimensions of the L d and L s design.The threshold voltage (V th ) of both LDMOS devices is 1 V.
zation in the STI corner by adjusting the Ld, and at the drain side by Resurf ion implanta-tion doping and dimensions, thus achieving the optimized BVon while reducing the impact on the device Vth, BVoff, and RON,sp.
In this work, a novel LDMOS structure with reduced surface field implantation in the n-drift region and an optimized drift region length is proposed that can effectively improve the BVon performance of the device.TCAD simulation results demonstrated that the current LDMOS device can exhibit a significantly superior tradeoff between BVon, BVoff and RON,sp than that of the conventional one.

Materials and Methods
Figure 1a,b shows the cross-sectional schematic diagrams of the conventional LDMOS and our proposed one, respectively.For the conventional structure, the effective lengths of the channel region Lch and the Ld are 1 and 9 µm, respectively.Meanwhile, the length of the field oxide is 1.2 µm, and the thicknesses of the gate oxide and shallow trench isolation (STI) are 12 nm and 0.4 µm, respectively.For the proposed structure, the Lch and Ld are the same as the conventional structure; the differences lie in the Resurf ion implantation in the n-drift region and the critical dimensions of the Ld and Ls design.The threshold voltage (Vth) of both LDMOS devices is 1 V.
Referring to Figure 1b, the main fabrication process of the proposed LDMOS is illustrated as follows.First, the p type single crystalline (100) silicon wafer with a resistivity of 10 Ω•cm is chosen as the substrate.Subsequently, the active area is defined by the field oxide, i.e., STI.Afterwards, the device channel, drift region and Resurf ion implantation region are formed by ion implantation with an implantation energy ranging from 100 to 1000 KeV and an implantation dose of 1 × 10 14 cm −2 .Then, the poly gate is defined by etching; the source and drain regions are generated by ion implantation with an implantation dose ranging from 1 × 10 14 to 1 × 10 15 cm −2 , and an energy range of 10 to 100 KeV.Finally, the device contact, metal connection and silicon surface passivation are implemented.

Results
In order to assure the accuracy of the subsequent TCAD simulation of 60 V nLDMOS, the simulation result was first calibrated in light of the experimental one for the 20 V LDMOS. Figure 2a shows that the transfer curves of 20 V nLDMOS, including Ids -Vgs(lin) and Ids -Vgs(sat), are well-calibrated by adjusting the mobility and impact ionization models Referring to Figure 1b, the main fabrication process of the proposed LDMOS is illustrated as follows.First, the p type single crystalline (100) silicon wafer with a resistivity of 10 Ω•cm is chosen as the substrate.Subsequently, the active area is defined by the field oxide, i.e., STI.Afterwards, the device channel, drift region and Resurf ion implantation region are formed by ion implantation with an implantation energy ranging from 100 to 1000 KeV and an implantation dose of 1 × 10 14 cm −2 .Then, the poly gate is defined by etching; the source and drain regions are generated by ion implantation with an implantation dose ranging from 1 × 10 14 to 1 × 10 15 cm −2 , and an energy range of 10 to 100 KeV.Finally, the device contact, metal connection and silicon surface passivation are implemented.

Results
In order to assure the accuracy of the subsequent TCAD simulation of 60 V nLDMOS, the simulation result was first calibrated in light of the experimental one for the 20 V LDMOS. Figure 2a shows that the transfer curves of 20 V nLDMOS, including I ds -V gs(lin) and I ds -V gs(sat) , are well-calibrated by adjusting the mobility and impact ionization models during the TCAD simulation, while the breakdown characteristic curves I ds -V ds for OFFstate and ON-state are also calibrated, as shown in Figure 2b.It is worth noting that the I ds -V gs (lin) and I ds -V gs (sat) curves are normalized based on the I ds of V th = 1 V, and the BV on and BV off current are normalized based on the I ds of V ds = 20 V.As a result, the simulation results are highly consistent with the experimental results through the impact ionization and mobility model optimization.Finally, the TCAD simulation was implemented to the conventional structure of 60 V nLDMOS, and the main electrical parameters were obtained as BV on of 88 V, BV off of 93 V, and R ON,sp of 116 mΩ•mm 2 .This provided an important reference for the novel design of the 60 V nLDMOS.
during the TCAD simulation, while the breakdown characteristic curves Ids -Vds for OFFstate and ON-state are also calibrated, as shown in Figure 2b.It is worth noting that the Ids -Vgs (lin) and Ids -Vgs (sat) curves are normalized based on the Ids of Vth = 1 V, and the BVon and BVoff current are normalized based on the Ids of Vds = 20 V.As a result, the simulation results are highly consistent with the experimental results through the impact ionization and mobility model optimization.Finally, the TCAD simulation was implemented to the conventional structure of 60 V nLDMOS, and the main electrical parameters were obtained as BVon of 88 V, BVoff of 93 V, and RON,sp of 116 mΩ•mm 2 .This provided an important reference for the novel design of the 60 V nLDMOS.

Effect of Resurf Ion Implantation Dose and Energy on BVon, BVoff, and RON,sp
Figure 3a shows the effect of Resurf ion implantation dose on the BVon, BVoff, and RON,sp while fixing the Resurf ion implantation energy at 300 KeV for the LDMOS devices with Lch = 1 µm and Ld = 9 µm.When the Resurf ion implantation dose increases from 0 to 2.5 × 10 12 cm −2 , the resulting BVon increases from 88 V to a maximum value of 98 V, and then decreases to 71 V when increasing the Resurf ion implantation dose to 1 × 10 13 cm −2 .This phenomenon can be explained by the fact that as the Resurf ion implantation dose increases, it can effectively suppress the strong electrical field caused by the Kirk effect, thereby increasing BVon [15].However, as the Resurf ion implantation dose further increases, the doping concentration in the Resurf region also increases.This will result in a higher current density, which enables the Kirk effect to be triggered, thus provoking the reduction in BVon.On the other hand, as the Resurf ion implantation dose increases, the resulting BVoff decreases gradually from 93 V to 55 V (i.e., a nearly 50% drop), which is completely different to the variation trend of BVon.This is mainly due to different electric fields across the drift region in the ON-state and OFF-state of the device.In other words, the resulting depletion region becomes narrower when the Resurf ion implantation dose increases, making it more likely that a stronger electric field in the drift region will occur, and a continuous decrease in BVoff.In addition, the RON,sp also decreases gradually from 116 to 96.5 mΩ⋅mm 2 with the increment of the Resurf ion implantation.This is mainly attributed to the enhanced doping in the n-drift region.Considering the essential requirements (BVoff > 80 V, BVon > 90 V) of device safety operation, the ion implantation dose of 1 × 10 12 cm −2 was chosen as the optimal condition, corresponding to BVon = 94 V and BVoff = 77 V. Subsequently, the influence of the Resurf ion implantation energy on the BVon, BVoff, and RON,sp was further studied in the case of a constant ion implantation dose of 1 × 10 12 cm −2 , as shown in Figure 3b.As the Resurf ion implantation energy increases from 100 to 600 KeV, the BVon exhibits a small change between 93 to 95 V, and the BVoff also changes  Figure 3a shows the effect of Resurf ion implantation dose on the BV on , BV off , and R ON,sp while fixing the Resurf ion implantation energy at 300 KeV for the LDMOS devices with L ch = 1 µm and L d = 9 µm.When the Resurf ion implantation dose increases from 0 to 2.5 × 10 12 cm −2 , the resulting BV on increases from 88 V to a maximum value of 98 V, and then decreases to 71 V when increasing the Resurf ion implantation dose to 1 × 10 13 cm −2 .This phenomenon can be explained by the fact that as the Resurf ion implantation dose increases, it can effectively suppress the strong electrical field caused by the Kirk effect, thereby increasing BV on [15].However, as the Resurf ion implantation dose further increases, the doping concentration in the Resurf region also increases.This will result in a higher current density, which enables the Kirk effect to be triggered, thus provoking the reduction in BV on .On the other hand, as the Resurf ion implantation dose increases, the resulting BV off decreases gradually from 93 V to 55 V (i.e., a nearly 50% drop), which is completely different to the variation trend of BV on .This is mainly due to different electric fields across the drift region in the ON-state and OFF-state of the device.In other words, the resulting depletion region becomes narrower when the Resurf ion implantation dose increases, making it more likely that a stronger electric field in the drift region will occur, and a continuous decrease in BV off .In addition, the R ON,sp also decreases gradually from 116 to 96.5 mΩ•mm 2 with the increment of the Resurf ion implantation.This is mainly attributed to the enhanced doping in the n-drift region.Considering the essential requirements (BV off > 80 V, BV on > 90 V) of device safety operation, the ion implantation dose of 1 × 10 12 cm −2 was chosen as the optimal condition, corresponding to BV on = 94 V and BV off = 77 V. Subsequently, the influence of the Resurf ion implantation energy on the BV on , BV off , and R ON,sp was further studied in the case of a constant ion implantation dose of 1 × 10 12 cm −2 , as shown in Figure 3b.As the Resurf ion implantation energy increases from 100 to 600 KeV, the BV on exhibits a small change between 93 to 95 V, and the BV off also changes slightly from 80 to 77 V.In addition, the R ON,sp remains unchanged at around 112 mΩ•mm 2 .The above results indicate that the Resurf ion implantation energy has little effect on the BV on , BV off , and R ON,sp of the nLDMOS device.This can be ascribed to the thermal processes following the Resurf ion implantation, including the formation of field oxide and the thermal diffusion of the dopant at 1100 • C for 30 min, which could result in similar profiles of dopants under different implantation energies.In order to eliminate the influence of the thermal diffusion process on the Resurf ion implantation of the device, the Resurf implantation was carried out after the field oxidation formation and the thermal diffusion.From the TCAD simulation, it can be seen that the electrical results obtained are 89 V for BV on and 93 V for BV off , which are close to the device performance of the 60 V nLDMOS conventional structure (88 V for BV on and 93 V for BV off ).This means that the Resurf implantation ions cannot effectively penetrate the field oxide into the silicon substrate surface, and no significant impact is present on the device characteristics.In addition, if the field oxidation is removed from the n-drift region of the device, a high electric field will appear on the surface of the device, thereby contributing to a significant decrease in the breakdown voltage of the device.As a result, the optimal Resurf ion implant energy of 300 KeV was chosen.
The above results indicate that the Resurf ion implantation energy has little effect on the BVon, BVoff, and RON,sp of the nLDMOS device.This can be ascribed to the thermal processes following the Resurf ion implantation, including the formation of field oxide and the thermal diffusion of the dopant at 1100 °C for 30 min, which could result in similar profiles of dopants under different implantation energies.In order to eliminate the influence of the thermal diffusion process on the Resurf ion implantation of the device, the Resurf implantation was carried out after the field oxidation formation and the thermal diffusion.From the TCAD simulation, it can be seen that the electrical results obtained are 89 V for BVon and 93 V for BVoff, which are close to the device performance of the 60 V nLDMOS conventional structure (88 V for BVon and 93 V for BVoff).This means that the Resurf implantation ions cannot effectively penetrate the field oxide into the silicon substrate surface, and no significant impact is present on the device characteristics.In addition, if the field oxidation is removed from the n-drift region of the device, a high electric field will appear on the surface of the device, thereby contributing to a significant decrease in the breakdown voltage of the device.As a result, the optimal Resurf ion implant energy of 300 KeV was chosen.Figure 4a,b shows the optimized Resurf ion implantation conditions on the surface of the n-drift region (300 KeV, 1 × 10 12 cm −2 ) that could reduce the impaction ionization rate of the device surface effectively under the same bias condition.Furthermore, Figure 4c,d shows that the optimized Resurf ion implantation on the surface of the n-drift region also reduces the horizontal and vertical electric fields of the device surface significantly.In a word, the weakened impaction ionization rate and surface electric field assist in suppressing the Kirk effect near the drain terminal of the device, thereby improving the device's ability to withstand large currents and high voltages, and ultimately achieving the optimization of device BVon. Figure 4a,b shows the optimized Resurf ion implantation conditions on the surface of the n-drift region (300 KeV, 1 × 10 12 cm −2 ) that could reduce the impaction ionization rate of the device surface effectively under the same bias condition.Furthermore, Figure 4c,d shows that the optimized Resurf ion implantation on the surface of the n-drift region also reduces the horizontal and vertical electric fields of the device surface significantly.In a word, the weakened impaction ionization rate and surface electric field assist in suppressing the Kirk effect near the drain terminal of the device, thereby improving the device's ability to withstand large currents and high voltages, and ultimately achieving the optimization of device BV on .

Effect of Resurf Ion Implantation Length Ls and the n-Drift Region Length Ld on BVon, BVoff, and RON,sp
Figure 5a shows the dependence of BVoff, BVon and RON,sp on the Resurf ion implantation length Ls under the Resurf ion implantation conditions (300 KeV, 1 × 10 12 cm −2 ), and the drift region length Ld of 9 µm.When Ls increases from 1 to 5 µm, the BVoff decreases from 92.5 to 49.6 V rapidly, with a significant change of nearly 50%.At the same time, when Ls increases from 1 to 3 µm, BVon increases from 89 V to a maximum of 94 V, and then decreases to 92 V as Ls further increases to 5 µm.As a result, the change in BVon is only 5 V which is similar to the effect of the Resurf ion implantation dose on device BVon.This phenomenon could be explained by the fact that it can effectively suppress the high electric field caused by the Kirk effect as Ls increases, thereby increasing BVon [18].However, a new high electric field will be generated as Ls further increases due to the higher doping concentration, which in turn will cause BVon to start to decrease.Therefore, there is a maximum value for BVon corresponding to the optimal Ls of 3 µm.In addition, RON,sp decreases from 115.4 to 96.6 mΩ⋅mm 2 with the increase of Ls, representing nearly 20% deceasing.As Ls increases, the region of high doping concentration in the n-drift region also increases, thus leading to the suppression of the electric field distribution in the OFFstate, and a significant decrease in BVoff.In addition, due to the increase of doping concentration in the n-drift region, the resistance in the n-drift region correspondingly decreases, thereby resulting in a significant decrease in the RON,sp from 115.4 to 96.5 mΩ⋅mm 2 with Ls increasing from 1 to 5 µm.

Effect of Resurf Ion Implantation Length L s and the n-Drift Region Length L d on BV on , BV off , and R ON,sp
Figure 5a shows the dependence of BV off , BV on and R ON,sp on the Resurf ion implantation length L s under the Resurf ion implantation conditions (300 KeV, 1 × 10 12 cm −2 ), and the drift region length L d of 9 µm.When L s increases from 1 to 5 µm, the BV off decreases from 92.5 to 49.6 V rapidly, with a significant change of nearly 50%.At the same time, when L s increases from 1 to 3 µm, BV on increases from 89 V to a maximum of 94 V, and then decreases to 92 V as L s further increases to 5 µm.As a result, the change in BV on is only 5 V which is similar to the effect of the Resurf ion implantation dose on device BV on .This phenomenon could be explained by the fact that it can effectively suppress the high electric field caused by the Kirk effect as L s increases, thereby increasing BV on [18].However, a new high electric field will be generated as L s further increases due to the higher doping concentration, which in turn will cause BV on to start to decrease.Therefore, there is a maximum value for BV on corresponding to the optimal L s of 3 µm.In addition, R ON,sp decreases from 115.4 to 96.6 mΩ•mm 2 with the increase of L s , representing nearly 20% deceasing.As L s increases, the region of high doping concentration in the n-drift region also increases, thus leading to the suppression of the electric field distribution in the OFF-state, and a significant decrease in BV off .In addition, due to the increase of doping concentration in the n-drift region, the resistance in the n-drift region correspondingly decreases, thereby resulting in a significant decrease in the R ON,sp from 115.4 to 96.5 mΩ•mm 2 with L s increasing from 1 to 5 µm.
improving the BVon.In addition, it is also conducive to a more uniform distribution of the electric field in the n-drift region when the device is turned off, as the length of the n-drift region increases, resulting in an increase in BVoff.Finally, as the length of the n-drift region increases, it will increase the resistance of the n-drift region, which is responsible for a weakening of the device's conduction current ability and an increase in the specific conduction resistance.

Discussion
An interesting phenomenon is found in the TCAD optimization design of the n-drift region length Ld.When Ld is increased to 10 µm, the BVon and BVoff of the device begin to saturate.It is worth noting that the BVoff is determined by the avalanche impact ionization under the off state, while the BVon is determined by the impact ionization under the on state of the large current.As a result, the underlying mechanisms affecting BVon and BVoff are different.In Figure 6a, the factors affecting the BVoff saturation include the generation of the first avalanche impact ionization position and the depletion region broadening in the horizontal direction.When Ld increases to a certain extent, the width of the horizontal depletion region reaches its maximum, and the critical electric field of the avalanche occurs at the first avalanche impact ionization position.The BVoff is determined by the first avalanche impact ionization position.When Ld continues to increase, it no longer affects the distribution broadening of the depletion region and the avalanche impact ionization.As a result, the BVoff is no longer related to Ld.In Figure 6b, the factors that contribute to the saturation of BVon include the generation of the first avalanche impact ionization position and the generation of the second avalanche impact ionization position.When Ld increases to a certain extent, the electric field at the second avalanche impact ionization position has not yet reached the avalanche critical electric field; however, the first avalanche impact ionization position has already reached the avalanche critical electric field [19,20].This means that BVon is ultimately determined by the position of the first high electric field, and that the BVon reaches its maximum value.Regarding the overall device performance, including optimal BVon, BVoff, and RON,sp, the Ld of 10 µm is chosen as the Figure 5b shows the effect of the n-drift region length L d on the BV off , BV on and R ON,sp under the L s of 3 µm.As L d increases from 7 to 12 µm, the BV on increases from 54 to 115 V, nearly a double enhancement.Meanwhile, the BV off also has a significant improvement from 47 to 95 V.However, the R ON,sp also increases rapidly.Therefore, L d has a significant impact on device parameters such as BV on , BV off , and R ON,sp .Under a high gate voltage condition, such as V gs = 5 V, the longer the n-drift region is, and the lower the conduction current of the device, making it more resistant to triggering of the Kirk effect, thereby improving the BV on .In addition, it is also conducive to a more uniform distribution of the electric field in the n-drift region when the device is turned off, as the length of the n-drift region increases, resulting in an increase in BV off .Finally, as the length of the n-drift region increases, it will increase the resistance of the n-drift region, which is responsible for a weakening of the device's conduction current ability and an increase in the specific conduction resistance.

Discussion
An interesting phenomenon is found in the TCAD optimization design of the n-drift region length L d .When L d is increased to 10 µm, the BV on and BV off of the device begin to saturate.It is worth noting that the BV off is determined by the avalanche impact ionization under the off state, while the BV on is determined by the impact ionization under the on state of the large current.As a result, the underlying mechanisms affecting BV on and BV off are different.In Figure 6a, the factors affecting the BV off saturation include the generation of the first avalanche impact ionization position and the depletion region broadening in the horizontal direction.When L d increases to a certain extent, the width of the horizontal depletion region reaches its maximum, and the critical electric field of the avalanche occurs at the first avalanche impact ionization position.The BV off is determined by the first avalanche impact ionization position.When L d continues to increase, it no longer affects the distribution broadening of the depletion region and the avalanche impact ionization.As a result, the BV off is no longer related to L d .In Figure 6b, the factors that contribute to the saturation of BV on include the generation of the first avalanche impact ionization position and the generation of the second avalanche impact ionization position.When L d increases to a certain extent, the electric field at the second avalanche impact ionization position has not yet reached the avalanche critical electric field; however, the first avalanche impact ionization position has already reached the avalanche critical electric field [19,20].This means that BV on is ultimately determined by the position of the first high electric field, and that the BV on reaches its maximum value.Regarding the overall device performance, including optimal BV on , BV off , and R ON,sp , the L d of 10 µm is chosen as the optimal condition.In this condition, the BV on will increase to 106.9 V and BV off will increase to 88.4 V, but R ON,sp will sacrifice to 129.7 mΩ•mm 2 .optimal condition.In this condition, the BVon will increase to 106.9 V and BVoff will increase to 88.4 V, but RON,sp will sacrifice to 129.7 mΩ⋅mm 2 .Finally, the electrical performance of the novel designed 60 V nLDMOS is 106.9V for BVon, 88.4 V for BVoff, and 129.7 mΩ⋅mm 2 for RON,sp, and the BVon is nearly 20% higher than that of conventional device structures, and there is a slight sacrifice for BVoff and RON,sp, as shown in Figure 7a,b.This result indicates that the Resurf ion implantation and the ndrift region dimension design is an effective method for improving the performance of device BVon.

Conclusions
In summary, a novel 60 V nLDMOS with Resurf engineering in the n-drift region was proposed that enhances the device electrical safe operation area by suppressing the Kirk effect.The TCAD simulations showed that an optimized Resurf ion implantation can effectively reduce the surface electric field in the n-drift region.Furthermore, for the design Finally, the electrical performance of the novel designed 60 V nLDMOS is 106.9V for BV on , 88.4 V for BV off , and 129.7 mΩ•mm 2 for R ON,sp , and the BV on is nearly 20% higher than that of conventional device structures, and there is a slight sacrifice for BVoff and R ON,sp , as shown in Figure 7a,b.This result indicates that the Resurf ion implantation and the n-drift region dimension design is an effective method for improving the performance of device BV on .
machines 2024, 15, x FOR PEER REVIEW 7 of 9 optimal condition.In this condition, the BVon will increase to 106.9 V and BVoff will increase to 88.4 V, but RON,sp will sacrifice to 129.7 mΩ⋅mm 2 .Finally, the electrical performance of the novel designed 60 V nLDMOS is 106.9V for BVon, 88.4 V for BVoff, and 129.7 mΩ⋅mm 2 for RON,sp, and the BVon is nearly 20% higher than that of conventional device structures, and there is a slight sacrifice for BVoff and RON,sp, as shown in Figure 7a,b.This result indicates that the Resurf ion implantation and the ndrift region dimension design is an effective method for improving the performance of device BVon.

Conclusions
In summary, a novel 60 V nLDMOS with Resurf engineering in the n-drift region was proposed that enhances the device electrical safe operation area by suppressing the Kirk effect.The TCAD simulations showed that an optimized Resurf ion implantation can effectively reduce the surface electric field in the n-drift region.Furthermore, for the design

Conclusions
In summary, a novel 60 V nLDMOS with Resurf engineering in the n-drift region was proposed that enhances the device electrical safe operation area by suppressing the Kirk effect.The TCAD simulations showed that an optimized Resurf ion implantation can effectively reduce the surface electric field in the n-drift region.Furthermore, for the design of key dimensions of the device, such as the n-drift region length L d , the device BV on was significantly improved.Finally, the electrical performance of the novel designed optimized with 106.9 V for BV on , 88.4 V for BV off , and 129.7 mΩ•mm 2 for R ON,sp .The novel structure BV on is 20% higher than that of the conventional one, combined with a slight sacrifice on BV off and R ON,sp .This work provides a very useful method for manufacturing high-reliability nLDMOS.

Figure 2 .
Figure 2. Calibration of simulated and experimental (a) transfer curve Ids-Vgs; and (b) BVoff, BVon curves of conventional LDMOS without Resurf implantation and dimension optimization.

Figure 2 .
Figure 2. Calibration of simulated and experimental (a) transfer curve I ds -V gs; and (b) BV off , BV on curves of conventional LDMOS without Resurf implantation and dimension optimization.

3. 1 .
Effect of Resurf Ion Implantation Dose and Energy on BV on , BV off , and R ON,sp

Figure 3 .
Figure 3. Dependence of BV off , BV on and R ON,sp on: (a) Resurf ion implantation dose; and (b) Resurf ion implantation energy, respectively, for the LDMOS devices with L d of 9 µm, and L s of 3 µm.

Figure 4 .
Figure 4. (a,b) Impact ionization rate distribution; and (c,d) the longitudinal and horizontal electric field of novel and conventional nLDMOS under the Resurf ion implantation condition at 300 KeV, 1 × 10 12 cm −2 .

Figure 4 .
Figure 4. (a,b) Impact ionization rate distribution; and (c,d) the longitudinal and horizontal electric field of novel and conventional nLDMOS under the Resurf ion implantation condition at 300 KeV, 1 × 10 12 cm −2 .

Figure 5 .
Figure 5. Dependence of BV off , BV on and R ON,sp on: (a) the Resurf ion implantation length Ls; and (b) L d respectively, for the LDMOS devices with the Resurf ion implantation condition as 300 KeV, 1 × 10 12 cm −2 .

Figure 7 .
Figure 7.Comparison of (a) BVon and (b) BVoff between 60 V nLDMOS novel structure and conventional one.

Figure 6 .
Figure 6.(a) Impact ionization position corresponding to device BV off ; and (b) device BV on under the L d = 10 µm.

Figure 7 .
Figure 7.Comparison of (a) BVon and (b) BVoff between 60 V nLDMOS novel structure and conventional one.

Figure 7 .
Figure 7.Comparison of (a) BV on and (b) BV off between 60 V nLDMOS novel structure and conventional one.