Understanding Quasi-Static and Dynamic Characteristics of Organic Ferroelectric Field Effect Transistors

Leveraging poly(vinylidene fluoride-trifluoroethylene) [(PVDF-TrFE)] as the dielectric, we fabricated organic ferroelectric field-effect transistors (OFe-FETs). These devices demonstrate quasi-static transfer characteristics that include a hysteresis window alongside transient phenomena that bear resemblance to synaptic plasticity-encapsulating excitatory postsynaptic current (EPSC) as well as both short-term and long-term potentiation (STP/LTP). We also explore and elucidate other aspects such as the subthreshold swing and the hysteresis window under dynamic state by varying the pace of voltage sweeps. In addition, we developed an analytical model that describes the electrical properties of OFe-FETs, which melds an empirical formula for ferroelectric polarization with a compact model. This model agrees well with the experimental data concerning quasi-static transfer characteristics, potentially serving as a quantitative tool to improve the understanding and design of OFe-FETs.


Introduction
Organic ferroelectric field-effect transistors (OFe-FETs) have attracted more research attention due to their prowess in memory-based operations and the advantages of organic materials.They rely on the ferroelectric layer that can be switched between two stable polarization states.Depending on the polarization orientation, charges are induced at the ferroelectric/semiconductor interface and thus impact the channel current.As a three-terminal device, the channel conductance of Fe-FETs can be modulated via the gate and drain terminals, offering the advantage of concurrently actualizing processing and memory functions.In particular, Fe-FETs enable synapse characteristics like LTP, STP, and EPSC that have been demonstrated based on the voltage-controllable polarization reversal.By modulating the pulse inputs, the ferroelectric polarization can be influenced and the operation of a synapse can be successfully mimicked.Yan et al. demonstrated a P(VDF-TrFE)-based OFe-FET synapse with MoS 2 as a semiconductor material [1].Oh et al. achieved 32 levels of conductance states by using a hafnium-zirconium-oxide ferroelectric material [2].Sun et al. achieved a recognition rate of 98.3% for the MNIST pattern dataset with a 2T-1FeFET design [3].
Extensive research efforts have been made to construct ferroelectric transistors from a material engineering perspective, but the compact modeling of device operation is equally important.To date, most of the existing descriptions of the characteristic behavior of ferroelectric transistors are based on inorganic ferroelectrics such as Hf 0.5 Zr 0.5 O 2 (HZO) and Pb(Zr 0.5 Ti 0.8 )O 3 (PZT) [4][5][6][7].Wang et al. explained the HZO-based device using a calibrated ferroelectric (FE) switching model [4].Pahwa et al. explained the behavior of PZT-based transistors using a negative capacitance model [5].However, compact models of ferroelectric transistors based on organic ferroelectric (mainly PVDF polymer) and organic semiconductors remain elusive.
Here, we fabricated the OFe-FET based on a P(VDF-TrFE) polymer and the organic semiconductor material dioctylbenzothienobenzothiophene (C 8 -BTBT) with a typical hysteresis window depending on gate sweeping.By modulating the sweeping rate of gate voltage, transfer characteristics under quasi-static and dynamic conditions are demonstrated.We also present the compact model for OFe-FETs by considering the ferroelectric polarization effect within organic ferroelectric materials and the disordered charge transport within organic semiconductors.The compact model generally well describes the experimental results concerning quasi-static characteristics and can capture the core aspects of device performance.Additionally, synaptic behavior under pulse inputs is successfully mimicked with the devices.

Device Fabrication
Experimental OFe-FET devices with P(VDF-TrFE) (Sigma-Aldrich, Saint Louis, MO, USA) as the ferroelectric materials, C 8 -BTBT as the semiconductors, silicon substrate as the gate electrode and MoO 3 /Au (5 nm/60 nm) as the drain and source electrodes are shown in Figure 1a.P(VDF-TrFE) films were deposited on the heavily p-doped silicon substrate by spin coating using a solution of 50 mg/mL P(VDF-TrFE) 70/30 mol% dissolved in dimethylformamide (DMF), which was followed by drying and annealing at 135 • C for 2 h in N 2 atmosphere.The C 8 -BTBT layer was then thermally evaporated with a thickness of 40 nm.Finally, MoO 3 and Au (5/50 nm) were deposited by thermal evaporation to define the source and drain electrodes.The capacitance of the ferroelectric layer was measured by applying the AC voltage (frequency = 1 kHz) on the capacitor using a Precision LCR Meter E4980A (Agilent Technologies Inc., Santa Clara, CA, USA).The transfer characteristics of the OFe-FETs were measured using a semiconductor analyzer (B1500A, Agilent Technologies Inc., Santa Clara, CA, USA).[5].However, compact models of ferroelectric transistors based on organic ferroelectric (mainly PVDF polymer) and organic semiconductors remain elusive.
Here, we fabricated the OFe-FET based on a P(VDF-TrFE) polymer and the organic semiconductor material dioctylbenzothienobenzothiophene (C8-BTBT) with a typical hysteresis window depending on gate sweeping.By modulating the sweeping rate of gate voltage, transfer characteristics under quasi-static and dynamic conditions are demonstrated.We also present the compact model for OFe-FETs by considering the ferroelectric polarization effect within organic ferroelectric materials and the disordered charge transport within organic semiconductors.The compact model generally well describes the experimental results concerning quasi-static characteristics and can capture the core aspects of device performance.Additionally, synaptic behavior under pulse inputs is successfully mimicked with the devices.

Device Fabrication
Experimental OFe-FET devices with P(VDF-TrFE) (Sigma-Aldrich, Saint Louis, MO, USA) as the ferroelectric materials, C8-BTBT as the semiconductors, silicon substrate as the gate electrode and MoO3/Au (5 nm/60 nm) as the drain and source electrodes are shown in Figure 1a.P(VDF-TrFE) films were deposited on the heavily p-doped silicon substrate by spin coating using a solution of 50 mg/mL P(VDF-TrFE) 70/30 mol% dissolved in dimethylformamide (DMF), which was followed by drying and annealing at 135 °C for 2 h in N2 atmosphere.The C8-BTBT layer was then thermally evaporated with a thickness of 40 nm.Finally, MoO3 and Au (5/50 nm) were deposited by thermal evaporation to define the source and drain electrodes.The capacitance of the ferroelectric layer was measured by applying the AC voltage (frequency = 1 kHz) on the capacitor using a Precision LCR Meter E4980A (Agilent Technologies Inc., Santa Clara, CA, USA).The transfer characteristics of the OFe-FETs were measured using a semiconductor analyzer (B1500A, Agilent Technologies Inc., Santa Clara, CA, USA).The microstructure of P(VDF-TrFE) films shows typical randomly distributed needlelike morphology [8] by Atomic Force Microscopy (AFM) in Figure 1b.To further explore the electrical characteristics of the ferroelectric layer, we fabricated the metal-ferroelectricmetal (MFM) sample by using ITO as the bottom electrode, Au as the top electrode and 200 nm P(VDF-TrFE) film as the insulator layer, as shown in Figure 1c.The capacitance measurements were performed on the MFM devices, and the result exhibits strong hysteresis (butterfly shape, Figure 1d), which stems from the polarization reversal in the film as typical ferroelectric properties [9,10].

Quasi-Static Characteristics
The quasi-static transfer characteristics with gate voltage (V G ) that sweeps from +3 to −3 V, +5 to −5 V, +8 to −8 V, +10 to −10 V and then backward are shown in Figure 2, operating in the linear region with a drain voltage (V D = −1 V).The current-voltage (I DS -V G ) curves exhibit a typical p-type behavior and hysteresis with a clockwise direction, which is consistent with the accumulation and depletion of hole carriers during the switching of ferroelectric polarization.As a p-type device, the drain current reaches the maximum value, which is represented by the current peaks in Figure 2a when V G reaches −3 V, −5 V, −8 V and −10 V, respectively.And the enlarged memory window under higher V G indicates the enhanced polarization of the FE layer and implies the potential for memory application.For memory application, the difference between the threshold voltages (V T ) of OFe-FET under different voltage sweeping direction is defined as a memory window (MW) (see Figure 2b).The device exhibits an on/off ratio reaching 10 4 and obvious memory windows under different sweeping ranges, even at low voltages.The memory widow is 5.9 V at the V G = ±10 V sweeping range, which is comparable to the existing research on OFeFETs [11][12][13].These results suggest that our device can contribute to the realization of OFe-FET memory devices.The microstructure of P(VDF-TrFE) films shows typical randomly distributed needle-like morphology [8] by Atomic Force Microscopy (AFM) in Figure 1b.To further explore the electrical characteristics of the ferroelectric layer, we fabricated the metal-ferroelectric-metal (MFM) sample by using ITO as the bottom electrode, Au as the top electrode and 200 nm P(VDF-TrFE) film as the insulator layer, as shown in Figure 1c.The capacitance measurements were performed on the MFM devices, and the result exhibits strong hysteresis (butterfly shape, Figure 1d), which stems from the polarization reversal in the film as typical ferroelectric properties [9,10].

Quasi-Static Characteristics
The quasi-static transfer characteristics with gate voltage (VG) that sweeps from +3 to −3 V, +5 to −5 V, +8 to −8 V, +10 to −10 V and then backward are shown in Figure 2, operating in the linear region with a drain voltage (VD = −1 V).The current-voltage (IDS-VG) curves exhibit a typical p-type behavior and hysteresis with a clockwise direction, which is consistent with the accumulation and depletion of hole carriers during the switching of ferroelectric polarization.As a p-type device, the drain current reaches the maximum value, which is represented by the current peaks in Figure 2a when VG reaches −3 V, −5 V, −8 V and −10 V, respectively.And the enlarged memory window under higher VG indicates the enhanced polarization of the FE layer and implies the potential for memory application.For memory application, the difference between the threshold voltages (VT) of OFe-FET under different voltage sweeping direction is defined as a memory window (MW) (see Figure 2b).The device exhibits an on/off ratio reaching 10 4 and obvious memory windows under different sweeping ranges, even at low voltages.The memory widow is 5.9 V at the VG = ±10 V sweeping range, which is comparable to the existing research on OFeFETs [11][12][13].These results suggest that our device can contribute to the realization of OFe-FET memory devices.We incorporate the expression of ferroelectric polarization into an analytical currentvoltage (I-V) model [14,15] for constructing the compact OFe-FET model.There has been a consensus that the ferroelectric polarization of ferroelectric materials is a function of the We incorporate the expression of ferroelectric polarization into an analytical currentvoltage (I-V) model [14,15] for constructing the compact OFe-FET model.There has been a consensus that the ferroelectric polarization of ferroelectric materials is a function of the electric field [16,17].The polarization below the applied maximum field can be described as: where P − or P + denotes polarization toward negative or positive polarization, E is the applied electric field, P r is the remanent polarization at the zero applied field, P s is the saturation polarization, E c is the coercive field at which the polarization changes the sign, and E max is the maximum applied electric field and δ is the calculated constant.For OFETs, the I-V relations are defined by connecting the above-threshold I above , subthreshold I sub , and off regimes.By including a contact voltage drop, the above-threshold current I above is written as [15]: where W and L are the channel width and length, C i is the insulator capacitor per unit area, V T is the threshold voltage, R c is the contact resistance, λ is induced to improve output conductance fitting, α s models the deviation of the saturation drain voltage V DS from the (V GS -V T ) point, and m controls the abruptness of linear-to-saturation transition.The mobility µ is defined by the power-law expression with gate voltage V GS for the disordered charge transport in organic semiconductors [18,19]: where µ 0 is the semiconductor band mobility, and V aa and γ are fitting parameters.Below the threshold, subthreshold current I sub is described as shown below [19]: where I 0 is the off current, V 0 is the turn-on voltage, and S is the subthreshold swing, which can be calculated from the transfer curve as S = dV G /dlog 10 I DS .
The polarization in the ferroelectric layer corresponds to surface charge density (P) [20], which leads to a shift of the switch-on voltage P/C FE , where C FE is the capacitance of the ferroelectric layer and is calculated as ε 0 ε FE /t FE , ε 0 is the vacuum permittivity, and ε FE and t FE are the relative permittivity and thickness of the ferroelectric layer.Here, we merge the analytical I-V model with the ferroelectric model by replacing V GS in Equations ( 4)- (6) with the effective gate bias V eff (see Figure 3a), according to Gauss's law and the voltage balance relationship.Then, the total OFe-FET current model for all the operation regimes is expressed by where the transition parameter B and transition voltage V B are induced for accurately modeling the transition region [15].The continuity of the subthreshold regime and the above-threshold regime is realized by the transition function.The flow of the model is shown in Figure 3a.We have constructed this model to describe the electrical behavior of OFeFETs.By connecting the effective gate bias with the ferroelectric polarization, the transfer curves in an OFeFET can be calculated with the V T shift and typical memory windows.This model took into account both the organic FETs characteristics and the polarization of ferroelectrics, and the connection between different regions (including I off , I sub , and I above ), making it more flexible compared to other existing models [4][5][6][7].
transfer curves in an OFeFET can be calculated with the VT shift and typical memory windows.This model took into account both the organic FETs characteristics and the polarization of ferroelectrics, and the connection between different regions (including Ioff, Isub, and Iabove), making it more flexible compared to other existing models [4][5][6][7].To verify the above model, experimental data are fitted using ferroelectric parameter values Ps = 60 mC/m 2 , Pr = 52 mC/m 2 , and Ec = 30 MV/m, and other device parameters (W/L = 6, µ0 = 0.6 cm 2 /Vs, Vaa = 100 V, γ = 1.2, Ci = 80 nF/cm 2 , m = 4, αs = 0.5, λ = 0.6) were determined from characteristics of transistors with C8-BTBT as the semiconductor and SiO2 as the insulator.Notice that for the fitting of four data sets, most parameters including ferroelectric and semiconductor parameters which have been listed above were fixed, except that B, VT, V0, VB and S were slightly adjusted to fit the curves better under various VG sweeping ranges.The values of subthreshold swing S, threshold voltage VT and the onset voltage V0 are extracted from the experimental data.Additionally, a practical way to determine the value of VB is to select the voltage at which the difference between Iabove and Isub is minimal.The general agreement is obtained as shown in Figure 4, indicating the above model applies to OFe-FETs swept at various VG ranges and also can form good continuity in all operating regimes.The deviation in Figure 4d may be due to the inaccuracy of the simple empirical description of polarization [20] especially below the coercive field Ec.What is more, in the actual measurement, the hole trapping in the channel would usually induce a negative shift of the threshold voltage VT, whereas the well-fitted results show that this effect is not critical in our devices.To verify the above model, experimental data are fitted using ferroelectric parameter values P s = 60 mC/m 2 , P r = 52 mC/m 2 , and E c = 30 MV/m, and other device parameters (W/L = 6, µ 0 = 0.6 cm 2 /Vs, V aa = 100 V, γ = 1.2, C i = 80 nF/cm 2 , m = 4, α s = 0.5, λ = 0.6) were determined from characteristics of transistors with C 8 -BTBT as the semiconductor and SiO 2 as the insulator.Notice that for the fitting of four data sets, most parameters including ferroelectric and semiconductor parameters which have been listed above were fixed, except that B, V T , V 0 , V B and S were slightly adjusted to fit the curves better under various V G sweeping ranges.The values of subthreshold swing S, threshold voltage V T and the onset voltage V 0 are extracted from the experimental data.Additionally, a practical way to determine the value of V B is to select the voltage at which the difference between I above and I sub is minimal.The general agreement is obtained as shown in Figure 4, indicating the above model applies to OFe-FETs swept at various V G ranges and also can form good continuity in all operating regimes.The deviation in Figure 4d may be due to the inaccuracy of the simple empirical description of polarization [20] especially below the coercive field E c .What is more, in the actual measurement, the hole trapping in the channel would usually induce a negative shift of the threshold voltage V T , whereas the well-fitted results show that this effect is not critical in our devices.

Dynamic Characteristics
The influence of voltage sweeping rate on the dynamic transfer characteristics is investigated.The sweeping rate (s) can be calculated as s = ΔV/ts, where ΔV is the increment of VG, and ts is the measurement time for each VG step (as shown in the inset of Figure 5a).

Dynamic Characteristics
The influence of voltage sweeping rate on the dynamic transfer characteristics is investigated.The sweeping rate (s) can be calculated as s = ∆V/t s , where ∆V is the increment of V G , and t s is the measurement time for each V G step (as shown in the inset of Figure 5a).Using V G with different periods t s , in Figure 5a, the device memory window (MW) increased and the minimum of subthreshold swing (S min ) decreased as the sweeping rate increased.According to the equivalent circuit of the device (Figure 3b), the voltage division relationship and charge conservation equation can be written as: where V FB is the flat band voltage, Q S and Q FE are the charges of the semiconductor and FE layer, V FE is the voltage drop on the ferroelectric (FE) layer, and C FE is the capacitance of the FE layer.Considering that V FE varies with the sweep rate under the dynamic sweep, FE charges (Q FE ) cannot be simply approximated as P. Thus, we obtained the voltage drop on the FE layer from Formulae ( 8) and ( 9) as follows: Micromachines 2024, 15, x FOR PEER REVIEW 7 of 10 According to FE switching dynamics, the switched polarization is related to the duration period of sweeping voltage on FE, and the polarization needs some response time to fully switch when the electric field changes.Therefore, when the sweep rate of gate voltage increases and the duration period time decreases, the switched polarization charge P will be decreased [21].Thus, according to Equation (10), VFE increases with reduced P at the end of the sweep.As a result, the memory window increases with the larger

VFE and presents an exponential decay: 𝑀𝑊 𝐴 𝐵exp
, where A and B are constants over time (see Figure 5b).This result is somehow consistent with the rate-dependent memory window investigated via TCAD simulation by Huang et al. [21].
The extracted minimum value of subthreshold swing (Smin) in the reverse sweep is a function of measurement time for each VG step (ts), as shown in Figure 5c.In fast sweeping, spontaneous polarization does not respond timely due to its slow switching [22,23].That is, a larger ts induces a larger extent of polarization switch, which then leads to a steeper S. The dynamic polarization switching under applied electric field E is typically described by the Kolmogorov-Avrami-Ishibashi (KAI) model [24], in which the polarization with time can be expressed by the compressed exponential function.We assume Smin follows: According to FE switching dynamics, the switched polarization is related to the duration period of sweeping voltage on FE, and the polarization needs some response time to fully switch when the electric field changes.Therefore, when the sweep rate of gate voltage increases and the duration period time decreases, the switched polarization charge P will be decreased [21].Thus, according to Equation (10), V FE increases with reduced P at the end of the sweep.As a result, the memory window increases with the larger V FE and presents an exponential decay: MW = A + Bexp − t s t 0 , where A and B are constants over time (see Figure 5b).This result is somehow consistent with the rate-dependent memory window investigated via TCAD simulation by Huang et al. [21].
The extracted minimum value of subthreshold swing (S min ) in the reverse sweep is a function of measurement time for each V G step (t s ), as shown in Figure 5c.In fast sweeping, spontaneous polarization does not respond timely due to its slow switching [22,23].That is, a larger t s induces a larger extent of polarization switch, which then leads to a steeper S. The dynamic polarization switching under applied electric field E is typically described by the Kolmogorov-Avrami-Ishibashi (KAI) model [24], in which the polarization with time can be expressed by the compressed exponential function.We assume S min follows: + c, where t 0 is the switching time constant of the FE dipole at a certain electric field and a, b, and c are constants over time.We find such an empirical expression is in good agreement with our experimental data.

Synaptic Behavior
The variations in the polarization (P) of the ferroelectric domains can lead to the synaptic characteristics of OFe-FETs, which has provoked a significant interest in utilizing ferroelectric transistors as synaptic neurons.In general, by applying voltage pulses to the gate of OFe-FETs, the polarization of the ferroelectric films can be gradually altered, resulting in a consistent increase or decrease in the device current.This change strongly depends on the pulse voltage, pulse width, and the interval time between two pulses, reflecting the accumulation dynamics for the neuron implementation.To this end, we design various schemes of pulse inputs to the OFe-FETs by adjusting the pulse amplitude, number, and interval time.
Negative pulses with fixed pulse numbers (N = 5) and different amplitudes were first input (the amplitude of these pulses are −3 V, −5 V, −6 V, −8 V, and −10 V, respectively; see Figure 6a).The response current increases from 83 to 542 nA as the pulse amplitude increases from −3 to −10 V, confirming that higher pulse amplitude results in a wider variation of EPSC.This phenomenon can be explained by the model above.With the large input voltage, the E max in Equations ( 1) and ( 2) increases and induces a more complete polarization switching (P), which leads to the enhanced conductance.Figure 6b shows the conductance response to pulse inputs with a fixed pulse number (N = 100) and different interval times (8, 12 and 20 ms).A shorter interval time resulted in the larger range of variation of the channel conductance (G).For example, G varies between 51 and 84 nS in response to the pulses with an interval time of 20 ms, and it varies between 83 and 167 nS in response to the pulses with an interval time of 8 ms.The high conductance state under pulse input with short interval time also resulted in a longer time to return to the initial state, which is similar to the forgetting process of brain memory.In terms of pulse number (N), pulses with a fixed amplitude (−4 V), a fixed interval time (12 ms) and different pulse number were input (the pulse number of these pulses are 5, 20, 50 and 100).Figure 6c shows that when the pulse number N is 5 (or 100), the conductance increased reaches 86 (or 167 nS) and returns to 1 nS (or 37 nS) immediately after the inputs.Based on these results, we applied a pulse sequence with an amplitude of −10 V (N = 20) to obtain the essential synaptic function: long-term potentiation (LTP) as shown in Figure 6d.The conductance maintains at 122 nS even after the pulse inputs are removed for a period of time.
By modulating the pulse amplitude, pulse number, and interval time, we were able to obtain the transition from STP to LTP, in which the fast/slow conductance decay is similar to the learning and forgetting processes of the brain [25].The conductance update and decay with time G(t) can be fitted with two exponential functions: where G p and G d are the conductance of potentiation and decay, respectively.G p0 , G d0 , g 1 , and g 2 are parameters related to the initial polarization state.Parameters t p is the constant related to the ability to switch the polarization, while t d is the decay constant.Furthermore, n 1 and n 2 are stretched exponents, which can be impacted by the pulse inputs.The experimental data can be well fitted as shown with solid lines in Figure 6d.number were input (the pulse number of these pulses are 5, 20, 50 and 100).Figure 6c shows that when the pulse number N is 5 (or 100), the conductance increased reaches 86 (or 167 nS) and returns to 1 nS (or 37 nS) immediately after the inputs.Based on these results, we applied a pulse sequence with an amplitude of −10 V (N = 20) to obtain the essential synaptic function: long-term potentiation (LTP) as shown in Figure 6d.The conductance maintains at 122 nS even after the pulse inputs are removed for a period of time.By modulating the pulse amplitude, pulse number, and interval time, we were able to obtain the transition from STP to LTP, in which the fast/slow conductance decay is similar to the learning and forgetting processes of the brain [25].The conductance update and decay with time G(t) can be fitted with two exponential functions:    1

Conclusions
In conclusion, we have successfully fabricated the OFe-FETs which exhibited transfer characteristics with bias-sensitive and rate-dependent hysteresis windows.Quasi-static and dynamic characteristics are obtained by modulating the gate voltage sweeping.Moreover, we developed a compact analytical model for quasi-static transfer curves that delineates the electrical characteristics of OFe-FETs, by integrating the characteristic formula for ferroelectric polarization with a compact OFET model.The concordance between the model and a series of experimental data on transfer characteristics has been verified.These results have provided deeper insights into the behavior of OFe-FETs, particularly in regard to the modulation of subthreshold swing and the width of the hysteresis window by varying the sweeping rate of voltage sweeps.Synaptic plasticity-incorporating features such as excitatory postsynaptic current and both short-term and long-term potentiation is also demonstrated in our device.These results may allow a better understanding of OFe-FETs in memory applications, synthetic synapses, and other advanced electronic applications.

Figure 2 .
Figure 2. (a) Transfer characteristics measured at different VG sweeping ranges (VD = −1 V, the sweep direction has been denoted by arrows).(b) Schematic of the memory window when VG sweeps from 10 to −10 V and then backward.

Figure 2 .
Figure 2. (a) Transfer characteristics measured at different V G sweeping ranges (V D = −1 V, the sweep direction has been denoted by arrows).(b) Schematic of the memory window when V G sweeps from 10 to −10 V and then backward.

Figure 4 .
Figure 4. (a-d) Fitting results of quasi-static transfer curves at different VG sweeping ranges (symbols represent experimental data and red lines represent the calculated values, the sweep direction has been denoted by arrows).

Figure 4 .
Figure 4. (a-d) Fitting results of quasi-static transfer curves at different V G sweeping ranges (symbols represent experimental data and red lines represent the calculated values, the sweep direction has been denoted by arrows).

Figure 5 .
Figure 5. (a) Transfer characteristic curves as a function of VG sweeping rate (inset: VG-t graph under various sweep rate and the definition of ts).(b) Corresponding memory window and (c) Smin as a function of ts (symbols represent experimental results and lines represent the fitting curves with fitting parameters a = 1.48, b = 1.3, c = −0.2,A = 4.5, B = 7.3, t0 = 0.16).

Figure 5 .
Figure 5. (a) Transfer characteristic curves as a function of V G sweeping rate (inset: V G -t graph under various sweep rate and the definition of t s ).(b) Corresponding memory window and (c) S min as a function of t s (symbols represent experimental results and lines represent the fitting curves with fitting parameters a = 1.48, b = 1.3, c = −0.2,A = 4.5, B = 7.3, t 0 = 0.16).

Figure 6 .
Figure 6.(a) Typical EPSC triggered by different pulse amplitude varying from −3 to −10 V. (b) Conductance response under varying pulse interval time.(c) Conductance response under varying pulse numbers.(d) LTP characteristics (−10 V, 60 ms; the red dots and red line represent the experimental data, while the balck solid lines are fitting with exponential functions Gp(t) and Gd(t)).

Figure 6 .
Figure 6.(a) Typical EPSC triggered by different pulse amplitude varying from −3 to −10 V. (b) Conductance response under varying pulse interval time.(c) Conductance response under varying pulse numbers.(d) LTP characteristics (−10 V, 60 ms; the red dots and red line represent the experimental data, while the balck solid lines are fitting with exponential functions G p (t) and G d (t)).