A Load-Adaptive Driving Method for a Quasi-Continuous-Wave Laser Diode

A quasi-continuous-wave (QCW) laser diode (LD) driver is commonly used to drive diode bars and stacks designed specifically for QCW operations in solid-state lasers. Such drivers are optimized to deliver peak current and voltage pulses to LDs while maintaining low average power levels. As a result, they are widely used in laser processing devices and laser instruments. Traditional high-energy QCW LD drivers primarily use capacitors as energy storage components and pulsed constant-current sources with op-amps and power metal-oxide-semiconductor field-effect transistors (MOSFETs) as their core circuits for generating repeated constant-current pulses. The drawback of this type of driver is that the driver’s output voltage needs to be manually adjusted according to the operating voltage of the load before use to maximize driver efficiency while providing a sufficient current. Another drawback is its inability to automatically adjust the output voltage to maintain high efficiency when the load changes during the driver operation. Drastic changes in the load can cause the driver to fail to function properly in extreme cases. Based on the above traditional circuit structure, this study designed a stability compensation circuit and realized a QCW LD driver for driving a GS20 diode stack with a maximum repetition rate of 100 Hz, a constant current of approximately 300 A, a load voltage of approximately 10 V, and a pulse width of approximately 300 μs. In particular, a high-efficiency, load-adaptive driving method was used with the MOSFETs in the critical saturation region (i.e., between the linear and saturated regions), controlling its power loss effectively while achieving maximum output current of the driver. The experiments demonstrated that the driver efficiency could be maintained at more than 80% when the load current varied from 50 to 300 A.


Introduction 1.Description of the QCW LD Driver
Diode-pumped solid-state lasers (DPSSLs) are widely used in industrial, scientific, and military fields [1][2][3][4].Traditionally, high-power pulsed DPSSLs have been obtained by Q-switching technology, typically using continuous-wave (CW) laser diode (LD) arrays to pump laser gain materials, such as Nd:YAG rods or slabs.However, pumping with QCW LD arrays yields more advantages.The peak power of a QCW LD array is higher than that of a CW array.In addition, a QCW pump can reduce the heat of a laser's gain material and improve the quality of its laser beam, which is more desirable for users [5][6][7].
A QCW LD driver is the pump source used to drive a QCW LD, bar, and stack, and it is switched on only for time intervals short enough to reduce thermal effects significantly but long enough to bring the laser process close to its steady state, as shown in Figure 1.In other words, the laser is optically in the state of CW operation.The duty cycle may be only a few percent, thus greatly reducing heating and all related thermal effects, such as thermal lensing and damage through overheating [8][9][10].To maintain consistent power of each laser pulse, the driver typically requires a constant-current output [11][12][13][14].Such drivers are designed to deliver peak current pulses to LDs while maintaining low average power levels.The duty cycle D of such a pulse current is calculated in Equation ( 1): where T ON is the current pulse ON state duration and T S is the cycle duration.In Figure 1, T OFF is the current pulse OFF state duration, and t is the timeline.

Principle and Characteristics of a Conventional QCW LD Driver
In general, a switching mode power supply (SMPS)-based LD driver is more popular than a linear driver because of its high efficiency and compact size.Sharma et al. proposed a QCW LD driver based on a high-frequency SMPS capable of operating at a repetition rate of 100 Hz and providing a maximum pulse current of ∼40 A to drive an LD operating at ∼3 V, with rising/falling times of up to 5 ms [15].Later, they aimed to increase the output voltage and current to 4 V and 50 A, respectively, and reduced the current rising/falling time to ∼80 µs [16].However, QCW LD drivers with fast rising/falling times, high voltages, and high current outputs are challenging to implement using only SMPS techniques, and the relevant literature is quite limited.The common practice is to split a QCW LD driver into two parts [17][18][19].The first part is the SMPS, which provides the AC-to-DC voltage conversion, and to accumulate sufficient energy before generating a pulse current, a capacitor bank of tens to hundreds of microfarad is essential.The other part is a pulsed constant-current source that uses MOSFETs, bipolar junction transistors, and other power components as linear regulators for current regulation.To increase the current output capacity, using multiple constant-current circuits in parallel is an efficient option [20][21][22][23].
Figure 2 shows a schematic of a typical simplified QCW LD driver.The AC voltage is passed through the SMPS to generate a constant DC voltage V CAP suitable for the system's operation.In general, this voltage is required so that the MOSFET operates in the saturation region to attain a sufficient voltage margin against possible fluctuations.To provide sufficient power at discharge, a capacitor bank needs to be placed at the SMPS output.The current flowing through the LD is controlled using a closed-loop feedback circuit with the input voltage V IREF as a reference.Specifically, the output current I D flowing through the LD is sampled by the sampling resistance R S and passed through the current-sensing module to become the feedback voltage V FB , which is compared with the reference voltage V IREF to obtain the error signal V ERR .After passing through the current regulator, the gate-to-source voltage V GS of the MOSFET Q 1 is generated to control the current I D , which is represented by Equation (2), where A FB is the gain of the feedback circuit: During the discharge period of the capacitor bank, the voltage decreases.We can temporarily ignore the charging current, assuming the output current I D is much larger, and the voltage drop of the capacitor bank can be obtained using Equations ( 3) and (4): where Q is the total charge, C B is the total capacitance of the capacitor bank, ∆U is the voltage drop of the capacitor bank.The minimum voltage V CAP required by the capacitor bank, a difficult parameter to determine, is calculated in Equation (5).For an LD driver user, although V LD can be found in the supplier manual, it shifts with the load, and R S and C B are known only to the designer and not usually defined in the manual.Furthermore, designers find evaluating the optimal parameter V DS difficult.As mentioned, a MOSFET operating in a saturation region can better regulate I D via gate voltages and ensure a sufficient voltage margin.According to MOSFET characteristics, the drain-to-source voltage satisfying this condition can be expressed by Equation (6).Unfortunately, V TH is related to not only the fabrication process of the chip but also the operating temperature, and thus, the minimum V DS is not fixed.Therefore, users are often forced to set a sufficiently large V CAP in case of a system failure at the expense of power efficiency.
where V LD is the operating voltage of the LD, V DS is the drain-to-source voltage of the MOS-FET, V TH is the gate threshold voltage of the MOSFET, and R S is the sampling resistance.When the LD is working in a constant-current state, it is approximately equivalent to a small resistor with resistance R LD , and V LD can be represented by Equation (7) [22,24]: We can then substitute Equation (7) into Equation (5): where V LD_TH is the threshold voltage of the LD and R LD is the equivalent resistance of the LD.
In Equation (8), V LD_TH , R LD , R S and C B are treated as fixed values.If the user sets the voltage V CAP of the SMPS to a fixed value, then the V DS decreases/increases as T ON and I D increase/decrease, but V DS shifts more significantly with I D .
From the above analysis, we see that regular LD drivers suffer from the following shortcomings: (1) Before using a driver, the user should estimate the minimum voltage V CAP of the SMPS according to the load and the characteristics of the driver (refer to Equation (5)).Specifying values for R S , C B and V DS is challenging, and so, a perfect V CAP is also difficult to obtain, usually only possible through complex experiments to estimate a median value, potentially sacrificing power efficiency by leaving too great a margin.(2) In the case of a fixed V CAP , V DS decreases with increasing loads, the MOSFET may enter the linear region if V CAP does not have sufficient margin, and, in extreme cases, I D does not reach the set value.In addition, V DS increases as the load decreases, and then the MOSFET losses increase, reducing the efficiency of the power supply.

. Features of MOSFETs
Before describing the load-adaptive LD driver principle, we need to understand the characteristics of power MOSFETs.MOSFETs can be thought of as voltage-controlled current switches.In general, MOSFETs exhibit three operating regions, as shown in Figure 3 with the n-channel power MOSFETs as an example [25], as follows: (1) Cut-off region A cut-off region is a region in which a MOSFET is OFF, as no current is flowing through it, which can be expressed by Equations ( 9) and (10): (2) Ohmic or linear region An ohmic, or linear, region is a region where the current I D increases with V DS , as indicated by Equations ( 11)-( 13): where µ n is the channel mobility, C ox is the oxide capacitance density, W is the channel width, L is the channel length, and g m is the transconductance. (

3) Saturation region
In a saturation region, the MOSFET I D remains constant despite increases in V DS and occurs once V DS exceeds the pinch-off voltage V GS − V TH , as expressed by Equations ( 14)-( 16), as follows: Additionally, I D reaches its maximum value when V DS = V GS − V TH .Afterward, although V DS increases, I D remains nearly constant, but the thermal power consumption of the MOSFET increases.From the above description, we easily see two ways to tune the output current of a MOSFET: adjusting V DS in the linear region and adjusting V GS in the saturated region.The latter is a common approach for fast current control.However, an appropriate V DS for different load currents is necessary, as discussed below.

Load-Adaptive Driving Method
It is worth noting that Reference [26] describes a method for controlling the maximum efficiency output of a voltage-controlled adjustable constant-current source: Here, R load represents the load resistance value, which denotes the equivalent resistance of the LD, and R on is the MOSFET internal resistance.The value of V CAP can be calculated if the above parameters are known.Unfortunately, R load and R on are generally uncertain in practical applications, although reference values maybe provided in datasheets.These values vary with manufacturing process and operating temperature.Existing techniques can only estimate these parameters through experiments, and the results of estimation are not accurate.Additionally, the MOSFET operates in the Ohmic region, and the output characteristics are sensitive to voltage fluctuations of V DS .The severe fluctuations in V DS may lead to unstable output.In summary, the method in [26] cannot be adopted in this study because of these reasons above.Instead, the operating point of the MOSFET is set to the critical saturation region to optimize efficiency while ensuring stable operation of the driver.
Based on the characteristics of a MOSFET, we propose an efficient, load-adaptive QCW LD driving scheme, as shown in Figure 4.An analog switch is used to switch the reference voltage V ISET of the closed-loop feedback circuit between V IREF and V BI AS via the trigger, and the control waveform is shown in Figure 5.A servo controller detects V G , V D and V S , and the output voltage V CAP of the SMPS is tuned by the servo PID such that the MOSFET operates in the critical saturation region, as illustrated in Figure 6.This approach uses a PID controller to automatically lock V DS at a small and safe operating voltage, avoiding the hassle and risk of manually setting V CAP and improving power efficiency.

Current
Regulator The specific workflow of the servo controller is as follows: (1) Choose the operating point in the critical saturation region.
According to the characteristics of a MOSFET, the transconductance g m reaches its maximum value at the critical saturation operating point, where V DS = V GS − V TH .If we need to reduce MOSFET losses further or focus on reliability, V DS can be multiplied by a factor, as shown in Equation (18).When a < 1, the MOSFET losses are smaller; when a > 1, the resistance-to-power perturbations improve.Of note, a is close to unity for the sake of both efficiency and stability.In this study, a = 1: (2) Obtain the threshold voltage V TH As discussed earlier, V TH is affected by factors such as the chip fabrication process and temperature, and it is not a fixed value.We set V BI AS to a small voltage such that the MOSFET has an extremely small current I D when the MOSFET is OFF.The gate voltage V G at this time can be approximated as the threshold voltage V TH , which can be measured at each driving cycle.
(3) Control V DS automatically We lock V DS indirectly at the critical saturation operating point V DS_SET by controlling V CAP .Figure 7 shows a simplified control block diagram.After the LD driver engages, the servo controller samples V G , V D , and V S at the ON state of each cycle by ADCs (analog to digital converters) and calculates V DS and V DS_SET using an ALU (arithmetic logic unit).The reference voltage V DS_SET is calculated using Equation ( 18), and the error V ERR is obtained using Equation (19).The PID controls the voltage V CAP of the SMPS in the subsequent OFF state, such that the error V ERR tends toward zero: Pulse current generation circuit PID + - The advantages of adopting a load-adaptive QCW LD driver as described above are summarized below: (1) Traditional drivers require users to estimate the SMPS output voltage according to the driver and load parameters, or the user must estimate the appropriate V CAP through complex experiments, which are difficult and troublesome.Thus, either the power efficiency is low or the ability to resist voltage disturbance is poor.Our driver can automatically find the optimal operating voltage, thereby reducing the need for manual manipulation and its associated risks.(2) Traditional drivers typically operate a MOSFET in the saturation region, where V CAP has a large margin, resulting in large V DS and MOSFET losses.Our driver enables the MOSFET to operate in the critical saturation region, minimizing V DS and, thus, MOSFET losses and improving power efficiency.(3) Traditional drivers have a fixed V CAP during operation and cannot adapt to load changes automatically.Our driver can detect the operating voltage of the three terminals of the MOSFET in real time and recalculate the appropriate operating voltage V DS when the load changes, such that the MOSFET can keep working in the critical saturation region and maintains high power efficiency.

Design Specifications and Block Diagrams
As shown in Figure 8, a high-efficiency QCW LD driver is required in our laser system to drive the laser stack.We designed the circuit based on the parameters in Table 1, and a diagram of the circuit block is shown in Figure 9.The driver comprises a servo circuit and a pulsed constant-current source.The latter improves the power supply capacity through a multistage parallel operation [21][22][23].Because of the development of high-power MOSFETs, we meet the design requirements with a single module and a simplified circuit structure.

Parameters Values
Operation  The MOSFET is the most critical component of a driver, and we chose the IXYS IXTH360N055TT2, with a maximum drain-to-source current of 360 A, to meet our requirements.The MOSFET's parameters are listed in Table 2.

Parameters Values
Drain-to-source breakdown voltage 55 V Drain-to-source current capability 360 A Gate-to-source voltage ±20 V Gate threshold voltage 2.0-4.0V Drain-to-source on-resistance ∼2.4 mΩ

Selection of the Op-Amps
Op-amps are used in the constant-current source circuit.We use TI's OPA2197, with a 10 MHz bandwidth and an extremely low input offset voltage and input offset current.Its parameters are listed in Table 3.The driver uses a capacitor bank for energy storage, and V CAP drops by ∆U during discharge, but the current output capacity of the driver is not affected.We calculate the capacity of the capacitor bank using Equations ( 20) and (21).According to Table 1, I D and T ON are 300 A and 300 µs, respectively.The effect on the power efficiency is reduced by setting ∆U to 1 V.The calculated C B must be at least 9 × 10 4 µF, and we use 12 × 10 4 µF, preserving a 25% margin:

Selection of the SMPS
When selecting an SMPS, the primary consideration is the power supply capacity, which is calculated using Equations ( 22) and ( 23): where I D is the maximum output current of the LD driver (i.e., 300 A), T ON is the pulse width (i.e., 300 µs), T S is the pulse period (i.e., 10 ms), and I SMPS is the minimum output current of the SMPS (i.e., 9 A).
A Cotek AE-1500-24 was selected as the SMPS to allow for a sufficient power margin and subsequent product upgrades.Its main parameters are listed in Table 4.

Selection of the Sampling Resistor
The precision resistor WSLP40261L000FEA with a resistance of 1 mΩ and a power rating of 7 W is used to sample the current.The peak power P R S , average power P R S , and operating voltage V RS of the resistor are calculated using Equations ( 24)-( 26), respectively: where R S is the sampling resistance of 1 mΩ and D is the duty cycle of 300 µs 10 ms = 3%.

Stability Analysis
A QCW LD driver, which uses a MOSFET-based transconductance amplifier as the key constant-current circuit [27,28], is essentially a voltage-controlled constant-current source, as shown in Figure 10.Since a pulsed constant-current source is needed, the stability of the circuit is a key consideration.To further analyze the stability of the circuit, its highfrequency and small-signal equivalent model is considered, as shown in Figure 11.The input resistance R i of the op-amp U 1 , which is typically very large, can be considered an open circuit.The input differential voltage V di f f is approximately equal to V ISET , A ol is the open-loop gain, and R o is the open-loop output impedance.According to the data sheet, A ol is ∼134 dB, R o is ∼375 is ohms, and the unity gain bandwidth is ∼10 MHz.For power MOSFETs, the parasitic capacitances, such as C gs and C gd , are typically very high.According to the IXTH360N055T2 data sheet, C iss =C gs +C gd ≈ 20 nF was measured at 1 MHz, with a gate-to-source voltage of 0 V and a drain-to-source voltage of 25 V. Thus, the effects of C gs and C gd cannot be neglected.The open-loop gain curve of an op-amp typically has a low-frequency pole; according to the OPA2197 manual, f P1 ≈ 2 Hz.A second pole introduced in the open-loop gain curve is due to the effect of the open-loop output resistance R o and the MOSFET input capacitance C iss .Here, we neglect the effects of R s and R LD since their values are much smaller than R o .The frequency of the second pole, f P2 , is calculated using Equation ( 27): The SPICE model of the circuit was used for the simulations, and the resulting curves are shown in Figure 12.The position of the second pole of the A ol curve is f P2 = 21.62 kHz, which is very close to our estimated value.The open-loop gain curve A ol intersects the closed-loop gain curve Beta1 (1/β ) at a frequency of f CL = 107.40kHz, where the rate of closure is approximately −40 dB/decade.The loop gain curve, AolBeta, has a phase margin of 11.34 • at this point, indicating that the circuit is unstable.We also find that A ol is zero at f Z1 = 1496.24kHz, which is caused by parasitic parameters that are not considered, but this does not affect the stability analysis.

Compensation
The above analysis shows that the pulsed constant-current source circuit is unstable because of the parasitic capacitance of the MOSFET.This study adopts the method used in [29] for circuit compensation but includes the SPICE simulation description of the improved circuit.However, a comprehensive stability analysis is beyond the scope of this study [30].The compensation circuit is shown in Figure 13.First, a resistor, R iso , placed between the op-amp output and the gate terminal of the MOSFET helps isolate the op-amp from the capacitive load.Second, the feedback capacitor, C f , provides feedback directly from the output of the op-amp to the inverting input, removing the MOSFET gain from the high-frequency feedback loop and replacing it with DC feedback from the MOSFET source terminal via the feedback resistor R f .If these three components are not used, the circuit is unstable.In general, the compensation component of such a circuit is not set by a fixed equation but rather by choosing values and then manipulating them while observing the output response.The values selected during circuit simulation are R iso = 5.1 Ω, R f = 1 kΩ, and C f = 470 pF.

Effect of Compensation on the A ol Curve
With resistor R iso , the position of the second pole, f P2 , which is generated on the A ol curve, is shifted slightly to a lower frequency.Moreover, introducing a zero f Z2 at a higher frequency increases the slope of the A ol curve by 20 dB/decade after this point, which helps stabilize the circuit.The values of f P2 and f Z2 are calculated using Equations ( 28) and ( 29):

Effect of Compensation on the Beta1 Curve
Before studying the Beta1 curve, Figure 12 shows the simulation results, where, at the low-frequency region below f CL , the closed-loop gain is largely unchanged, as expressed by Equation (30).In addition, β is helpful for our next calculation: After adding C f and R f , a zero-value f Z3 and pole f P3 are generated on the Beta1 curve, and their positions are calculated using Equations ( 31) and (32), respectively: The zero obtained from the Beta1 curve is 350.03 kHz, and the pole is 18.43 kHz, both of which are very close to the calculated values.

Stability Analysis
Figure 14 compares the Bode plots before and after compensation.The compensated open-loop gain curve A ′ ol and closed-loop gain curve Beta1 ′ intersect at f CL2 = 426.34kHz, where the rate of closure is slightly less than −20 dB/decade and the phase margin is 68.98 • , indicating that the circuit is stable.Small-signal transient simulations performed on the circuit with an input voltage of 300 mV yield the output waveform shown in Figure 15, resulting in an output current of ∼ 300 A and a rising edge of ∼ 10 µs, with no significant overshoot.This set of component values can be used as a reference for circuit design and adjusted according to the test results of the actual circuit.

PID Control Theory
The core element of the load-adaptive driving method for the QCW LD driver is locking the drain-to-source voltage V DS of the voltage-controlled MOSFET to V GS − V TH .For engineering applications, instead of trying to study the transfer function of the system, the traditional digital PID control method can be employed since it does not require knowledge of the exact transfer function for feedback control, and our experiments demonstrated that this method works efficiently in our system.The following discusses the PID control method [31].
Equation ( 33) is a continuous expression of the PID algorithm: Equations ( 34) and ( 35) are discrete expressions of the PID algorithm: The incremental PID algorithm, Equation (36), can be obtained by subtracting u x−1 from u x : The coefficients A, B, and C are defined by Equations ( 37)-(39), respectively: where x is the sampling sequence number (i.e., x = 0, 1, 2, . . . . . .), u x is the output value of the PID at the sampling time x, ∆u x is the output value of the incremental PID at the sampling time x, e x is the input error at sampling time x, K p is a proportional constant, T i is an integral constant, T d is a derivative constant, and T is the sampling time.
In this study, a microprocessor was used as the servo controller to implement the incremental PID control method.The sampling time was the same as the QCW LD driving period.To reduce the control frequency, we also set an error threshold such that the controller only worked if the input error exceeded the set value.

Control Process of the Load-Adaptive Driving Method
According to the description of the load-adaptive driving method in Section 1.3.2,we need to lock the drain-to-source voltage V DS of the MOSFET to the set value V DS_SET (see Equation ( 18) and ( 19)).Computing the PID input error requires sampling the values of V D , V G and V TH , which were obtained at different times.As shown in Figure 16, S 1 is the trigger pulse with period T S , and S 2 represents the PID control sequence.The servo controller detects the rising edge of S 1 at time t 0 and samples V S , V G and V D via ADCs at time t 1 after a delay of T 0 .The falling edge of the pulse is detected at time t 2 , and V TH is sampled at time t 3 after a delay of T 1 .The error V ERR is then calculated per Equation (19), and V DS is adjusted to complete the PID control process.Of note, V DS is controlled indirectly by adjusting the output voltage V CAP of the linear voltage-controlled SMPS.

PID OFF
OFF

Experiment Setup
Figure 17 shows the experimental setup used to test the QCW LD driver.The block diagram includes five components: an LD (FOCUSLIGHT GS20) as the driven load; a QCW LD driver, our equipment to be tested; a signal generator DS1032 (RIGOL 30 MHz, 200 MS/s), which provided the pulsed trigger signals; an oscilloscope HDO4035 (Lecroy 350 MHz, 2.5 GS/s) to measure the waveform of the triggered pulses and current pulses; and a personal computer to perform the parameter configuration and status monitoring for the driver.

Pulsed Constant-Current Source Test
We first debugged the pulsed constant-current source circuit shown in Figure 13, setting V CAP at a fixed value and retaining a sufficient margin so that V DS > V GS − V TH always held.The connection between the GS20 load under test and the driver was as short as possible to minimize the effect of parasitic inductance on the current pulse, and we used a low-inductance cable.Finally, we applied R iso = 5.1 Ω, R f = 1 kΩ, and C f = 1000 pF for the compensation.Figure 18 shows the waveform of the current pulse sequence, with a pulse width of ∼300 µs, a current of ∼300 A, and a repetition rate of 100 Hz.Channel 1 was the voltage waveform of R S , named V RS , and channel 2 was the waveform of the trigger pulse, named V TRIG .Figure 19 shows the waveform of a single current pulse, with a rising time of 10.2 µs, a falling time of 13.0 µs, an overshoot of 0.53%, and a V RS of 299.6 mV, corresponding to a load current of 299.6 A. The current value was stepped by 50 A, and the results are plotted in Figure 20 using MATLAB, R2019.The pulse width was stepped by 50 µs, and the results are plotted in Figure 21.Finally, we sampled 1,000,000 values of the current pulse using an ADC inside the driver, and the statistical results are shown in Table 5.The above test results indicate that the shape and value of the current pulse can be properly controlled by the circuit and parameters designed in this study.

Load-Adaptive Driving Test
Before performing this test, we set the bias voltage V BI AS such that the MOSFET would be in the micro-on state during idling, when the base voltage is approximately equal to the threshold voltage V TH .We set the V BI AS to 0.1 mV, at which point V TH was measured to be 3.7 V.The operating range of V CAP was 5-15 V, with a low threshold of 5 V to obtain the correct V TH before the PID started and a high threshold of 15 V to protect the system.The classical Ziegler-Nichols (ZN) method was not fully applicable for tuning the PID parameters in our application, so we used manual tuning in the order of K p , K i and K d .The step response of the driver, shown in Figure 22, had a current of 300 A, a repetition rate of 10 Hz, and a pulse width of 300 µs.Channel 1 was the current pulse waveform with three transition pulses.Channel 2 was the V CAP waveform with a rising time of 213.9 ms and an overshoot of 2.7%.The glitches on the V CAP waveform were due to voltage drops caused by capacitor discharges.
The PID was able to control V CAP in a relatively stable voltage range.Figure 23 shows the waveform of a single current pulse after V CAP stabilization, and the current was very stable.The step response when the driving current was decreased to 100 A is shown in Figure 24.As the required V CAP voltage was reduced, the rising time was also reduced to 202.4 ms, with an overshoot of ∼1.5%.In addition, with the same PID parameters, the change in the output current had little effect on the transient waveform of V CAP .We tried different PID parameters and showed that the number of transition pulses could no longer be reduced even if the rising time of V CAP was shortened.
With the same PID parameters, the repetition rate was increased to 100 Hz, and the corresponding sampling time was reduced to 10 ms.The step response is shown in Figure 25.The V CAP rising time was 92.0 ms, and the overshoot was 2.6%, which was still well-controlled.However, the number of transition pulses was increased to 10, which was excessive.After we optimized the PID parameters, the rising time of V CAP decreased to 48.1 ms, the overshoot increased to 13.4%, and the number of transition pulses decreased to six, as shown in Figure 26.Although the V CAP overshoot increased, it accelerated the stabilization time.In practice, the same PID parameters were used for the driver since a few more transition pulses would have little effect on the system.Step response under load-adaptive driving with a current of 300 A, a repetition rate of 100 Hz, and a pulse width of 300 µs.

Power Efficiency Test
Power efficiency is one of the most critical characteristics of an LD driver.We compared the efficiency of the pulsed constant-current source circuit experimentally with and without the load-adaptive driving method.Since the SMPS is a mature commercial module, we excluded it from the efficiency evaluation and considered it equivalent under both tests.The power efficiency was calculated according to Equation (40): where V CAP is the average voltage of the driver during operations and V LD is the voltage of the LD under the test.
Based on Equation ( 7), when the V LD is greater than the threshold voltage, it is approximately proportional to its current because of the effect of the equivalent resistance R LD .Therefore, in the normal operation mode, since V CAP is fixed, the LD voltage decreases as I D decreases, and the efficiency drops.For comparison, we carefully set V CAP such that V DS ≈ V GS − V TH at I D = 300 A. The measured efficiency is shown as the blue curve in Figure 27, which aligns well with Equation (7).
When the driver operated in a load-adaptive mode, the servo locked V DS to V GS − V TH .When the load current I D decreased, V DS decreased along with the required V CAP accordingly, which was consistent with the characteristic curve of the MOSFET, as shown in Figure 3.As a result, the efficiency of the driver increased with the load shown by the red curve in Figure 27.
Of note, we could not set a small V CAP at I D = 50 A in normal operation mode for this experiment as the V DS would decrease with I D , and the MOSFET would eventually be unable to output a sufficient current.Further improvement in the efficiency of the driver is possible in the load-adaptive mode as long as a in Equation ( 18) is reduced, but V DS requires a sufficient margin to ensure stability.

Test of Driving a QCW Laser
Figure 28 shows a photograph of the developed QCW LD driver, which consists of three components: a commercial SMPS with linearly adjustable voltage, a pulsed constantcurrent source circuit board with load-adaptive driving, and a low-power AC/DC module to power the board.We verified the functionality of this driver in a home-built laser system with the optical arrangement shown in Figure 29.The QCW LD driver operated with a current of 300 A, a pulse width of 300 µs, and a repetition rate of 100 Hz and drove the LD stack GS20 to generate an 808 nm pump light, which was injected into the laser resonator via a pump coupler.The Pockels cell driver used quarter-wave "off-type" voltage to keep the resonator closed, and it switched down to zero at the falling edge of the current pulse.At this point, the Q-factor of the laser resonator dropped instantaneously, and a high-energy 1064 nm laser pulse was immediately emitted.In Figure 30, channel 1 is the waveform of the current pulse, and channel 2 is the optical pulse received by the photodiode.Figure 31 shows a zoomed-in version of Figure 30.The laser pulse width was 20.2 ns, the average power measured by the optical power meter was 3.93 W, and the laser worked well.

Conclusions
In this study, we designed a pulsed constant-current source based on a voltageto-current converter circuit of op-amps and a MOSFET.The stability of the circuit was addressed by adding compensation elements and completing circuit simulations.Based on the MOSFET's properties, we propose an efficient and load-adaptive driving method for the QCW LD.Compared with a traditional driver, this driver has not only the advantages of high precision and high stability but also the ability to adjust the operating voltage automatically according to the load characteristics and load changes, which is very suitable for the application of a power-and stability-sensitive QCW laser.The experimental results showed that the driver can generate a pulsed constant current with a repetition rate of 100 Hz, a current of 300 A, and a pulse width of 300 µs.The efficiency of the pulsed constant-current source was consistently above 80% when the load current varied from 50 to 300 A, which we demonstrated with our home-built laser system.We designed only a prototype of the driver for the time being, but the long-term stability and protection mechanisms that are equally important for a commercial product are not discussed in this paper, which is recommended for further study.

Figure 2 .
Figure 2. Schematic of a typical simplified QCW LD driver.

Figure 7 .
Figure 7. Block diagram of the automatic control of V DS .1.3.3.Advantages of Load-Adaptive QCW LD Drivers

Figure 10 .Figure 11 .
Figure 10.Basic model of the QCW LD driver based on the MOSFET.

Figure 12 .
Figure 12.SPICE model simulation curves of the QCW LD driver circuit.

Figure 13 .
Figure 13.Pulsed constant-current source circuit with compensation.

Figure 14 .Figure 15 .
Figure 14.Comparison of Bode plots.The solid and dashed lines are the curves before and after compensation, respectively.

Figure 16 .
Figure 16.Control process diagram for the load-adaptive driving method.

Figure 17 .
Figure 17.Diagram of the experimental setup.

Figure 18 .
Figure 18.Waveforms of the current pulse sequence.

Figure 21 .
Figure 21.Current pulse width adjusted by a step of 50 µs.

Figure 22 .
Figure 22.Step response under load-adaptive driving with a current of 300 A, a repetition rate of 10 Hz, and a pulse width of 300 µs.

Figure 23 .
Figure 23.Single current pulse after the V CAP stabilization under load-adaptive driving.

Figure 24 .
Figure 24.Step response under the load-adaptive driving when the current was reduced to 100 A.

Figure 25 .
Figure 25.Step response under the load-adaptive driving with the PID parameters unchanged but the repetition rate increased to 100 Hz.

Figure 26 .
Figure 26.Step response under load-adaptive driving with a current of 300 A, a repetition rate of 100 Hz, and a pulse width of 300 µs.

Figure 27 .
Figure 27.Comparison of the power efficiency in the normal operation mode and the loadadaptive mode.

Figure 30 .
Figure 30.Laser pulse generated by the tested QCW laser.

Figure 31 .
Figure 31.Zoomed-in image of the laser pulse shown in Figure 30.

Table 2 .
Parameters of the IXTH360N055TT2.