A High-Precision Bandgap Reference with Chopper Stabilization and V-Curve Compensation Technique

The MEMS sensor converts the physical signal of nature into an electrical signal. The output signal of the MEMS sensor is so weak and basically in the low-frequency band that the MEMS sensor interface circuit has a rigorous requirement for the noise/offset and temperature coefficient, especially in the bandgap reference block. However, the traditional amplifier has low-frequency noise and offset voltage, which will decrease the precision of the bandgap reference. In order to satisfy the need of the MEMS sensor interface circuit, a high-precision and low-noise bandgap reference is proposed in this paper. A novel operational amplifier with a chopper-stabilization technique is adopted to reduce offset and low-frequency noise. At the same time, the V-curve compensation circuit is used to realize the second-order curvature compensation. The circuit is implemented under the 0.18 μm standard of the CMOS process. The test result shows that the temperature coefficient of the bandgap is 2.31 ppm/°C in the range of −40–140 °C, while the output voltage noise is only 616 nV/sqrt(Hz)@1 Hz and the power-supply rejection ratio is 73 dB@10 kHz. The linear adjustment rate is 0.33 mV/V for supply voltages of 1.2–1.8 V at room temperature, the power consumption is only 107 μW at 1.8 V power supply voltage, and the chip active area is 0.21 × 0.28 mm2.


Introduction
With the rapid advancement in microelectronics, MEMS (Micro-Electro-Mechanical Systems) sensors, which feature small size, an ability to work in an extreme environment, and a high signal-to-noise ratio, have found widespread applications in diverse fields, such as geophysical exploration, aerospace technology, IoTs(Internet of Things) [1], and healthcare.MEMS technology integrates microelectronic devices with micromechanical components on a single silicon chip, which involves a variety of disciplines and technologies.The characteristic dimensions of MEMS devices can be in the micrometer scale, allowing for mass production and manufacturing processes similar to those used in integrated circuits.Moreover, MEMS devices can be seamlessly integrated with CMOS (Complementary Metal-Oxide-Semiconductor) processes, making them a focal point of research internationally.Despite significant challenges, substantial progress has been made and numerous costeffective MEMS products have emerged.Due to their compact size, light weight, and ease of integration, MEMS devices are extensively used as control units in portable devices.A critical component of MEMS sensors is the interface circuitry, which acts as a conduit for converting sensing signals to digital outputs.The performance of this interface circuit significantly influences the sensor's overall metrics.It primarily comprises a front-end analog signal-detection circuit and a Σ-∆ (Sigma-Delta) modulator.The front-end circuit includes a bandgap reference and an instrumentation amplifier.The bandgap reference provides a stable baseline voltage for the sensor-interface circuit system, necessitating attributes such as low-temperature drift and minimal output noise.
The bandgap reference is widely used in analog and mixed-signal electronic devices, such as A/D converters, D/A converters, linear regulators, phase-locked loops, and operational amplifiers for their high precision and temperature independence [2][3][4][5][6][7].In high-performance application circuits, the noise performance of each module plays a decisive role in the overall system performance [8][9][10][11][12].The bandgap reference provides a DC reference for each module of the system [11], so the performance of the bandgap reference directly affects the various performance of the sensor.To reduce the output noise of the bandgap reference in order to avoid the deterioration of other modules, many techniques are adopted.In reference [11], the bandgap reference with the dual output structure, which includes three low-pass filters and two operational amplifiers, are proposed to reduce the output noise.However, the structure is complex, and a large resistance or large capacitor is often used in order to filter out the noise with low frequency.On the one hand, the integration of passive devices needs to occupy a large chip area.On the other hand, the large resistance and capacitance will lead to a very large time constant, which means the bandgap reference will need a long transient response time.In reference [13], the noise is suppressed by adopting the Darlington structure BJT, but it occupies more area than the traditional bipolar transistor.This structure has strict requirements on device parameter settings and inter-device matching.In reference [14], a notch filter is used as the output filter to further reduce the output voltage ripple.However, the increased capacitance used in the notch filter further increased the chip area.In reference [15,16], the bandgap reference with a chopper-stabilization technique [17] is proposed, which can improve circuit performance.However, in reference [15], the pre-regulator, SC filter, and output buffer will significantly increase power consumption and area consumption.In reference [16], the chopper switches are only located at the input and output ends, which increases the output noise and limits the bandwidth.In reference [18], a low-noise bandgap reference is proposed, which uses a simple topology to achieve a low output noise.However, the TC is 13.07 ppm/ • C, meaning it cannot meet the requirement of the high-precision applications.In the MEMS sensor interface circuit, the ultra-low TC (temperature coefficient) is still required.While the traditional bandgap reference mostly uses the first-order compensation technique, typically achieving a minimum of approximately 20 ppm/ • C, MEMS sensor interface circuits demand even lower TC.To further reduce the non-linear term and consequently decrease TC while enhancing output accuracy, it becomes necessary to implement high-order curvature compensation.Many studies on the second-order compensation of the bandgap reference have been completed in recent years.In reference [19], a combination of two BJTs and two MOSFETs, biased in their strong-inversion regions, is employed to generate a higher-order compensation signal.While this structure can achieve a low TC of sub-1 ppm/ • C, the use of numerous resistors introduces the need for external trimming, and the resistors themselves have temperature coefficients, which can have a significant impact on the precision of the produced chips.In reference [20], the bandgap reference with the segmented curvature temperature-compensation technique is proposed to achieve a low TC over a wide temperature range with low power consumption.However, in order to realize the precise compensation, this structure needs many comparators and logic gates and resistors, which will significantly increase power consumption, and response time, and it will introduce noise and interference.In reference [21], the high-order components of the CTAT (Complementary to Absolute Temperature) current are eliminated by adopting different CTAT current differences and then compensating with PTAT (Proportional to Absolute Temperature).This ultimately cancels the thermal nonlinearity of the emitter-base voltage.However, the structure increases noise and significantly increases the complexity of the circuit design as multiple amplifiers have pole issues that need special frequency compensation to ensure circuit stability.Although the above studies realize low TC, their structures are too complicated.Not only are the chip area, power consumption, and the difficulty of design increased, but additional noise is also generated.A novel bandgap reference is proposed in this study, which uses the chopper stabilization and V-curve compensation technique in order to meet the requirement of MEMS sensor-interface circuits.

Chopper-Stabilization Technique
In the MEMS sensor-interface circuit, there are many low-frequency noises and Vos (input offset voltage of amplifier), which will significantly impact its performance.The former originates primarily from the 1/f noise, while the latter results from random errors caused by transistor mismatch.In order to design a bandgap reference, which can be used in MEMS sensor-interface circuits, the chopper-stabilization technique is used in the proposed bandgap.The principle of the chopper modulation and demodulation technique is shown in Figures 1 and 2 in the frequency and time domain, respectively.As shown in Figure 1, a square-wave signal m(t) with 50% duty cycle is used for modulation and demodulation.The Fourier transform expression of the square wave can be represented as Equation (1).According to this expression, the square wave only has components at the odd harmonic frequencies of f chop , which is the frequency of modulation signal m 1 (t) and m 2 (t).In the chopper-stabilization techniques, the chopper frequency is a critical parameter as it directly affects the performance of the entire chopper-operational amplifier.To amplify the signal from MEMS sensors, it is imperative that the chopper frequency be lower than the bandwidth of the amplifier.This is necessary to prevent significant gain loss in the amplifier.In addition to the amplifier's bandwidth limitation, the aim of this study is to minimize 1/f noise as much as possible and ensure that the signal is not aliased after demodulation.In summary, this necessitates that the chopper frequency satisfies Equation (2) [22].In this expression, f corner represents the noise-corner frequency, while B ω,signal and f c represent the signal bandwidth and the cutoff frequency of amplifier.If the f chop exceeds f c , it will result in the amplifier filtering out a part of the modulated signal.Conversely, if f chop is less than f corner +2B ω,signal , it will lead to aliasing.The f chop is generally chosen at about 1/5 times f c [23] in order to preserve the integrity of the amplified signal and prevent aliasing.After the first modulation, the signal is modulated onto the odd harmonic components of f chop , which is at a high frequency.The modulated signal is then amplified by the amplifier, including the offset and low-frequency noise, resulting in the output signal V A .With the second modulation, the signal is demodulated back to the low-frequency band, while the offset and low-frequency noise are modulated to the high-frequency band.In the process of twice modulation, the signal is essentially multiplied by A × m 2 (t), which is equivalent to A × (16/π 2 ) × sin 2 (2π f chop t) = A × 16/π 2 × 1 − cos 4π f chop t /2.The resulting output signal is V OUT , as shown in Figure 1, and the expression for the output voltage is provided by Equation (3).Finally, the pure amplified signal can be obtained through a low-pass filter.As shown in Figure 2c, the modulation is equivalent to the signal multiplied by +1 or −1, and then the V OS and low-frequency noise are added to the modulated signal before passing into the amplifier.In the process of the second modulation, V 1 is multiplied by +1 or −1, which is provided by A(V OS + V in ) ×1 or A(V OS − V in ) ×(−1).The wave form after the second modulation is V 2 , as shown in Figure 2d.In addition, the V OS and lowfrequency noise can be easily eliminated by removing the high-frequency components from the signal.As mentioned above, the amplitude of the DC component in the output signal is (8/π 2 )•AVin, and the gain of the chopper operational amplifier, decreases by approximately 20%.Hence, it is necessary to select an amplifier with a sufficiently high gain.
Micromachines 2024, 15, x FOR PEER REVIEW 4 of 13 The chopper process and signal modulation and demodulation in frequency domain.( ) [ ] The schematic of the chopper is shown in Figure 3a, consisting of four clock-controlled switches.The clk and ~clk signals are non-overlapping, enabling the alternation of the positive and negative ends of the differential signals, which is equivalent to a multiplication of ±1.The structure of switch is depicted in Figure 3b.In this diagram, M1, M3, M4, and M6 represent virtual switches with an aspect ratio of 1/2 compared to M2 and M5.This structure can reduce charge injection and the impact of clock feedthrough.M2 and M5 are complementary switch structures in order to get a stable and low on-resistance.
The chopper process and signal modulation and demodulation in frequency domain.( ) [ ] The schematic of the chopper is shown in Figure 3a, consisting of four clock-controlled switches.The clk and ~clk signals are non-overlapping, enabling the alternation of the positive and negative ends of the differential signals, which is equivalent to a multiplication of ±1.The structure of switch is depicted in Figure 3b.In this diagram, M1, M3, M4, and M6 represent virtual switches with an aspect ratio of 1/2 compared to M2 and M5.This structure can reduce charge injection and the impact of clock feedthrough.M2 and M5 are complementary switch structures in order to get a stable and low on-resistance.The schematic of the chopper is shown in Figure 3a, consisting of four clock-controlled switches.The clk and ~clk signals are non-overlapping, enabling the alternation of the positive and negative ends of the differential signals, which is equivalent to a multiplication of ±1.The structure of switch is depicted in Figure 3b.In this diagram, M 1 , M 3 , M 4 , and M 6 represent virtual switches with an aspect ratio of 1/2 compared to M 2 and M 5 .This structure can reduce charge injection and the impact of clock feedthrough.M 2 and M 5 are complementary switch structures in order to get a stable and low on-resistance.The on-resistance expression for this switch structure is provided by Equation ( 4).When the , the impact of input level on the on-resistance can be minimized.Furthermore, as shown in the first term of the denominator in the Equation ( 4), increasing the aspect ratio of M 2 can reduce the on-resistance.As mentioned above, M 5 needs to be increased in accordance with the increase in M 2 .However, an excessively large aspect ratio can result in increased charge injection and introduce parasitic capacitance.Therefore, in consideration of minimizing the clock feedthrough effect, the chopper switch (CH 1 ) at the input end uses a smaller-sized NOMS transistor (1 µm/0.18µm), while the NOMS transistor for CH 2 and CH 3 are chosen with a larger size (2 µm/0.18µm) to reduce the voltage drop caused by the on-resistance.
Micromachines 2024, 15, x FOR PEER REVIEW 5 of 13 The on-resistance expression for this switch structure is provided by Equation ( 4).When the   ( ) =   ( ) , the impact of input level on the on-resistance can be minimized.Furthermore, as shown in the first term of the denominator in the Equation ( 4), increasing the aspect ratio of M2 can reduce the on-resistance.As mentioned above, M5 needs to be increased in accordance with the increase in M2.However, an excessively large aspect ratio can result in increased charge injection and introduce parasitic capacitance.Therefore, in consideration of minimizing the clock feedthrough effect, the chopper switch (CH1) at the input end uses a smaller-sized NOMS transistor (1 µm/0.18µm), while the NOMS transistor for CH2 and CH3 are chosen with a larger size (2 µm/0.18µm) to reduce the voltage drop caused by the on-resistance. 1 1 In terms of the choice of chopper-operational amplifier, there are three commonly used operational-amplifier structures, including two-stage amplifier, cascode amplifier, and folded cascode amplifier.The two-stage amplifier has the largest output swing among these three structures, but it has low bandwidth, high power consumption, and low PSRR (Power-Supply Rejection Ratio).The cascode amplifier has a wide bandwidth, but its output swing is too small.Compared with above two structures, the folded cascode has a high bandwidth similar to the cascode amplifier.Furthermore, its output swing and power consumption fall between them.So, the folded cascode amplifier is suitable for our circuit.The structure of the chopper operational amplifier is shown in Figure 4,which is the folded cascode amplifier structure.The chopper-operational amplifier employs PMOS differential pairs as input transistors to reduce the impact of input noise on the operational amplifier.The pole formula  = −1/RC suggests that when the output impedance is low, the pole's value is relatively high.Placing a chopper switch at the low-impedance node can reduce the impact of parasitic capacitance of chopper on the amplifier bandwidth and not reduce the voltage swing amplitude.Therefore, modulator CH2 is placed at the folding point N1(N2), which is a low-output impedance point.To further reduce current mismatch in the current mirror and minimize input offset, the modulator CH3 is placed at the inter- In terms of the choice of chopper-operational amplifier, there are three commonly used operational-amplifier structures, including two-stage amplifier, cascode amplifier, and folded cascode amplifier.The two-stage amplifier has the largest output swing among these three structures, but it has low bandwidth, high power consumption, and low PSRR (Power-Supply Rejection Ratio).The cascode amplifier has a wide bandwidth, but its output swing is too small.Compared with above two structures, the folded cascode has a high bandwidth similar to the cascode amplifier.Furthermore, its output swing and power consumption fall between them.So, the folded cascode amplifier is suitable for our circuit.The structure of the chopper operational amplifier is shown in Figure 4,which is the folded cascode amplifier structure.The chopper-operational amplifier employs PMOS differential pairs as input transistors to reduce the impact of input noise on the operational amplifier.The pole formula ω = −1/RC suggests that when the output impedance is low, the pole's value is relatively high.Placing a chopper switch at the low-impedance node can reduce the impact of parasitic capacitance of chopper on the amplifier bandwidth and not reduce the voltage swing amplitude.Therefore, modulator CH 2 is placed at the folding point N 1 (N 2 ), which is a low-output impedance point.To further reduce current mismatch in the current mirror and minimize input offset, the modulator CH 3 is placed at the intermediate node of the low-voltage cascode current mirror.This additional chopper-operational amplifier is utilized for dynamically switching the two PMOS transistors within the current mirror, which is the dynamic element-matching technique [24].

V-Curve Compensation Technique
To obtain the ultra-low temperature coefficient, the inverted V-curve structure is employed, which can further compensate the zero-TC (temperature coefficient) current.The principle of V-curve compensation is shown in Figure 5. Figure 5a shows the generation of traditional first-order zero-TC bandgap reference.V ref1 with the voltage variation ∆V 1 is generated by the combination of V CTAT and V PTAT .Figure 5b shows the principle of the creation of the inverted V structure with the voltage variation ∆V 1 .Finally, the ideal temperature curve of the proposed bandgap reference, which exhibits a voltage variation ∆V 2 , is shown in Figure 5c.It can be seen that ∆V 2 is far less than ∆V 1 .The core circuit of the compensation is shown in Figure 6 Micromachines 2024, 15, x FOR PEER REVIEW 6 of 13 mediate node of the low-voltage cascode current mirror.This additional chopper-operational amplifier is utilized for dynamically switching the two PMOS transistors within the current mirror, which is the dynamic element-matching technique [24].

V-Curve Compensation Technique
To obtain the ultra-low temperature coefficient, the inverted V-curve structure is employed, which can further compensate the zero-TC (temperature coefficient) current.The principle of V-curve compensation is shown in Figure 5. Figure 5a shows the generation of traditional first-order zero-TC bandgap reference.Vref1 with the voltage variation ∆ is generated by the combination of VCTAT and VPTAT.Figure 5b shows the principle of the creation of the inverted V structure with the voltage variation ∆ .Finally, the ideal temperature curve of the proposed bandgap reference, which exhibits a voltage variation ∆ , is shown in Figure 5c.It can be seen that ∆ is far less than ∆ .The core circuit of the compensation is shown in Figure 6 V =V -V mediate node of the low-voltage cascode current mirror.This additional chopper-operational amplifier is utilized for dynamically switching the two PMOS transistors within the current mirror, which is the dynamic element-matching technique [24].

V-Curve Compensation Technique
To obtain the ultra-low temperature coefficient, the inverted V-curve structure is employed, which can further compensate the zero-TC (temperature coefficient) current.The principle of V-curve compensation is shown in Figure 5. Figure 5a shows the generation of traditional first-order zero-TC bandgap reference.Vref1 with the voltage variation ∆ is generated by the combination of VCTAT and VPTAT.Figure 5b shows the principle of the creation of the inverted V structure with the voltage variation ∆ .Finally, the ideal temperature curve of the proposed bandgap reference, which exhibits a voltage variation ∆ , is shown in Figure 5c.It can be seen that ∆ is far less than ∆ .The core circuit of the compensation is shown in Figure 6; IPTAT and ICTAT are mirrored with weight a/b by the transistors M1 or M3.When the current a•IPTAT is smaller than b•ICTAT, the transistor M3 is in the linear region and a•IPTAT becomes the dominant current through M3, M4, and M5.When the current a•IPTAT is larger than b•ICTAT, the region of the transistor M5 will be changed into the triode region, and b•ICTAT becomes a dominant current.In addition, the current flowing through M6 and M7 is mirrored from the current through M4 and M5 with a weight of c.As shown in Equation ( 5), the compensation current Icomp is equal to a•c•IPTAT when a•IPTAT becomes the dominant current; otherwise, Icomp is equal to b (1) Figure 6.V-curve compensation structure.
The overall circuit structure is shown in Figure 7.The bandgap reference comprises start-up circuit, IPTAT generation circuit with chopper-operational amplifier, a bias circuit, operational amplifier, and V-curve structure.The principle of the start-up circuit is as follows.When the circuit is powered on, the CS begin to charge.The process of charging the capacitor is from a low level to high level, meaning that it starts with a low level during charging, causing MS4 to conduct, which pulls down the gate voltages of MP1 and MP2, eventually turning them on.As MP1 conducts, a current is generated, flowing through the BJTs and the resistor R1 to form a voltage of about 780 mV, thus turning on MS5.As MS5 conducts, MS4 turns off.Simultaneously, as the capacitor CS charges, the gate voltages of MS1 and MS2 continue to rise and eventually turn off.Ultimately, MS5 operates in the linear region, with the other transistors being in the cutoff region.During power-down, MS3 conducts, allowing the capacitor CS to discharge and return to its initial state, ready for the next power-up.The bias current, which remains constant regardless of the power supply voltage, is provided by the bias circuit.Therefore, the proposed bandgap reference can achieve high PSRR.The operational amplifier is composed of two amplifier stages, which include a five-transistor OTA (Operational Transconductance Amplifier) and a commonsource amplifier.Additionally, it utilizes Capacitor CC for Miller compensation to enhance the phase margin of the system, which increases the stability of the operational amplifier.The operational amplifier is biased in the deep negative feedback in order to ensure the gate voltages of M7 and M8 to be equal.The area ratio of Q2 and Q1 is 8:1, which can achieve optimal possible layout matching.When Q1 and Q2 operate at different current densities, the difference(ΔVEB) in the two junction voltages (VEB1 and VEB2) has a positive TC of approximately 0.194 mV/°C (4 µA operating current).While the emitter-base junction voltage VEB1 of Q1 has a negative TC of about −1.575 mV/°C.Through R2, the negative-TC current ICTAT is generated, and its value is VEB1/R2.The current mirror structure composed of MN1 and MN2 duplicates the ICTAT current with Weight B. When the ICTAT is combined with the IPTAT, which is ΔVEB/R1 with Weight A, the expression of Iref1 is shown in Equation (6).Without the V-curve compensation circuit, the Iref1 directly flows to the RREF resistor and achieves a first-order bandgap reference.In addition, with the V-curve compensation structure, the current of Rref is equal to Iref1 minus ICOMP, as the ICOMP flows into the V-curve The overall circuit structure is shown in Figure 7.The bandgap reference comprises start-up circuit, I PTAT generation circuit with chopper-operational amplifier, a bias circuit, operational amplifier, and V-curve structure.The principle of the start-up circuit is as follows.When the circuit is powered on, the C S begin to charge.The process of charging the capacitor is from a low level to high level, meaning that it starts with a low level during charging, causing M S4 to conduct, which pulls down the gate voltages of M P1 and M P2 , eventually turning them on.As M P1 conducts, a current is generated, flowing through the BJTs and the resistor R 1 to form a voltage of about 780 mV, thus turning on M S5 .As M S5 conducts, M S4 turns off.Simultaneously, as the capacitor C S charges, the gate voltages of M S1 and M S2 continue to rise and eventually turn off.Ultimately, M S5 operates in the linear region, with the other transistors being in the cutoff region.During power-down, M S3 conducts, allowing the capacitor C S to discharge and return to its initial state, ready for the next power-up.The bias current, which remains constant regardless of the power supply voltage, is provided by the bias circuit.Therefore, the proposed bandgap reference can achieve high PSRR.The operational amplifier is composed of two amplifier stages, which include a five-transistor OTA (Operational Transconductance Amplifier) and a common-source amplifier.Additionally, it utilizes Capacitor C C for Miller compensation to enhance the phase margin of the system, which increases the stability of the operational amplifier.The operational amplifier is biased in the deep negative feedback in order to ensure the gate voltages of M 7 and M 8 to be equal.The area ratio of Q 2 and Q 1 is 8:1, which can achieve optimal possible layout matching.When Q 1 and Q 2 operate at different current densities, the difference(∆V EB ) in the two junction voltages (V EB1 and V EB2 ) has a positive TC of approximately 0.194 mV/ • C (4 µA operating current).While the emitterbase junction voltage V EB1 of Q 1 has a negative TC of about −1.575 mV/ • C. Through R 2 , the negative-TC current I CTAT is generated, and its value is V EB1 /R 2 .The current mirror structure composed of M N1 and M N2 duplicates the I CTAT current with Weight B. When the I CTAT is combined with the I PTAT , which is ∆V EB /R 1 with Weight A, the expression of I ref1 is shown in Equation (6).Without the V-curve compensation circuit, the I ref1 directly flows to the R REF resistor and achieves a first-order bandgap reference.In addition, with the V-curve compensation structure, the current of R ref is equal to I ref1 minus I COMP , as the I COMP flows into the V-curve compensation structure, realizing the second-order compensation.The proposed bandgap reference voltage is provided by the Equation (7).
Micromachines 2024, 15, x FOR PEER REVIEW 8 of 13 compensation structure, realizing the second-order compensation.The proposed bandgap reference voltage is provided by the Equation ( 7).

Results
The proposed circuit was integrated using a standard 0.18 µm CMOS technology at 1.8 V supply.Figure 8a shows the simulation results of an uncompensated and compensated bandgap reference across a temperature range of 180 °C (−40-140 °C).Compared with the simulation results of a traditional bandgap reference, the proposed bandgap reference shows a significant 74.1% decrease in TC, decreasing from 8.92 to 2.31 ppm/°C.The variation in the reference voltage has been reduced from 1.8 mV to 0.4 mV. Figure 8b shows the variation of Vref with the temperature for different corners over a temperature range of −40 °C to 140 °C.The proposed bandgap reference Vref maximum value is 0.4774 V, and the minimum value is 0.4763 V.In addition, the TCs are 2.31, 2.34, and 2.79 ppm/°C for TT, SS, and FF corners, respectively.
Figure 9 presents the results of the Noise Spectrum simulation (e.g., PSS + Pnoise simulation using Cadence tools) at the output of the bandgap reference.The output noise density is decreased with the frequency, from 4.8 µV/√Hz to 190 nV/√Hz, over a frequency range of 0.01-1 MHz.In the MEMS sensor-interface circuit, the most critical aspect of concern is the low frequency, ranging from 1 to 100 Hz.By examining Points M0 and M1, it is found that the output voltage noise density of the proposed bandgap reference voltage source is 616 nV/√Hz at 1 Hz, and 245 nV/√Hz at 100 Hz.These results demonstrate that the proposed bandgap reference can satisfy the low-frequency noise requirements of the MEMS sensor-interface circuits.

Results
The proposed circuit was integrated using a standard 0.18 µm CMOS technology at 1.8 V supply.Figure 8a   Figure 10 shows the PSRR of the Vref simulation result.The proposed bandgap refer ence achieves PSRR as high as 73 dB at low frequencies(<10 kHz).The PSRR decreases a frequencies above 10 kHz. Figure 11a,b show the results of 500 Monte Carlo runs for TC and Vref, respectively.The average TC of the proposed circuit is 2.97 ppm/°C, and the standard deviation is 2.26 ppm/°C.In addition, the average output voltage Vref is 477 mV with a standard variation of 8.586 mV. Figure 12 illustrates the Vref values corresponding to each step voltage, which were obtained through the application of a staircase sweep voltage from 0.6 to 1.8 V under room-temperature conditions (27 °C) (measurement was conducted using Tektronix's MSO 2-series oscilloscope).The experimental result demon strates a steady output voltage of 476.5 mV, exhibiting minimal variation of just 0.2 mV in the presence of a 0.6 V supply-voltage fluctuation.This implies that the line regulation o the proposed bandgap reference is 0.33 mV/V within a voltage supply range of 1.2 V to 1.8 V.The power consumption of the bandgap reference presented in this paper is 107 µW Photo of the bandgap reference chip is shown in Figure 13, and the active area is 0.21 × 0.28 mm 2 .Table 1 provides a performance comparison between this study and other relevant research.Through comparison, the improvements of the proposed circuit in terms of noise and TC are significant, and the performance of PSRR is also commendable Overall, the proposed bandgap reference is suitable for the MEMS sensor-interface circuit Figure 10 shows the PSRR of the V ref simulation result.The proposed bandgap reference achieves PSRR as high as 73 dB at low frequencies(<10 kHz).The PSRR decreases at frequencies above 10 kHz. Figure 11a,b show the results of 500 Monte Carlo runs for TC and Vref, respectively.The average TC of the proposed circuit is 2.97 ppm/ • C, and the standard deviation is 2.26 ppm/ • C. In addition, the average output voltage V ref is 477 mV with a standard variation of 8.586 mV. Figure 12 illustrates the V ref values corresponding to each step voltage, which were obtained through the application of a staircase sweep voltage from 0.6 to 1.8 V under room-temperature conditions (27 • C) (measurement was conducted using Tektronix's MSO 2-series oscilloscope).The experimental result demonstrates a steady output voltage of 476.5 mV, exhibiting minimal variation of just 0.2 mV in the presence of a 0.6 V supply-voltage fluctuation.This implies that the line regulation of the proposed bandgap reference is 0.33 mV/V within a voltage supply range of 1.2 V to 1.8 V.The power consumption of the bandgap reference presented in this paper is 107 µW.Frequency(Hz)   Photo of the bandgap reference chip is shown in Figure 13, and the active area is 0.21 × 0.28 mm 2 .Table 1 provides a performance comparison between this study and other relevant research.Through comparison, the improvements of the proposed circuit in terms of noise and TC are significant, and the performance of PSRR is also commendable.Overall, the proposed bandgap reference is suitable for the MEMS sensor-interface circuit.

Discussion
A low-noise, high-precision bandgap reference is proposed in this paper, and the innovations of the chopper-operational amplifier of the proposed circuit are as follows.Firstly, instead of using choppers directly at the output, choppers are used at the lowimpedance nodes of the folded cascode structure.As analyzed previously, placing chopper at low-impedance nodes minimally affects the amplifier's bandwidth while allowing for a larger output swing.Secondly, the method of chopping at low-impedance nodes means that the modulation switches are not at the direct output end, so the switching noise is not directly coupled to the output, thus avoiding significant switching noise interference and allowing for a higher chopping-signal frequency.Additionally, Chopper CH3 is added in the middle of the low-voltage cascode current mirror, using dynamic element-matching techniques to further reduce current mismatch and input offsets in the current mirror.Furthermore, a virtual switch structure is employed to further reduce charge injection and clock feedthrough.
However, there are also some limitations in the proposed circuit.The proposed bandgap reference is primarily employed in sensor interface circuits for low-frequency signal acquisition.Hence, it has certain frequency limitations.Its ability to suppress highfrequency noise is relatively limited.Moreover, the three chopping switches increase the circuit's power consumption and introduce a certain level of residual offset voltage.Additionally, the proposed circuit needs additional structure to produce accurate two-phase,

Discussion
A low-noise, high-precision bandgap reference is proposed in this paper, and the innovations of the chopper-operational amplifier of the proposed circuit are as follows.Firstly, instead of using choppers directly at the output, choppers are used at the lowimpedance nodes of the folded cascode structure.As analyzed previously, placing chopper at low-impedance nodes minimally affects the amplifier's bandwidth while allowing for a larger output swing.Secondly, the method of chopping at low-impedance nodes means that the modulation switches are not at the direct output end, so the switching noise is not directly coupled to the output, thus avoiding significant switching noise interference and allowing for a higher chopping-signal frequency.Additionally, Chopper CH 3 is added in the middle of the low-voltage cascode current mirror, using dynamic element-matching techniques to further reduce current mismatch and input offsets in the current mirror.Furthermore, a virtual switch structure is employed to further reduce charge injection and clock feedthrough.
However, there are also some limitations in the proposed circuit.The proposed bandgap reference is primarily employed in sensor interface circuits for low-frequency signal acquisition.Hence, it has certain frequency limitations.Its ability to suppress high-frequency noise is relatively limited.Moreover, the three chopping switches increase the circuit's power consumption and introduce a certain level of residual offset voltage.Additionally, the proposed circuit needs additional structure to produce accurate twophase, non-overlapping clock signal, which will increase the difficulty of design.It also introduces a mirror pole, as shown in Point X in Figure 4.This will impact the speed of the feedback system in applications utilizing this structure.
In general, the proposed bandgap reference can be applied to MEMS sensor-interface circuits, such as MEMS-tunneling magnetoresistance sensor-interface circuits, MEMS accelerometer sensor-interface circuits, and MEMS gas-sensor-interface circuits.MEMS sensor-interface circuits are indispensable for micromachines because they help achieve reliable data acquisition, signal processing, and communication, thereby enhancing the performance and application scope of micro-mechanical systems.These interface circuits ensure effective collaboration between sensors and other systems, enabling a wide range of measurement, control, and feedback applications.

Conclusions
A low-noise and low-temperature coefficient bandgap reference based on 0.18µm CMOS technology is proposed in this paper.By employing a chopper operational amplifier, the output low-frequency noise and offset of the bandgap reference is significantly reduced.In addition, the V-curve compensation technique is utilized to further compensate for the

Figure 2 .
Figure 2. (a) The schematic of chopper; (b) Input signal; (c) The wave form of first modulation; (d) The wave form of second modulation; (e) Output signal.

Figure 1 .
Figure 1.The chopper process and signal modulation and demodulation in frequency domain.

Figure 2 .
Figure 2. (a) The schematic of chopper; (b) Input signal; (c) The wave form of first modulation; (d) The wave form of second modulation; (e) Output signal.

Figure 2 .
Figure 2. (a) The schematic of chopper; (b) Input signal; (c) The wave form of first modulation; (d) The wave form of second modulation; (e) Output signal.
; I PTAT and I CTAT are mirrored with weight a/b by the transistors M 1 or M 3 .When the current a•I PTAT is smaller than b•I CTAT , the transistor M 3 is in the linear region and a•I PTAT becomes the dominant current through M 3 , M 4 , and M 5 .When the current a•I PTAT is larger than b•I CTAT , the region of the transistor M 5 will be changed into the triode region, and b•I CTAT becomes a dominant current.In addition, the current flowing through M 6 and M 7 is mirrored from the current through M 4 and M 5 with a weight of c.As shown in Equation (5), the compensation current I comp is equal to a•c•I PTAT when a•I PTAT becomes the dominant current; otherwise, I comp is equal to b•c•I CTAT .
; IPTAT and ICTAT are mirrored with weight a/b by the transistors M1 or M3.When the current a•IPTAT is smaller than b•ICTAT, the transistor M3 is in the linear region and a•IPTAT becomes the dominant current through M3, M4, and M5.When the current a•IPTAT is larger than b•ICTAT, the region of the transistor M5 will be changed into the triode region, and b•ICTAT becomes a dominant current.In addition, the current flowing through M6 and M7 is mirrored from the current through M4 and M5 with a weight of c.As shown in Equation (5), the compensation current Icomp is equal to a•c•IPTAT when a•IPTAT becomes the dominant current; otherwise, Icomp is equal to b•c•ICTAT.

Figure 5 .
Figure 5. V-curve compensation principle.(a) Generation of first order voltage reference ; (b) Principle of the inverted V-curve; (c) Ideal curve of the proposed bandgap reference.

Figure 5 .
Figure 5. V-curve compensation principle.(a) Generation of first order voltage reference; (b) Principle of the inverted V-curve; (c) Ideal curve of the proposed bandgap reference.

Figure 9 Figure 8 .Figure 9 .
Figure9presents the results of the Noise Spectrum simulation (e.g., PSS + Pnoise simulation using Cadence tools) at the output of the bandgap reference.The output noise density is decreased with the frequency, from 4.8 µV/ √ Hz to 190 nV/ √ Hz, over a frequency range of 0.01-1 MHz.In the MEMS sensor-interface circuit, the most critical aspect of concern is the low frequency, ranging from 1 to 100 Hz.By examining Points M 0 and M 1 , it is found that the output voltage noise density of the proposed bandgap reference voltage source is 616 nV/ √ Hz at 1 Hz, and 245 nV/ √ Hz at 100 Hz.These results demonstrate that the proposed bandgap reference can satisfy the low-frequency noise requirements of the MEMS sensor-interface circuits.

Figure 10 .
Figure 10.PSRR of the Vref simulation results of the proposed bandgap reference.

Figure 10 .
Figure 10.PSRR of the Vref simulation results of the proposed bandgap reference.

.Figure 11 .
Figure 10.PSRR of the Vref simulation results of the proposed bandgap reference.

Figure 12 .
Figure 12.Measured output voltage at each step voltage from 0.6 to 1.8 V.( The black arrow represents the portion within the measurement range that does not belong to the linear regulation rate measurement range, while the red portion represents the linear regulation rate measurement range).

Figure 13 .
Figure 13.Photo of the bandgap reference chip.

Figure 13 .
Figure 13.Photo of the bandgap reference chip.
Measured output voltage at each step voltage from 0.6 to 1.8 V.( The black arrow represents the portion within the measurement range that does not belong to the linear regulation rate measurement range, while the red portion represents the linear regulation rate measurement range).