A Self-Powered DSSH Circuit with MOSFET Threshold Voltage Management for Piezoelectric Energy Harvesting

This paper presents a piezoelectric (PE) energy harvesting circuit based on the DSSH (double synchronized switch harvesting) principle. The circuit consisted of a rectifier and a DC–DC circuit, which achieves double synchronized switch operation for the PE transducer in each vibration half-cycle. One of the main challenges of the DSSH scheme was precisely controlling the switch timing in the second loop of the resonant loops. The proposed circuit included a MOS transistor in the second loop to address this challenge. It utilized its threshold voltage to manage the stored energy in the intermediate capacitor per vibration half-cycle to simplify the controller for the DSSH circuit. The circuit can operate under either the DSSH scheme or the ESSH (enhanced synchronized switch harvesting) scheme, depending on the value of the intermediate capacitor. In the DSSH scheme, the following DC–DC circuit reused the rectifier’s two diodes for a short period. The prototype circuit was implemented using 16 discrete components. The proposed circuit can be self-powered and started up without a battery. The experimental results showed that the proposed circuit increased the power harvested from the PE transducer compared to the full-bridge (FB) rectifier. With two different intermediate capacitors of 100 nF and 320 nF, the proposed circuit achieved power increases of 3.2 and 2.7 times, respectively. The charging efficiency of the proposed circuit was improved by a factor of 5.1 compared to the typical DSSH circuit.


Introduction
Wireless sensor nodes are widely used in various fields, such as medical implants, wildlife tracking, and pipeline monitoring [1]. However, frequent battery replacement or recharging poses a challenge for these applications. Vibration energy harvesting offers a promising solution for powering these wireless sensors. Among the different energy harvesting options, piezoelectric (PE) energy harvesting has garnered significant attention due to its high power density and scalability for PE transducers. To achieve an efficient power extraction and transfer to the load, PE energy harvesting circuits commonly employ rectification and maximum power point tracking. Designing rectifiers for power extraction and DC-DC circuits for power transfer presents unique challenges, which have been the main focus of the existing research efforts.
Extensive research has been conducted on PE energy harvesting circuits . The primary objective of a PE energy harvesting circuit is to maximize the net power delivered to the load. It involves optimizing the power extraction from the PE transducer through the rectifier and the power transfer to the load via the DC-DC circuit. Efficiency is crucial, and minimizing circuit dissipation is a key factor. Figure 1 illustrates the block diagram of a PE energy harvesting circuit. Here, the PE transducer was modeled as a current source i P parallel to a capacitor C P and a resistor R P , considering the weak coupling of small-scale PE transducers. The equation for i P is given by i P = I P sin(2π f P t), where f P is the excitation frequency of the PE transducer. This model served as the basis for the circuit analysis in . The rectifier converted the AC voltage output from the PE transducer into DC voltage, while a DC-DC circuit transferred the energy stored in the capacitor C T to the loads C L and R L . Due to the relatively high impedance of PE transducers, including a significant capacitive term at the excitation vibration frequency, using a large inductor to match the capacitive term as suggested by the conjugate matching theorem was impractical. As a result, researchers have explored alternative schemes that employ a rectifier followed by a DC-DC converter, enabling an efficient power extraction and transfer. This approach addresses the challenges posed by PE transducer characteristics and contributes to advancing energy harvesting techniques. The rectifier converted the AC voltage output from the PE transducer into DC voltage, while a DC-DC circuit transferred the energy stored in the capacitor C to the loads C and R . Due to the relatively high impedance of PE transducers, including a significant capacitive term at the excitation vibration frequency, using a large inductor to match the capacitive term as suggested by the conjugate matching theorem was impractical. As a result, researchers have explored alternative schemes that employ a rectifier followed by a DC-DC converter, enabling an efficient power extraction and transfer. This approach addresses the challenges posed by PE transducer characteristics and contributes to advancing energy harvesting techniques. Intensive research has been focused on the efficient rectification of PE AC voltages. The commonly used rectifier circuit is a full-bridge (FB) rectifier. To address diode losses, a voltage doubler (VD) rectifier with fewer diodes can be used. However, this type of rectifier has a drawback as it requires the internal capacitor C of the PE transducer to be charged and discharged in each half-cycle, leading to wasted output charge. To reduce charge losses, the synchronized switching (SS) method, as described in [2,3], momentarily shorts the PE transducer at to discard the charge, resetting the capacitor voltage to zero. The SS scheme does not require an inductor, thereby saving space. However, its efficiency is lower due to the discarded capacitor charge. In contrast, the synchronized switch harvesting on inductor (SSHI), such as the P-SSHI [4], S-SSHI [5], Hybrid SSHI [6], or Triple bias-flip SSHI [7], adopts an LC resonator with an external inductor. The LC resonator in the SSHI scheme changes the polarity of the capacitor charge at , flipping the capacitor voltage from positive to negative [8][9][10][11][12][13][14]. This allows the current to continuously charge the capacitor instead of discharging the negative charge before recharging. A common feature of the above rectifiers is that their output filtering capacitors are relatively large to maintain a stable rectified voltage. However, this also results in the output power of these rectifiers being load-dependent. To achieve maximum power, a second-stage DC-DC circuit is usually required to optimize the impedance for these rectifiers [15][16][17][18][19]. The DC-DC circuits often employ maximum power point tracking (MPPT) to achieve dynamic impedance matching. MPPT schemes necessitate extra control circuits for the DC-DC converter's operation. The control circuits often dissipate a significant portion of the harvested energy, sometimes even exceeding the energy harvested.
Researchers have proposed several alternative methods to address the issue of rectifier output power dependence on the load, including SECE [20], DSSH [21], and ESSH [22]. SECE is a representative scheme in which the LC resonator temporarily transfers the capacitor charge to the inductor at and then to the load [23][24][25][26][27][28][29]. The efficiency of the SECE scheme is independent of the load. The SECE circuit achieves four times the peak output power of the ideal FB rectifier. In contrast, the DSSH scheme transfers the capacitor charge to the intermediate capacitor at and then to the load. The DSSH scheme combines the advantages of the SSHI and SECE interface circuits. Under the same conditions, it achieves a higher output power than the SECE scheme while maintaining load- Intensive research has been focused on the efficient rectification of PE AC voltages. The commonly used rectifier circuit is a full-bridge (FB) rectifier. To address diode losses, a voltage doubler (VD) rectifier with fewer diodes can be used. However, this type of rectifier has a drawback as it requires the internal capacitor C P of the PE transducer to be charged and discharged in each half-cycle, leading to wasted output charge. To reduce charge losses, the synchronized switching (SS) method, as described in [2,3], momentarily shorts the PE transducer at t 0 to discard the charge, resetting the capacitor voltage V BA to zero. The SS scheme does not require an inductor, thereby saving space. However, its efficiency is lower due to the discarded capacitor charge. In contrast, the synchronized switch harvesting on inductor (SSHI), such as the P-SSHI [4], S-SSHI [5], Hybrid SSHI [6], or Triple bias-flip SSHI [7], adopts an LC resonator with an external inductor. The LC resonator in the SSHI scheme changes the polarity of the capacitor charge at t 0 , flipping the capacitor voltage V BA from positive to negative [8][9][10][11][12][13][14]. This allows the current i P to continuously charge the capacitor instead of discharging the negative charge before recharging. A common feature of the above rectifiers is that their output filtering capacitors are relatively large to maintain a stable rectified voltage. However, this also results in the output power of these rectifiers being load-dependent. To achieve maximum power, a second-stage DC-DC circuit is usually required to optimize the impedance for these rectifiers [15][16][17][18][19]. The DC-DC circuits often employ maximum power point tracking (MPPT) to achieve dynamic impedance matching. MPPT schemes necessitate extra control circuits for the DC-DC converter's operation. The control circuits often dissipate a significant portion of the harvested energy, sometimes even exceeding the energy harvested.
Researchers have proposed several alternative methods to address the issue of rectifier output power dependence on the load, including SECE [20], DSSH [21], and ESSH [22]. SECE is a representative scheme in which the LC resonator temporarily transfers the capacitor charge to the inductor at t 0 and then to the load [23][24][25][26][27][28][29]. The efficiency of the SECE scheme is independent of the load. The SECE circuit achieves four times the peak output power of the ideal FB rectifier. In contrast, the DSSH scheme transfers the capacitor charge to the intermediate capacitor at t 0 and then to the load. The DSSH scheme combines the advantages of the SSHI and SECE interface circuits. Under the same conditions, it achieves a higher output power than the SECE scheme while maintaining load-independent efficiency. The ESSH scheme is a further improvement based on the DSSH scheme. Wang et al. used a transformer rather than an inductor to implement a variation of the DSSH scheme [30]. Zou et al. used an inductor as the intermediate energy storage unit instead of a capacitor by inserting an additional resonant loop into the DSSH circuit [31]. These schemes commonly adopt two parts: a rectifier followed by a DC-DC circuit structure. Due to the circuit's operation in a short period per vibration half-cycle, precise control timing for both parts is necessary. As a result, the controller is often complex, leading to a higher power dissipation.
This paper presents a self-powered DSSH circuit, incorporating a simplified lowpower controller based on threshold voltage management. The main advantages of the circuit lie in its uncomplicated controller and reduced drive losses for the MOSFET in the DC-DC circuit. The proposed circuit utilizes the MOSFET's threshold voltage to automatically switch resonant loops in the DSSH circuit. The operational mode, whether DSSH or ESSH, depends on the value of the intermediate energy storage capacitor. The circuit prototype consists of 16 discrete components, eliminating the need for a complex controller. Additionally, the circuit can cold-start even when the battery is drained. This paper is organized as follows. Section 2 describes the basic operation of the DSSH circuit and discusses the optimization of controller power dissipation. Section 3 presents the proposed DSSH circuit, including its operation, modeling, analysis, and the identification of the value range for the intermediate capacitor C T . Section 4 covers the implementation of the proposed circuit and describes how it operates. Section 5 shows the measurement results of the proposed circuit. Section 6 concludes the paper. Figure 2 shows a typical DSSH circuit [21], which is divided into two parts. The first part adopts an S-SSHI circuit topology with an intermediate energy storage capacitor C T . The second part includes a switch SW 2 , an inductor L 2 , a diode D 1 , and a load R L and C L , forming a buck-boost topology.  [31]. These schemes commonly adopt two parts: a rectifier followed by a DC-DC circuit structure. Due to the circuit's operation in a short period per vibration half-cycle, precise control timing for both parts is necessary. As a result, the controller is often complex, leading to a higher power dissipation. This paper presents a self-powered DSSH circuit, incorporating a simplified lowpower controller based on threshold voltage management. The main advantages of the circuit lie in its uncomplicated controller and reduced drive losses for the MOSFET in the DC-DC circuit. The proposed circuit utilizes the MOSFET's threshold voltage to automatically switch resonant loops in the DSSH circuit. The operational mode, whether DSSH or ESSH, depends on the value of the intermediate energy storage capacitor. The circuit prototype consists of 16 discrete components, eliminating the need for a complex controller. Additionally, the circuit can cold-start even when the battery is drained.

Review of the DSSH Circuit and Relevant Works
This paper is organized as follows. Section 2 describes the basic operation of the DSSH circuit and discusses the optimization of controller power dissipation. Section 3 presents the proposed DSSH circuit, including its operation, modeling, analysis, and the identification of the value range for the intermediate capacitor C . Section 4 covers the implementation of the proposed circuit and describes how it operates. Section 5 shows the measurement results of the proposed circuit. Section 6 concludes the paper. Figure 2 shows a typical DSSH circuit [21], which is divided into two parts. The first part adopts an S-SSHI circuit topology with an intermediate energy storage capacitor C . The second part includes a switch SW , an inductor L , a diode D , and a load R and C , forming a buck-boost topology.   As shown in Figure 2, the DSSH circuit operates briefly per vibration half-cycle. The circuit sequentially activates three resonant loops, transferring the energy accumulated in the internal capacitor C P of the PE transducer to the load. One of the design challenges of the DSSH circuit is controlling the switching timing of the switch SW 2 . It needs to be turned on after the switch SW 1 turns off and turned off promptly after completing the energy extraction from the capacitor C T , i.e., when the voltage in the capacitor C T decreases to zero. In a previous study [21], the DSSH circuit was implemented using DSPACE, but the circuit's self-powered functionality was not achieved. To address the cold-start issue, Shen et al. introduced an additional start-up circuit with assistance from PZT. Furthermore, the complexity of the controller stemmed from its management of SW 2 , which involved tasks such as control signal generation, threshold control, and power management. These controller modules resulted in a higher power dissipation. Therefore, their proposed system operation was divided into two states: charging and operating [22]. To mitigate this power demand, Wang et al. and Zou et al. adopted an intermittent power supply approach [30,31]. However, their circuits relied on variable resistors to adjust the timing circuit. Note that all the mentioned circuits utilized comparator outputs to drive the MOSFET.

Review of the DSSH Circuit and Relevant Works
This paper adopted the method presented in [30,31] for the DSSH circuit, where the control circuit was activated only when necessary. However, the proposed method utilized the charge accumulated during the charging of the intermediate energy storage capacitor C T to drive the MOSFET in the DC-DC circuit of the DSSH circuit. This greatly simplified the controller. Furthermore, depending on the capacitor's value, the circuit could operate in either the DSSH or ESSH scheme. The feasibility of adapting these two schemes was attributed to the shared circuit topology between the DSSH and ESSH circuits.

Optimizing the Losses of the DSSH Circuit Controller
Since the primary function of the DSSH circuit controller is to control the circuit switching on and off, the power dissipation can be divided into two parts: the losses in the control circuit itself and the losses associated with driving the MOSFET gate. The power losses of the DSSH circuit controller can be expressed as the following.
where V DD represents the supply voltage of the control circuit, Q G is the total gate charge for driving the MOSFET, and I D represents the total current dissipated by the control circuit when the gate driver is inactive. As aforementioned, in order to reduce P ctrl , it is essential to minimize both the losses in the control circuit and the MOSFET's drive losses. This necessitates simplifying the controller, such as the peak voltage detection circuits, timing circuits, and the DC-DC control circuit. Additionally, efforts should be made to decrease the switch drive losses. Unlike the typical DSSH circuit, the proposed circuit incorporated a MOSFET into the second loop of the double synchronized resonant loops. This MOSFET utilized its threshold voltage to manage the stored energy in the intermediate capacitor during each vibration half-cycle. The method adopted in this paper had two advantages. (1) It could utilize the MOSFET's inherent voltage threshold to automatically switch the resonant loops of the DSSH circuit, thereby reducing the control losses. (2) It enabled the extraction of the energy that drives the MOSFET, thus avoiding losses to drive the gate of the MOSFET. Moreover, a highly simplified control circuit operated only when necessary to reduce the control losses P D . Figure 3 illustrates the block diagram of the proposed circuit, which included two parts. The first part followed the S-SSHI scheme and served as rectification, extracting energy from the PE transducer. It comprised two switches S 1 and S 2 , two diodes D 1 and D 2 , and an inductor L 1 connected in series with the PE transducer. The second part employed a boost topology account for transferring the extracted energy to the load. Notably, C T acted as a temporary intermediate capacitor. For simplicity in the analysis, the diodes and switches were assumed to be ideal unless stated otherwise.

Block Diagram
Micromachines 2023, 14, x FOR PEER REVIEW 5 of 20 Figure 3 illustrates the block diagram of the proposed circuit, which included two parts. The first part followed the S-SSHI scheme and served as rectification, extracting energy from the PE transducer. It comprised two switches S and S , two diodes D and D , and an inductor L connected in series with the PE transducer. The second part employed a boost topology account for transferring the extracted energy to the load. Notably, C acted as a temporary intermediate capacitor. For simplicity in the analysis, the diodes and switches were assumed to be ideal unless stated otherwise.  . At , (= ) reached its peak, causing S to close and create a resonant loop along the blue dot line, as shown in Figure 4c, to perform the SSHI operation. The energy stored in C was transferred to the inductor, and then the inductor energy was transferred back to the capacitor. As the current passed through the capacitor C , C stored the energy during this period, causing the voltage of C to increase. When the resonant loop's current decreased to zero at , the switch S opened, and S closed. The subsequent DC-DC circuit began operating to transfer the energy stored in C to the load. A resonant loop was formed through the devices C -S -L -M -C during < < . As the MOSFET M was inserted into the loop, when the capacitor voltage decreased below the threshold voltage of MOSFET M , M opened at . At , the inductor current reached its peak . Then, the circuit established a freewheeling path through the devices C -S -L -D -R /C for the inductor current to charge the load. Two scenarios were considered based on whether the energy in capacitor C was depleted. (1) If C contained sufficient energy after the inductor current drops to zero, there was still residual energy in C . In this case, the circuit operated in the ESSH mode. (2) If the energy stored in C was insufficient before the inductor current drops to zero, the energy in C was depleted and the voltage reached zero at , establishing another freewheeling path through the devices D -D -S -L -D -R /C for the inductor current to charge the load. In this case, the circuit operated in the DSSH mode. The same process was repeated for the negative transducer current. It is worth noting that due to the use of the  Figure 4 illustrates the basic operation of the proposed circuit. Figure 4a shows the waveforms of the transducer current i P , PE transducer voltage V BA , inductor currents i L1 and i L2 , and capacitor voltage V T . Figure 4b-e depict the states of the switches for specific time intervals. During the interval t 0 < t < t 1 , as shown in Figure 4b, the transducer current i P was positive, and the switches S 1 , S 2 , and S 3 were open. The inductor current i L was zero. During this period, the transducer current charged the internal capacitor C P , increasing V BA . At t 1 , V BA (=V B ) reached its peak, causing S 1 to close and create a resonant loop along the blue dot line, as shown in Figure 4c, to perform the SSHI operation. The energy stored in C P was transferred to the inductor, and then the inductor energy was transferred back to the capacitor. As the current passed through the capacitor C T , C T stored the energy during this period, causing the voltage of C T to increase. When the resonant loop's current decreased to zero at t 2 , the switch S 1 opened, and S 3 closed. The subsequent DC-DC circuit began operating to transfer the energy stored in C T to the load. A resonant loop was formed through the devices C T -S 3 -L 2 -M 1 -C T during t 2 < t < t 3 . As the MOSFET M 1 was inserted into the loop, when the capacitor voltage V T decreased below the threshold voltage of MOSFET M 1 , M 1 opened at t 3 . At t 3 , the inductor current i L2 reached its peak I M . Then, the circuit established a freewheeling path through the devices C T -S 3 -L 2 -D 3 -R L /C L for the inductor current to charge the load. Two scenarios were considered based on whether the energy in capacitor C T was depleted. (1) If C T contained sufficient energy after the inductor current i L2 drops to zero, there was still residual energy in C T . In this case, the circuit operated in the ESSH mode. (2) If the energy stored in C T was insufficient before the inductor current drops to zero, the energy in C T was depleted and the voltage V T reached zero at t 4 , establishing another freewheeling path through the devices D 1 -D 2 -S 3 -L 2 -D 3 -R L /C L for the inductor current to charge the load. In this case, the circuit operated in the DSSH mode. The same process was repeated for the negative transducer current. It is worth noting that due to the use of the intermediate capacitor C T to drive MOSFET M 1 , the circuit incurred no drive losses P gate , as shown in Equation (1).   Figure 4. Configuration of the proposed circuit (a) voltage and current waveform (b) during t 0 < t < t 1 , (c) during t 1 < t < t 2 , (d) during t 2 < t < t 3 , and (e) during t 3 < t < t 4 or t 3 < t < t 5 .

Modeling and Analysis
The proposed circuit ensured an optimal harvested power regardless of the load connected to the PE transducer. Now, let's analyze the resonant loops using ideal components. Assuming the polarity of the PE transducer current i P changed, either switch S 1 or S 2 was conducted immediately. Additionally, switch S 3 was closed when the peak voltage of the capacitor C T was detected. During the analysis, V D modeled the total forward voltage decrease across all the components in the resonant loops, while R represented the total parasitic resistances along those resonant loops. The PE transducer model's R P was neglected due to its large value.

•
First resonant loop: Figure 5 illustrates the first resonant loop for extracting energy from the PE transducer ( Figure 4c). In this loop, the switches SW and L corresponded to S 1 or the S 2 and L 1 , respectively, as shown in Figure 3. When SW was closed, applying Kirchhoff's voltage law resulted in the following differential equation.
The inductor current i L , the capacitor voltage v P , i.e., V BA , and the capacitor voltage v T , i.e., V T were readily obtained as the following.

Modeling and Analysis
The proposed circuit ensured an optimal harvested power regardless of the load connected to the PE transducer. Now, let's analyze the resonant loops using ideal components. Assuming the polarity of the PE transducer current changed, either switch S or S was conducted immediately. Additionally, switch S was closed when the peak voltage of the capacitor C was detected. During the analysis, modeled the total forward voltage decrease across all the components in the resonant loops, while represented the total parasitic resistances along those resonant loops. The PE transducer model's was neglected due to its large value.
• First resonant loop: Figure 5 illustrates the first resonant loop for extracting energy from the PE transducer ( Figure 4c). In this loop, the switches SW and L corresponded to S or the S and L , respectively, as shown in Figure 3. When SW was closed, applying Kirchhoff's voltage law resulted in the following differential equation.  , the capacitor voltage , i.e., , and the capacitor voltage , i.e., were readily obtained as the following. As shown in Figure 5b, during the time interval from t 1 to t 2 , which lasted for a duration of t a (= π ω ), the inductor current returned to zero. At t 2 , the switch SW opened and the voltage v P and v T were obtained using the following.  (6) and (7), during the time interval t 1 < t < t 2 , energy was transferred from C P to C T , causing a decrease in the voltage v P and increase in the voltage v T . If C T is much larger than C P , v P would decrease by a larger magnitude, while v T would increase by a smaller magnitude. Conversely, if C T is much smaller than C P , the PE voltage may not achieve a voltage flipping. Therefore, an appropriate range existed for the value of C T to enable voltage flipping. In this study, we set the value of the capacitor C T in the steady state to achieve PE voltage flipping. To ensure voltage flipping, we needed to satisfy V m > 0 per half vibration cycle, as indicated by the equation 2V oc − V m = V M . We obtained the following relationship that the value of C T needed to satisfy.
where V D is the first resonant loop.
• Second resonant loop: Figure 6 illustrates the second resonant loop used for the energy transfer ( Figure 4d). In this resonant loop, a MOSFET M 1 was inserted to control the charge in the capacitor C T . In the following analysis, M 1 was modeled as a simple threshold-based switch, which turned on when V GS > V GS(TH) and turned off vice versa. Here, the switch SW and inductor L corresponded to S 3 and L 2 , respectively, as shown in Figure 3.
where = and = . From Equations (6) and (7), during the time interval < t < , energy was transferred from C to C , causing a decrease in the voltage and increase in the voltage . If C is much larger than C , would decrease by a larger magnitude, while would increase by a smaller magnitude. Conversely, if C is much smaller than C , the PE voltage may not achieve a voltage flipping. Therefore, an appropriate range existed for the value of C to enable voltage flipping. In this study, we set the value of the capacitor C in the steady state to achieve PE voltage flipping. To ensure voltage flipping, we needed to satisfy > 0 per half vibration cycle, as indicated by the equation 2 − = . We obtained the following relationship that the value of C needed to satisfy.
where is the first resonant loop.
• Second resonant loop: Figure 6 illustrates the second resonant loop used for the energy transfer ( Figure 4d). In this resonant loop, a MOSFET M was inserted to control the charge in the capacitor C . In the following analysis, M was modeled as a simple threshold-based switch, which turned on when > ( ) and turned off vice versa. Here, the switch SW and inductor L corresponded to S and L , respectively, as shown in Figure 3. When , > ( ) and SW was closed, we applied Kirchhoff's voltage law to derive the following differential equation for the circuit shown in Figure 6.
At , the capacitor voltage of C was , and the inductor current of L was zero. The capacitor voltage and the inductor current were obtained as the following. When V T,PK > V GS(TH) and SW was closed, we applied Kirchhoff's voltage law to derive the following differential equation for the circuit shown in Figure 6.
At t 2 , the capacitor voltage of C T was V T,PK and the inductor current of L was zero. The capacitor voltage v T and the inductor current i L were obtained as the following.
Since the energy stored in the capacitor C T was transferred to the inductor L, the inductor current i L increased and capacitor voltage v T decreased. When v T decreased to V GS(TH) and i L reached its peak value of I M at t = t 3 , MOSFET M 1 turned off, interrupting the resonant loop. At t 3 , the remaining energy in C T could be written as the following.
The energy transferred to the inductor L could be written as the following.
where η represents the efficiency of the energy transfer from the capacitor C T to the inductor L.
• Third resonant loop: Figure 7 shows the third resonant loop used for the power transfer. In this loop, L represented the L 2 and V L denoted the load voltage, as shown in Figure 3. By solving the differential equations with the initial voltage and current, the capacitor voltage v T and the inductor current i L were obtained as follows. where Since the energy stored in the capacitor C was transferred to the inductor L, the inductor current increased and capacitor voltage decreased. When decreased to ( ) and reached its peak value of at = , MOSFET M turned off, interrupting the resonant loop. At , the remaining energy in C could be written as the following.
The energy transferred to the inductor L could be written as the following.
where represents the efficiency of the energy transfer from the capacitor C to the inductor L.
• Third resonant loop: Figure 7 shows the third resonant loop used for the power transfer. In this loop, L represented the L and denoted the load voltage, as shown in Figure 3. By solving the differential equations with the initial voltage and current, the capacitor voltage and the inductor current were obtained as follows.  When ( ) = 0, ( ) > 0 in a steady state, as shown in Figure 4a, residual energy When i L (t 5 ) = 0, v T (t 5 ) > 0 in a steady state, as shown in Figure 4a, residual energy was still stored in C T after charging the load. In this case, the circuit operated in the ESSH scheme.
On the other hand, when v T (t 4 ) = 0, i L (t 4 ) > 0, as shown in Figure 4a, the energy stored in the capacitor C T was fully discharged to the load, but there some energy still remained in the inductor. The inductor, as shown in Figure 4e, established an alternative freewheeling path through the devices D 2 -D 1 -S 3 -L 2 -D 3 -R L /C L , allowing for the inductor current to charge the load.

• Fourth resonant loop:
As shown in Figure 4e, the fourth resonant loop utilized the two diodes D 1 and D 2 of the rectifier to discharge the inductor energy. This freewheeling path resembled the branch of a buck-boost circuit. Since all the energy stored in C T per half vibration cycle was transferred to the load, the circuit operated in the DSSH scheme.

Analysis of the Value Range for Capacitor C T
Let's define C T = xC P . To operate the circuit in the DSSH scheme, it needed to satisfy Equation (8) and E L2 (Equation (13)) > E T (Equation (12)). In contrast, for the ESSH scheme, it needed to satisfy V T,PK > V GS(TH) and E L2 < E T . The permissible range of values for x were calculated, as shown in Table 1. Here, V D represented the total voltage decrease across the first resonant loop.  Figure 8 shows the implementation of the proposed circuit, consisting of two main parts: the rectifier and the DC-DC circuit. In the rectifier, a self-powered switch was employed, comprising two PNP transistors (Q 2 and Q 4 ), two NPN transistors (Q 1 and Q 3 ), and a capacitor (C 1 ). Its main function was to detect the peak voltage of the PE transducer output and control the switch operation of either Q 3 or Q 4 . On the other hand, the DC-DC circuit incorporated a self-powered peak detection circuit using the components D 3 , Q 5 , and Q 6 . This circuit's purpose was to detect the peak voltage of the capacitor C T , thereby facilitating the operation of the switch in the DC-DC circuit. The working principle is briefly described below.  When the transducer current was positive, it charged the capacitor C , and the NPN transistor Q 's base emitter was turned on to connect the capacitors C and C in parallel. Since C was much smaller than C , it consumed only a small portion of energy from the PE transducer. When the current crossed the zero point and began to discharge C , the voltage decreased. However, the voltage across the capacitor C remained unchanged. It caused Q to turn off and Q to turn on. As a result, Q was turned on, forming the first resonant loop through the components C -Q -D -C -D -C . The energy stored in C was transferred through inductor L to the capacitor C until the inductor current L returned to zero. During this process, the current flowing through Figure 8. Proposed DSSH circuit with MOSFET threshold voltage management.

Circuit Implementation
When the transducer current i P was positive, it charged the capacitor C P , and the NPN transistor Q 1 's base emitter was turned on to connect the capacitors C 1 and C P in parallel. Since C 1 was much smaller than C P , it consumed only a small portion of energy from the PE transducer. When the current i P crossed the zero point and began to discharge C P , the voltage V BA decreased. However, the voltage across the capacitor C 1 remained unchanged.
It caused Q 1 to turn off and Q 2 to turn on. As a result, Q 3 was turned on, forming the first resonant loop through the components C P -Q 3 -D 3 -C T -D 2 -C P . The energy stored in C P was transferred through inductor L 1 to the capacitor C T until the inductor current L 1 returned to zero. During this process, the current flowing through diode D 3 caused a forward voltage decrease, which forced Q 5 and Q 6 to turn off. Once the current in the first resonant loop decreased to zero, and C T 's voltage exceeded V GS(TH) , a MOSFET M 1 turned on. With no current flowing through D 3 , Q 5 and Q 6 turned on, forming the second resonant loop through the components C T -Q 5 -Q 6 -L 2 -M 1 -C T . The inductor current i L2 began to increase from zero, and the voltage across the capacitor C T began to decrease. The energy stored in C T was transferred to inductor L 2 . When the capacitor voltage V T decreased to V GS(TH) , M 1 turned off. The remaining energy in the inductor was discharged through a resonant loop via the components C T -Q 5 -Q 6 -L 2 -D 4 -R L /C L -C T (and D 2 -D 1 -Q 6 -L 2 -D 4 -R L /C L -D 2 ) until the inductor current returned to zero.
To verify the flexibility of the proposed circuit to operate in either the DSSH or ESSH mode, we conducted simulations using two different intermediate capacitors, 100 nF and 320 nF. The simulations were conducted under the same excitation conditions, using the PE transducer model shown in Figure 1 and the simulation parameters listed in Table 2. The obtained waveforms are presented in Figure 9. Figure 9a shows that the voltage V T increased from 0.4 V, which was not 0 V, due to the effect of the forward voltage decrease in the resonant loop. This observation indicated that the circuit operated in the DSSH scheme when the intermediate capacitor was set to 100 nF. Conversely, as shown in Figure 9b, the voltage V T increased to 2.875 V from 1.4 V and then decreased to 1.4 V. This behavior confirmed that the circuit operated in the ESSH scheme when the intermediate capacitor was set to 320 nF. The reason for the smaller peak current of IL1 in the circuit with a 100 nF intermediate capacitor compared to the i L1 peak current of the 320 nF intermediate capacitor was due to the smaller difference between V M and V E , as indicated by Equation (3).  During the circuit simulation, we examined the power dissipation breakdown. The simulation used components that closely matched those used in the experiments described in Section 5. Table 3 shows the component conduction losses of the circuit using 100 nF and 320 nF intermediate capacitors under the same excitation. Whether the circuit operated under the DSSH or ESSH schemes, the highest losses were from Q and Q . This losses primarily originated from the conduction loss caused by the forward voltage During the circuit simulation, we examined the power dissipation breakdown. The simulation used components that closely matched those used in the experiments described in Section 5. Table 3 shows the component conduction losses of the circuit using 100 nF and 320 nF intermediate capacitors under the same excitation. Whether the circuit operated under the DSSH or ESSH schemes, the highest losses were from Q 3 and Q 4 . This losses primarily originated from the conduction loss caused by the forward voltage decrease V CE between the collectors and emitters in Q 3 and Q 4 when they are operating in the saturation region. Therefore, there is still room for improvement in the first part of the proposed circuit. However, this paper primarily focused on reducing the power dissipation of the second part of the DSSH circuit.

Experimental Results
The proposed circuit was implemented on a PCB board using 16 discreate components. Off-the-shelf inductors were employed in the experiment. The inductor L 1 (model number ASPI-0403S-152M) had a value of 1.5 mH and a DC resistance (RDC) of 4.2 Ω. The inductor L 2 (model number CDRH10D68R) had a value of 1 mH and a RDC of 1.56 Ω. The three PNP transistors, Q 2 , Q 4 , and Q 5 , were 2N3906s, with a V BE(SAT) voltage of −0.95 V and a V CE(SAT) voltage of −0.4 V. The three NPN transistors, Q 1 , Q 3 , and Q 6 , were 2N3904s, with a V BE(SAT) voltage of 0.95 V and a V CE(SAT) voltage of 0.3 V. The MOSFET had a threshold voltage ranging from 1.2 V to 2.5 V, and a V DS voltage of 40 V. The capacitance C L was 1 µF, and the load resistor R L was 100 kΩ, unless otherwise specified in this paper.
A piezoelectric cantilever (MIDE, PPA-1021) with a tip mass of 1.6 g was used for the measurements. The cantilever was placed on a thick aluminum plate, as shown in Figure 10. An accelerometer module with ADXL345 attached to the shaker was used to measure the acceleration. The internal capacitance of the PE cantilever was measured to be 22 nF, and the resonant frequency for the PE cantilever with the attached mass was measured to be 65 Hz.
The first experiment was performed to test the proposed circuit's functionality. The shaker oscillated at a frequency of 65 Hz with an RMS acceleration of 0.038 g. The opencircuit voltage amplitude was measured as 3.28 V using an oscilloscope. Initially, we applied a load of 530 nF and 100 kΩ to the rectifier only to test its operation. Figure 11a shows the output voltage of the PE cantilever, indicating the successful operation of the first resonant loop as the PE voltage decreased from 2 V to −1.6 V or increased from −2 V to 1.58 V. It was essential to note that the activation time of the first resonant loop was not precisely synchronized with the peak output voltage of the PE cantilever due to the non-ideality of the discrete components. Next, we removed the load from the rectifier and connected it to the DC-DC circuit. For both parts, we selected a 100 nF intermediate capacitor and a load consisting of a of a 1 µF capacitor C L and a 100 kΩ resistor R L . The PE voltage is shown in Figure 11b. The PE voltage changed from positive to negative, decreasing from 2 V to −0.6 V, and from negative to positive, increasing from −2 V to +0.6 V. The reason for the change in the PE cantilever voltage was the replacement of the rectifier output capacitor from a load capacitor of 500 nF to an intermediate capacitor of 100 nF in the DSSH circuit.
C was 1 µF, and the load resistor R was 100 kΩ, unless otherwise specified in this paper.
A piezoelectric cantilever (MIDE, PPA-1021) with a tip mass of 1.6 g was used for the measurements. The cantilever was placed on a thick aluminum plate, as shown in Figure  10. An accelerometer module with ADXL345 attached to the shaker was used to measure the acceleration. The internal capacitance of the PE cantilever was measured to be 22 nF, and the resonant frequency for the PE cantilever with the attached mass was measured to be 65 Hz. Figure 10. Experimental setup.
The first experiment was performed to test the proposed circuit's functionality. The shaker oscillated at a frequency of 65 Hz with an RMS acceleration of 0.038 g. The opencircuit voltage amplitude was measured as 3.28 V using an oscilloscope. Initially, we applied a load of 530 nF and 100 kΩ to the rectifier only to test its operation. Figure 11a shows the output voltage of the PE cantilever, indicating the successful operation of the first resonant loop as the PE voltage decreased from 2 V to −1.6 V or increased from −2 V to 1.58 V. It was essential to note that the activation time of the first resonant loop was not precisely synchronized with the peak output voltage of the PE cantilever due to the nonideality of the discrete components. Next, we removed the load from the rectifier and connected it to the DC-DC circuit. For both parts, we selected a 100 nF intermediate capacitor and a load consisting of a of a 1 µF capacitor C and a 100 kΩ resistor R . The PE voltage is shown in Figure 11b. The PE voltage changed from positive to negative, decreasing from 2 V to −0.6 V, and from negative to positive, increasing from −2 V to +0.6 V. The reason for the change in the PE cantilever voltage was the replacement of the rectifier output capacitor from a load capacitor of 500 nF to an intermediate capacitor of 100 nF in the DSSH circuit.  The first experiment was performed to test the proposed circuit's functionality. The shaker oscillated at a frequency of 65 Hz with an RMS acceleration of 0.038 g. The opencircuit voltage amplitude was measured as 3.28 V using an oscilloscope. Initially, we applied a load of 530 nF and 100 kΩ to the rectifier only to test its operation. Figure 11a shows the output voltage of the PE cantilever, indicating the successful operation of the first resonant loop as the PE voltage decreased from 2 V to −1.6 V or increased from −2 V to 1.58 V. It was essential to note that the activation time of the first resonant loop was not precisely synchronized with the peak output voltage of the PE cantilever due to the nonideality of the discrete components. Next, we removed the load from the rectifier and connected it to the DC-DC circuit. For both parts, we selected a 100 nF intermediate capacitor and a load consisting of a of a 1 µF capacitor C and a 100 kΩ resistor R . The PE voltage is shown in Figure 11b. The PE voltage changed from positive to negative, decreasing from 2 V to −0.6 V, and from negative to positive, increasing from −2 V to +0.6 V. The reason for the change in the PE cantilever voltage was the replacement of the rectifier output capacitor from a load capacitor of 500 nF to an intermediate capacitor of 100 nF in the DSSH circuit. The second experiment was conducted to examine the impact of different intermediate capacitors on the PE transducer's output voltage in a steady state. Figure 12 illustrates the results of the experiment. When the intermediate capacitor was set to 22 nF, as analyzed in Section 3.3, the output voltage of the PE transducer did not exhibit significant voltage flipping, compared to the case with 100 nF, as shown in Figure 11b. This was because the value of the intermediate capacitor was comparable to the internal capacitor of the PE transducer. However, large voltage flipping occurred when the intermediate capacitor was increased to 320 nF, as shown in Figure 12b. The PE voltage shown in Figure 12b changed from positive to negative, decreasing from 4.4 V to −2.8 V, and from negative to positive, increasing from −4.4 V to 2.8 V. The different PE cantilever voltage flipping was due to the different values of C T and the different residual charges stored in the capacitor C T during each vibration half-cycle.
cause the value of the intermediate capacitor was comparable to the internal capacitor of the PE transducer. However, large voltage flipping occurred when the intermediate capacitor was increased to 320 nF, as shown in Figure 12b. The PE voltage shown in Figure  12b changed from positive to negative, decreasing from 4.4 V to −2.8 V, and from negative to positive, increasing from −4.4 V to 2.8 V. The different PE cantilever voltage flipping was due to the different values of and the different residual charges stored in the capacitor during each vibration half-cycle.
(a) (b) The third experiment tested the cold start of the proposed circuit. We used an intermediate capacitor of 100 nF and a load resistor R of 100 kΩ for the test. We controlled the shaker's vibration acceleration by adjusting the signal generator's amplitude. When the measured open-circuit voltage of the PE transducer was 2.2 V, we connected the PE transducer's output to the proposed circuit. The circuit's output voltage is shown in Figure 13a. In the figure, it can be observed that when the shaker was turned on, the voltage increased from 0 V to approx. 0.23 V and then decreased to approximately 0.1 V, indicating that the circuit failed to start. However, after increasing the vibration magnitude, the circuit successfully started, as shown in Figure 13b-d. The circuit's output voltage gradually increased from 0 V to 0.92 V over 0.6 s, as shown in Figure 13b. The sawtooth waveform of indicated that the energy was transferred to the load in a very short period when the PE voltage reached its peak during each vibration half-cycle. The measured output voltage of the PE transducer is shown in Figure 13c, and a zoomed-in view of the waveform is provided in Figure 13d. As shown in Figure 13d, after three cycles, the resonant loop began to function, resulting in the flipping of the PE voltage. The third experiment tested the cold start of the proposed circuit. We used an intermediate capacitor of 100 nF and a load resistor R L of 100 kΩ for the test. We controlled the shaker's vibration acceleration by adjusting the signal generator's amplitude. When the measured open-circuit voltage of the PE transducer was 2.2 V, we connected the PE transducer's output to the proposed circuit. The circuit's output voltage V L is shown in Figure 13a. In the figure, it can be observed that when the shaker was turned on, the voltage V L increased from 0 V to approx. 0.23 V and then decreased to approximately 0.1 V, indicating that the circuit failed to start. However, after increasing the vibration magnitude, the circuit successfully started, as shown in Figure 13b-d. The circuit's output voltage V L gradually increased from 0 V to 0.92 V over 0.6 s, as shown in Figure 13b. The sawtooth waveform of V L indicated that the energy was transferred to the load in a very short period when the PE voltage reached its peak during each vibration half-cycle. The measured output voltage of the PE transducer is shown in Figure 13c, and a zoomed-in view of the waveform is provided in Figure 13d. As shown in Figure 13d, after three cycles, the resonant loop began to function, resulting in the flipping of the PE voltage.  Figure 14 shows the measured output power of the proposed circuit at various load resistors under the same excitation condition, using two different intermediate capacitors with values of 100 nF and 320 nF for testing. It can be observed that the output power decreased as the load resistor increased. This decrease was attributed to a higher load voltage , leading to higher power losses in the proposed circuit. Moreover, the output  Figure 14 shows the measured output power of the proposed circuit at various load resistors under the same excitation condition, using two different intermediate capacitors with values of 100 nF and 320 nF for testing. It can be observed that the output power decreased as the load resistor R L increased. This decrease was attributed to a higher load voltage V L , leading to higher power losses in the proposed circuit. Moreover, the output power of the proposed circuit with a 320 nF intermediate capacitor was lower than that with a 100 nF capacitor. This was because, as shown in Figure 4a, the switch SW 2 in the second resonant loop of the proposed circuit only turned on at time t 2 when the inductor current i L1 was zero, representing a specific case of the ESSH scheme in operation for the proposed ESSH circuit. The RMS current in the first resonant loop of the DSSH circuit with a 320 nF intermediate capacitor was higher than that with a 100 nF intermediate capacitor, as indicated in Figure 9. We also compared our circuit with the FB rectifier, achieving a 3.2 times higher output power using a 100 nF intermediate capacitor and a 2.7 times higher output power using a 320 nF intermediate capacitor.
(c) (d) Figure 13. Cold start of the circuit measured voltage (a) when the cold start failed and (b) when the cold start succeeded. (c) The measured PE voltage ; (d) the zoomed-in voltage waveform. Figure 14 shows the measured output power of the proposed circuit at various load resistors under the same excitation condition, using two different intermediate capacitors with values of 100 nF and 320 nF for testing. It can be observed that the output power decreased as the load resistor increased. This decrease was attributed to a higher load voltage , leading to higher power losses in the proposed circuit. Moreover, the output power of the proposed circuit with a 320 nF intermediate capacitor was lower than that with a 100 nF capacitor. This was because, as shown in Figure 4a, the switch SW in the second resonant loop of the proposed circuit only turned on at time when the inductor current was zero, representing a specific case of the ESSH scheme in operation for the proposed ESSH circuit. The RMS current in the first resonant loop of the DSSH circuit with a 320 nF intermediate capacitor was higher than that with a 100 nF intermediate capacitor, as indicated in Figure 9. We also compared our circuit with the FB rectifier, achieving a 3.2 times higher output power using a 100 nF intermediate capacitor and a 2.7 times higher output power using a 320 nF intermediate capacitor.  Figure 15 shows the time-dependent output voltage of the proposed circuit using a load of a 50 V 10 mF electrolytic capacitor. The shaker was oscillated at 65 Hz with an RMS acceleration of 0.062 g. The peak open-circuit voltage of the PE cantilever was observed as 5.4 V. The figure also shows the output voltage of another design, a conventional DSSH circuit. This typical DSSH circuit differed from the proposed circuit in that the second part of the DSSH circuit employed a buck-boost topology, and the second resonant loop excluded the MOSFET M 1 . In both cases, the intermediate capacitor had a value of 100 nF. The proposed circuit's output voltage attained 445 mV at 860 s, while the typical DSSH circuit reached 87.3 mV at 300 s but does not sustain a further increase. Hence, considering the final charging voltage, the proposed circuit outperformed the typical DSSH circuit by a factor of 5.1 or potentially more. This enhancement can be attributed to the boost topology implemented in the proposed DSSH circuit. Table 4 summarizes the performance and characteristics of recent state-of-the-art DSSH circuits. The charging efficiency, defined as the ratio of the final charged voltage achieved by the proposed circuit to that of the typical DSSH circuit under identical excitation conditions, was a metric for comparison. However, making a direct and fair comparison to other circuits was difficult due to using different PE transducers, excitation conditions, and different circuit parameters. Among the five circuit designs shown in Table 4, all of them were built using discrete components, but the proposed circuit exhibited the highest charging efficiency. The circuits achieved a self-powered state except for [21]. However, the proposed circuit employed the fewest components, 16 in total. In terms of the overall design complexity, our circuit's implementation was the simplest. It's worth emphasizing that the primary power dissipation for the proposed circuit was associated with components Q 3 and Q 4 , as shown in Figure 8. Implementing these components using integrated circuits (ICs) had the potential to significantly enhance the circuit's overall performance. In summary, the proposed circuit's key advantage was in utilizing the MOSFET threshold voltage for power management, which simplified the controller and reduced the power dissipation. Figure 15 shows the time-dependent output voltage of the proposed circuit using a load of a 50 V 10 mF electrolytic capacitor. The shaker was oscillated at 65 Hz with an RMS acceleration of 0.062 g. The peak open-circuit voltage of the PE cantilever was observed as 5.4 V. The figure also shows the output voltage of another design, a conventional DSSH circuit. This typical DSSH circuit differed from the proposed circuit in that the second part of the DSSH circuit employed a buck-boost topology, and the second resonant loop excluded the MOSFET M . In both cases, the intermediate capacitor had a value of 100 nF. The proposed circuit's output voltage attained 445 mV at 860 s, while the typical DSSH circuit reached 87.3 mV at 300 s but does not sustain a further increase. Hence, considering the final charging voltage, the proposed circuit outperformed the typical DSSH circuit by a factor of 5.1 or potentially more. This enhancement can be attributed to the boost topology implemented in the proposed DSSH circuit.  Table 4 summarizes the performance and characteristics of recent state-of-the-art DSSH circuits. The charging efficiency, defined as the ratio of the final charged voltage achieved by the proposed circuit to that of the typical DSSH circuit under identical excitation conditions, was a metric for comparison. However, making a direct and fair comparison to other circuits was difficult due to using different PE transducers, excitation conditions, and different circuit parameters. Among the five circuit designs shown in Table 4, all of them were built using discrete components, but the proposed circuit exhibited the highest charging efficiency. The circuits achieved a self-powered state except for [21]. However, the proposed circuit employed the fewest components, 16 in total. In terms of the overall design complexity, our circuit's implementation was the simplest. It's worth emphasizing that the primary power dissipation for the proposed circuit was associated with components Q and Q , as shown in Figure 8. Implementing these components using integrated circuits (ICs) had the potential to significantly enhance the circuit's overall performance. In summary, the proposed circuit's key advantage was in utilizing the MOSFET threshold voltage for power management, which simplified the controller and reduced the power dissipation.   In the end, we provided a general design rule for optimizing DSSH circuits. As shown in Figure 3, a general DSSH circuit utilizes three resonant loops per half-cycle to transfer energy from the PE transducer to the load. In the following analysis, the variables R 1(2,3),total , V F1(2,3),total , and P cond,1 (2,3) represent the cumulative values of the resistances, the total forward voltage decreases, and the conduction losses across each resonant loop, respectively. Through our calculations, the conduction losses for each resonant loop within in the DSSH circuit were obtained as follows.
P cond,2 = 2 f P t 3 t 2 i L2 (t) 2 · R 2,total dt = I 2 L2,PK R 2,total (t 3 − t 2 ) f P (17) where i L1 (t) and i L2 (t) are the currents flowing through inductors L 1 and L 2 , respectively. Q 1 is the accumulated charge from time t 1 to t 2 . i L1,PK and i L2,PK are the current peaks of i L1 (t) and i L2 (t), respectively. In addition to conduction losses, the DC-DC circuit within the DSSH circuit generated switching losses. The switching losses included losses due to voltage and current overlap during the switch transition, along with losses caused by the capacitance at the switch node during its ON transition. Hence, the losses incurred from the switching transitions of the DC-DC circuit can be expressed as the following. P MOSFET,switch = V DRAI N I L1,PK t f f P + C DRAI N V 2 DRAI N f P = I L1,PK t f + C DRAI N V DRAI N V DRAI N f P (19) where C DRAI N represents the parasitic capacitance at the switch node and V DRAI N is the voltage to which C DRAI N is charged when the MOSFET is turned off. Therefore, the total losses in a DSSH circuit can be expressed as the following.
Using Equations (16) and (20), this paper provided a set of recommended general optimized design rules for a general DSSH circuit.

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Minimize the forward voltage decreases generated by the resonant loops used in the DSSH circuit.

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Minimize the resistances within the resonant loops used in the DSSH circuit. • Carefully design the switches and diodes in the following DC-DC circuit of the DSSH circuit to minimize C DRAIN .

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Reducing the loop current in the resonant loops is beneficial for further reducing losses.
Following these steps can result in an enhanced performance of DSSH circuits.

Conclusions
This paper presented a self-powered piezoelectric energy harvesting circuit based on a DSSH scheme. The proposed circuit incorporated a MOS transistor into the second loop of the double synchronized resonant loops. It provided the advantage of utilizing the MOS-FET's threshold voltage to manage the stored energy in the intermediate capacitor per half vibration cycle, simplifying the controller for the switching time. Depending on the value of the intermediate capacitor, the circuit could operate under either the DSSH scheme or the ESSH scheme, leveraging the same circuit topology for both schemes. The prototype circuit, implemented using 16 discrete components, demonstrated a self-powered functionality and the capability to start without the need for an external battery. The experimental results showed that the proposed circuit increased the power harvested from the PE transducer compared to the full-bridge rectifier. Using two different intermediate capacitors of 100 nF and 320 nF, the proposed circuit achieved power increases of 3.2 and 2.7 times, respectively. The charging efficiency of the proposed circuit was improved by a factor of 5.1 compared to the typical DSSH circuit. Future work will focus on implementing the proposed scheme using an integrated circuit, which can help reduce the power dissipation by utilizing active diodes with low-power controllers. Moreover, integrated circuits will help mitigate the adverse effects caused by non-idealities in discrete devices.
Author Contributions: L.W. conceived and performed the simulation, designed the experiment, and wrote the manuscript; X.W. and M.X. supported the paper. All authors have read and agreed to the published version of the manuscript.

Data Availability Statement:
No new data were created or analyzed in this study. Data sharing is not applicable to this paper.