A Balanced Substrate Integrated Waveguide Phase Shifter with Wideband Common-Mode Suppression

In this paper, a slotted substrate integrated waveguide (SIW) is used to create a balanced phase shifter with wideband common-mode (CM) suppression. Differential-mode (DM) impedance matching and CM suppression are achieved by utilizing the fact that TE20 mode and TE10 (TE30) mode can only transmit DM signals and CM signals, respectively, and by increasing the bandwidth for CM suppression via slots. Furthermore, a wideband phase shift with low phase deviation can be obtained due to the phase slop counteract between the slot and the delay line. Compared with the state-of-the-art, the proposed one has the advantages of wideband CM suppression, wide phase shift range, and a simple and easy-to-make structure. Five prototypes covering the frequency of 3.5 GHz are designed with the relative operating bandwidth for 45° ± 2° (90° ± 4.5°, 135° ± 6°, and 180° ± 8°) phase shifter of 20% (20%, 20%, and 20%), with the minimum insertion loss of 0.41 dB (0.5 dB, 0.58 dB, and 0.59 dB), with the minimum return loss greater than 15 dB, and with the relative bandwidth for 15-dB CM suppression of 59% (59%, 58%, and 57%).


Introduction
Phase shifters play crucial roles in wireless communication systems, such as radar, phase modulators, beamforming networks, and phased array antenna systems, because they can provide the required phase shifts [1][2][3]. The increasing popularity of balanced phase shifters is due to their high immunity to electromagnetic interference and their simple connection to other balanced circuits or antennas. In addition to the advantages of the balanced microstrip phase shifter, the balanced substrate integrated waveguide (SIW) phase shifter has high-quality factors, a high power handling capacity, and low loss. Consequently, the balanced SIW phase shifter will be in high demand in modern communication systems. Balanced SIW phase shifter design challenges include wideband CM suppression while preserving wideband DM phase shift, low in-band phase deviation, and low insertion loss.

Structure
The proposed balanced SIW phase shifter is constructed by etching two symmetrical transverse slots into the top surface of SIW, as shown in Figure 1. Two pairs of symmetric microstrip lines form the two balanced ports, namely 1+ and 1−, 2+ and 2−, and the microstrip feed lines, which serve as delay lines. The reference and main lines employ the same circuit model on the RO4003C substrate (the dielectric constant of 3.38, thickness of 0.813 mm, and loss tangent of 0.0027). The lengths of the delay lines and the slot parameters distinguish the reference line from the main line.

Structure
The proposed balanced SIW phase shifter is constructed by etching two symmetrical transverse slots into the top surface of SIW, as shown in Figure 1. Two pairs of symmetric microstrip lines form the two balanced ports, namely 1+ and 1−, 2+ and 2−, and the microstrip feed lines, which serve as delay lines. The reference and main lines employ the same circuit model on the RO4003C substrate (the dielectric constant of 3.38, thickness of 0.813 mm, and loss tangent of 0.0027). The lengths of the delay lines and the slot parameters distinguish the reference line from the main line.  An SIW is equivalent to a conventional dielectric-filled metallic rectangular waveguide, and the equivalent relationship can be described as [25]:  An SIW is equivalent to a conventional dielectric-filled metallic rectangular waveguide, and the equivalent relationship can be described as [25]: where w eff is the equivalent width of the SIW compared with its conventional rectangular counterpart, a is the SIW width, and d and s are the diameter of metallic vias and the space between adjacent metallic vias, respectively. The dimensions of a, d, and s should follow the rules given in [26].
To achieve the transmission of DM signals and the suppression of CM signals at the centre frequency (f 0 ), the distance between ports 1+(2+) and 1−(2−) is set to half the equivalent width of the SIW. In addition, the relationship between f 0 and the cut-off frequencies of TE 20 mode and TE 30 mode must be satisfied as: Thus, w eff can also be expressed as: Therefore, w eff can be obtained according to f 0 . Conversely, f 0 can be controlled by w eff .

DM Analysis
Figures 2 and 3 illustrate the uniform amplitude distributions and vector distributions of the surface current on the SIW with/without slots for DM operating at f 0 to determine the effects of slots on DM properties. Figures 2 and 3 demonstrate that the TE 20 mode will be excited when the proposed design is operating at the DM. In addition, Figure 2 reveals that the surface current on the SIW without slots is distributed uniformly in the transmission direction, whereas the surface current on the SIW with two slots in Figure 3 is disturbed by the slots. It can be observed from Figure 3 that the transmission paths of the surface current on the upper and lower edges of the SIW are changed, and the surface current avoids the slots when transmitting forward. In addition, the surface current in the middle position of the SIW is transmitted through the slots' coupling. Therefore, the slots will change the transmission mechanism and the distributions of the surface current on the SIW; this is because a centred slot on the top surface of SIW can be equivalent to a circuit with a susceptance (B) and a conductance (G) in parallel [27], as shown in Figure 4, where B and G can be written as Equations (4)- (13).
1 − (l s /w eff ) 2 cos(πl s /2w eff ) ] 2 (4) where b is the thickness of the substrate, and TE20 mode will be excited when the proposed design is operating at the DM. In addition, Figure 2 reveals that the surface current on the SIW without slots is distributed uniformly in the transmission direction, whereas the surface current on the SIW with two slots in Figure 3 is disturbed by the slots. It can be observed from Figure 3 that the transmission paths of the surface current on the upper and lower edges of the SIW are changed, and the surface current avoids the slots when transmitting forward. In addition, the surface current in the middle position of the SIW is transmitted through the slots' coupling. Therefore, the slots will change the transmission mechanism and the distributions of the surface current on the SIW; this is because a centred slot on the top surface of SIW can be equivalent to a circuit with a susceptance (B) and a conductance (G) in parallel [27], as shown in Figure 4, where B and G can be written as Equations (4) where b is the thickness of the substrate, and where b is the thickness of the substrate, and According to Equations (4)- (13), the values of B and G are mainly determined by the parameters of the SIW and the slots. Thus, to further study how the parameters of slots on the SIW affect the properties of DM impedance matching and DM phase shift of the proposed balanced SIW phase shifter, Figure 5 provides the variations of the simulated bandwidth for the 15-dB DM impedance matching with different w s , d s , l s , and l f . Figure 6 shows the variations of the simulated bandwidth for the DM phase shift with ±5% phase deviation for different ∆d s (d sr − d sm ), ∆w s (w sr − w sm ), and ∆l s (l sr − l sm ), where the subscripts r and m of d sr , d sm , w sr , w sm , l sr , and l sm indicate the reference and main lines, respectively. the parameters of the SIW and the slots. Thus, to further study how the parameters of slots on the SIW affect the properties of DM impedance matching and DM phase shift of the proposed balanced SIW phase shifter, Figure 5 provides the variations of the simulated bandwidth for the 15-dB DM impedance matching with different ws, ds, ls, and lf. Figure 6 shows the variations of the simulated bandwidth for the DM phase shift with ±5% phase deviation for different Δds (dsr − dsm), Δws (wsr − wsm), and Δls (lsr − lsm), where the subscripts r and m of dsr, dsm, wsr, wsm, lsr, and lsm indicate the reference and main lines, respectively.  It can be observed from Figure 5 that the bandwidth for 15-dB DM impedance matching increases first and then decreases when increasing w s , d s , l s , or l f . Therefore, the wideband DM impedance matching can be achieved by selecting the proper parameters of w s , d s , l s , or l f . Figure 6a,c show that the bandwidth of DM phase shift with ±5% phase deviation increases at first and then decreases as increasing ∆w s or ∆l s . Figure 6b demonstrates that ∆d s has a negligible effect on the bandwidth of the DM phase shift with ±5% phase deviation. Thus, the wideband DM phase shift with ±5% phase deviation can be obtained by selecting the parameters of ∆w s or ∆l s appropriately.
According to Equations (4)- (13), the values of B and G are mainly determined by the parameters of the SIW and the slots. Thus, to further study how the parameters of slots on the SIW affect the properties of DM impedance matching and DM phase shift of the proposed balanced SIW phase shifter, Figure 5 provides the variations of the simulated bandwidth for the 15-dB DM impedance matching with different ws, ds, ls, and lf. Figure 6 shows the variations of the simulated bandwidth for the DM phase shift with ±5% phase deviation for different Δds (dsr − dsm), Δws (wsr − wsm), and Δls (lsr − lsm), where the subscripts r and m of dsr, dsm, wsr, wsm, lsr, and lsm indicate the reference and main lines, respectively. It can be observed from Figure 5 that the bandwidth for 15-dB DM impedance matching increases first and then decreases when increasing ws, ds, ls, or lf. Therefore, the wideband DM impedance matching can be achieved by selecting the proper parameters of ws, ds, ls, or lf. Figure 6a,c show that the bandwidth of DM phase shift with ±5% phase deviation increases at first and then decreases as increasing Δws or Δls. Figure 6b demonstrates that Δds has a negligible effect on the bandwidth of the DM phase shift with ±5% phase deviation. Thus, the wideband DM phase shift with ±5% phase deviation can be obtained by selecting the parameters of Δws or Δls appropriately.

CM Analysis
Similarly, Figures 7 and 8 depict the uniform amplitude and vector distributions of the surface current on the SIW with/without slots for CM operating at f0. It can be observed from Figure 7 that a small portion of the surface current on the SIW without slots can be transmitted, while the remainder will be substantially suppressed. Figure 8 demonstrates that on an SIW with two slots, almost no surface current can be transmitted, indicating the current is effectively prevented by the slots. Therefore, the CM suppression will be further enhanced by the slots.

CM Analysis
Similarly, Figures 7 and 8 depict the uniform amplitude and vector distributions of the surface current on the SIW with/without slots for CM operating at f 0 . It can be observed from Figure 7 that a small portion of the surface current on the SIW without slots can be transmitted, while the remainder will be substantially suppressed. Figure 8 demonstrates that on an SIW with two slots, almost no surface current can be transmitted, indicating the current is effectively prevented by the slots. Therefore, the CM suppression will be further enhanced by the slots. It can be observed from Figure 5 that the bandwidth for 15-dB DM impedance matching increases first and then decreases when increasing ws, ds, ls, or lf. Therefore, the wideband DM impedance matching can be achieved by selecting the proper parameters of ws, ds, ls, or lf. Figure 6a,c show that the bandwidth of DM phase shift with ±5% phase deviation increases at first and then decreases as increasing Δws or Δls. Figure 6b demonstrates that Δds has a negligible effect on the bandwidth of the DM phase shift with ±5% phase deviation. Thus, the wideband DM phase shift with ±5% phase deviation can be obtained by selecting the parameters of Δws or Δls appropriately.

CM Analysis
Similarly, Figures 7 and 8 depict the uniform amplitude and vector distributions of the surface current on the SIW with/without slots for CM operating at f0. It can be observed from Figure 7 that a small portion of the surface current on the SIW without slots can be transmitted, while the remainder will be substantially suppressed. Figure 8 demonstrates that on an SIW with two slots, almost no surface current can be transmitted, indicating the current is effectively prevented by the slots. Therefore, the CM suppression will be further enhanced by the slots.  Moreover, according to Equation (2), the frequency space between TE10 and TE30 modes would be wider than the DM operating frequency range if f0 were fixed. Therefore, it is possible to achieve CM suppression with a bandwidth that completely encompasses the DM operating bandwidth. Figure 9 displays the simulated bandwidth for 15-dB CM suppression with varying Moreover, according to Equation (2), the frequency space between TE 10 and TE 30 modes would be wider than the DM operating frequency range if f 0 were fixed. Therefore, it is possible to achieve CM suppression with a bandwidth that completely encompasses the DM operating bandwidth. Figure 9 displays the simulated bandwidth for 15-dB CM suppression with varying w s , d s , l s , and l f to illustrate how the slot parameters influence the CM suppression of the proposed balanced SIW phase shifter. It can be observed from Figure 9a,d that the bandwidth for CM suppression increases slightly with increasing w s or l f . Figure 9b shows that the bandwidth for CM suppression is nearly unchanged with varying d s , and Figure 9c illustrates that the bandwidth for CM suppression increases with increasing l s . Therefore, the bandwidth for CM suppression is primarily determined by the equivalent width of the SIW and the slot lengths.

Design Procedure
The design procedure for the proposed balanced SIW phase shifter can be described as follows: (1) Determine a according to the relationship of a, f0, and weff in Equations (1)-(3) to make the proposed design achieve the DM impedance matching and CM suppression at f0 simultaneously. (2) Determine the initial values of ws, ds, ls, and lf for the reference line according to the variation rules of the bandwidths for 15-dB DM impedance matching and 15-dB CM suppression in Figures 5 and 9, respectively. (3) Determine the initial values of ld for different main lines according to the required phase shifts, and determine the initial values of ws, ds, ls, and lf for different main lines according to the variation rules of the bandwidths for 15-dB DM impedance matching, DM phase shift, and 15-dB CM suppression in Figures 5, 6 and 9, respectively. (4) Fine-tune the parameters in computer simulation technology (CST) to optimize the performance. According to Figures 5, 6 and 9, the bandwidth for CM suppression is usually wider than that for DM impedance matching and DM phase shift. Therefore, the operating bandwidth will be determined by the bandwidths for DM impedance matching and DM phase shift. In addition, we can find that d s and l f have obvious effects on the bandwidth for DM impedance matching but not on the bandwidths for DM phase shift and CM suppression. Therefore, the bandwidth for DM impedance matching can be controlled by d s and l f . Furthermore, ∆w s and ∆l s have large effects on the bandwidth for DM phase shift. Thus, the bandwidth for DM phase shift can be primarily controlled by ∆w s and ∆l s .

Design Procedure
The design procedure for the proposed balanced SIW phase shifter can be described as follows: (1) Determine a according to the relationship of a, f 0 , and w eff in Equations (1)-(3) to make the proposed design achieve the DM impedance matching and CM suppression at f 0 simultaneously. (2) Determine the initial values of w s , d s , l s , and l f for the reference line according to the variation rules of the bandwidths for 15-dB DM impedance matching and 15-dB CM suppression in Figures 5 and 9, respectively.

Results
Five prototypes of one reference line and four main lines are designed and fabricated at f 0 = 3.5 GHz. According to the design procedure, the final dimensions are listed in Table 1. A four-port Agilent N5230C vector network analyser is used to test the proposed balanced SIW phase shifter. The photograph and results of the five prototypes are shown in Figures 10 and 11, respectively. For the proposed balanced SIW phase shifter, DM and CM S-parameters can be expressed as S dd ij and S cc ij , respectively, where i and j are the port number, and d and c denote DM and CM, respectively.   It can be seen from Figure 11a- respectively. For the proposed balanced SIW phase shifter, DM and CM S-parameters can be expressed as S dd ij and S cc ij , respectively, where i and j are the port number, and d and c denote DM and CM, respectively.  Table 2 lists the demonstrated performances of the proposed design and other reported microstrip and SIW phase shifters. Compared to previously reported microstrip balanced phase shifters ( [6,7,9]), the proposed SIW design has narrower bandwidth, but it would be more suitable for millimetre wave application. Compared to previously reported SIW phase shifters ( [13][14][15][16]18,20,22]), the proposed design features a balanced topology with wideband CM suppression. In addition, compared to single-ended designs with equal lengths of the reference line and main lines from [13,15], the proposed design has a wider operating bandwidth. Compared to the wideband designs from [14,16], and the low insertion loss designs from [18,22], the size of the proposed design is more compact. Compared to the compact size design from [20], the proposed design has a larger phase shift range.

Conclusions
In this paper, a balanced phase shifter utilizing SIW with two slots is proposed, which has the features of wideband CM suppression, broad phase shift range, and an easily fabricated structure. DM and CM analysis, performance variation, and design procedure are performed to guide the practical design. The measurements of the final 45 • , 90 • , 135 • , and 180 • prototypes agree well with the theoretical prediction. The proposed balanced SIW phase shifter is believed to be capable of promoting the development of balanced microwave systems.

Data Availability Statement:
The data presented in this study are available on request from the corresponding author.

Conflicts of Interest:
The authors declare no conflict of interest.