A Phenomenological Model for Electrical Transport Characteristics of MSM Contacts Based on GNS

Graphene nanoscroll, because of attractive electronic, mechanical, thermoelectric and optoelectronics properties, is a suitable candidate for transistor and sensor applications. In this research, the electrical transport characteristics of high-performance field effect transistors based on graphene nanoscroll are studied in the framework of analytical modeling. To this end, the characterization of the proposed device is investigated by applying the analytical models of carrier concentration, quantum capacitance, surface potential, threshold voltage, subthreshold slope and drain induced barrier lowering. The analytical modeling starts with deriving carrier concentration and surface potential is modeled by adopting the model of quantum capacitance. The effects of quantum capacitance, oxide thickness, channel length, doping concentration, temperature and voltage are also taken into account in the proposed analytical models. To investigate the performance of the device, the current-voltage characteristics are also determined with respect to the carrier density and its kinetic energy. According to the obtained results, the surface potential value of front gate is higher than that of back side. It is noteworthy that channel length affects the position of minimum surface potential. The surface potential increases by increasing the drain-source voltage. The minimum potential increases as the value of quantum capacitance increases. Additionally, the minimum potential is symmetric for the symmetric structure (Vfg = Vbg). In addition, the threshold voltage increases by increasing the carrier concentration, temperature and oxide thickness. It is observable that the subthreshold slope gets closer to the ideal value of 60 mV/dec as the channel length increases. As oxide thickness increases the subthreshold slope also increases. For thinner gate oxide, the gate capacitance is larger while the gate has better control over the channel. The analytical results demonstrate a rational agreement with existing data in terms of trends and values.


Introduction
Nowadays, the search for new nano-materials has an enormous interest owing to their significant applications in our life [1][2][3][4][5]. Nano-materials including carbon nanotube, mono and multilayers graphene and phosphorene have been predicted many years ago, for there great promise in different applications, such as electronics, energy harvesting, spintronic devices, molecular sensors, gene and drug distribution systems, lasers, ion channels, batteries, solar cells, photocatalysis, polymer composites, and high-frequency nanoelectromechanical resonators [6][7][8][9][10][11][12][13][14][15][16]. These materials reveal startling physical, mechanical, thermal, electrical, and chemical properties such as high surface area, strong mechanical strength, good thermal conductivity, excellent electrical conductivity, high charge carrier mobility, good optical transparency and ease of biological as well as chemical chemical functionalization that leads to great opportunities for imp broad area of transistor and sensor applications [17][18][19][20][21][22][23][24][25][26]. Graphene nano well-known stable elemental semiconducting material, has attracted str technological interest in recent years [27][28][29][30]. GNS with unique elec thermoelectric, optoelectronics and mechanical characteristics such as b stability, large surface-to-volume ratio, high conductivity, high flexib patibility has great potential in material science, energy storage, biosen bility, bio-engineering and designing nanoelectronic devices. GNS as a iconductor promises potential applications in the diodes, FETs, ga [27][28][29][30]. The influence of GNS on transistor applications has been rep ometry effect on FET performance has been investigated [31]. It has be the chirality number plays an important role compared to the other par emerged as a new category of quasi one dimensional (1D) belonging to components, which is made by rolling a graphene sheet to form an structure. GNS with a tubular structure similar to that of the open mu nanotube (MWCNT), has various morphologies such as armchair (n, n), chiral (n, m) [32]. The structure of GNS is illustrated in Figure 1. Overcoming the chirality and diameter control issues makes th proper candidate to be utilized in channel of FETs. High carrier mobi bined with the ability to modulate the carrier concentration causes hig bility in nanoscale FETs, chiefly those based on low noise and high-freq Figure 2 shows the scheme of metal-semiconducting-metal (MSM) structure of the proposed GNS-based double gate FET with a 20 nm ch width of ribbons and the shape of edges are two important factors in GNS. The structure is proposed based on dependence of the energy ban GNS on width of ribbon and the shape of its edges. The proposed GN made from a semiconducting GNS as the channel, and metal GNS as the contacts, respectively. GNS with extremely thin body thickness allow static control. Therefore, it can improve the gate control, which is desi mately scaled transistor to reduce the short channel effects. It is notewo metal work function is considered so that the zero potential point in th the middle of the band gap at an equilibrium condition. The transport p nanoribbons can be controlled by the staggered sublattice potential i pendicular electric field. The required electric field can be produced by a Overcoming the chirality and diameter control issues makes the nanomaterial a proper candidate to be utilized in channel of FETs. High carrier mobility in GNS combined with the ability to modulate the carrier concentration causes high field-effect mobility in nanoscale FETs, chiefly those based on low noise and high-frequency operation. Figure 2 shows the scheme of metal-semiconducting-metal (MSM) junctions and a structure of the proposed GNS-based double gate FET with a 20 nm channel length. The width of ribbons and the shape of edges are two important factors in the band gap of GNS. The structure is proposed based on dependence of the energy band gap of armchair GNS on width of ribbon and the shape of its edges. The proposed GNS-FET structure is made from a semiconducting GNS as the channel, and metal GNS as the source and drain contacts, respectively. GNS with extremely thin body thickness allow excellent electrostatic control. Therefore, it can improve the gate control, which is desirable for the ultimately scaled transistor to reduce the short channel effects. It is noteworthy that the gate metal work function is considered so that the zero potential point in the channel stays in the middle of the band gap at an equilibrium condition. The transport properties of GNS nanoribbons can be controlled by the staggered sublattice potential induced by a perpendicular electric field. The required electric field can be produced by applying different voltages to the gate. If the electric field applied is not perpendicular to the GNS layer, the staggered potential is reduced, and a larger electric field is required to produce the same effect on the conductance. In the previously reported works, the electrical transport characteristics of nanoscale FETs have been investigated [33][34][35][36][37][38]. Analytical models for threshold voltage and subthreshold behavior of double gate bilayer graphene FET have been explored [33]. The current developments and future prospects for 2D materials-based nanoscale tunneling FETs have been studied [34]. Tunable electronic transport characteristics of surface-architecture-controlled ZnO nanowire FETs have been reviewed [35]. The semi-analytical models of momentum relaxation mean free time and path and ionization coefficient of trilayer graphene nanoribbon-based FETs have been investigated [36]. Threshold voltage manipulation of ZnO-graphene oxide hybrid thin film transistors via Au nanoparticles doping has been studied [37]. In addition, controlling the threshold voltage of a semiconductor FET by gating its graphene gate has been investigated [38]. This paper is organized as follows: in Section 2, the analytical method and proposed models are presented. The obtained analytical results and main findings are shown in Section 3, and concluding remarks are given in Section 4.

Analytical Models for Surface Potential and Subthreshold Slope
In order to model the characteristics of GNS such as carrier concentration and quantum capacitance, its E-k relationship is adopted from [32]. The carrier concentration is analytically modeled as Equation (1), which is related to the Fermi-Dirac integral.
where acc is the distance between adjacent carbon atoms, t is the hopping energy and T is the temperature. Using the common Poisson's equation the potential distribution,  In the previously reported works, the electrical transport characteristics of nanoscale FETs have been investigated [33][34][35][36][37][38]. Analytical models for threshold voltage and subthreshold behavior of double gate bilayer graphene FET have been explored [33]. The current developments and future prospects for 2D materials-based nanoscale tunneling FETs have been studied [34]. Tunable electronic transport characteristics of surface-architecturecontrolled ZnO nanowire FETs have been reviewed [35]. The semi-analytical models of momentum relaxation mean free time and path and ionization coefficient of trilayer graphene nanoribbon-based FETs have been investigated [36]. Threshold voltage manipulation of ZnO-graphene oxide hybrid thin film transistors via Au nanoparticles doping has been studied [37]. In addition, controlling the threshold voltage of a semiconductor FET by gating its graphene gate has been investigated [38]. This paper is organized as follows: in Section 2, the analytical method and proposed models are presented. The obtained analytical results and main findings are shown in Section 3, and concluding remarks are given in Section 4.

Analytical Models for Surface Potential and Subthreshold Slope
In order to model the characteristics of GNS such as carrier concentration and quantum capacitance, its E-k relationship is adopted from [32]. The carrier concentration is analytically modeled as Equation (1), which is related to the Fermi-Dirac integral.
where a cc is the distance between adjacent carbon atoms, t is the hopping energy and T is the temperature. Using the common Poisson's equation the potential distribution, φ(x, y), for any point (x,y) of channel is given by [33,[39][40][41]  where ε g is the dielectric constant of GNS; q is the electron charge; N D [in cm −3 ] is the doping concentration and n i = [n/t ch ] is the intrinsic carrier concentration where n is the 2D carrier concentration of GNS, so The 2D potential distribution along the vertical direction of the channel for the subthreshold region is commonly approximated by a simple parabolic function of where coefficients P 0 , P 1 and P 2 are only the functions of y. To have better insight into the proposed device operation, the electrostatic of the device is illustrated in Figure 2. Therefore, the boundary conditions for Equation (2) are defined based on the 1D Gauss's law and the continuity of the electrostatic potential as are the potential functions along the front and back oxide-channel interfaces, respectively. Additionally, is the flat band voltage, in which φ m is the metal work function, χ g is the electron affinity, K B is the Boltzmann constant and T is the temperature. The coefficients P i (i = 0, 1, 2) can be determined by applying the boundary conditions in Equation (4) as where A, K and D are presented in Appendix A. In addition, C ch = ε g /t ch is the channel capacitance and C G = (C ox C q )/(C ox + C q ) is the capacitance seen by the gate, where C ox = ε ox /t ox (ε ox is the oxide dielectric) and C q is the quantum capacitance. The quantum capacitance describes the effect of the conduction and the valance bands movement on the channel charge. To model the quantum capacitance, the relation (C q = e 2 ∂n ∂E ) is used. So, the quantum capacitance is analytically modeled as By solving the differential equation for φ f (y), ( , and by setting φ x (y) = φ(x , y) as the potential at depth x of the channel, the top gate surface potential φ f (y) can be obtained as Micromachines 2023, 14, 184 and α 1 and β 1 are presented in Appendix A. The back gate surface potential φ b (y) can be also given by finding its correlation with front gate surface potential, where the potential distribution bellow the subthreshold region is assumed as a straight line In addition, the subthreshold slope can be defined as where φ min,x is the minimum potential at depth x of the channel and is determined based on the position of the virtual cathode along the channel.

Analytical Model for Electrical Transport Characteristics and DIBL
In the MSM contacts, electrons can be injected directly from the metal into the empty space in the semiconductor. When electrons flow from the valence band of the semiconductor into the metal, there would be a result similar for holes injected into the semiconductor. So, the establishment of an excess minority carrier hole in the vicinity is observed [42][43][44][45]. The current moves mainly from the drain to the source which consists of both drift current and diffusion current. Considering the weak inversion region, the current is mainly diffusion dominated and relative to the electron absorption at the virtual cathode. The tunneling current is the main component of the whole current which requires the use of quantum transport [42][43][44][45]. The effect of the charge close to the source for an FET is most severe because it has a significant effect on the MSM and the tunneling possibility. When the charge impurity is situated at the center of the channel of an FET, the electrons are trapped by the positive charge and the source-drain current is decreased. If the charge is placed close to the drain, the electrons are collected near the drain. In this situation, low charge density near the source decreases the potential barrier at the beginning of the channel which opens up the energy gap more for flow of electrons from the source to the channel [42][43][44][45]. Electrons' moving from the metal into the semiconductor can be defined by electron current density J m→s , whereas the electron current density J s→m refers to the movement of electrons from the semiconductor into the metal. What determines the direction of electrons flow depends on the subscripts of the current. In other words, the conventional current direction is opposite to the electron flow. J s→m is related to the concentration of carries (n) with velocity in the x-direction to subdue the barrier.
where e is the magnitude of the electronic charge and ν x is calculated based on Kinetic ). By considering x = (E − E C )/K B T and normalized Fermi energy η = (E C − E F )/K B T, the carrier concentration model can be obtained as n = 4 9t 2 a cc 4 π (K B T) where −1 2 (η) is the Fermi-Dirac integral of order (−1/2). Total current density can be calculated as (J total = J m→s − dJ s→m dx ). High carrier mobility reported from experiments in the GNS leads to assume completely ballistic carrier transport in this material, which means the average probability of injected electron at one end that will transmit to the other end is approximately equal to one (J total = J m→s = J s→m ). Kinetic energy as a main parameter is considered over the Fermi level and the current density-voltage response of GNS-FET device is determined with respect to the carrier density and its kinetic energy as The dependence of the drain current on the drain-source voltage is associated with the dependence of η on this voltage given by Equation (15).
where V GT = V GS − V T and V(y) is the voltage of channel in y direction. By solving Equation (15), the normalized Fermi energy can be defined as In order to obtain an analytical relation for the contact current, an explicit analytical equation for the electric potential distribution along the GNS is presented. The channel current is analytically derived as a function of various physical and electrical parameters of the device including effective mass, channel length, temperature and applied bias voltage. The current density of a GNS-FET is modeled as According to the relationship between a current and its density, the current-voltage characteristics of the proposed device are investigated in section of results and discussion. The source to the channel barrier prevents the carriers from moving in the longitudinal direction of the channel. The drain voltage in short channel FETs directly affects the barrier height through a phenomenon called the drain-induced barrier lowering (DIBL). For high drain bias voltages, the DIBL can be considered as the drain bias-dependent subthreshold current. Considering the diffusion current as the dominant part of the drain current, the DIBL is given by

Results and Discussion
The following parameters are used in the analytical modeling: t ox = 1 nm, t ch = 1.2 nm, N D = 1 × 10 18 cm −3 , n i = 5 × 10 16 cm −3 , L = 20 nm, while the flat band and gate voltages of the front and back sides are variable. The surface potential of front and back gates as a function of channel length is shown in Figure 3. Apparently, the surface potential value of front gate is higher than that of back side. It is noteworthy that channel length affects the position of minimum surface potential. Figure 4a indicates surface potential along the channel distance for unequal flat band/gate voltages of the front and back sides. Apparently, the surface potential increases by increasing the drain-source voltage. The variation of the minimum potential along the channel for different values of quantum capacitance is plotted in Figure 4b. As shown in Figure 4b, the minimum potential increases by increasing the value of quantum capacitance. Additionally, the minimum potential is symmetric for the symmetric structure (V fg = V bg ), and y min is at the middle of the channel.

Results and Discussion
The following parameters are used in the analytical modeling: tox = 1 nm, tch = ND = 1 × 10 18 cm −3 , ni = 5 × 10 16 cm −3 , L = 20 nm, while the flat band and gate volt the front and back sides are variable. The surface potential of front and back ga function of channel length is shown in Figure 3. Apparently, the surface potentia of front gate is higher than that of back side. It is noteworthy that channel length the position of minimum surface potential.   Figure 4b, the minimum potential increases by increasing the value of qu capacitance. Additionally, the minimum potential is symmetric for the symmetri ture (Vfg = Vbg), and ymin is at the middle of the channel.  The effect of gate-oxide thickness on threshold voltage versus channel length is illustrated in Figure 5a. Apparently, threshold voltage increases by increased oxide thickness. This is because of the fact that gate-oxide electric field increases as oxide thickness decreases. The variation of threshold voltage along the channel for different drain-source voltages is plotted in Figure 5b. It can be seen that the threshold voltage reduces as the voltage increases. It is noteworthy that the effect of drain-source voltage is more significant for the source side of the channel.  The effect of gate-oxide thickness on threshold voltage versus channel length is illustrated in Figure 5a. Apparently, threshold voltage increases by increased oxide thickness. This is because of the fact that gate-oxide electric field increases as oxide thickness decreases. The variation of threshold voltage along the channel for different drain-source voltages is plotted in Figure 5b. It can be seen that the threshold voltage reduces as the voltage increases. It is noteworthy that the effect of drain-source voltage is more significant for the source side of the channel.
The effect of gate-oxide thickness on threshold voltage versus channel length is illustrated in Figure 5a. Apparently, threshold voltage increases by increased oxide thickness. This is because of the fact that gate-oxide electric field increases as oxide thickness decreases. The variation of threshold voltage along the channel for different drain-source voltages is plotted in Figure 5b. It can be seen that the threshold voltage reduces as the voltage increases. It is noteworthy that the effect of drain-source voltage is more significant for the source side of the channel. The doping concentration effect on the threshold voltage is indicated in Figure 6a. It seems that, as the concentration increases the threshold voltage also increases. This is due to the fact that source-channel barrier increases by increasing doping concentration which results in threshold voltage increment. It is also revealed that threshold voltage increases as channel length increases because of the increment in the electric field effect on the depletion regions of source and drain junctions. Figure 6b shows the threshold The doping concentration effect on the threshold voltage is indicated in Figure 6a. It seems that, as the concentration increases the threshold voltage also increases. This is due to the fact that source-channel barrier increases by increasing doping concentration which results in threshold voltage increment. It is also revealed that threshold voltage increases as channel length increases because of the increment in the electric field effect on the depletion regions of source and drain junctions. Figure 6b shows the threshold voltage along the channel for two different temperatures. The profile of voltage is the same for both values of temperature, in which the threshold voltage increases as the temperature increases.   Figure 7a illustrates subthreshold slope versus channel length for two cases x = 0 x = tch/2 with L varying from 10 to 20 nm. The values of the subthreshold slope dem strate a better top gate control on the front side of the channel. It is observable that subthreshold slope gets closer to the ideal value of 60 mV/dec as the channel length creases. The obtained result of subthreshold slope resembles the better gate control on GNS channel. However, the subthreshold slope increases for the shorter channel len devices. The effect of oxide thickness on the subthreshold slope is investigated in Fig  7b. Apparently, as oxide thickness increases the subthreshold slope also increases. thinner gate oxide, the gate capacitance is larger while the gate has better control over channel. Furthermore, for the thinner tox and shorter channel devices, the subthresh slope degradation is mainly a result of the direct source to drain tunneling. On the o hand, as the quantum capacitance is in series with Cox, the overall gate capacitance  Figure 7a illustrates subthreshold slope versus channel length for two cases x = 0 and x = t ch /2 with L varying from 10 to 20 nm. The values of the subthreshold slope demonstrate a better top gate control on the front side of the channel. It is observable that the subthreshold slope gets closer to the ideal value of 60 mV/dec as the channel length increases. The obtained result of subthreshold slope resembles the better gate control on the GNS channel. However, the subthreshold slope increases for the shorter channel length devices. The effect of oxide thickness on the subthreshold slope is investigated in Figure 7b. Apparently, as oxide thickness increases the subthreshold slope also increases.
For thinner gate oxide, the gate capacitance is larger while the gate has better control over the channel. Furthermore, for the thinner t ox and shorter channel devices, the subthreshold slope degradation is mainly a result of the direct source to drain tunneling. On the other hand, as the quantum capacitance is in series with C ox , the overall gate capacitance becomes smaller than C ox . Therefore, the gate control over the channel declines for larger values of C q and the subthreshold increases. It is also observed that subthreshold slope decreases as channel length increases. Figure 7a illustrates subthreshold slope versus channel length for two cases x = 0 and x = tch/2 with L varying from 10 to 20 nm. The values of the subthreshold slope demonstrate a better top gate control on the front side of the channel. It is observable that the subthreshold slope gets closer to the ideal value of 60 mV/dec as the channel length increases. The obtained result of subthreshold slope resembles the better gate control on the GNS channel. However, the subthreshold slope increases for the shorter channel length devices. The effect of oxide thickness on the subthreshold slope is investigated in Figure  7b. Apparently, as oxide thickness increases the subthreshold slope also increases. For thinner gate oxide, the gate capacitance is larger while the gate has better control over the channel. Furthermore, for the thinner tox and shorter channel devices, the subthreshold slope degradation is mainly a result of the direct source to drain tunneling. On the other hand, as the quantum capacitance is in series with Cox, the overall gate capacitance becomes smaller than Cox. Therefore, the gate control over the channel declines for larger values of Cq and the subthreshold increases. It is also observed that subthreshold slope decreases as channel length increases.  The current-voltage characteristics of the device are presented in Figure 8a,b. Figure 8a points out strong gate-source voltage dependence of the I-V characteristic showing that the drain current increases as the gate voltage increases. In other words, a greater value of drain current results as front gate voltage increases from 0.05 to 0.15 V. This is because of the fact that the voltage drops through the oxide close to the drain terminal reduces as the drain voltage rises. As a result, the induced inversion charge density close to the drain also decreases. The effect of the channel length scaling on the I-V characteristic is investigated in Figure 8b. Apparently, the drain current rises substantially as the channel length decreases from 20 to 10 nm. It is notable that the scaling of the channel length improves the gate electrostatic control, creating larger transconductance and smaller subthreshold swings. The current-voltage characteristics of the device are presented in Figure 8a,b. Figure  8a points out strong gate-source voltage dependence of the I-V characteristic showing that the drain current increases as the gate voltage increases. In other words, a greater value of drain current results as front gate voltage increases from 0.05 to 0.15 V. This is because of the fact that the voltage drops through the oxide close to the drain terminal reduces as the drain voltage rises. As a result, the induced inversion charge density close to the drain also decreases. The effect of the channel length scaling on the I-V characteristic is investigated in Figure 8b. Apparently, the drain current rises substantially as the channel length decreases from 20 to 10 nm. It is notable that the scaling of the channel length improves the gate electrostatic control, creating larger transconductance and smaller subthreshold swings. It is noteworthy that the minimum value of surface potential and its location are dependent on the drain voltage which is a sign of DIBL. The variation of DIBL as a function of channel length is illustrated in Figure 9. It can be seen that the profile of DIBL decreases as channel length increases. It can be also observed that by shrinking the channel length below 20 nm, the DIBL effect becomes more severe. To define the physical phenomena related to the result shown in Figure 9, note that as channel length becomes It is noteworthy that the minimum value of surface potential and its location are dependent on the drain voltage which is a sign of DIBL. The variation of DIBL as a function of channel length is illustrated in Figure 9. It can be seen that the profile of DIBL decreases as channel length increases. It can be also observed that by shrinking the channel length below 20 nm, the DIBL effect becomes more severe. To define the physical phenomena related to the result shown in Figure 9, note that as channel length becomes shorter the depletion region increases which produces a big surface potential that decreases the barrier height and the DIBL effect becomes more severe. It is noteworthy that the minimum value of surface potential and its location are dependent on the drain voltage which is a sign of DIBL. The variation of DIBL as a function of channel length is illustrated in Figure 9. It can be seen that the profile of DIBL decreases as channel length increases. It can be also observed that by shrinking the channel length below 20 nm, the DIBL effect becomes more severe. To define the physical phenomena related to the result shown in Figure 9, note that as channel length becomes shorter the depletion region increases which produces a big surface potential that decreases the barrier height and the DIBL effect becomes more severe.  The findings of this research demonstrate that there is a good agreement between the GNS-based device modeling and simulation results [31,32]. It can be concluded that the obtained results of the proposed analytical models and figures of merit for the proposed device showed a promising performance for transistor applications. This is because, obtained result of subthreshold slope resembles the better gate control on the GNS channel and it gets closer to the ideal value of 60 mV/dec as the channel length increases.

Conclusions
The outstanding properties of GNS are motivation for using GNS-based FETs for low-power applications. In this paper, analytical modeling of electrical transport in FET based on GNS is investigated. To this end, the characterization of the device is investigated based on analytical models of carrier concentration, quantum capacitance, surface potential, threshold voltage, subthreshold slope, DIBL and current-voltage characteristics. The effects of quantum capacitance, oxide thickness, channel length, doping concentration, temperature and voltage are also taken into account in the proposed models. According to the obtained results, the front and back gate surface potentials in the middle of channel length are about 0.4 and 0.43 V, respectively. The surface potential along the channel distance for unequal flat band/gate voltages of the front and back sides is 0.6 V (l L= 0). The maximum values of minimum potential for different values of quantum capacitance (1, 3 µF/cm 2 ) are 0.77 and 0.8 V, respectively. The value of threshold voltage for different values of drain-source voltage is about 0.58 V in channel length of 20 nm. In this case, the value of threshold voltage reaches to maximum for different doping concentrations and temperatures. On the other hand, subthreshold slope for the front surface and the middle of channel, and different values of oxide thickness has the minimum value in the channel length of 20 nm. Additionally, the DIBL effect becomes more severe by shrinking the channel length below 20 nm. The obtained results bring new hopes for the application of GNS in high-performance transistors.

Data Availability Statement:
The data that supports the findings of this study are available within the article and Appendix A. The results of software application are available within the article and Appendix A.
Acknowledgments: Authors would like to acknowledge BZTU for providing excellent research environment in which to complete this work.