Analysis of Operational Characteristics of AlGaN/GaN High-Electron-Mobility Transistor with Various Slant-Gate-Based Structures: A Simulation Study

This study investigates the operational characteristics of AlGaN/GaN high-electron-mobility transistors (HEMTs) by applying a slant-gate structure and drain-side extended field-plate (FP) for improved breakdown voltage. Prior to the analysis of slant-gate-based HEMT, simulation parameters were extracted from the measured data of fabricated basic T-gate HEMTs to secure the reliability of the results. We suggest three different types of slant-gate structures that connect the basic T-gate electrode boundary to the 1st and 2nd SiN passivation layers obliquely. To consider both the breakdown voltage and frequency characteristics, the DC and RF characteristics of various slant-gate structures including the self-heating effect were analyzed by TCAD simulation. We then applied a drain-side extended FP to further increase the breakdown voltage. The maximum breakdown voltage was achieved at the FP length of 0.4 μm. Finally, we conclude that the slant-gate structures can improve breakdown voltage by up to 66% without compromising the frequency characteristics of the HEMT. When the drain-side FP is applied to a slant-gate structure, the breakdown voltage is further improved by up to 108%, but the frequency characteristics deteriorate. Therefore, AlGaN/GaN HEMTs with an optimized slant-gate-based structure can ultimately be a promising candidate for high-power and high-frequency applications.


Introduction
AlGaN/GaN high-electron-mobility transistors (HEMTs) are widely used as power devices due to their high off-state breakdown voltage (V BD ) that is a result of their remarkable material and electronic properties, such as wide energy bandgap (3.3 eV) and high critical electric field (3.39 MV/cm) [1][2][3]. These characteristics make GaN more practicable for high-voltage and high-temperature applications than silicon or gallium arsenide [4]. Additionally, HEMTs based on the AlGaN/GaN heterostructure show superb performances owing to the two-dimensional electron gas (2-DEG) via tensile and compressive stresses in the channel region that exhibits high electron mobility and high electron density, which have important roles in the output current and power amplification. Nevertheless, to fully cater to the market requirements, GaN-based HEMTs need to be capable of both high voltage and high-frequency applications [5][6][7]. Therefore, we designed slant-gate structures with high V BD and high cut-off frequency (f T ) simultaneously, which were evaluated by Johnson's figure of merit (JFOM) (=f T × V BD ) [8][9][10].
Generally, the field-plate (FP) technology has the effect of increasing the V BD by providing an extra metal edge, which leads to the redistribution and reduction in the electric fields concentrated at the drain-side gate electrode edge over the 2-DEG channel [11][12][13]. However, FP structures create additional parasitic capacitances, which can degrade RF

Materials and Methods
In order to verify the simulation parameters, HEMT with basic T-gate structure was fabricated. Figure 1 shows scanning electron microscope (SEM) images of a fabricated AlGaN/GaN HEMT. Figure 1a shows a top view of a four-finger transistor device consisting of the gate, source, and drain contact pads with a unit gate width of 100 µm and sourceto-drain distance (L Source-Drain ) of 5 µm. Figure 1b is a magnified cross-sectional view of the red dotted region in Figure 1a, showing the conventional T-gate structure. As shown in Figure 1b, a T-shaped gate was formed by combining a narrow gate-foot length (L Gate-Foot ) of 0.18 µm, a gate-middle length (L Gate-Middle ) of 0.34 µm, and a gate-head length (L Gate-Head ) of 0.8 µm.
Generally, the field-plate (FP) technology has the effect of increasing the V by providing an extra metal edge, which leads to the redistribution and reduction in the electric fields concentrated at the drain-side gate electrode edge over the 2-DEG channel [11][12][13]. However, FP structures create additional parasitic capacitances, which can degrade RF characteristics in high-frequency operation and can also reduce power efficiency over the operating frequency range [14][15][16]. But the optimum slant-gate structure in this study can improve V without degrading the frequency characteristics of the HEMT. Also, we confirmed that the V of the slant gate structure is greatly improved with only a slight geometrical change in the existing basic T-gate electrode structure, with same gate length (L ) of 0.18 μm and same epitaxial layer configurations.
The optimal gate structure was determined by analyzing the trade-off between V and frequency characteristics of the various slant-gate-based structures. First, the simulated data were matched with measured drain current-gate voltage (I -V ) transfer characteristics and frequency characteristics data of fabricated basic T-gate AlGaN/GaN HEMTs for verification. Afterward, we applied three different slant-gate structures to improve not only the V while maintaining or improving other DC characteristics but also the RF performances. To further increase the V , we then applied a drain-side extended FP to the most effective of the three slant-gate structures. The V was simulated while increasing the drain-side FP length up to 1.0 μm to determine the optimum FP length that results in the highest V . The AlGaN/GaN HEMTs with slant-gate-based structure which has high V and high f are expected to be used not only in 5G wireless network applications such as high-power amplifiers, but also in military systems such as radar transmitters.

Materials and Methods
In order to verify the simulation parameters, HEMT with basic T-gate structure was fabricated. Figure 1 shows scanning electron microscope (SEM) images of a fabricated Al-GaN/GaN HEMT. Figure 1a shows a top view of a four-finger transistor device consisting of the gate, source, and drain contact pads with a unit gate width of 100 μm and sourceto-drain distance (L -) of 5 μm.   The unit device structure of a one-finger transistor was used in the modeling, and a cross-sectional schematic of a basic T-gate structure is shown in Figure 2. And Table 1 provides detailed geometrical parameter information of the T-gate structure used in the simulation. The AlGaN/GaN heterostructure HEMTs were grown on a 4-inch SiC substrate using metal-organic chemical vapor deposition. The epitaxial layers were consisted of a nucleation layer, a 2 µm thick Fe-doped GaN buffer layer, and a 25 nm thick Al 0 . 25 Ga 0 . 75 N barrier layer. Ti/Al/Ni/Au ohmic metallization was formed by rapid thermal annealing at 900 • C for 30 s, and device isolation was carried out by P + ion implantation. Then, a 50-nm-thick SiN layer was deposited using plasma-enhanced chemical vapor deposition (PECVD). The first metal interconnections with the ohmic contacts were formed by the evaporation of Ti and Au metal after etching the SiN layer. The T-shaped gate process was performed by using two-step electron-beam lithography. First, the L Gate-Foot of 0.18 µm was formed by electron-beam exposure in poly methyl methacrylate (PMMA) resist and the SiN layer underneath the gate pattern was etched by reactive ion etching (RIE). Then, a T-shaped gate pattern with the L Gate-Middle of 0.34 µm was directly written by additional electron-beam exposure after coating with PMMA/Co-polymer/PMMA triple layers. The gate recess was formed using inductively coupled plasma (ICP) etching with BCl 3 /Cl 2 gas and the two-step procedure to form the recessed gate was optimized by using ICP dry etching with a BCl 3 /Cl 2 gas mixture and a wet cleaning process consisting of oxygen plasma treatment and diluted-HCl etching. For gate metallization, an Au/Ni metal stack with the respective thickness of 500/30 nm was deposited by electron-beam evaporation and lifted off. A SiN PECVD film was deposited for device passivation and etched using RIE for the source and drain pad contacts. A more detailed description of the process can be found in the previous paper [17].
The unit device structure of a one-finger transistor was used in the modeling, and a cross-sectional schematic of a basic T-gate structure is shown in Figure 2. And Table 1 provides detailed geometrical parameter information of the T-gate structure used in the simulation. The AlGaN/GaN heterostructure HEMTs were grown on a 4-inch SiC substrate using metal-organic chemical vapor deposition. The epitaxial layers were consisted of a nucleation layer, a 2 μm thick Fe-doped GaN buffer layer, and a 25 nm thick Al0.25Ga0.75N barrier layer. Ti/Al/Ni/Au ohmic metallization was formed by rapid thermal annealing at 900 °C for 30 s, and device isolation was carried out by P + ion implantation. Then, a 50-nm-thick SiN layer was deposited using plasma-enhanced chemical vapor deposition (PECVD). The first metal interconnections with the ohmic contacts were formed by the evaporation of Ti and Au metal after etching the SiN layer. The T-shaped gate process was performed by using two-step electron-beam lithography. First, the L of 0.18 μm was formed by electron-beam exposure in poly methyl methacrylate (PMMA) resist and the SiN layer underneath the gate pattern was etched by reactive ion etching (RIE). Then, a T-shaped gate pattern with the L of 0.34 μm was directly written by additional electron-beam exposure after coating with PMMA/Co-polymer/PMMA triple layers. The gate recess was formed using inductively coupled plasma (ICP) etching with BCl3/Cl2 gas and the two-step procedure to form the recessed gate was optimized by using ICP dry etching with a BCl3/Cl2 gas mixture and a wet cleaning process consisting of oxygen plasma treatment and diluted-HCl etching. For gate metallization, an Au/Ni metal stack with the respective thickness of 500/30 nm was deposited by electron-beam evaporation and lifted off. A SiN PECVD film was deposited for device passivation and etched using RIE for the source and drain pad contacts. A more detailed description of the process can be found in the previous paper [17]. The S, D, and G stand for source, drain, and gate electrode, respectively, and the numbers are explained in the Table 1. Table 1. Geometrical parameters of the basic T-gate structure and epitaxial layer used in the simulation.

Parameter
Value (μm) The S, D, and G stand for source, drain, and gate electrode, respectively, and the numbers are explained in the Table 1. For the simulation study, it is important to apply the appropriate electrical and thermal parameters for each material and simulation model to ensure data reliability and consistency with actual device operating characteristics. Figure 3 shows the acceptor trap density and conduction energy band of the AlGaN/GaN interface. Acceptor trap doping by Fe (Iron) was exploited in the GaN buffer layer to prevent the electron punch-through effect and minimize the substrate leakage current to improve V BD [18]. As shown in Figure 3a, we used the Gaussian acceptor doping profile to consider diffusion as actual doping, in which the doping concentration gradually decreased with the peak trap concentration of 10 18 /cm 3 ; thus, the acceptor doping concentration at the AlGaN/GaN interface was set to 6.376 × 10 16 /cm 3 [19]. For the simulation study, it is important to apply the appropriate electrical and thermal parameters for each material and simulation model to ensure data reliability and consistency with actual device operating characteristics. Figure 3 shows the acceptor trap density and conduction energy band of the AlGaN/GaN interface. Acceptor trap doping by Fe (Iron) was exploited in the GaN buffer layer to prevent the electron punch-through effect and minimize the substrate leakage current to improve V [18]. As shown in Figure 3a, we used the Gaussian acceptor doping profile to consider diffusion as actual doping, in which the doping concentration gradually decreased with the peak trap concentration of 10 18 /cm 3 ; thus, the acceptor doping concentration at the AlGaN/GaN interface was set to 6.376 × 10 16 /cm 3 [19].  Figure 3b shows the conduction energy band level of the simulated device as a function of depth. When a heterojunction between AlGaN and GaN is formed, the conduction band and valence band throughout the material must bend to form a continuous Fermi level. The conduction band offset of AlGaN and GaN layer transfers electrons from Al-GaN to GaN layer, from states with higher to lower energy level using band bending. The electrons that are transferred to GaN layer are confined to a small region in the channel layer near the hetero interface, which is called the 2-DEG, as shown in Figure 3b. It was confirmed that a 2-DEG potential well was formed at a depth of 0.0125 μm below the AlGaN/GaN interface with a 2-DEG charge carrier density of 4.35 × 10 12 /cm 2 . All the electrical and thermal parameters of AlGaN and GaN used for the simulation are summarized in Table 2 [20,21].  Figure 3b shows the conduction energy band level of the simulated device as a function of depth. When a heterojunction between AlGaN and GaN is formed, the conduction band and valence band throughout the material must bend to form a continuous Fermi level. The conduction band offset of AlGaN and GaN layer transfers electrons from AlGaN to GaN layer, from states with higher to lower energy level using band bending. The electrons that are transferred to GaN layer are confined to a small region in the channel layer near the hetero interface, which is called the 2-DEG, as shown in Figure 3b. It was confirmed that a 2-DEG potential well was formed at a depth of 0.0125 µm below the AlGaN/GaN interface with a 2-DEG charge carrier density of 4.35 × 10 12 /cm 2 . All the electrical and thermal parameters of AlGaN and GaN used for the simulation are summarized in Table 2 [20,21]. The heat generated in the device due to the self-heating effect (SHE) causes phonon scattering, which reduces electron mobility and degrades device performance. Therefore, it is essential to consider the SHE for an accurate simulation of the HEMT operational characteristics [22,23]. To include the SHE for AlGaN/GaN HEMTs in the simulation, we applied the lattice heat flow equation as: where C is the heat capacitance per unit volume, κ is the thermal conductivity, T L is the local lattice temperature, and H is a heat generation term [24][25][26]. When the carrier transport is handled by the drift-diffusion approximation, H in Equation (1) has the simplified form: where → J n and → J p are the electron and hole current densities, respectively, and E → is the electric field [27]. The thermal conductivity model which is vital for the calculation of the SHE in the simulation can be expressed as: where TC.CONST is a thermal conductivity constant for each material at 300 K, and TC.NPOW is a thermal conductivity factor which is an experimental value for each material in the thermal conductivity model. With Equation (3), the thermal conductivity of a material according to the lattice temperature can be calculated by setting the appropriate TC.CONST and TC.NPOW parameters. The applied thermal conductivity constants of GaN and AlGaN are also shown in Table 2 [28,29]. Because RF characteristics can deteriorate with the application of the FP, we analyzed the frequency characteristics according to the parasitic capacitances. Figure 4 shows the small-signal equivalent circuit of HEMTs which can be divided into intrinsic part (emphasized by a dashed frame) and extrinsic part. The extracted values for all extrinsic and intrinsic small-signal parameters of simulated basic T-gate structure are listed in Table 3 [30]. Current gain and unilateral power gain were used to determine the f T and the maximum oscillation frequency (f max ), respectively. Equations (4) and (5) explain the f T and f max , according to Figure 4: where C gs and C gd represent the gate-to-source capacitance and gate-to-drain capacitance, respectively. These parasitic capacitances dominate the decrease in f T according to Equation (4); thus, C gs and C gd must be reduced to obtain higher f T . The R s , R g , R gs , and G ds are the source resistance, gate resistance, gate-to-source resistance, and output conductance, respectively [31]. As denoted in Equation (5), decreasing the denominator components, such as R g and C gd , increases the f max .
Micromachines 2022, 13, x FOR PEER REVIEW 6 of 16 conductance, respectively [31]. As denoted in Equation (5), decreasing the denominator components, such as R and C , increases the f .  In addition, the Fermi-Dirac distribution, Auger recombination, Shockley-Read-Hall recombination, and polarization models were applied to the simulation to calculate the basic operating characteristics of the device. The Selberherr model was used to calculate the temperature dependent impact ionization phenomenon caused by the electric field in the channel layer concentrated under the gate electrode during device operation [32].

Matching of Simulated Data with Measured Data of a Basic T-Gate HEMT
To confirm the reliability of the simulation, the drain current-gate voltage (I -V ) transfer and small-signal characteristics between the simulated and measured data of the fabricated basic T-gate AlGaN/GaN HEMT were matched. Figure 5a shows the overlay of the measured and simulated values for the I -V transfer characteristics of a basic T-gate HEMT at a drain voltage of 10 V. The simulated threshold voltage (V ) was -4.4 V, which matches well with the measured value of -4.5 V. The measured and simulated values of the maximum transconductance (G ) were 275.00 mS/mm and 273.68 mS/mm, respectively, at a drain bias of 10 V. In addition, the drain current at a gate voltage of 0 V (I ) was 837.65 mA/mm in the measured data and 838.24 mA/mm in the simulated data, both of which are similar. A dip of the simulated drain current around gate voltage of -2.5 V was found since two different electron mobility models were used in simulation as described in Table 2 and it is not known exactly which criterion divides the low field and the high field. There could be a mismatch in drain current at the turning point of these two mobility models. Consequently, the reliability of the simulation study was confirmed by matching the simulated data with the measured data, the maximum error rate of which was only 2.2%. The DC measurements of the fabricated device were conducted using a HP4142B Modular DC Source/Monitor probe station and a Cascade Microtech Summit 12000 probe station.   In addition, the Fermi-Dirac distribution, Auger recombination, Shockley-Read-Hall recombination, and polarization models were applied to the simulation to calculate the basic operating characteristics of the device. The Selberherr model was used to calculate the temperature dependent impact ionization phenomenon caused by the electric field in the channel layer concentrated under the gate electrode during device operation [32].

Matching of Simulated Data with Measured Data of a Basic T-Gate HEMT
To confirm the reliability of the simulation, the drain current-gate voltage (I DS -V GS ) transfer and small-signal characteristics between the simulated and measured data of the fabricated basic T-gate AlGaN/GaN HEMT were matched. Figure 5a shows the overlay of the measured and simulated values for the I DS -V GS transfer characteristics of a basic T-gate HEMT at a drain voltage of 10 V. The simulated threshold voltage (V th ) was −4.4 V, which matches well with the measured value of −4.5 V. The measured and simulated values of the maximum transconductance (G m ) were 275.00 mS/mm and 273.68 mS/mm, respectively, at a drain bias of 10 V. In addition, the drain current at a gate voltage of 0 V (I dss ) was 837.65 mA/mm in the measured data and 838.24 mA/mm in the simulated data, both of which are similar. A dip of the simulated drain current around gate voltage of −2.5 V was found since two different electron mobility models were used in simulation as described in Table 2 and it is not known exactly which criterion divides the low field and the high field. There could be a mismatch in drain current at the turning point of these two mobility models. Consequently, the reliability of the simulation study was confirmed by matching the simulated data with the measured data, the maximum error rate of which was only 2.2%. The DC measurements of the fabricated device were conducted using a HP4142B Modular DC Source/Monitor probe station and a Cascade Microtech Summit 12000 probe station. The small-signal RF performance of the fabricated device was measured from 0.5 GHz to 50 GHz with a PNA-X N5245A network analyzer.

Comparative Analysis of a Basic T-Gate and Slant A, Slant B, and Slant C Structures
To increase the V , three different slant-gate structures were suggested, as shown in Figure 6. Each slant-gate structure was slantly connected to the gate electrode edge point where the 1st and 2nd SiN passivation layers meet, respectively. Figure 6 shows a standard basic T-gate, slant A, slant B, and slant C structures with maintaining an L of 0.18 μm as in Table 1. The slope of the slanted gate was 32° for slant A (α), 75° for slant B (β), and 44° for slant C (γ). The lengths of the slant region of slant A, slant B, and slant C are 0.26 μm, 0.31 μm, and 0.43 μm, respectively.

Comparative Analysis of a Basic T-Gate and Slant A, Slant B, and Slant C Structures
To increase the V BD , three different slant-gate structures were suggested, as shown in Figure 6. Each slant-gate structure was slantly connected to the gate electrode edge point where the 1st and 2nd SiN passivation layers meet, respectively. Figure 6 shows a standard basic T-gate, slant A, slant B, and slant C structures with maintaining an L Gate−Foot of 0.18 µm as in Table 1

Comparative Analysis of a Basic T-Gate and Slant A, Slant B, and Slant C Structures
To increase the V , three different slant-gate structures were suggested, as shown in Figure 6. Each slant-gate structure was slantly connected to the gate electrode edge point where the 1st and 2nd SiN passivation layers meet, respectively. Figure 6 shows a standard basic T-gate, slant A, slant B, and slant C structures with maintaining an L of 0.18 μm as in Table 1. The slope of the slanted gate was 32° for slant A (α), 75° for slant B (β), and 44° for slant C (γ). The lengths of the slant region of slant A, slant B, and slant C are 0.26 μm, 0.31 μm, and 0.43 μm, respectively.

Simulation of DC Characteristics
We first simulated the DC characteristics of the slant-gate structure HEMTs and compared them to those of the basic T-gate HEMT. As shown in Figure 7a,b, the I DS -V GS transfer characteristics, such as the threshold voltage, drain current, and transconductance, at a drain voltage of 10 V and 20 V were compared. In Figure 7a, it can be observed that the slant gate structures except slant A improve both the drain current and transconductance than basic T-gate structure, with constant V th . In Figure 7b, the SHE becomes severe at the drain voltage of 20 V, which shows more pronounced drain current reduction and transconductance decrease than those at the drain voltage of 10 V. With the increase in drain voltage, more heat is generated, which decreases the mobility of the electrons due to phonon scattering. By comparing Figure 7a,b, the thermal operational degradation confirms that a higher electric field between the drain and source results in less drain current because of the severe SHE. Figure 7c shows the drain current-drain voltage (I DS -V DS ) output characteristics and decrease in drain current for all structures is observed as the drain voltage increases due to the SHE. When the higher drain voltage was applied, higher electric fields generated more heat, resulting in phonon scattering that reduced electron mobility and drain current density [34]. Moreover, you can also find the slight increase in the drain current at a certain high drain voltage, which is called the kink effect. The kink effect is caused by the carrier trapping process, occurred by the hot electrons which contribute to the trap formation in the AlGaN barrier or GaN buffer layer. The hot electrons in the 2-DEG channel generated under high field acceleration of high drain bias under gate electrode with sufficient energy could be injected into the adjacent AlGaN barrier or GaN buffer layer, where they can be captured by donor-like traps [35][36][37]. In addition, the proposed slant C structure reduces the device on-resistance (R ON ) by 9%, compared to the basic T-gate structure [38][39][40]. Figure 8a shows the electric field in the 2-DEG channel layer which shows a reduced peak electric field in slant C structure by 5%, compared to the basic T-gate structure. In Figure 8b, the three different slant gate structures demonstrated an increased V BD compared with the basic T-gate structure. Since impact ionization cause a sufficient increase in the drain current due to the generation of electron-hole pairs in the channel region from a high electric field close to the gate, dispersing the electric field is effective in improving the breakdown voltage. The V BD was extracted at the point where the drain leakage current exceeds 1 mA/mm, when the gate pinch-off voltage of −7 V was applied to ensure the off-state of the device. Those were 167.44, 196.32, 187.93, and 278.13 V for the T-gate, slant A, slant B, and slant C structures, respectively. The V BD of the slant C structure increased the most to 278.13 V, which is 66% higher than the V BD of 167.44 V of the basic T-gate structure.

Simulation of DC Characteristics
We first simulated the DC characteristics of the slant-gate structure HEMTs and compared them to those of the basic T-gate HEMT. As shown in Figure 7a,b, the I -V transfer characteristics, such as the threshold voltage, drain current, and transconductance, at a drain voltage of 10 V and 20 V were compared. In Figure 7a, it can be observed that the slant gate structures except slant A improve both the drain current and transconductance than basic T-gate structure, with constant V . In Figure 7b, the SHE becomes severe at the drain voltage of 20 V, which shows more pronounced drain current reduction and transconductance decrease than those at the drain voltage of 10 V. With the increase in drain voltage, more heat is generated, which decreases the mobility of the electrons due to phonon scattering. By comparing Figure 7a,b, the thermal operational degradation confirms that a higher electric field between the drain and source results in less drain current because of the severe SHE. Figure 7c shows the drain current-drain voltage (I -V ) output characteristics and decrease in drain current for all structures is observed as the drain voltage increases due to the SHE. When the higher drain voltage was applied, higher electric fields generated more heat, resulting in phonon scattering that reduced electron mobility and drain current density [34]. Moreover, you can also find the slight increase in the drain current at a certain high drain voltage, which is called the kink effect. The kink effect is caused by the carrier trapping process, occurred by the hot electrons which contribute to the trap formation in the AlGaN barrier or GaN buffer layer. The hot electrons in the 2-DEG channel generated under high field acceleration of high drain bias under gate electrode with sufficient energy could be injected into the adjacent AlGaN barrier or GaN buffer layer, where they can be captured by donor-like traps [35][36][37]. In addition, the proposed slant C structure reduces the device on-resistance (R ) by 9%, compared to the basic T-gate structure [38][39][40].  Figure 8a shows the electric field in the 2-DEG channel layer which shows a reduced peak electric field in slant C structure by 5%, compared to the basic T-gate structure. In Figure 8b, the three different slant gate structures demonstrated an increased V compared with the basic T-gate structure. Since impact ionization cause a sufficient increase in the drain current due to the generation of electron-hole pairs in the channel region from a high electric field close to the gate, dispersing the electric field is effective in improving the breakdown voltage. The V was extracted at the point where the drain leakage current exceeds 1 mA/mm, when the gate pinch-off voltage of -7 V was applied to ensure the off-state of the device. Those were 167.44, 196.32, 187.93, and 278.13 V for the T-gate, slant A, slant B, and slant C structures, respectively. The V of the slant C structure increased the most to 278.13 V, which is 66% higher than the V of 167.44 V of the basic T-gate structure.

Simulation of RF Characteristics
In Figure 9, the C and C of each gate structure are compared at a drain voltage of 20 V and a gate voltage of -3.2 V. The structural change in the gate electrode affected both C and C . Because L were shorter than L , as described in Table 2, C were  Figure 8a shows the electric field in the 2-DEG channel layer which shows a reduced peak electric field in slant C structure by 5%, compared to the basic T-gate structure. In Figure 8b, the three different slant gate structures demonstrated an increased V compared with the basic T-gate structure. Since impact ionization cause a sufficient increase in the drain current due to the generation of electron-hole pairs in the channel region from a high electric field close to the gate, dispersing the electric field is effective in improving the breakdown voltage. The V was extracted at the point where the drain leakage current exceeds 1 mA/mm, when the gate pinch-off voltage of -7 V was applied to ensure the off-state of the device. Those were 167.44, 196.32, 187.93, and 278.13 V for the T-gate, slant A, slant B, and slant C structures, respectively. The V of the slant C structure increased the most to 278.13 V, which is 66% higher than the V of 167.44 V of the basic T-gate structure.

Simulation of RF Characteristics
In Figure 9, the C and C of each gate structure are compared at a drain voltage of 20 V and a gate voltage of -3.2 V. The structural change in the gate electrode affected both C and C . Because L were shorter than L , as described in Table 2, C were

Simulation of RF Characteristics
In Figure 9, the C gs and C gd of each gate structure are compared at a drain voltage of 20 V and a gate voltage of −3.2 V. The structural change in the gate electrode affected both C gs and C gd . Because L gs were shorter than L gd , as described in Table 2, C gs were generally larger than C gd . As shown in Figure 9a, the slant C structure showed the largest C gs because the distance between the drain and gate electrode is relatively shorter. The C gd of the T-gate, slant A, slant B, and slant C structures were almost the same at approximately 130 fF/mm, as shown in Figure 9b. Compared with C gs , only a small change in C gd was observed for various gate structures. For the same reason that L gd was longer than L gs , C gd was less affected by the changes in the gate structure [41].
generally larger than C . As shown in Figure 9a, the slant C structure showed the largest C because the distance between the drain and gate electrode is relatively shorter. The C of the T-gate, slant A, slant B, and slant C structures were almost the same at approximately 130 fF/mm, as shown in Figure 9b. Compared with C , only a small change in C was observed for various gate structures. For the same reason that L was longer than L , C was less affected by the changes in the gate structure [41].  of the slant-gate structures increased due to the increase in f and the decrease in R according to Equation (5). When the slant-gate structures are applied, the f is increased by up to 7% and the f is increased by up to 10%, compared to those for the basic T-gate structure, respectively. Through these results, it was confirmed that there was no degradation in the RF characteristics when the slant-gate structures were applied.  respectively. The f max of the slant-gate structures increased due to the increase in f T and the decrease in R g according to Equation (5). When the slant-gate structures are applied, the f T is increased by up to 7% and the f max is increased by up to 10%, compared to those for the basic T-gate structure, respectively. Through these results, it was confirmed that there was no degradation in the RF characteristics when the slant-gate structures were applied.

Comparative Analysis of the Operating Characteristics for the Slant C Structure with an Extended FP
Since the slant C structure demonstrated the highest V BD among the slant-gate structures, we applied a drain-side extended FP to the slant C structure and further improved the V BD . Figure 11 shows the schematic of the slant C with a drain-side extended FP applied gate structure. Except for the FP length, which was increased from 0.2 µm to 1.0 µm, all the remaining structural variables of the device were fixed. We analyzed five different FP lengths, i.e., 0.2, 0.4, 0.6, 0.8, and 1.0 µm, to determine the optimum FP length.
Micromachines 2022, 13, x FOR PEER REVIEW 10 of 16 generally larger than C . As shown in Figure 9a, the slant C structure showed the largest C because the distance between the drain and gate electrode is relatively shorter. The C of the T-gate, slant A, slant B, and slant C structures were almost the same at approximately 130 fF/mm, as shown in Figure 9b. Compared with C , only a small change in C was observed for various gate structures. For the same reason that L was longer than L , C was less affected by the changes in the gate structure [41].
(a) (b) Figure 9. Capacitance characteristics as a function of frequency for different gate structures: (a) gateto-source capacitance; (b) gate-to-drain capacitance. Figure 10 shows of the slant-gate structures increased due to the increase in f and the decrease in R according to Equation (5). When the slant-gate structures are applied, the f is increased by up to 7% and the f is increased by up to 10%, compared to those for the basic T-gate structure, respectively. Through these results, it was confirmed that there was no degradation in the RF characteristics when the slant-gate structures were applied.

Comparative Analysis of the Operating Characteristics for the Slant C Structure with an Extended FP
Since the slant C structure demonstrated the highest V among the slant-gate structures, we applied a drain-side extended FP to the slant C structure and further improved the V . Figure 11 shows the schematic of the slant C with a drain-side extended FP applied gate structure. Except for the FP length, which was increased from 0.2 μm to 1.0 μm, all the remaining structural variables of the device were fixed. We analyzed five different FP lengths, i.e., 0.2, 0.4, 0.6, 0.8, and 1.0 μm, to determine the optimum FP length. Figure 11. Schematic of the slant C with a drain-side extended field-plate (FP) applied gate structure.

Simulation of DC Characteristics
To determine the optimum FP length, the DC characteristics of the device, such as I -V transfer, I -V output, and the breakdown voltage characteristics were simulated and compared by increasing the FP length up to 1.0 μm. The V , G , and I did not change significantly with the extension of FP as shown in Figure 12a. As shown in Figure 12b, the thermal operational degradation due to the SHE was detected in the I -V output characteristics, but there were no significant differences in the overall curve trends and R according to the FP length. Similarly, a kink effect as shown in Figure 7c was also found near a drain voltage of 20 V or 25 V.

Comparative Analysis of the Operating Characteristics for the Slant C Structure with an Extended FP
Since the slant C structure demonstrated the highest V among the slant-gate structures, we applied a drain-side extended FP to the slant C structure and further improved the V . Figure 11 shows the schematic of the slant C with a drain-side extended FP applied gate structure. Except for the FP length, which was increased from 0.2 μm to 1.0 μm, all the remaining structural variables of the device were fixed. We analyzed five different FP lengths, i.e., 0.2, 0.4, 0.6, 0.8, and 1.0 μm, to determine the optimum FP length. Figure 11. Schematic of the slant C with a drain-side extended field-plate (FP) applied gate structure.

Simulation of DC Characteristics
To determine the optimum FP length, the DC characteristics of the device, such as I -V transfer, I -V output, and the breakdown voltage characteristics were simulated and compared by increasing the FP length up to 1.0 μm. The V , G , and I did not change significantly with the extension of FP as shown in Figure 12a. As shown in Figure 12b, the thermal operational degradation due to the SHE was detected in the I -V output characteristics, but there were no significant differences in the overall curve trends and R according to the FP length. Similarly, a kink effect as shown in Figure 7c was also found near a drain voltage of 20 V or 25 V. Figure 11. Schematic of the slant C with a drain-side extended field-plate (FP) applied gate structure.

Simulation of DC Characteristics
To determine the optimum FP length, the DC characteristics of the device, such as I DS -V GS transfer, I DS -V DS output, and the breakdown voltage characteristics were simulated and compared by increasing the FP length up to 1.0 µm. The V th , G m , and I dss did not change significantly with the extension of FP as shown in Figure 12a. As shown in Figure 12b, the thermal operational degradation due to the SHE was detected in the I DS -V DS output characteristics, but there were no significant differences in the overall curve trends and R ON according to the FP length. Similarly, a kink effect as shown in Figure 7c was also found near a drain voltage of 20 V or 25 V. Figure 12c presents the V BD , showing the drain current as a function of drain voltage for different FP lengths. The V BD is strongly related to the FP length because the extension of the gate edge point redistributes the peak electric field in the channel layer. All breakdown voltages were much larger than that of the slant C structure without the FP. The slant C structure with an extended FP length of 0.4 µm showed the maximum V BD of 349.87 V, which is an increase of 26% compared with that of the slant C structure without the FP. A further increase in the FP length beyond 0.6 µm decreases the V BD because the electric field that increases as it approaches the drain electrode has more influence than the electric field dispersed by the FP. From the above results, it can be observed that when FP was applied to the slant C structure, other DC characteristics were almost maintained, but only the V BD was affected.  Figure 12c presents the V , showing the drain current as a function of drain voltage for different FP lengths. The V is strongly related to the FP length because the extension of the gate edge point redistributes the peak electric field in the channel layer. All breakdown voltages were much larger than that of the slant C structure without the FP. The slant C structure with an extended FP length of 0.4 μm showed the maximum V of 349.87 V, which is an increase of 26% compared with that of the slant C structure without the FP. A further increase in the FP length beyond 0.6 μm decreases the V because the electric field that increases as it approaches the drain electrode has more influence than the electric field dispersed by the FP. From the above results, it can be observed that when FP was applied to the slant C structure, other DC characteristics were almost maintained, but only the V was affected.

Simulation of RF Characteristics
As expected, the sum of the parasitic capacitances increased with extending FP length, which affects the operational frequencies of the AlGaN/GaN HEMT. Figure 13 shows the capacitance variations for different FP lengths. Since L is shorter than L , C shows generally larger values than C due to the fact that the capacitance is inversely proportional to the distance between the electrodes. Both C and C tend to increase with respect to FP length as shown in Figure 13a,b. Drain-side extended FP not only affects C but also C . The reason is that in addition to the FP's own extrinsic capacitance, there is also intrinsic capacitance beneath the gate edges (gate-to-source and gateto-drain) due to the depletion region. The FP regulates the depletion region by uniform distribution of the electric field beneath both gate edges. The reduction in the electric field results in suppression and extension of the channel depletion region, hence raising the capacitance [42].

Simulation of RF Characteristics
As expected, the sum of the parasitic capacitances increased with extending FP length, which affects the operational frequencies of the AlGaN/GaN HEMT. Figure 13 shows the capacitance variations for different FP lengths. Since L gs is shorter than L gd , C gs shows generally larger values than C gd due to the fact that the capacitance is inversely proportional to the distance between the electrodes. Both C gs and C gd tend to increase with respect to FP length as shown in Figure 13a,b. Drain-side extended FP not only affects C gd but also C gs . The reason is that in addition to the FP's own extrinsic capacitance, there is also intrinsic capacitance beneath the gate edges (gate-to-source and gate-to-drain) due to the depletion region. The FP regulates the depletion region by uniform distribution of the electric field beneath both gate edges. The reduction in the electric field results in suppression and extension of the channel depletion region, hence raising the capacitance [42]. Figure 14 shows the simulated f T and f max values for different FP lengths at the drain voltage of 20 V and gate voltage of −3.2 V. The f T and f max of the slant C structure, without any FP, were 46.23 GHz and 115.72 GHz, respectively. The f T was simulated to be 43.57, 40.98, 39.01, 35.92, and 33.99 GHz for the slant C structure with FP lengths of 0.2, 0.4, 0.6, 0.8, and 1.0 µm, respectively. The f T showed a tendency to decrease by approximately 5-9% as the FP length was extended by 0.2-µm-steps. As C gs and C gd raise as FP length increases, f T decreases by Equation (4). The f max also decreased as the FP length was extended. The f max was simulated to be 107.09, 88.42, 83.40, 72.74, and 64.23 GHz for the slant C structure with FP lengths of 0.2, 0.4, 0.6, 0.8, and 1.0 µm, respectively. Comparing the f max of the slant C structure based on the different FP lengths, it can be observed that the f max decreases by 6% to 21% with the 0.2 µm step increase in FP. The f max tends to decrease as f T decreases and C gd increases according to Equation (5). This finding shows the dependence of a noticeable reduction in f T and f max values with respect to FP length. Consequently, we can conclude that FP length of 0.4 µm is superior in performances with different lengths of FP, considering both the high breakdown voltage and high frequency characteristics simultaneously.

Discussion
In this paper, we conducted simulations of the DC and RF characteristics for various slant-gate-based structures and studied the trade-off between V and f . Among the slant A, slant B, and slant C structures, the slant C structure demonstrated the highest V . It is meaningful that the breakdown voltage can be greatly improved without a significant change in the fabrication process of conventional T-gate structure. In addition, it was found that f and f were enhanced together with the improvement of the V by employing the slant-gate structures. Thereafter, with varying lengths of drain-side extended FP applied, the slant C structure with a FP length of 0.4 μm demonstrated the highest V . However, the increase in FP length was inevitably accompanied by the decrease in f and f due to parasitic capacitances. Table 4 presents a summary of the DC and RF characteristics for the optimum two different slant-gate-based structures of the AlGaN/GaN HEMT. Compared with the basic

Discussion
In this paper, we conducted simulations of the DC and RF characteristics for various slant-gate-based structures and studied the trade-off between V BD and f T . Among the slant A, slant B, and slant C structures, the slant C structure demonstrated the highest V BD . It is meaningful that the breakdown voltage can be greatly improved without a significant change in the fabrication process of conventional T-gate structure. In addition, it was found that f T and f max were enhanced together with the improvement of the V BD by employing the slant-gate structures. Thereafter, with varying lengths of drain-side extended FP applied, the slant C structure with a FP length of 0.4 µm demonstrated the highest V BD . However, the increase in FP length was inevitably accompanied by the decrease in f T and f max due to parasitic capacitances. Table 4 presents a summary of the DC and RF characteristics for the optimum two different slant-gate-based structures of the AlGaN/GaN HEMT. Compared with the basic T-gate structure, it was shown that the V BD , f T , and f max are all increased when the slant C structure is applied. The V BD of the slant C structure with 0.4-µm FP appears higher, but the f T and f max are decreased. The slant C structure increases the V BD by 66%, and the slant C structure with a 0.4 µm FP increases the V BD by 109% compared with the basic T-gate structure. Another noteworthy advantage of the proposed slant-gate-based structures is that they increase the V BD while maintaining the V th of the HEMT.

Conclusions
In this study, we investigated the operational characteristics of AlGaN/GaN HEMTs with slant-gate-based structures using TCAD simulation. Unlike other structures that only improve the breakdown characteristic, the trade-off between the breakdown voltage and frequency characteristics of suggested slant-gate-based structures were analyzed. The simulation parameters were obtained from fabricated basic T-gate AlGaN/GaN HEMT devices to verify the reliability of the simulation results. We proposed two optimum slantgate-based structures for AlGaN/GaN HEMTs with enhanced operational characteristics; the slant C structure can be an excellent choice to obtain both high breakdown voltage and high frequency characteristics. For high-power applications, the slant C structure with a 0.4-µm-long FP can greatly improve the breakdown voltage even if the frequency characteristics are degraded. The simulated results clearly show that the suggested slantgate-based HEMTs are superior in performance over conventional T-gate HEMTs for future high-power and high-frequency applications.

Conflicts of Interest:
The authors declare no conflict of interest.