Compact SPICE Model of Memristor with Barrier Modulated Considering Short- and Long-Term Memory Characteristics by IGZO Oxygen Content

This paper introduces a compact SPICE model of a two-terminal memory with a Pd/Ti/IGZO/p+-Si structure. In this paper, short- and long-term components are systematically separated and applied in each model. Such separations are conducted by the applied bias and oxygen flow rate (OFR) during indium gallium zinc oxide (IGZO) deposition. The short- and long-term components in the potentiation and depression curves are modeled by considering the process (OFR of IGZO) and bias conditions. The compact SPICE model with the physical mechanism of SiO2 modulation is introduced, which can be useful for optimizing the specification of memristor devices.


Introduction
The Internet of Things (IoT) refers to a technology in which sensors are attached to objects to exchange data in real time over the Internet. Edge computing is used to reduce latency and bandwidth by performing computing at or near the physical location of a user or data source for IoT [1][2][3][4][5][6]. Due to the increasing variety of image sensing data, the demand for technology using IoT is increasing, and data collection and analysis technology must be specified. Memristor can be a building block in neuromorphic systems by controlling conductance [7][8][9][10][11][12][13]. Various resistive switching behaviors are observed in a lot of materials, such as oxides, nitrides and other materials [14][15][16][17][18][19][20][21][22]. Among them, the indium gallium zinc oxide (IGZO)-based memristor is very promising for memory applications because of its interface-type switching and good compatibility with conventional Si processing [14][15][16][17][18][19].
In previous studies, IGZO-based memristors have shown good synaptic properties for neuromorphic systems and memory applications [14][15][16][17][18][19][20][21]. Similarly to other oxide memristors, when Ag is used as the top electrode (TE) in IGZO-based memristors, Ag plays a dominant role in switching through the formation of the Ag filament [22][23][24]. Conversely, intrinsic resistive switching was observed when non-chemical metallization memory-type electrodes were used [25]. Here, in most cases, a gradual change in resistance is observed, indicating that the interface of the IGZO and electrode layers plays an important role in the resistance change. Non-filamentary switching, as observed in several material systems, provides better conductance control for neuromorphic system [26][27][28].
Basically, good long-term memory retention is beneficial for the neuromorphic system to ensure good performance without data loss [29,30]. Meanwhile, short-term memory with resistance drift is rather suitable for temporal learning which could save the leaning cost in reservoir computing [28]. Therefore, the distinction between the short-and longterm components in the memristor could be important. However, in previous studies, the classification of short-and long-term components has rarely been reported [31]. In our

Results and Discussion
The typical characteristics of the memristor used in this work are as follows. When a strong negative voltage is applied to the TE, oxygen vacancies (V 0 2+ ) inside the IGZO film are driven toward the TE and the filament composed of V 0 2+ is formed, which extends from the TE to the BE for the formation process, as shown in Figure 1a,b. After the formation process, the Schottky barrier on the TE side collapses, and the barrier formed by the SiO 2 layer on the BE side is modulated, resulting in the memristor switching characteristics [15,34]. The barrier height (BH) of SiO 2 is modulated by electron trapping/detrapping in the trap at the interface between the IGZO and SiO 2 layers. When a positive voltage is applied to the TE, the electrons are detrapped in the trap at the IGZO-SiO 2 interface, causing a relatively positive charge. The BH is lowered and the memristor resistance decreases for the SET process in Figure 1c. Conversely, when a negative voltage is applied to TE, electrons are detrapped in the trap at the IGZO and SiO 2 interface, resulting in a relatively negative charge, and the BH increases, thereby increasing the resistance of the memristor for the RESET process shown in Figure 1d.
The main current mechanism of the memristor is the thermionic emission of the barrier formed by native oxide [15,18,31]. The current formula by thermionic emission is the same as Equation (1): where A is the device area; A* is the Richardson constant; T is the absolute temperature; k is the Boltzmann constant; V TE is the voltage applied to TE; q is the electric charge; ε SiO2 is the dielectric constant at SiO 2 ; L eff is the native oxide effective thickness; and Φ(t) is the native oxide effective BH [12]. The barrier modulation by the memristor switching operation drops from the initial BH (Φ init (t)) to the BH change amount (∆Φ(t)) in Equation (2). The main current mechanism of the memristor is the thermionic emission of the barrier formed by native oxide [15,18,31]. The current formula by thermionic emission is the same as Equation (1): where A is the device area; A* is the Richardson constant; T is the absolute temperature; k is the Boltzmann constant; VTE is the voltage applied to TE; q is the electric charge; εSiO2 is the dielectric constant at SiO2; Leff is the native oxide effective thickness; and Φ(t) is the native oxide effective BH [12]. The barrier modulation by the memristor switching operation drops from the initial BH (Φinit(t)) to the BH change amount (ΔΦ(t)) in Equation (2).
ΔΦ(t) is calculated by Equation (3) for potentiation and Equation (4) for depression [12].  (4) for depression [12]. Equations (3) and (4) are double-stretched exponential functions (DSEFs) composed of two sums of stretched exponential functions, and each stretched exponential function (SEF) is responsible for the modulation of the barrier during short-and long-term operations. ∆Φ S (t) and ∆Φ L (t) are the total amount of change of the current BH by the short-and long-term components, respectively.
To extract the parameters that constitute the DSEF from Equation (3), an experimental sequence was designed as shown in Figure 2a. Conduct the potentiation and recovery experiments simultaneously. Separate the ∆Φ S by fitting from the recovery test result. Fit the ∆Φ L component from the potentiation test result. If the above steps are performed for each potentiation voltage (V P ), the DSEF parameter can be expressed as a function of V P for the device with 2 sccm. First, a stress pulse of magnitude VP was applied to TE for 40 ms, and then a read pulse was applied for 100 μs with an interval time of 10 μs. The current was measured while applying the read pulse to observe the change in the memristor conductance at every potentiation pulse. The read operation period was 120 μs in total, including the state in which no pulse was applied. It was very short considering that the potentiation pulse width was 40 ms. The reason for this design was that the read process is performed for the shortest time possible so as not to lose the data of the short-term component during the read operation. According to the above procedure, the potentiation and read pulses are applied continuously, and this is repeated 100 times to end the potentiation phase in the red box region of Figure 2a. Once the potentiation phase is completed, we move to the recovery phase, which consists of two phases: the yellow and green regions in Figure 2a. The yellow box was designed with a tight read pulse interval of 10 μs to observe the recovery by the short-term component.
In Figure 2a, the green box is designed with a read pulse interval of 40 ms duration to see the recovery by the long-term component. In each recovery phase, 100 read pulses are applied.
The above experiment was repeated by dividing it into four cases of VP = 2.25, 2.5, First, a stress pulse of magnitude V P was applied to TE for 40 ms, and then a read pulse was applied for 100 µs with an interval time of 10 µs. The current was measured while applying the read pulse to observe the change in the memristor conductance at every potentiation pulse. The read operation period was 120 µs in total, including the state in which no pulse was applied. It was very short considering that the potentiation pulse width was 40 ms. The reason for this design was that the read process is performed for the shortest time possible so as not to lose the data of the short-term component during the read operation. According to the above procedure, the potentiation and read pulses are applied continuously, and this is repeated 100 times to end the potentiation phase in the red box region of Figure 2a. Once the potentiation phase is completed, we move to the recovery phase, which consists of two phases: the yellow and green regions in Figure 2a. The yellow box was designed with a tight read pulse interval of 10 µs to observe the recovery by the short-term component.
In Figure 2a, the green box is designed with a read pulse interval of 40 ms duration to see the recovery by the long-term component. In each recovery phase, 100 read pulses are applied.
The above experiment was repeated by dividing it into four cases of V P = 2.25, 2.5, 2.75 and 3 V. Figure 2b shows the results measured by the procedure proposed in Figure 2a. The current measured while applying the read pulse was converted to Φ by Equation (1), and ∆Φ was calculated through Equation (2). The results of the potentiation phase are expressed in the red region, and the results of the short-and long-term recovery phases are expressed in the yellow region and the green box, respectively. First, as indicated by the blue arrow in Figure 2b, the decrease in ∆Φ with a steep slope was regarded as the barrier change due to the short-term component that was defined as ∆Φ S0 . ∆Φ S0 is extracted for each V P and can be expressed as a bias function (Equation (6)). Second, τ pS and β pS are extracted by fitting short-term components, as shown in the inset of Figure 2b. Here, two assumptions are made about the short-term component. The first assumption is that τ dS = τ pS and β dS = β pS . The second assumption is that τ dS and β dS are independent of bias and OFR. The change in BH of the short-term component proceeds at least 200 times faster than that of the long-term component. Therefore, it is very difficult to detect the τ and β trend of the short-term component by the bias or process conditions; therefore, the above assumption was made. Third, ∆Φ L0 , τ pL , and β pL are extracted by fitting while fixing ∆Φ S0 , τ pS and β pS in the red region of Figure 2b with Equation (3). Repeating for each V P , ∆Φ L0 (Equation (5)), τ pL (Equation (7)) and β pL can be expressed as a function of bias.
Then, we designed an experimental sequence as shown in Figure 2c to extract the long-term SEF parameter of Equation (4). First, we applied the potentiation pulse of 3 V to the TE for 4 s to sufficiently increase the conductance of the memristor, and then applied a depression pulse. For the depression phase, as shown in the blue box region in Figure 2c, a stress pulse with a magnitude of V N is applied for 40 ms, and then a read pulse is applied for 100 µs with an interval time of 10 µs. The depression and read pulses are continuously applied and this is repeated 100 times.
The result of the above experimental procedure is shown in Figure 2d, and as shown in Figure 2c, the current measured in the read pulse was converted to ∆Φ by Equations (1) and (2). The long-term SEF parameter extraction procedure of Equation (4) is as follows. τ dL and β dL are extracted by fitting (line) the measurement data (scatter) as shown in Figure 2d, with the long-term part of Equation (4). By fitting the entire V N , the parameters τ dL (Equation (8)) and β dL can be expressed as a function of the bias. Figure 3a shows the experimentally revealed relationship between V P , ∆Φ S0 and ∆Φ L0 .
∆Φ S0 and ∆Φ L0 are the BH of the short-and long-term components that can be shifted to the maximum when V TE is V P . It was empirically verified that both ∆Φ S0 and ∆Φ L0 increase exponentially with respect to V P . Conversely, Figure 3b shows the experimentally revealed relationship between τ pL and V P . τ pL is a parameter related to the detrapping time of electrons by the long-term component in the potentiation. It was empirically found that Φ pL decreases exponentially with V P . The higher the voltage applied to TE, the lower the Fermi level at the SiO 2 -IGZO interface, so the concentration of traps where electrons can be detrapped increases. Therefore, the maximum changeable BH (∆Φ S0 and ∆Φ L0 ) increases. Conversely, the probability that V P can cause electron detrapping at the SiO 2 -IGZO interface increases, so τ pL (detrapping time) decreases.
in Figure 2c, the current measured in the read pulse was converted to ΔΦ by Equations (1) and (2). The long-term SEF parameter extraction procedure of Equation (4) is as follows. τdL and βdL are extracted by fitting (line) the measurement data (scatter) as shown in Figure  2d, with the long-term part of Equation (4). By fitting the entire VN, the parameters τdL (Equation (8)) and βdL can be expressed as a function of the bias. Figure 3a shows the experimentally revealed relationship between VP, ΔΦS0 and ΔΦL0.   Figure 3c shows the experimentally revealed relationship between V N and τ dL . τ dL is a parameter related to the electron trapping time by the long-term component in the depression. τ dL was empirically found to increase exponentially with V N . As the voltage applied to the TE increases, the fermi level at the SiO 2 and IGZO interface decreases, so the concentration of trap sites that can trap electrons decreases. Therefore, the time for trapping electrons increases. Figure 3d shows the relationship between β pL , β dL , V P and V N . β pL and β dL are parameters that indicate the rate of change over time of τ pL and τ dL by long-term components during potentiation and depression, respectively. It was experimentally found that β pL and β dL are independent of the bias applied to the TE.
Then, when the parameter extraction process in Figure 2 proceeds for the sample with different OFRs, the DSEF parameter (Equations (3) and (4)) can be expressed as a function of the OFRs. Figure 4 shows the results of the experiments conducted for this purpose. Figure 4a shows the experiment results when the 2.5 V V P is fixed independently of the OFR in the pulse sequence of Figure 2a. The DSEF parameters (∆Φ S0 , ∆Φ L0 , τ pL and β pL ) of Equation (3) were extracted for the different OFRs, and the extraction procedure is the same as that of the method shown in Figure 2b. Similarly, Figure 4b shows the experimental results when V N is −1.5 V regardless of the OFR in the pulse sequence of Figure 2c. The long-term SEF parameters (τ dL and β dL ) of Equation (4) were extracted for the samples with different OFRs by Figure 4b, and the extraction procedure is the same as that in Figure 2d. Figure 5 shows the plots of the parameters with different OFRs for ∆Φ S0 , ∆Φ L0 , τ pL , τ dL , β pL , and β dL extracted from the measurement data of Figure 4. Figure 5a shows ∆Φ S0 and ∆Φ L0 as a function of OFR. Figure 5b,c shows τ pL and τ dL as a function of OFR. Figure 5d shows β pL and β dL as a function of OFR. of the OFR in the pulse sequence of Figure 2a. The DSEF parameters (ΔΦS0, ΔΦL0, τpL and βpL) of Equation (3) were extracted for the different OFRs, and the extraction procedure is the same as that of the method shown in Figure 2b. Similarly, Figure 4b shows the experimental results when VN is −1.5 V regardless of the OFR in the pulse sequence of Figure  2c. The long-term SEF parameters (τdL and βdL) of Equation (4) were extracted for the samples with different OFRs by Figure 4b, and the extraction procedure is the same as that in Figure 2d.  Figure 5 shows the plots of the parameters with different OFRs for ΔΦS0, ΔΦL0, τpL, τdL, βpL, and βdL extracted from the measurement data of Figure 4. Figure 5a shows ΔΦS0 and ΔΦL0 as a function of OFR. Figure 5b,c shows τpL and τdL as a function of OFR. Figure 5d shows βpL and βdL as a function of OFR.  It was experimentally found that ΔΦS0, ΔΦL0 and τpL increase exponentially with increasing OFR, but τpL decreases exponentially as OFR increases. As OFR increases, the traps between IGZO and SiO2 increase. There are two main reasons for this trend. The first is that the roughness of the IGZO-SiO2 interface increases and the trap concentration increases. This could be associated with the short-term component. The second is that, when the OFR increases, the bulk trap inside the IGZO increases because the oxygen peroxide inside the IGZO breaks bonds and acts as an electron trap. This could be related to the long-term component. The long-term switching mechanism could be caused by the charge change due to the reaction between oxygen peroxide and excess oxygen of the BE side IGZO. The excess oxygen is converted into oxygen peroxide for the SET process. Conversely, the oxygen peroxide in converted back into excess oxygen for the RESET process. Therefore, as OFR increases, the trap concentration near SiO2 increases; therefore, ΔΦS0 and ΔΦL0 increase.
During the potentiation operation, the resistance of the switching site in the SiO2 layer gradually decreases, so the actual voltage applied to SiO2 gradually decreases. This It was experimentally found that ∆Φ S0 , ∆Φ L0 and τ pL increase exponentially with increasing OFR, but τ pL decreases exponentially as OFR increases. As OFR increases, the traps between IGZO and SiO 2 increase. There are two main reasons for this trend. The first is that the roughness of the IGZO-SiO 2 interface increases and the trap concentration increases. This could be associated with the short-term component. The second is that, when the OFR increases, the bulk trap inside the IGZO increases because the oxygen peroxide inside the IGZO breaks bonds and acts as an electron trap. This could be related to the long-term component. The long-term switching mechanism could be caused by the charge change due to the reaction between oxygen peroxide and excess oxygen of the BE side IGZO. The excess oxygen is converted into oxygen peroxide for the SET process. Conversely, the oxygen peroxide in converted back into excess oxygen for the RESET process. Therefore, as OFR increases, the trap concentration near SiO 2 increases; therefore, ∆Φ S0 and ∆Φ L0 increase.
During the potentiation operation, the resistance of the switching site in the SiO 2 layer gradually decreases, so the actual voltage applied to SiO 2 gradually decreases. This phenomenon has the effect of lowering τ by rapidly saturating the conductance change of the memristor. The lower the OFR, the more severe the phenomenon in which the voltage applied to the switching site gradually decreases during the potentiation operation. Therefore, the lower the OFR, the lower the τ.
Conversely, for the depression operation, the resistance of the switching site gradually increases, so the voltage actually applied to the SiO 2 gradually increases. This has the effect of increasing τ as it can sustain the change in the conductance of the memristor. The lower the OFR, the higher the voltage applied to the switching place increases during the depression operation, which has the effect of increasing τ. Therefore, the lower the OFR, the higher the τ.
Although β pL increases with increasing OFR, β dL remains constant, however, the cause remains to be discussed further. Therefore, finally, by combining the results of Figures 3 and 5, the correlation between the parameters (including ∆Φ S0 , ∆Φ L0 , τ pL and τ dL ), the bias and OFR can be found. Among them, ∆Φ S0 , ∆Φ L0 , τ pL and τ dL are expressed in Equations (5)- (9). Table 1 includes the initial parameters extracted by OFR. L eff is the effective SiO 2 thickness that determines the thermionic emission. When a voltage is actually applied to the TE, the voltage is distributed between the IGZO and the SiO 2 , however, the current model is designed so that all voltages are applied to the SiO 2 . Therefore, the actual L eff of SiO 2 is determined by the degree of voltage distribution between the IGZO and SiO 2 , and the model is designed so that all voltages are applied to SiO 2 with a thickness of L eff . L eff decreases as the resistance of the IGZO decreases and that of SiO 2 increases. The larger the OFR, the thicker the SiO 2 (as the SiO 2 resistance increases), and so the L eff decreases. Since the concentration of V O 2+ in the IGZO increases as the OFR decreases, the IGZO becomes positively charged as a whole and the initial BH decreases. From the results of Figures 3 and 5, the parameters α VL , α OL, α L , α VS , α OS , α S , γ pVL , γ pOL , γ pL , γ dVL , γ dOL , γ dL , κ pL and κ can be determined ( Table 2, lines 1-4). In addition, the parameters independent of OFR and bias are constant (Table 2, lines 5-8).  The input is the voltage and the output is the current composed by the thermionic emission formula [11]. Additionally, the size of BH is updated at each time step. The maximum value that BH can be modulated by the input voltage is (ΦL0(VTE) + ΦS0(VTE)). If (ΦL0(VTE) + ΦS0(VTE)) is greater than the current change in ΔΦ(t), potentiation is performed. If (ΦL0(VTE) + ΦS0(VTE)) is smaller than the current BH change in ΔΦ(t), depression is executed. This is because the BH must be lower. The potentiation is calculated by Equation (3), and the depression is calculated by Equation (4). If Φ is calculated every time step by the potentiation and depression operation, Φ is finally determined in the thermionic emission equation to calculate the current as output.
To verify that the memristor current mechanism is thermionic emission, the I-V curve in Figure 7a is presented as a relationship between ln(I) versus VTE 1/2 , and ln(I) and VTE 1/2 show a linear relationship which was confirmed in Figure 7b. Here, as shown in Figure 7b, • can be known by the slope of the HRS current line, and Leff can be extracted from this relationship. Moreover, by the point where V = 0, we can know that ln * − Φinit, and from it, we can extract Φinit. Figure 7a shows the I-V characteristics of memristors with different OFRs, and we compare the measurement and simulation results. The I-V curves of the memristors were applied to the TE in a double sweep in 0.1 V steps with the range of −5 V to 5 V, and the compliance current was set to 1 mA. Figure 7a shows that the measurement and simulation results are well matched.

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Output current The input is the voltage and the output is the current composed by the thermionic emission formula [11]. Additionally, the size of BH is updated at each time step. The maximum value that BH can be modulated by the input voltage is (Φ L0 (V TE ) + Φ S0 (V TE )). If (Φ L0 (V TE ) + Φ S0 (V TE )) is greater than the current change in ∆Φ(t), potentiation is performed. If (Φ L0 (V TE ) + Φ S0 (V TE )) is smaller than the current BH change in ∆Φ(t), depression is executed. This is because the BH must be lower. The potentiation is calculated by Equation (3), and the depression is calculated by Equation (4). If Φ is calculated every time step by the potentiation and depression operation, Φ is finally determined in the thermionic emission equation to calculate the current as output.
To verify that the memristor current mechanism is thermionic emission, the I-V curve in Figure 7a is presented as a relationship between ln(I) versus V TE 1/2 , and ln(I) and V TE 1/2 show a linear relationship which was confirmed in Figure 7b. Here, as shown in Figure 7b, q kT · q 4πεL e f f can be known by the slope of the HRS current line, and L eff can be extracted from this relationship. Moreover, by the point where V = 0, we can know that ln AA * T 2 − q kT Φ init , and from it, we can extract Φ init . Figure 7a shows the I-V characteristics of memristors with different OFRs, and we compare the measurement and simulation results. The I-V curves of the memristors were applied to the TE in a double sweep in 0.1 V steps with the range of −5 V to 5 V, and the compliance current was set to 1 mA. Figure 7a shows that the measurement and simulation results are well matched.  Figure 8 shows the potentiation and depression behaviors of the memristors with the different OFRs, and the experimental results and simulations were compared. The potentiation pulse had an amplitude of 3.5 V and a width of 30 ms, and a read pulse with an amplitude of 0.5 V and a width of 100 μs was applied with an interval of 100 μs. After repeating the potentiation pulse and the read pulse 50 times, a depression pulse was applied. The depression pulse was set at -1.5 V amplitude and 30 ms width, and a read pulse was applied under the same conditions as the potentiation. Similarly, the depression and read pulses were repeated 50 times and the experiment was completed. Figure 8b,c show the device results with 2 sccm and 1.5 sccm, respectively. Figure 8d shows the result of the device with 1 sccm, which has a good match. The memristor conductance was determined differently depending on the size and interval of the stimulation pulses. The stronger and longer the stimulus, the closer the memristor conductance is to long-term memory. Conversely, when the stimulus is weaker and shorter, the memristor conductance does not increase, and the conductance increases temporarily and then only decreases at the time of stimulation, acting close to short-term memory.  Figure 8 shows the potentiation and depression behaviors of the memristors with the different OFRs, and the experimental results and simulations were compared. The potentiation pulse had an amplitude of 3.5 V and a width of 30 ms, and a read pulse with an amplitude of 0.5 V and a width of 100 µs was applied with an interval of 100 µs. After repeating the potentiation pulse and the read pulse 50 times, a depression pulse was applied. The depression pulse was set at −1.5 V amplitude and 30 ms width, and a read pulse was applied under the same conditions as the potentiation. Similarly, the depression and read pulses were repeated 50 times and the experiment was completed. Figure 8b,c show the device results with 2 sccm and 1.5 sccm, respectively. Figure 8d shows the result of the device with 1 sccm, which has a good match. The memristor conductance was determined differently depending on the size and interval of the stimulation pulses. The stronger and longer the stimulus, the closer the memristor conductance is to long-term memory. Conversely, when the stimulus is weaker and shorter, the memristor conductance does not increase, and the conductance increases temporarily and then only decreases at the time of stimulation, acting close to short-term memory.
In addition, the memristor model introduced in this paper can reproduce short-and long-term memory behaviors depending on the stimulation conditions. To confirm this, a pulse sequence was designed as shown in Figure 9a. The stimulation pulse is used to increase the conductance of the memristor, and the interval between each stimulation pulse is fixed at 100 ms. In addition, to observe the conductance change in detail up to the short-term component, a read pulse of 0.5 V amplitude β was applied at 0.4 ms intervals. Figure 9b shows the results of dividing the stimulation pulse width (t width ) into 0.1, 1, 4 and 40 ms while keeping the stimulation pulse amplitude (V St ) constant at 4 V. Figure 9c shows the results of dividing the stimulation pulse width (t width ) to 30 ms and the stimulation pulse amplitude (V St ) to 4.5, 4, 3.5 and 3 V. As the stimulus is delivered over a longer period of time, the conductance of the memristor gradually increases and operates close to the long-term memory, and the simulation reproduces the trend well. In addition, the memristor model introduced in this paper can reproduce short-and long-term memory behaviors depending on the stimulation conditions. To confirm this, a pulse sequence was designed as shown in Figure 9a. The stimulation pulse is used to increase the conductance of the memristor, and the interval between each stimulation pulse is fixed at 100 ms. In addition, to observe the conductance change in detail up to the shortterm component, a read pulse of 0.5 V amplitude β was applied at 0.4 ms intervals. Figure  9b shows the results of dividing the stimulation pulse width (twidth) into 0.1, 1, 4 and 40 ms while keeping the stimulation pulse amplitude (VSt) constant at 4 V. Figure 9c shows the results of dividing the stimulation pulse width (twidth) to 30 ms and the stimulation pulse amplitude (VSt) to 4.5, 4, 3.5 and 3 V. As the stimulus is delivered over a longer period of time, the conductance of the memristor gradually increases and operates close to the longterm memory, and the simulation reproduces the trend well.

Conclusions
This paper introduced a compact SPICE model of a two-terminal memory with a Pd/Ti/IGZO/p + -Si structure. The modeling of the SiO2 BH modulation related to the switching operation is the core of this work. We separated the BH modulation into short-

Conclusions
This paper introduced a compact SPICE model of a two-terminal memory with a Pd/Ti/IGZO/p + -Si structure. The modeling of the SiO 2 BH modulation related to the switching operation is the core of this work. We separated the BH modulation into shortand long-term components through potentiation, depression and recovery experiments with very tight pulse intervals. The empirical model for short-and long-term memory was designed by conducting the above experiment for the device with different OFR conditions when biasing. As the magnitude of the potentiation pulse and OFR increases, the maximum value of the BH modulation increases exponentially. Conversely, as the magnitude of the potentiation pulse increases, the potentiation speed increases; however, as the OFR increases, the potentiation speed decreases. As the amplitude of the depression pulse increases and the OFR increases, the depression rate increases. We expect that this model can be useful in optimizing the memristor specifications for short-and long-term memories.