High Pressure Deuterium Passivation of Charge Trapping Layer for Nonvolatile Memory Applications

In this study, the deuterium passivation effect of silicon nitride (Si3N4) on data retention characteristics is investigated in a Metal-Nitride-Oxide-Silicon (MNOS) memory device. To focus on trap passivation in Si3N4 as a charge trapping layer, deuterium (D2) high pressure annealing (HPA) was applied after Si3N4 deposition. Flat band voltage shifts (ΔVFB) in data retention mode were compared by CV measurement after D2 HPA, which shows that the memory window decreases but charge loss in retention mode after program is suppressed. Trap energy distribution based on thermal activated retention model is extracted to compare the trap density of Si3N4. D2 HPA reduces the amount of trap densities in the band gap range of 1.06–1.18 eV. SIMS profiles are used to analyze the D2 profile in Si3N4. The results show that deuterium diffuses into the Si3N4 and exists up to the Si3N4-SiO2 interface region during post-annealing process, which seems to lower the trap density and improve the memory reliability.


Introduction
Although research on ReRAM, MRAM, PCM etc. is being actively conducted for next-generation nonvolatile memories [1,2], the demands for Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) flash memory are still dominant. SONOS memory can obtain large capacity easily and have a simple circuit structure. Due to these advantages, the memory has been continuously developed since its invention, improving its storage capacity and reliability [3]. In SONOS, to optimize the silicon nitride (Si 3 N 4 ) film which is used as charge trapping layer (CTL) of the device is very important for the performance enhancement. Substantial research has been carried out to improve the Si 3 N 4 by varying Si/N ratio during deposition, post-annealing condition, or imbedding nano particles [4][5][6][7][8].
Several works on deuterium (D 2 ) passivation of Si 3 N 4 with high pressure annealing (HPA) has been also reported. In the conventional CMOS transistors, D 2 HPA has been used for the hot carrier reliability [9][10][11]. HPA is known to enhance the deuterium incorporation at the Si/SiO 2 interface, and the deuterium-passivated silicon materials and interfaces are more electrically stable and reliable. In the case of the memory device, Tanaka's group at Toshiba Corporation has reported that the MONOS devices with the memory window increment and improve reliability by applying D 2 treatment in 2002 [12]. With variations in the pressure of D 2 , they show that D 2 annealing can be used to terminate the traps. In 2004-2005, S.M. Choi's group checked the high temperature (900 • C) D 2 annealing effect on the memory device [13,14], and it showed excellent program/erase endurance and a significantly reduced charge loss rate. They focused on D 2 annealing to passivate the interface traps between the tunneling oxide and Si substrate. The decreased interface trap was confirmed by the quasi-static capacitance measurement. In 2016, L. Breuil's group investigated D 2 effect on poly-Si channel with trap passivation at the interface between the ONO layer and the poly-Si channel and in the bulk poly-Si [15]. The D 2 high pressure Micromachines 2021, 12, 1316 2 of 8 annealing has been conducted at the last step of the fabrication process. The results show drive current (I ON ), subthreshold swing (SS) improvement after D 2 annealing, which points to a reduction of the defects at the channel and Si-SiO 2 interface. Threshold voltage (V TH ) is also reduced due to the passivation of negative fixed charges in the ONO stack. However, in this study, retention characteristics seem not to be affected. In 2020, J.M. Yu's group at Korea Advanced Institute of Science and Technology investigated the high-pressure D 2 annealing effects on Gate-All-Around SONOS memory [16]. Maximum transconductance (g m,max ), SS, and I ON were extracted, which were improved after D 2 annealing. The lowfrequency noise (LFN) measurement was used to extract the oxide trap density (D OT ) and it was found that the tunneling oxide-channel interface trap decreases by the trap passivation effect of deuterium annealing.
In this study, D 2 high pressure annealing (HPA) at low temperature is suggested to suppress the shallow trap formation of Si 3 N 4 . Unlike previous research where D 2 annealing is applied after the metallization and the analyses are concentrated on the oxidechannel interface traps, the suggested process is applied before the metal deposition and the passivation effect of the traps in silicon nitride is focused on.
During Si 3 N 4 deposition, stoichiometric Si 3 N 4 is formed and nonstoichiometric bonding would be created. In nonstoichiometric bonding, there may be silicon vacancies and nitrogen vacancies, and some studies found out that the Si-O-N bond caused by oxygen diffusion to nitrogen vacancy makes shallow traps [17,18]. The oxygen ions can migrate from the tunneling oxide. The suggested D 2 passivation is intended to cure the nitrogen vacancies and suppress the trap generation (similar to the oxygen complex bond). If the deuterium ion occupies the vacancy site, Si-O-N bond cannot be formed even though the oxygen ion migrates. Compared with H 2 passivation, D 2 passivation can cure defects more stably because deuterium forms stronger bond than hydrogen [19]. Via passivate shallow traps with D 2 , the memory window can be decreased, but the retention characteristic is expected to improve.
The fabricated devices are programed and then flat band voltage (V FB ) is extracted in retention mode at a high temperature via CV measurement. Based on the experimental results, trap energy distribution of Si 3 N 4 is extracted based on the thermal activated retention model. To find out D 2 profile and bonding formation in Si 3 N 4 , secondary ion mass spectroscopy (SIMS) and Fourier transform infrared spectroscopy (FT-IR) are analyzed. FT-IR spectroscopy is often used to see atomic bonding in materials [20,21] where each atomic bonding absorbs specific wavelength of light. Furthermore, the greatest benefit of FT-IR is its high sensitivity in order to inspect light atoms such as hydrogen and deuterium.

Experiments
A metal-nitride-oxide-silicon structure capacitor was fabricated and Figure 1 shows the process flows. Contrary to the SONOS structure, the blocking oxide is skipped to remove the process effect by blocking oxide deposition, which is also preferable for the direct correlation of electrical characteristics with SIMS profile whose sample is nitride/oxide/Si substrate. With p-type silicon substrate, SiO 2 for tunneling oxide was grown to 7 nm via dry oxidation. Then, the Si 3 N 4 for CTL was deposited via plasma enhanced chemical vapor deposition (PECVD) with a thickness of 15 nm. Next, D 2 high pressure annealing was performed on some samples. D 2 6%/N 2 94% forming gas was used and high-pressure annealing condition was 450 • C, 10 atm. Afterward, post-annealing was done in 600 • C in N 2 ambient. Ti 100 nm was deposited via RF sputter for use as a top and bottom gate. Table 1 shows the experimental conditions. The as-deposited sample functions as a reference, and the D 2 HPA sample and D 2 HPA + post-anneal sample are for testing the temperature effect in D 2 treatment. For the electrical analysis, CV was measured using a Hewlett Packard 4284A precision LCR meter. Programming was completed via same program voltage using Hewlett Packard 41501A pulse generator. The thermal activated retention model is used to extract the trap energy distribution of Si 3 N 4 based on the measurement. Physical analyses were also used to support the experiment results. D 2 is well known for possessing a heavier ion than H 2 , but they both are still very light ions compared with other atoms. Thus, there are not many methods to detect D 2 in the silicon nitride layer. In this study, SIMS and FT-IR were used to find out D 2 profile and bonding formation in the silicon nitride after the annealing process.
Micromachines 2021, 12, x FOR PEER REVIEW 3 of 9 Hewlett Packard 4284A precision LCR meter. Programming was completed via same program voltage using Hewlett Packard 41501A pulse generator. The thermal activated retention model is used to extract the trap energy distribution of Si3N4 based on the measurement. Physical analyses were also used to support the experiment results. D2 is well known for possessing a heavier ion than H2, but they both are still very light ions compared with other atoms. Thus, there are not many methods to detect D2 in the silicon nitride layer. In this study, SIMS and FT-IR were used to find out D2 profile and bonding formation in the silicon nitride after the annealing process.
(a) (b)   Figure 2a shows the I-V measurement results of the fabricated devices and shows similar breakdown properties of NO stack independent of annealing conditions. Figure  2b is the CV measurement results at the initial and program state. The maximum capacitance is determined by the nitride/oxide thickness and the values are observed to be similar in all samples, which indicates that the NO thickness is not changed by the annealing condition. The programming pulse width was 0.1 s, and the magnitude was 20 V for one pulse time. Sweep mode with long integration time was used in 1 MHz frequency. Compared with the reference, the device with D2 HPA shows a decreased memory window and this effect was accelerated in one experiment with additional post-annealing. This seems to be the result of trap curing in Si3N4 bulk and interface [22].  Table 1. Experimental conditions of the post treatment on the silicon nitride, which is performed before the metal deposition.  Figure 2b is the CV measurement results at the initial and program state. The maximum capacitance is determined by the nitride/oxide thickness and the values are observed to be similar in all samples, which indicates that the NO thickness is not changed by the annealing condition. The programming pulse width was 0.1 s, and the magnitude was 20 V for one pulse time. Sweep mode with long integration time was used in 1 MHz frequency. Compared with the reference, the device with D 2 HPA shows a decreased memory window and this effect was accelerated in one experiment with additional post-annealing. This seems to be the result of trap curing in Si 3 N 4 bulk and interface [22].

Retention Characteristics
Retention properties are measured at various temperatures. The flat band voltage (V FB ) decrement was measured with CV measurement in retention mode after programming. The retention characteristic was quantified with the percentage of V FB | decrease by V FB | prgram-initial . As shown in Figure 3a, compared with the reference (which shows a 27.53% V FB decrement), the device subjected to D 2 HPA exhibits slight improvement, with a 21.37% decrement. Then, additional post-anneal activity makes a significant difference in V FB decrease during retention mode. Figure 3b is a comparison result of charge loss amount at various temperatures, which shows that D 2 passivation effects become clearer at higher temperatures. The extracted values are summarized in Table 2.

Retention Characteristics
Retention properties are measured at various temperatures. The flat band voltage (VFB) decrement was measured with CV measurement in retention mode after programming. The retention characteristic was quantified with the percentage of VFB|decrease by VFB|prgram-initial. As shown in Figure 3a, compared with the reference (which shows a 27.53% VFB decrement), the device subjected to D2 HPA exhibits slight improvement, with a 21.37% decrement. Then, additional post-anneal activity makes a significant difference in VFB decrease during retention mode. Figure 3b is a comparison result of charge loss amount at various temperatures, which shows that D2 passivation effects become clearer at higher temperatures. The extracted values are summarized in Table 2.   Here, as-dep is a reference device, and D2 HPA is D2 high pressure annealed device at 450 °C and D2 HPA + Post-anneal is D2 high pressure annealed device with post-anneal at 600 °C.

Retention Characteristics
Retention properties are measured at various temperatures. The flat band voltage (VFB) decrement was measured with CV measurement in retention mode after programming. The retention characteristic was quantified with the percentage of VFB|decrease by VFB|prgram-initial. As shown in Figure 3a, compared with the reference (which shows a 27.53% VFB decrement), the device subjected to D2 HPA exhibits slight improvement, with a 21.37% decrement. Then, additional post-anneal activity makes a significant difference in VFB decrease during retention mode. Figure 3b is a comparison result of charge loss amount at various temperatures, which shows that D2 passivation effects become clearer at higher temperatures. The extracted values are summarized in Table 2.

Trap Energy Level Distribution
Trap energy level of CTL can be extracted by measuring the charge loss through the tunneling oxide. In this experiment, it is assumed that most of the shallow traps are located at or near the interface between Si 3 N 4 and SiO 2 tunneling oxide and the amount of charge loss through the metal gate can be ignored. To extract the trap density in Si 3 N 4 , thermal activated retention model is used like follows [23].
Equation (1) shows the charge decay model in relation to V TH shift according to time at specific temperature. E TA is the energy level expressed like Equation (2). In Equation (3), σ n is the capture cross-section and m* is the effective mass of electron in the silicon nitride. Measurements were conducted at 85 • C. Figure 4a shows the extracted energy distribution of trap in each process condition based on the experimental results of charge loss according to the retention time as shown in Figure 4b. The results show that D 2 passivation reduces the amount of trap densities in the band gap range of 1.06 eV~1.18 eV, and this suppression seems to be reinforced with post-annealing. This result explains the program window reduction in D 2 HPA, as mentioned before.

Trap Energy Level Distribution
Trap energy level of CTL can be extracted by measuring the charge loss through the tunneling oxide. In this experiment, it is assumed that most of the shallow traps are located at or near the interface between Si3N4 and SiO2 tunneling oxide and the amount of charge loss through the metal gate can be ignored. To extract the trap density in Si3N4, thermal activated retention model is used like follows [23].
Equation (1) shows the charge decay model in relation to VTH shift according to time at specific temperature. ETA is the energy level expressed like Equation (2). In Equation (3), σn is the capture cross-section and m* is the effective mass of electron in the silicon nitride.
Measurements were conducted at 85 °C. Figure 4a shows the extracted energy distribution of trap in each process condition based on the experimental results of charge loss according to the retention time as shown in Figure 4b. The results show that D2 passivation reduces the amount of trap densities in the band gap range of 1.06 eV~1.18 eV, and this suppression seems to be reinforced with post-annealing. This result explains the program window reduction in D2 HPA, as mentioned before.

Secondary Ion Mass Spectroscopy
SIMS can be used to find out the D 2 profile in Si 3 N 4 [24,25]. The selected elements Si, O, N, D, and depth profiles were obtained with a commercial SIMS instrument (CAMECA IMS 7f). The primary ions were 6 keV Cs + at 10 nA and raster into a 250 µm × 250 µm with a detected area of 63 µm in diameter. Figure 5 shows the SIMS profile results for as-deposited silicon nitride and D 2 passivated Si 3 N 4 , including the post-anneal process. As-deposited Si 3 N 4 has a negligible quantity of deuterium, but in the sample treated with D 2 high pressure annealing, it can be seen that deuterium exists from the surface side. Furthermore, with additional post-annealing, it was confirmed that deuterium diffuses into the Si 3 N 4 and exists up to the Si 3 N 4 -SiO 2 tunneling oxide interface region. It is possible that deuterium can be dissociated during the post-annealing period, but the SIMS results indicate that deuterium affects silicon nitride property during N 2 600 • C anneal. That is, even if some injected deuterium could dissociate and diffuse out to air at 600 • C, some could diffuse into the layer and form bondage with Si and N atoms. Furthermore, previous research had conducted D 2 high pressure annealing even at 900 • C [12]. This result supports our theory as why V FB in the initial state is shifted to the left and the memory window decreases.
high pressure annealing, it can be seen that deuterium exists from the surface side. Furthermore, with additional post-annealing, it was confirmed that deuterium diffuses into the Si3N4 and exists up to the Si3N4-SiO2 tunneling oxide interface region. It is possible that deuterium can be dissociated during the post-annealing period, but the SIMS results indicate that deuterium affects silicon nitride property during N2 600 °C anneal. That is, even if some injected deuterium could dissociate and diffuse out to air at 600 °C, some could diffuse into the layer and form bondage with Si and N atoms. Furthermore, previous research had conducted D2 high pressure annealing even at 900 °C [12]. This result supports our theory as why VFB in the initial state is shifted to the left and the memory window decreases.

Fourier Transform InfraRed Spectroscopy
To analyze the change in atomic bonding in Si 3 N 4 , it is needed to detect the deuterium bonding. In FT-IR, each bonding absorbs specific wavelength of Infrared light and the results don't affect each other. The analysis can be employed for detecting and determining bond densities of light atoms such as H 2 or D 2 . In 2008, G. Scardera investigated high temperature annealing effect on silicon-rich silicon nitride films using FT-IR spectroscopy [20]. Si-H bonding is detected by FT-IR measurement, allowing for investigation of changes in bonding ratio after annealing process. In 1995, Z. Lu's group also used FT-IR spectroscopy to check the RTA effect on a-Si:N:H(D) films, where Si-H and Si-N-H bonds are detected and Si-D and Si-N-D peaks are also detected [21].
In this experiment, FT-IR spectroscopy is applied to find out the D 2 passivation effect on silicon nitride bonding structure. Figure 6 shows the results of FT-IR spectroscopy on Si 3 N 4 with D 2 passivation. A Thermo-Nicolet 5700 FT-IR spectrometer was used. With reference to previous studies, the range of the SiN-D peak is around 2400 cm −1 . As shown in Figure 6, the sample with D 2 HPA with 600 • C annealing shows slightly increased absorbance in the rage of 2375 cm −1 . Considering the difficulty of detecting the light atoms (such as H 2 or D 2 ), more precise physical method should be studied.
In this experiment, FT-IR spectroscopy is applied to find out the D2 passivation effect on silicon nitride bonding structure. Figure 6 shows the results of FT-IR spectroscopy on Si3N4 with D2 passivation. A Thermo-Nicolet 5700 FT-IR spectrometer was used. With reference to previous studies, the range of the SiN-D peak is around 2400 cm −1 . As shown in Figure 6, the sample with D2 HPA with 600 °C annealing shows slightly increased absorbance in the rage of 2375 cm −1 . Considering the difficulty of detecting the light atoms (such as H2 or D2), more precise physical method should be studied.

Conclusions
In this study, the effects of D2 HPA on Si3N4 are investigated in MNOS-type flash memory device. To focus on silicon nitride's trap control, D2 passivation is conducted directly on Si3N4 films before metal deposition. The results show the memory window decreased after D2 passivation, but the charge loss in retention mode after the program is suppressed, which becomes clearer as temperature increases. The D2 passivation effect seems to be reinforced with post-annealing. Trap energy distribution based on the thermal activated retention model is also extracted to compare the trap density. The results show that D2 passivation reduces the amount of trap densities in the band gap range of 1.06 eV-1.18 eV. SIMS and FT-IR spectroscopy are also applied to find out the deuterium profile and bond structure in Si3N4. SIMS results show that deuterium diffuses into the Si3N4 and exists up to the Si3N4-SiO2 tunneling oxide interface region, which demonstrates the possibility of the deuterium passivation of shallow traps near Si3N4 and SiO2 interface.

Conclusions
In this study, the effects of D 2 HPA on Si 3 N 4 are investigated in MNOS-type flash memory device. To focus on silicon nitride's trap control, D 2 passivation is conducted directly on Si 3 N 4 films before metal deposition. The results show the memory window decreased after D 2 passivation, but the charge loss in retention mode after the program is suppressed, which becomes clearer as temperature increases. The D 2 passivation effect seems to be reinforced with post-annealing. Trap energy distribution based on the thermal activated retention model is also extracted to compare the trap density. The results show that D 2 passivation reduces the amount of trap densities in the band gap range of 1.06 eV-1.18 eV. SIMS and FT-IR spectroscopy are also applied to find out the deuterium profile and bond structure in Si 3 N 4 . SIMS results show that deuterium diffuses into the Si 3 N 4 and exists up to the Si 3 N 4 -SiO 2 tunneling oxide interface region, which demonstrates the possibility of the deuterium passivation of shallow traps near Si 3 N 4 and SiO 2 interface.