Experimentation of Multi-Input Single-Output Z-Source Isolated DC–DC Converter-Fed Grid-Connected Inverter with Sliding Mode Controller

: Converting devices are quickly becoming the most important part of renewable energy-producing systems that are linked to the grid. Applications that are linked to the grid are the most common place to find usage for two-port power converters that are built using single-input and single-output (SISO) ports. The incorporation of SISO power converters into the grid-connected hybrid system results in an increase in both its size and its cost. Multiple power sources may be connected to a single DC bus by means of hybrid power systems, which make use of multi-input power converters. To combine the hybrid wind and PV system with a common DC bus, this study suggests an isolated multi-input single-output (IMISO) Z-Source converter. It has been determined that the suggested system performs well in spite of dynamic load fluctuations and shifting input voltage circumstances. The sliding mode controller (SMC) has also been used to control a single-phase five-level (SPFL) inverter. The purpose of developing the laboratory prototype model was to verify the proposed IMISO Z-source converter-fed single-phase five-level (SPFL) inverter in the context of the circumstance that is being investigated.


Introduction
The ever-increasing need for electricity may be traced back to a variety of sources, including population growth, industrial output, the construction of more commercial buildings, and the development of the IT sector.According to the current scenario, 70% of the world's energy demand is met using power plants that are fueled by fossil fuels [1].Fossil fuel combustion hastens global warming and the greenhouse effect [2].A renewable power generation system (RPGS) is the best alternative strategy for mitigating the effects of global warming and greenhouse emissions.In the realm of renewable energy, photovoltaic (PV) and wind sources play a significant role because they are the most accessible, adaptable, and efficient energy sources, and have the potential to solve a significant number of global energy and environmental problems [3,4].As of July 2023, renewable energy sources, including large hydropower, had a combined installed capacity of 179.322GW.This installed capacity for renewables is as follows: wind power: 42.8 GW; solar power: 67.07 GW; biomass/co-generation: 10.2 GW; small hydro power: 4.94 GW; waste to energy: 0.55 GW; and large hydro: 46.85 GW [5].When used on a large scale, the hybrid wind-photovoltaic power-generating system has a number of technological challenges that must be overcome.One of these problems is connecting many renewable power sources to a single DC bus.In the typical hybrid layout, many power converters are used to link various power supplies to a DC bus.This causes a loss of efficiency in the conversion process, a massive rise in volume, and higher overall expenses [5].Over the course of the past several decades, numerous academics and engineers have worked to advance the state-of-the-art power electronic converters.There is a continuing need for novel approaches and architectures [6] because of the possibility that doing so will improve the robustness and performance of the conversion system while decreasing its price, size, and weight.To boost a low and fluctuating input voltage, a Z-source converter is often used, since this is the most tried and tested method.In 2002, Peng created the first Z-source converter (ZSC), which aimed to overcome some of the restrictions of conventional power electronics converters.In order to implement this concept as a DC-DC converter, the newly introduced Z-source impedance network must be short-circuited at each switching point according to a predetermined duty ratio.The converter would not work without this, so it must be present.The fundamentals of operation are otherwise unaffected; all that has changed is the use of a different converter bridge in the back to facilitate DC-DC transformations.Only this one thing has changed significantly.
The series Z-source network [7] was designed to increase the output voltage of power electronic inverters by extending the well-known concept of the Z-source DC connection.To achieve this, the notion of the Z-source DC connection was developed further.The buck and boost functionalities are provided by a new transformer-isolated DC-DC converter with a distributed impedance-source network [8].This device is used to switch from DC-DC power sources.The distributed impedance source network DC-DC converter is a one-of-akind because it may be open and short-circuited without harming the switching devices, unlike conventional V-source or I-source converters.These capabilities are exclusive to this kind of converter.For grid-connected solar power systems, switching Z-source or quasi-Z-source DC-DC converters are recommended [9].In contrast to conventional matrix converters, Z-source matrix converters (ZSMCs) may perform buck and boost operations with a reduced switch count [10], freeing them from the voltage gain limitation.A Z-source converter with a linked transformer and high boost gain has been developed for this purpose.Any increase in the transformer's turn ratio also results in a better gain factor.A topology formed by a moderate transformer turn ratio is more realistically relevant for specific voltage improvements [11].The converter is simple to design, and less money is spent on its manufacturing as a consequence.High step-up DC-DC converters are required in photovoltaic applications to boost the low-source voltages to a specified grid voltage.The goal of this project was to create a hybrid Z-source boost DC-DC converter that could be used in solar systems.
Hybrid topologies that combine several types of current Z-source networks may increase the boost capabilities of the traditional Z-source networks [12].The Z-source network is combined with other networks in the converter's hybrid design.This is necessary due to the fact that standard Z-source network boost capabilities are inadequate for the task at hand.An isolated bidirectional DC-DC converter, or qZIBDC, based on a quasi-Z source has been developed for use in systems that make use of renewable energy.This converter is bidirectional, meaning it may change a direct current to another kind of direct current.The dual active bridge circuit used in the converter allows it to function as both a buck and a boost converter, depending on the perspective [13].The converter is able to do this because of the usage of a pair of active bridges.A new generation of Z-source DC-DC converters has been developed to provide higher voltage pumping and a high power density [14].Three distinct topologies for Z-source DC-DC boost converters using switched capacitors have been developed to maximize the boost factor [15].The suggested converter design has a number of advantages over other topologies, including those listed below: 1.
The notion of a Z-Source converter is presented with the suggested multi-port converter in order to give a larger boost factor than the standard Z-source boost converter.This is done in order to meet the requirements set out by the IEEE.It is beneficial to provide a stronger boost factor while maintaining an extremely low duty ratio.

2.
The architecture that was suggested may be expanded to incorporate an N-number of additional input sources using a centralized DC bus.It dispenses with the requirement for a number-independent DC-DC converter to be utilized.It contributes to a rise in the conversion efficiency, which in turn serves to minimize the system's total cost.

3.
Isolation between the input and output is achieved in the proposed converter by virtue of its design, which incorporates an isolation transformer.
A common configuration for a standard Z-source converter with two outputs is shown in Figure 1.A diode, a switch, and an impedance network make up this kind of converter [16].
beneficial to provide a stronger boost factor while maintaining an extremely low duty ratio.2. The architecture that was suggested may be expanded to incorporate an N-number of additional input sources using a centralized DC bus.It dispenses with the requirement for a number-independent DC-DC converter to be utilized.It contributes to a rise in the conversion efficiency, which in turn serves to minimize the system's total cost.3. Isolation between the input and output is achieved in the proposed converter by virtue of its design, which incorporates an isolation transformer.
A common configuration for a standard Z-source converter with two outputs is shown in Figure 1.A diode, a switch, and an impedance network make up this kind of converter [16].Figure 2 is an illustration of the usual interleaved-boost full-bridge three-port converter-supplied gird-connected single-phase inverter [17].In order to implement the proposed isolated multi-input single-output (IMISO) isolated Z-source DC-DC converter depicted in Figure 3, this component is put to use.  Figure 2 is an illustration of the usual interleaved-boost full-bridge three-port convertersupplied gird-connected single-phase inverter [17].In order to implement the proposed isolated multi-input single-output (IMISO) isolated Z-source DC-DC converter depicted in Figure 3, this component is put to use.
beneficial to provide a stronger boost factor while maintaining an extremely low duty ratio.2. The architecture that was suggested may be expanded to incorporate an N-number of additional input sources using a centralized DC bus.It dispenses with the requirement for a number-independent DC-DC converter to be utilized.It contributes to a rise in the conversion efficiency, which in turn serves to minimize the system's total cost.3. Isolation between the input and output is achieved in the proposed converter by virtue of its design, which incorporates an isolation transformer.
A common configuration for a standard Z-source converter with two outputs is shown in Figure 1.A diode, a switch, and an impedance network make up this kind of converter [16].Figure 2 is an illustration of the usual interleaved-boost full-bridge three-port converter-supplied gird-connected single-phase inverter [17].In order to implement the proposed isolated multi-input single-output (IMISO) isolated Z-source DC-DC converter depicted in Figure 3, this component is put to use.Conventional topologies, such as those shown in Figures 1 and 2, have limited voltage gain and need a large step-up high-frequency transformer; this was discovered during research into the Z-Source and interleaved DC-DC converter topologies.This research aims to develop a novel and efficient isolated multi-input single-output (IMISO) Z-source DC-DC converter for combining several energy sources into a single DC bus.This paper dissects and analyzes in depth the architecture, modes of operation, and implementation of a single-phase five-level (SPFL) inverter based on the IMISO Z-source converter.The dynamic behavior of the proposed design is tested and verified by constructing a software and hardware model of the 1500 W, 230 V, 50 Hz system.Both the modeling and experimental findings demonstrated that the IMISO Z-source converter-based single-phase fivelevel (SPFL) inverter controlled using the sliding mode controller (SMC) provided be er performance.

System Description and Modes of Operation
Figure 3 depicts the proposed grid-connected hybrid PV-wind system, which utilizes an isolated multi-input single-output (IMISO) Z-source converter-fed single-phase fivelevel (SPFL) inverter.It consists of a single-phase five-level (SPFL) inverter, a voltage doubler rectifier, a multi-input high-frequency transformer, and two impedance networks.Connecting the different renewable energy sources to the DC bus was made easier with the help of the high-frequency multi-input transformer.Using high-frequency transformers with two windings increases the physical footprint and financial commitment of the system.The DC-DC converter's price and size were reduced by using a high-frequency transformer with many inputs.The proposed converter has similarities with both Zsource converters and active interleaved flybacks in that it offers benefits to the user.The proposed converter has the ability to amplify the inputs separately to provide the necessary boost factor.

Positive Half-Cycle Operation of the proposed IMISO Z-Source Converter
In Figure 4a, Sa2, S2, and S6 are turned on at t0, and the inductors La1 and La2 in the impedance network, as well as the input source Vpv, charge the capacitors Ca1 and Ca2.The input voltage Vpv is added to the voltages across inductors La1 and La2 in the impedance network to arrive at the voltage across the transformer primary, Vp1.The capacitor C2 is charged using the secondary of the transformer through diode D4, while the voltage across

System Description and Modes of Operation
Figure 3 depicts the proposed grid-connected hybrid PV-wind system, which utilizes an isolated multi-input single-output (IMISO) Z-source converter-fed single-phase fivelevel (SPFL) inverter.It consists of a single-phase five-level (SPFL) inverter, a voltage doubler rectifier, a multi-input high-frequency transformer, and two impedance networks.Connecting the different renewable energy sources to the DC bus was made easier with the help of the high-frequency multi-input transformer.Using high-frequency transformers with two windings increases the physical footprint and financial commitment of the system.The DC-DC converter's price and size were reduced by using a high-frequency transformer with many inputs.The proposed converter has similarities with both Z-source converters and active interleaved flybacks in that it offers benefits to the user.The proposed converter has the ability to amplify the inputs separately to provide the necessary boost factor.

Positive Half-Cycle Operation of the Proposed IMISO Z-Source Converter
In Figure 4a, S a2 , S 2 , and S 6 are turned on at t 0 , and the inductors L a1 and L a2 in the impedance network, as well as the input source V pv , charge the capacitors C a1 and C a2 .The input voltage V pv is added to the voltages across inductors L a1 and L a2 in the impedance network to arrive at the voltage across the transformer primary, V p1 .The capacitor C 2 is charged using the secondary of the transformer through diode D 4 , while the voltage across the transformer V p2 is clamped at zero during this period.The SPFL inverter's output voltage, V inv , determines the drain slope of the capacitor C 5 .To calculate the voltage across the capacitors in the impedance network, we used the following formula: (1)    The voltage across the impedance network inductors can be expressed as follows: The voltage equations of the transformer and SPFL inverter are expressed as follows: ( ) 3 During the second subinterval, represented by [t1-t2] in Figure 4b, switches Sa1, S2, and S5 all conduct simultaneously.Therefore, at this moment, Lb1 and Lb2 are being discharged while La1 and La2 are being charged.Since this is a multiple of n and the total input voltage of primary 2, C1 is charged with n(Vwind + VLb1 + VLb2).The current through the secondary of the transformer flows negatively, as illustrated in Figure 4b.The slope used to discharge capacitors C4 and C5 is calculated from the voltage at the SPFL inverter's output.In its default configuration, the SPFL inverter circuit outputs +2Vdc/2 at its terminals.To calculate the voltage across the capacitors in the impedance network, we used the following formula: The voltage across the impedance network inductors can be expressed as follows: The voltage equations of the transformer and SPFL inverter are expressed as follows: During the second subinterval, represented by [t 1 -t 2 ] in Figure 4b, switches S a1 , S 2 , and S 5 all conduct simultaneously.Therefore, at this moment, L b1 and L b2 are being discharged while L a1 and L a2 are being charged.Since this is a multiple of n and the total input voltage of primary 2, C 1 is charged with n(V wind + V Lb1 + V Lb2 ).The current through the secondary of the transformer flows negatively, as illustrated in Figure 4b.The slope used to discharge capacitors C 4 and C 5 is calculated from the voltage at the SPFL inverter's output.In its default configuration, the SPFL inverter circuit outputs +2V dc /2 at its terminals.To calculate the voltage across the capacitors in the impedance network, we used the following formula: The voltage across the impedance network inductors can be expressed as follows: The voltage equations of the transformer and SPFL inverter are expressed as As can be seen in Figure 4c, the impedance network inductors L a1 , L a2 , L b1 , and L b2 will remain charged during the whole subinterval [t 2 -t 3 ], right up until S a1 and S a2 are disabled.At the same time, the electrostatic charge in capacitors C 1 and C 2 is completely discharged.Capacitors C 3 , C 4 , and C 5 are charged by capacitors C 1 and C 2 , and then provide electricity to the AC load/grid.The terminals of the SPFL inverter are set up for a +V dc reading, as determined using the inverter's circuit.The following formulas represent the voltage measured across the inductors of an impedance network.Table 1.Switching pa ern for positive half cycle of operation.
The input source Vpv and the impedance network's inductors La1 and La2 charge the capacitors Ca1 and Ca2 when the switches Sa2, S3, and S5 are activated at time t0 as presented in Figure 6a.The voltages measured across the impedance network inductors La1 and La2 are added to obtain the voltage across the primary of the transformer.The Vp2 or voltage

Negative Half-Cycle Operation of IMISO Z-Source Converter
The input source V pv and the impedance network's inductors L a1 and L a2 charge the capacitors C a1 and C a2 when the switches S a2 , S 3 , and S 5 are activated at time t 0 as presented in Figure 6a.The voltages measured across the impedance network inductors L a1 and L a2 are added to obtain the voltage across the primary of the transformer.The V p2 or voltage across the transformer is kept constant at 0 V throughout this period.Capacitor C 2 is charged to a magnitude of nV sec through the secondary winding of the transformer via diode D 4 .The SPFL inverter's output voltage V inv determines the value of the drain of the capacitor C 3 .The voltage across the IMISO Z-source converter's components may be expressed using a similar subinterval 1 to that which is described in Section 2.1.The output of the SPFL inverter may be modeled as The second subinterval is shown in Figure 6b, and it includes the conducting states of switches S a1 , S 3 , and S 6 across the time interval [t 1 -t 2 ].Thus, L b1 and L b2 are being discharged at the moment when L a1 and L a2 are being charged.To the power of n(V wind + V Lb1 + V Lb2 ), C 1 is negatively charged.
Negative current flows through the secondary of the transformer, as shown in Figure 6b.The discharge slope of capacitors C 2 and C 3 is calculated using the SPFL inverter's output voltage.The terminals of the SPFL inverter circuit are set up to provide the output voltage in Equation (21).
As can be seen in Figure 6c, until S a1 and S a2 are turned off at t 3 , the impedance network inductors L a1 , L a2 , L b1 , and L b2 will continue to be charged during the whole subinterval [t 2 -t 3 ].At the same moment, the electrostatic charges in capacitors C 1 and C 2 are discharged to zero.Capacitors C 3 , C 4 , and C 5 are charged by capacitors C 1 and C 2 , and they then feed power into the AC load and grid.The SPFL inverter circuit is wired in a manner that allows −V dc to be read from the terminals when the device is functioning.The following expressions may be used to represent the inverter voltage.
In Figures 6 and 7, the circuits and the essential waveforms of operation that are associated with the negative half cycle are shown.Subintervals 4 and 5 are similar to subintervals 1 and 2, with the exception being the SPFL inverter.During the subinterval from t 3 to t 4 , the SPFL inverter switches S 3 and S 6 are activated to allow the output to be set to −2V dc /3.During the time period t 4 -t 5 , the SPFL inverter switches S 3 and S 5 are activated, leading to a −V dc /3 output.The gate pulses, transformer waveforms, and SPFL output for the next five periods are shown in Figure 7.The SPFL inverter's negative half-cycle output is reflected in Table 2, which shows the corresponding switching configuration.The table below shows the multiple subintervals that make up the SPFL inverter's output voltage.(e) Fifth interval of a negative half cycle  3 As can be seen in Figure 6c, until Sa1 and Sa2 are turned off at t3, the impedance network inductors La1, La2, Lb1, and Lb2 will continue to be charged during the whole subinterval [t2-t3].At the same moment, the electrostatic charges in capacitors C1 and C2 are discharged to zero.Capacitors C3, C4, and C5 are charged by capacitors C1 and C2, and they then feed power into the AC load and grid.The SPFL inverter circuit is wired in a manner that allows −Vdc to be read from the terminals when the device is functioning.The following expressions may be used to represent the inverter voltage.
In Figures 6 and 7, the circuits and the essential waveforms of operation that are associated with the negative half cycle are shown.Subintervals 4 and 5 are similar to subintervals 1 and 2, with the exception being the SPFL inverter.During the subinterval from t3 to t4, the SPFL inverter switches S3 and S6 are activated to allow the output to be set to −2Vdc/3.During the time period t4-t5, the SPFL inverter switches S3 and S5 are activated, leading to a −Vdc/3 output.The gate pulses, transformer waveforms, and SPFL output for the next five periods are shown in Figure 7.The SPFL inverter's negative half-cycle output is reflected in Table 2, which shows the corresponding switching configuration.The table below shows the multiple subintervals that make up the SPFL inverter's output voltage.Table 2. Switching pa ern corresponds to the negative half-cycle of output.

Voltage Gain and Duty Ratio Relation
The following simplifications were made during the steady-state examination of the proposed converter to aid in comprehension.All components, including the power switches Sa1 and Sa2, diodes, load resistors, inductors, and capacitors, were in good working order; thus, the parasitic impact was disregarded.The quasi-Z-source network makes it such that La1 = La2 = Lb1 = Lb2 and Ca1 = Ca2 = Ca3 = Ca4 are all deemed to have the same value.In continuous conduction mode, the IMISO converter may operate in two distinct modes, shown by the analogous circuits in Figures 4 and 6.In the analogous circuits of the various modes, the diodes Da1, Da2, Da3, and Da4 are all shown to be off while the switches Sa1 and Sa2 are both on.The steady-state equations VLa1 = Vpv + VCa2, VLa2 = Vpv + VCa1, and Vp = Vpv + VLa1 + VLa2 may be derived from Kirchoff's voltage law.From Figure 4, it is clear that when Sa1 and Sa2 are turned off, Da1 and Db1 are activated, Da2 and Db2 become reverse blockers, La1 charges Ca2, La2 charges Ca1, and Vpv and La1 are linked in series with La2 to feed the charges to primary 1 of the transformer.Capacitors C1 and C2 receive electricity from the secondary.This leads us to the following set of equations:

Voltage Gain and Duty Ratio Relation
The following simplifications were made during the steady-state examination of the proposed converter to aid in comprehension.All components, including the power switches S a1 and S a2 , diodes, load resistors, inductors, and capacitors, were in good working order; thus, the parasitic impact was disregarded.The quasi-Z-source network makes it such that L a1 = L a2 = L b1 = L b2 and C a1 = C a2 = C a3 = C a4 are all deemed to have the same value.In continuous conduction mode, the IMISO converter may operate in two distinct modes, shown by the analogous circuits in Figures 4 and 6.In the analogous circuits of the various modes, the diodes D a1 , D a2 , D a3 , and D a4 are all shown to be off while the switches S a1 and S a2 are both on.The steady-state equations V La1 = V pv + V Ca2 , V La2 = V pv + V Ca1 , and V p = V pv + V La1 + V La2 may be derived from Kirchoff's voltage law.From Figure 4, it is clear that when S a1 and S a2 are turned off, D a1 and D b1 are activated, D a2 and D b2 become reverse blockers, L a1 charges C a2 , L a2 charges C a1 , and V pv and L a1 are linked in series with L a2 to feed the charges to primary 1 of the transformer.Capacitors C 1 and C 2 receive electricity from the secondary.This leads us to the following set of equations: The input voltage of the primaries of the transformer may be calculated using Equations ( 25) and (26).
The output voltage of the proposed IMISO Z-source converter can be expressed as presented in Equation ( 28), where D sax is the duty ratio of S a1 or S a2 , V p1 is the primary 1 voltage, V p2 is the primary 2 voltage, V sec is the secondary voltage, D sa1 is the duty ratio of S a1 , and D sa2 is the duty ratio of S a2 .
The voltage gain (Vgain) of the proposed IMISO Z-source converter can be expressed as presented in Equation (29).

Control Schemes of the Proposed Hybrid PV-Wind System
The provision of a controlled and regulated AC voltage to the utility grid is the primary objective of an SPFL inverter that is linked to the utility grid.In addition to this, it is in charge of ensuring that the grid and the SPFL inverter remain in synchronization with one another.For the purpose of carrying out the regulating action against the flow of power, two control loops were constructed.These loops were designed so that the DC bus voltage could be regulated, and the inverter could be synchronized with the grid.The first is an internal voltage control loop, and the second is a PI controller-based synchronous reference frame (SRF) theory with a hysteresis band pulse generator.Both of these are considered to be integral parts of the system.

Control Strategy of IMISO Z-Source Converter
The malfunction of linked loads is brought on by fluctuations in the DC-bus voltage of a grid-connected inverter.To solve this particular issue, a more conventional kind of controller known as the inner voltage control loop with PI controller is utilized in order to maintain a consistent DC-link voltage.Gains for the PI controller may be determined based on the step responsiveness of the transfer function.Figure 8 depicts the closed-loop control system with the PI controller used for the generation of gate pulses for the IMISO Z-source converter.When the voltage of the DC-link feedback circuit V dc is compared to the voltage of the reference circuit V dc* , an error voltage V e is produced.In order to correct the erroneous signal, that error voltage is sent into the PI controller.The PI controller is responsible for issuing a duty cycle order to the gate pulse generator, which in turn supplies pulses to the switches Q a1 , Q a2 , Q a3 , and Q a4 .The proper functioning of the controller is essential to achieving the desired results in terms of both the performance and the output regulation of the converters.The overall control functions are as follows:

Sliding Mode Controller (SMC) for SPFL Inverter
A sliding mode controller (SMC) is a nonlinear control method that alters the dynamics of a nonlinear system.The control rule based on state feedback breaks the continuity of time.Instead, it may transition between several continuous structures depending on its location in the state space.Therefore, the SMC is a means of controlling a changeable structure.In order to ensure that the final trajectory does not reside only inside one control structure, many control structures are built such that the trajectories always travel towards an adjacent area with a different control structure.Instead, it will creep around the periphery of the regulatory mechanisms.The SMC consists of a state-feedback discontinuous control rule that rapidly transitions between several continuous structures depending on the values of the state variables at any given moment.The goal is to ensure that the manipulated system's dynamics take the form that was described previously.The ON-OFF behavior of power switches makes the SMC especially intriguing because of its recognized resilience and system order reduction.A hysteresis band SMC is simple to implement since it does not need any extra calculations or ancillary circuitries.When using a hysteresis modulation-based SMC, there are essentially three ways to maintain a constant switching frequency.The design of this SMC first takes into account the sliding surface that will be used and then the control law which is used to drive the state of the system onto the chosen sliding surface.The hysteresis modulation approach is used to create the gate signals.The sliding mode controller (SMC) with hysteresis modulation is presented in Figure 9.The proper functioning of the controller is essential to achieving the desired results in terms of both the performance and the output regulation of the converters.The overall control functions are as follows:

Sliding Mode Controller (SMC) for SPFL Inverter
A sliding mode controller (SMC) is a nonlinear control method that alters the dynamics of a nonlinear system.The control rule based on state feedback breaks the continuity of time.Instead, it may transition between several continuous structures depending on its location in the state space.Therefore, the SMC is a means of controlling a changeable structure.In order to ensure that the final trajectory does not reside only inside one control structure, many control structures are built such that the trajectories always travel towards an adjacent area with a different control structure.Instead, it will creep around the periphery of the regulatory mechanisms.The SMC consists of a state-feedback discontinuous control rule that rapidly transitions between several continuous structures depending on the values of the state variables at any given moment.The goal is to ensure that the manipulated system's dynamics take the form that was described previously.The ON-OFF behavior of power switches makes the SMC especially intriguing because of its recognized resilience and system order reduction.A hysteresis band SMC is simple to implement since it does not need any extra calculations or ancillary circuitries.When using a hysteresis modulationbased SMC, there are essentially three ways to maintain a constant switching frequency.The design of this SMC first takes into account the sliding surface that will be used and then the control law which is used to drive the state of the system onto the chosen sliding surface.The hysteresis modulation approach is used to create the gate signals.The sliding mode controller (SMC) with hysteresis modulation is presented in Figure 9.
In this configuration, the inverter is controlled using bipolar modulation, and its output may take on one of two possible levels: −1 or +1.In each interval, two switches are activated, while the other four switches will remain in their off positions.If the switching frequency is denoted by f sw , then the switching loss experienced during each on-off cycle will be proportional to f sw and can be calculated using the formula P inv = kf sw .A variable structure control, denoted by the letter u, is defined as where V d * represents the amount of deviation that exists between the actual value of the state variable and the reference that corresponds to it.An error voltage V d* is generated as a result of a comparison between the voltage of the DC-link Vdc and the reference voltage V dc* .The SMC criteria are satisfied whenever S k crosses the switching surface.The dq to a conversion block process the I d* and I q* and convert the inputs into I a .The reference wave I a* , obtained from the grid current I g , is processed through a product block to generate the V c .The equation used for the conversion of I g into I d and I q is presented in Equation (32).
Equations ( 33) and (34) may be used to represent the real and imaginary components of the grid current, respectively.
To create the time-locked gate pulses for the SPFL inverter, a hysteresis band pulse generator is utilized.The gate pulse generation through the hysteresis band pulse generator is illustrated in Figure 10.In this configuration, the inverter is controlled using bipolar modulation, and its output may take on one of two possible levels: −1 or +1.In each interval, two switches are activated, while the other four switches will remain in their off positions.If the switching frequency is denoted by fsw, then the switching loss experienced during each on-off cycle will be proportional to fsw and can be calculated using the formula Pinv = kfsw.A variable structure control, denoted by the le er u, is defined as where Vd* represents the amount of deviation that exists between the actual value of the state variable and the reference that corresponds to it.An error voltage Vd* is generated as a result of a comparison between the voltage of the DC-link Vdc and the reference voltage Vdc*.The SMC criteria are satisfied whenever Sk crosses the switching surface.The dq to a conversion block process the Id* and Iq* and convert the inputs into Ia.The reference wave Ia*, obtained from the grid current Ig, is processed through a product block to generate the Vc.The equation used for the conversion of Ig into Id and Iq is presented in Equation (32).

Results and Discussion
This section describes the experimental findings of a scaled down model with the specifications of 1500 W, 230 V (RMS), and 50 Hz.The purpose of this model was to investigate the possible benefits and downsides of the IMISO-Z source converter-fed SPFL inverter that was described before.The findings of the scaled-down model will be reported, which will allow us to fulfil this goal.During the process of carrying out the evaluation, several aspects, such as the boost factor, capability of producing a regulated DC output, and its ability to transmit power, are all taken into consideration.This is performed in order to ensure that the proposed IMISO-Z source converter may be evaluated in an appropriate manner.With the aid of MATLAB/Simulink and hardware implementation, analyses of the functioning of a single-phase SPFL inverter that was connected to the grid and was supplied using a scaled-down IMISO-Z source converter have been carried out.In order for it to be possible to assess it as part of the process of evaluating the simulated model, the discrete sample time of the simulated system was set to a value of 50 µs.The input ports of the proposed IMISO Z-source converter were powered using a combination of a pair of solar modules and a wind system, each of which was rated at 750 W and 60 V.A model that was developed in MATLAB Simulink is responsible for driving these input ports.Verification was performed on the recommended system, and the results were analyzed in light of the design parameters presented in Table 3.During the course of the experiment, a simulated photovoltaic (PV) array that had a power output of 750 W and a voltage of 60 V was exposed to a constant light intensity of 1000 W/m 2 .The wind turbine that was connected to the terminals of the unregulated three-phase rectifier was subjected to varying wind velocities that were imposed on the device.The wind speed was increased from 5 m per second to 10 m per second so that a varied voltage could be produced.In addition to this, the terminals of an SPFL inverter were connected with a dynamic load that consisted of a resistance of 230 Ω and an inductance of 0.114 mH.The functionality of an IMISO Z-source converter-powered SPFL inverter was examined during this phase of the testing while it was subjected to the effects of a dynamic load.This test was carried out while the inverter was kept in a state where it was connected to the grid.This method produces the most trustworthy results; thus, completing the test in this manner is standard practice.When they are working at a voltage of 60 volts, the solar cells that made up the PV array have a combined output power that is equal to 750 W.

Results and Discussion
This section describes the experimental findings of a scaled down model with the specifications of 1500 W, 230 V (RMS), and 50 Hz.The purpose of this model was to investigate the possible benefits and downsides of the IMISO-Z source converter-fed SPFL inverter that was described before.The findings of the scaled-down model will be reported, which will allow us to fulfil this goal.During the process of carrying out the evaluation, several aspects, such as the boost factor, capability of producing a regulated DC output, and its ability to transmit power, are all taken into consideration.This is performed in order to ensure that the proposed IMISO-Z source converter may be evaluated in an appropriate manner.With the aid of MATLAB/Simulink and hardware implementation, analyses of the functioning of a single-phase SPFL inverter that was connected to the grid and was supplied using a scaled-down IMISO-Z source converter have been carried out.In order for it to be possible to assess it as part of the process of evaluating the simulated model, the discrete sample time of the simulated system was set to a value of 50 µs.The input ports of the proposed IMISO Z-source converter were powered using a combination of a pair of solar modules and a wind system, each of which was rated at 750 W and 60 V.A model that was developed in MATLAB Simulink is responsible for driving these input ports.Verification was performed on the recommended system, and the results were analyzed in light of the design parameters presented in Table 3.During the course of the experiment, a simulated photovoltaic (PV) array that had a power output of 750 W and a voltage of 60 V was exposed to a constant light intensity of 1000 W/m 2 .The wind turbine that was connected to the terminals of the unregulated three-phase rectifier was subjected to varying wind velocities that were imposed on the device.The wind speed was increased from 5 m per second to 10 m per second so that a varied voltage could be produced.In addition to this, the terminals of an SPFL inverter were connected with a dynamic load that consisted of a resistance of 230 Ω and an inductance of 0.114 mH.The functionality of an IMISO Z-source converter-powered SPFL inverter was examined during this phase of the testing while it was subjected to the effects of a dynamic load.This test was carried out while the inverter was kept in a state where it was connected to the grid.This method produces the most trustworthy results; thus, completing the test in this manner is standard practice.When they are working at a voltage of 60 volts, the solar cells that made up the PV array have a combined output power that is equal to 750 W. The PV voltages are passed to L a1 and L a2 even after the switches S a1 and S a2 have been set to their closed positions.This occurs even if the switches are in their closed positions.This procedure will go on until the voltage hits the highest possible input voltage it can attain.The photovoltaic source and the wind sources may both discharge the energy that they have stored in series with one another because of the way that they are linked to the inductors L a1 , L a2 , L a3 , and L a4 in the system.Based on the test, it was determined that the primary voltage detected across the impedance network inductors was 50 V.Waveforms similar to those shown in Figure 11 were produced during the simulations.The output voltage of the simulated solar panel was shown to be 60 V in Figure 11a when it was exposed to an intensity of solar irradiation of 1000 W/m 2 .When the variable wind velocity was applied to the wind source, as shown in Figure 11f, the source generated 30 V between 0 and 0.25 s, and then produced 60 V between 0.25 and 0.5 s.The PV voltages are passed to La1 and La2 even after the switches Sa1 and Sa2 have been set to their closed positions.This occurs even if the switches are in their closed positions.This procedure will go on until the voltage hits the highest possible input voltage it can a ain.The photovoltaic source and the wind sources may both discharge the energy that they have stored in series with one another because of the way that they are linked to the inductors La1, La2, La3, and La4 in the system.Based on the test, it was determined that the primary voltage detected across the impedance network inductors was 50 V.Waveforms similar to those shown in Figure 11 were produced during the simulations.The output voltage of the simulated solar panel was shown to be 60 V in Figure 11a when it was exposed to an intensity of solar irradiation of 1000 W/m 2 .When the variable wind velocity was applied to the wind source, as shown in Figure 11f, the source generated 30 V between 0 and 0.25 s, and then produced 60 V between 0.25 and 0.5 s.   Figure 12 depicts the voltage that was present across the main and secondary windings of the transformer, the voltage that was present across capacitors C1 and C2, and the voltage that was present at the output of the IMISO Z-source converter.The primary winding of the transformer was tested as having a voltage of 100 V.The voltage control loop that is described in Section 4.1 was responsible for keeping the DC bus voltage at 326 V at all times.Figure 12 depicts the voltage that was present across the main and secondary windings of the transformer, the voltage that was present across capacitors C 1 and C 2 , and the voltage that was present at the output of the IMISO Z-source converter.The primary winding of the transformer was tested as having a voltage of 100 V.The voltage control loop that is described in Section 4.1 was responsible for keeping the DC bus voltage at 326 V at all times.Figure 12 depicts the voltage that was present across the main and secondary windings of the transformer, the voltage that was present across capacitors C1 and C2, and the voltage that was present at the output of the IMISO Z-source converter.The primary winding of the transformer was tested as having a voltage of 100 V.The voltage control loop that is described in Section 4.1 was responsible for keeping the DC bus voltage at 326 V at all times.To assess the practical implementation of the suggested IMISO Z-source converterfed SPFL inverter, the experimental data measured using the six-phase power analyzer are shown here.Figure 13 displays the results of measurements used to determine the voltage that exists between the active and passive components of an IMSO Z-source converter.The output voltage of the solar photovoltaic array and the wind system is shown in Figure 13a.In order to test the capacity of the converter to maintain a constant voltage, the output voltage of source 2 was raised from 30 V to 60 V.The voltage and current readings for the impedance network inductors La1, La2, La3, and La4 are shown in Figure 13b and Figure 13c, respectively.The charging and discharging curves of the inductor are represented by the waveform of the current.The voltage that was measured across the transformer's primary was approximately 200 V in each direction.The secondary voltage was somewhere in the neighborhood of 400 V. Figure 14 illustrates the gate pulses that were generated by the power switches Sa1, Sa2, Sa3, and Sa4.To assess the practical implementation of the suggested IMISO Z-source converter-fed SPFL inverter, the experimental data measured using the six-phase power analyzer are shown here.Figure 13 displays the results of measurements used to determine the voltage that exists between the active and passive components of an IMSO Z-source converter.The output voltage of the solar photovoltaic array and the wind system is shown in Figure 13a.In order to test the capacity of the converter to maintain a constant voltage, the output voltage of source 2 was raised from 30 V to 60 V. To assess the practical implementation of the suggested IMISO Z-source converterfed SPFL inverter, the experimental data measured using the six-phase power analyzer are shown here.Figure 13 displays the results of measurements used to determine the voltage that exists between the active and passive components of an IMSO Z-source converter.The output voltage of the solar photovoltaic array and the wind system is shown in Figure 13a.In order to test the capacity of the converter to maintain a constant voltage, the output voltage of source 2 was raised from 30 V to 60 V.The voltage and current readings for the impedance network inductors La1, La2, La3, and La4 are shown in Figure 13b and Figure 13c, respectively.The charging and discharging curves of the inductor are represented by the waveform of the current.The voltage that was measured across the transformer's primary was approximately 200 V in each direction.The secondary voltage was somewhere in the neighborhood of 400 V. Figure 14 illustrates the gate pulses that were generated by the power switches Sa1, Sa2, Sa3, and Sa4.The voltage and current readings for the impedance network inductors L a1 , L a2 , L a3 , and L a4 are shown in Figure 13b and Figure 13c, respectively.The charging and discharging curves of the inductor are represented by the waveform of the current.The voltage that was measured across the transformer's primary was approximately 200 V in each direction.The secondary voltage was somewhere in the neighborhood of 400 V. Figure 14 illustrates the gate pulses that were generated by the power switches S a1 , S a2 , S a3 , and S a4 .Figure 15 depicts the utility's per-unit cost, the SPFL inverter's DC bus current, the inverter's five-level voltage waveform and its expanded voltage waveform, and the current and active and reactive power taken by the load.The simulation validation included applying varying input voltages and loads to evaluate the system's overall performance.The experimental model was adjusted to accommodate the increased demand.There was a 1.5 A increase in the AC load, for a total of 3 A. The prototype could still run a 230 V, 3 A load in this other scenario.Figure 15 depicts the utility's per-unit cost, the SPFL inverter's DC bus current, the inverter's five-level voltage waveform and its expanded voltage waveform, and the current and active and reactive power taken by the load.The simulation validation included applying varying input voltages and loads to evaluate the system's overall performance.The experimental model was adjusted to accommodate the increased demand.There was a 1.5 A increase in the AC load, for a total of 3 A. The prototype could still run a 230 V, 3 A load in this other scenario.Figure 15 depicts the utility's per-unit cost, the SPFL inverter's DC bus current, the inverter's five-level voltage waveform and its expanded voltage waveform, and the current and active and reactive power taken by the load.The simulation validation included applying varying input voltages and loads to evaluate the system's overall performance.The experimental model was adjusted to accommodate the increased demand.There was a 1.5 A increase in the AC load, for a total of 3 A. The prototype could still run a 230 V, 3 A load in this other scenario.The SPFL inverter added total harmonic distortion (THD) to the grid power, and an FFT analysis was used to quantify this effect.Figure 16 shows the THD content of the SPFL inverter voltage as calculated from the simulation data.The voltage and current waveforms produced by the prototype SPFL inverter are shown in Figure 17.The SPFL inverter added total harmonic distortion (THD) to the grid power, and an FFT analysis was used to quantify this effect.Figure 16 shows the THD content of the SPFL inverter voltage as calculated from the simulation data.The voltage and current waveforms produced by the prototype SPFL inverter are shown in Figure 17.The SPFL inverter added total harmonic distortion (THD) to the grid power, and an FFT analysis was used to quantify this effect.Figure 16 shows the THD content of the SPFL inverter voltage as calculated from the simulation data.The voltage and current waveforms produced by the prototype SPFL inverter are shown in Figure 17.The SPFL inverter added total harmonic distortion (THD) to the grid power, and an FFT analysis was used to quantify this effect.Figure 16 shows the THD content of the SPFL inverter voltage as calculated from the simulation data.The voltage and current waveforms produced by the prototype SPFL inverter are shown in Figure 17.The SPFL inverter added total harmonic distortion (THD) to the grid power, and an FFT analysis was used to quantify this effect.Figure 16 shows the THD content of the SPFL inverter voltage as calculated from the simulation data.The voltage and current waveforms produced by the prototype SPFL inverter are shown in Figure 17.The proportion of THD in the SPFL inverter's output voltage after utility connections were made was calculated using power quality measurement devices.As can be seen in Figure 18, the load voltage THD determined using the power quality measuring equipment was 2.2%.Figure 19 provides a comparison between the proposed IMISO Z-source converter and the standard converter described in references [18][19][20].The suggested IMISO Zsource converter outperformed the other conventional converters in terms of gain.The proportion of THD in the SPFL inverter's output voltage after utility connections were made was calculated using power quality measurement devices.As can be seen in Figure 18, the load voltage THD determined using the power quality measuring equipment was 2.2%.The proportion of THD in the SPFL inverter's output voltage after utility connections were made was calculated using power quality measurement devices.As can be seen in Figure 18, the load voltage THD determined using the power quality measuring equipment was 2.2%.Figure 19 provides a comparison between the proposed IMISO Z-source converter and the standard converter described in references [18][19][20].The suggested IMISO Zsource converter outperformed the other conventional converters in terms of gain.Figure 19 provides a comparison between the proposed IMISO Z-source converter and the standard converter described in references [18][19][20].The suggested IMISO Z-source converter outperformed the other conventional converters in terms of gain.The proportion of THD in the SPFL inverter's output voltage after utility connections were made was calculated using power quality measurement devices.As can be seen in Figure 18, the load voltage THD determined using the power quality measuring equipment was 2.2%.Figure 19 provides a comparison between the proposed IMISO Z-source converter and the standard converter described in references [18][19][20].The suggested IMISO Zsource converter outperformed the other conventional converters in terms of gain.

Conclusions
In this research, a unique switching impedance network for a high step-up isolated multi-input single-output (IMISO) Z-source DC-DC converter is proposed.Comparing the features of the Z-source converter with the interleaved-boost full-bridge three-port converter led to the proposal of this particular converter.The working principle analysis, parameter selection, and a comparison with other comparable high step-up DC-DC converters on the market have all been covered at length.Finally, the computational and experimental findings were shown to validate the potential benefits of the proposed converter.The proposed IMISO-Z-source converter exhibited a lower current stress and lower voltage stress across the switches compared to previously suggested high step-up DC-DC converters.All of these advantages resulted from the converter's superior construction.As a result, the suggested converter's boost factor and reliability may be enhanced, suggesting it is well-suited for high step-up voltage conversion tasks.PV systems, wind systems, hybrid wind-solar systems, and grid connectivity of renewable energy sources are all examples of such uses.

Future Scope
In the proposed topology, IGBT has been utilized as a switching device.Gallium nitride (GaN) and silicon carbide (SiC) FETs are enabling higher levels of power density and efficiency compared to traditional silicon metal-oxide semiconductor field-effect transistors (MOSFETs).Although both technologies are wide bandgap, there are fundamental differences between GaN and SiC that makes one a better fit than the other in certain topologies and applications.In the proposed topology, the replacement of traditional IGBTs can give a better conversion efficiency.

Figure 1 .
Figure 1.Impedance source converter using a conventional two-port configuration.

Figure 1 .
Figure 1.Impedance source converter using a conventional two-port configuration.

Figure 1 .
Figure 1.Impedance source converter using a conventional two-port configuration.

Figure 2 . 23 Figure 3 .
Figure 2. Conventional interleaved-boost full-bridge three-port converter.Figure 2. Conventional interleaved-boost full-bridge three-port converter.Conventional topologies, such as those shown in Figures1 and 2, have limited voltage gain and need a large step-up high-frequency transformer; this was discovered during research into the Z-Source and interleaved DC-DC converter topologies.This research aims to develop a novel and efficient isolated multi-input single-output (IMISO) Z-source DC-DC converter for combining several energy sources into a single DC bus.This paper dissects and analyzes in depth the architecture, modes of operation, and implementation of a single-phase five-level (SPFL) inverter based on the IMISO Z-source converter.The dynamic behavior of the proposed design is tested and verified by constructing a software and hardware model of the 1500 W, 230 V, 50 Hz system.Both the modeling and experimental findings demonstrated that the IMISO Z-source converter-based single-phase
(a) First interval of a positive half cycle (b) Second interval of a positive half cycle (c) Third interval of a positive half cycle Sustainability 2023, 15, x FOR PEER REVIEW 6 of 23 (d) Fourth interval of a positive half cycle

( d )
Fourth interval of a positive half cycle (e) Fifth interval of a positive half cycle

Figure 4 .
Figure 4. Positive half-cycle modes of operation for the proposed IMISO Z-source converter-fed SPFL inverter.

Figure 4 .
Figure 4. Positive half-cycle modes of operation for the proposed IMISO Z-source converter-fed SPFL inverter.

Figures 4
Figures 4 and 5 depict an equivalent circuit and the important operating waveforms of the positive half cycle, respectively.Subintervals 4 and 5 of the IMISO Z-source converter operate similarly to intervals 1 and 2, except the SPFL inverter.The SPFL inverter switches S 5 and S 2 are activated to produce +2V dc /3 throughout the time period [t 3 -t 4 ].Between times t 4 and t 5 , the SPFL inverter's S 6 and S 2 switches are activated, producing a +V dc /3 output.In Figure 5, the gate pulses, transformer waveforms, and SPFL inverter output for the first five-time intervals are shown.Table 1 displays the switching table for the SPFL inverter output during the positive half cycle.

Figure 5 .
Figure 5. IMISO Z-source converter and SPFL inverter switching pa erns and output.

Figure 5 .
Figure 5. IMISO Z-source converter and SPFL inverter switching patterns and output.
(a) First interval of a negative half cycle (b) Second interval of a negative half cycle (c) Third interval of a negative half cycle (d) Fourth interval of a negative half cycle

Figure 6 .
Figure 6.Modes of operation of proposed IMISO Z-source converter-fed SPFL inverter under negative half cycle.The second subinterval is shown in Figure 6b, and it includes the conducting states of switches Sa1, S3, and S6 across the time interval [t1-t2].Thus, Lb1 and Lb2 are being discharged at the moment when La1 and La2 are being charged.To the power of n(Vwind + VLb1 + VLb2), C1 is negatively charged.Negative current flows through the secondary of the transformer, as shown in Figure 6b.The discharge slope of capacitors C2 and C3 is calculated using the SPFL inverter's output voltage.The terminals of the SPFL inverter circuit are set up to provide the output voltage in Equation (21).

Figure 6 .Figure 7 .
Figure 6.Modes of operation of proposed IMISO Z-source converter-fed SPFL inverter under negative half cycle.Sustainability 2023, 15, x FOR PEER REVIEW 11 of 23

Figure 7 .
Figure 7. IMISO Z-source converter and SPFL inverter negative half-cycle switching patterns and output.
(a) PV voltage (b) Voltage of La1 (c) Voltage of La2 (d) Voltage of Ca1 (e) Voltage of Ca2 (f) Wind rectifier output voltage

( g )Figure 11 .
Figure 11.Simulation results of active and passive elements of impedance network.
Secondary voltage (f) Voltage of C1

Figure 11 .
Figure 11.Simulation results of active and passive elements of impedance network.

Sustainability 2023 ,Figure 11 .
Figure 11.Simulation results of active and passive elements of impedance network.

( g )Figure 12 .
Figure 12.Simulation results of transformer and output terminal.

Figure 13 .
Figure 13.Experimental results of active and passive elements of IMSO-ZSC.

Figure 12 .
Figure 12.Simulation results of transformer and output terminal.

Figure 12 .
Figure 12.Simulation results of transformer and output terminal.

Figure 13 .
Figure 13.Experimental results of active and passive elements of IMSO-ZSC.

Figure 13 .
Figure 13.Experimental results of active and passive elements of IMSO-ZSC.

Figure 16 .
Figure 16.Simulation results of voltage THD analysis.

Figure 15 .
Figure 15.Simulation results of SPFL inverter and load.

Figure 15 .
Figure 15.Simulation results of SPFL inverter and load.

Figure 16 .
Figure 16.Simulation results of voltage THD analysis.

Figure 16 .
Figure 16.Simulation results of voltage THD analysis.

Figure 18 .
Figure 18.Experimental results of voltage THD analysis.

Figure 17 .
Figure 17.Experimental results of SPFL inverter and load.

Figure 17 .
Figure 17.Experimental results of SPFL inverter and load.

Figure 18 .
Figure 18.Experimental results of voltage THD analysis.

Figure 18 .
Figure 18.Experimental results of voltage THD analysis.

Figure 17 .
Figure 17.Experimental results of SPFL inverter and load.

Figure 18 .
Figure 18.Experimental results of voltage THD analysis.

Table 1
displays the switching table for the SPFL inverter output during the positive half cycle.Sustainability 2023, 15, x FOR PEER REVIEW 8 of 23

Table 1 .
Switching pattern for positive half cycle of operation.

Table 2 .
Switching pattern corresponds to the negative half-cycle of output.

Table 3 .
Design parameters of simulated and experimental model.

Table 3 .
Design parameters of simulated and experimental model.