Research on High Power Factor Single Tube Variable Structure Wireless Power Transmission

: Aiming at the problems existing in the current radio energy transmission system, we propose a wireless power transmission (WPT) system with the parallel–parallel (PP)-compensated structure. The transmitter of the transmission system adopts a separate topological structure to suppress the current shock and noise. In order to improve the efﬁciency of the WPT, reduce the static loss, and reduce the current oscillation loss on the power side, the input current ripple can be improved by two parallel phase-shifting methods. In this paper, two topological theories are analyzed, and the simulation and experiment results verify the correctness of these theories under both static and on-load conditions. After the ﬁnal two-way phase-shift, 61.99% of the ripple is reduced. It provides a new approach for the design of WPT systems with PP structure.


Introduction
In this paper, the wireless power transmission (WPT) system with the traditional parallel-parallel (PP)-compensated structure is improved. Since the inductance current and capacitor voltage cannot mutate, the compensation capacitor is applied with a constant voltage provided by the bias power supply when the circuit is turned on, but simultaneously the current flowing through the compensating capacitor is mutated [1][2][3]. Since the current flowing through the inductance cannot mutate, the direct current (DC) is blocked by the circuit and only the alternating current (AC) flows through the capacitor and inductance. Therefore, it has achieved the function of isolating DC (IDC) [4][5][6], and the circuit topology described above is called the IDC circuit topology. In this paper, we propose an IDC transmitter circuit for wireless charging which can effectively improve the input current waveform of the resonant circuit, reduce the damage of current oscillation to the devices, and improve the system efficiency [7][8][9].

System Structure and Operation Process
As shown in Figure 1, the system is composed of an automatic voltage rising and falling circuit, a current and voltage detection circuit, a high-frequency switching circuit, and a rectifier filter circuit and a DC-DC converter [10][11][12][13][14]. The micro controller unit (MCU) generates a PWM wave to control the on-off of the high-frequency switching tube so that the resonance between the inductor and capacitor at the transmitter can eliminate reactive power, and the active power can be coupled with the receiver as much as possible. The receiver inductance and capacitor resonant eliminates the reactive power losses so that the circuit efficiency reaches the highest and then provides power to the loads [15][16][17].
A schematic diagram of parallel resonance of an IDC transmitter is shown in Figure 2, where C 1 is the compensation capacitor, L 1 is the resonant inductance, and V T1 is the switch tube. The input DC voltage V g1 is the stable DC voltage output after the input voltage of the total system passes through the voltage converter. For the convenience of analysis, all components in the circuit are assumed to be ideal components. Figure 3 is the topology of parallel resonance of the traditional transmitter, where C 2 is the compensation capacitor, L 2 is the resonant inductance, and V T2 is the switching tube. The modal waveforms diagram of the transmitter circuit is shown in Figure 4. The input DC voltage V g2 is the stable DC voltage output after the input voltage of the total system passes through the voltage converter. The modal waveforms diagram of the transmitter circuit is shown in Figure 5. For the convenience of analysis, all components in the circuit are assumed to be ideal components. The modal analysis of the two circuits is shown in Table 1. A schematic diagram of parallel resonance of an IDC transmitter is shown in Figure  2, where C1 is the compensation capacitor, L1 is the resonant inductance, and VT1 is the switch tube. The input DC voltage Vg1 is the stable DC voltage output after the input voltage of the total system passes through the voltage converter. For the convenience of analysis, all components in the circuit are assumed to be ideal components. Figure 3 is the topology of parallel resonance of the traditional transmitter, where C2 is the compensation capacitor, L2 is the resonant inductance, and VT2 is the switching tube. The modal waveforms diagram of the transmitter circuit is shown in Figure 4. The input DC voltage Vg2 is the stable DC voltage output after the input voltage of the total system passes through the voltage converter. The modal waveforms diagram of the transmitter circuit is shown in Figure 5. For the convenience of analysis, all components in the circuit are assumed to be ideal components. The modal analysis of the two circuits is shown in Table 1.  A schematic diagram of parallel resonance of an IDC transmitter is shown in Figure  2, where C1 is the compensation capacitor, L1 is the resonant inductance, and VT1 is the switch tube. The input DC voltage Vg1 is the stable DC voltage output after the input voltage of the total system passes through the voltage converter. For the convenience of analysis, all components in the circuit are assumed to be ideal components. Figure 3 is the topology of parallel resonance of the traditional transmitter, where C2 is the compensation capacitor, L2 is the resonant inductance, and VT2 is the switching tube. The modal waveforms diagram of the transmitter circuit is shown in Figure 4. The input DC voltage Vg2 is the stable DC voltage output after the input voltage of the total system passes through the voltage converter. The modal waveforms diagram of the transmitter circuit is shown in Figure 5. For the convenience of analysis, all components in the circuit are assumed to be ideal components. The modal analysis of the two circuits is shown in Table 1.    A schematic diagram of parallel resonance of an IDC transmitter is shown in Figure  2, where C1 is the compensation capacitor, L1 is the resonant inductance, and VT1 is the switch tube. The input DC voltage Vg1 is the stable DC voltage output after the input voltage of the total system passes through the voltage converter. For the convenience of analysis, all components in the circuit are assumed to be ideal components. Figure 3 is the topology of parallel resonance of the traditional transmitter, where C2 is the compensation capacitor, L2 is the resonant inductance, and VT2 is the switching tube. The modal waveforms diagram of the transmitter circuit is shown in Figure 4. The input DC voltage Vg2 is the stable DC voltage output after the input voltage of the total system passes through the voltage converter. The modal waveforms diagram of the transmitter circuit is shown in Figure 5. For the convenience of analysis, all components in the circuit are assumed to be ideal components. The modal analysis of the two circuits is shown in Table 1.

Mode
Separate Topological Transmitter Traditional Topological Transmitter Stage 1 iL1 increases linearly when the switch is on. Switch tube continuation diode conduction.

Stage 2
When the switch is off, iL1 decreases and C1 accumulates charge. When the switch is on, iL2 increases linearly.

Stage 3
The switch is closed and the capacitor charges the inductance.
The switch tube closes and the inductance and capacitor enter the resonant state.

Stage 4
The switch tube is turned on with zero voltage, and the inductance current is continued through the continuing diode, which is reduced to zero, and stage 1 is repeated.
The inductance charges the capacitor in reverse, and the voltage withstand of the switch reaches its maximum.

Mode
Separate Topological Transmitter Traditional Topological Transmitter Stage 1 iL1 increases linearly when the switch is on. Switch tube continuation diode conduction.

Stage 2
When the switch is off, iL1 decreases and C1 accumulates charge. When the switch is on, iL2 increases linearly.

Stage 3
The switch is closed and the capacitor charges the inductance.
The switch tube closes and the inductance and capacitor enter the resonant state.

Stage 4
The switch tube is turned on with zero voltage, and the inductance current is continued through the continuing diode, which is reduced to zero, and stage 1 is repeated.
The inductance charges the capacitor in reverse, and the voltage withstand of the switch reaches its maximum.

Stage 2
When the switch is off, i L1 decreases and C 1 accumulates charge. When the switch is on, i L2 increases linearly.

Stage 3
The switch is closed and the capacitor charges the inductance. The switch tube closes and the inductance and capacitor enter the resonant state.

Stage 4
The switch tube is turned on with zero voltage, and the inductance current is continued through the continuing diode, which is reduced to zero, and stage 1 is repeated.
The inductance charges the capacitor in reverse, and the voltage withstand of the switch reaches its maximum.

Stage 5
Capacitor discharges, voltage resistance of switch tube is reduced.

Stage 6
The inductance charges the capacitor, the voltage drop of the switch is zero, and the continuation secondary leads on. Stage 7 The switch tube realizes zero voltage conduction.

Circuit Model Analysis
DC and AC always exist in the amplifying circuits, and it is divided into DC path and AC path. In the DC path, the capacitor is opened and the inductance is shorted, and meanwhile AC signal source is also short [18]. In this case, the DC power supply of the capacitor in the AC path is shorted. Figure 6 shows the topological diagram of DC and AC paths of the IDC transmitter. In the AC path, the capacitance value is very small, thus it should not be regarded as a short circuit [19]. Figure 7 shows the micro-variant equivalent circuit diagram for the traditional transmitter. According to the above analysis method, it can be concluded that the DC and AC paths of the traditional transmitter are the same as those of the IDC circuit topology. Therefore, it can be deduced that the parallel resonant IDC circuit can be equivalent to the traditional parallel resonant circuit. The inductance charges the capacitor, the voltage drop of the switch is zero, and the continuation secondary leads on. Stage 7 The switch tube realizes zero voltage conduction.

Circuit Model Analysis
DC and AC always exist in the amplifying circuits, and it is divided into DC path and AC path. In the DC path, the capacitor is opened and the inductance is shorted, and meanwhile AC signal source is also short [18]. In this case, the DC power supply of the capacitor in the AC path is shorted. Figure 6 shows the topological diagram of DC and AC paths of the IDC transmitter. In the AC path, the capacitance value is very small, thus it should not be regarded as a short circuit [19]. Figure 7 shows the micro-variant equivalent circuit diagram for the traditional transmitter. According to the above analysis method, it can be concluded that the DC and AC paths of the traditional transmitter are the same as those of the IDC circuit topology. Therefore, it can be deduced that the parallel resonant IDC circuit can be equivalent to the traditional parallel resonant circuit.   Figure 8 shows the equivalent circuit model, where LP is the equivalent inductance, RP is the equivalent resistance, UOC is the open-circuit voltage of the side, iP is the inductance current, LS is the inductance of the side, CS is the compensating capacitor of the side,  Stage 5 Capacitor discharges, voltage resistance of switch tube is reduced.

Stage 6
The inductance charges the capacitor, the voltage drop of the switch is zero, and the continuation secondary leads on. Stage 7 The switch tube realizes zero voltage conduction.

Circuit Model Analysis
DC and AC always exist in the amplifying circuits, and it is divided into DC path and AC path. In the DC path, the capacitor is opened and the inductance is shorted, and meanwhile AC signal source is also short [18]. In this case, the DC power supply of the capacitor in the AC path is shorted. Figure 6 shows the topological diagram of DC and AC paths of the IDC transmitter. In the AC path, the capacitance value is very small, thus it should not be regarded as a short circuit [19]. Figure 7 shows the micro-variant equivalent circuit diagram for the traditional transmitter. According to the above analysis method, it can be concluded that the DC and AC paths of the traditional transmitter are the same as those of the IDC circuit topology. Therefore, it can be deduced that the parallel resonant IDC circuit can be equivalent to the traditional parallel resonant circuit.   Figure 8 shows the equivalent circuit model, where LP is the equivalent inductance, RP is the equivalent resistance, UOC is the open-circuit voltage of the side, iP is the inductance current, LS is the inductance of the side, CS is the compensating capacitor of the side,  Figure 8 shows the equivalent circuit model, where L P is the equivalent inductance, R P is the equivalent resistance, U OC is the open-circuit voltage of the side, i P is the inductance current, L S is the inductance of the side, C S is the compensating capacitor of the side, and R is the load, which equals to R = π 2 R L 8 . The secondary equivalent impedance is [20]. The equivalent reflection impedance of the secondary side to the primary side can be obtained as where ω is the angular frequency and M is the mutual inductance between the primary and secondary coils. From the above Figure 1, we have LP = L1 + XP/ω. From Mode stage 1 described above, the switch conduction capacitance CP is shorted. Inductance L1 is in charge state and the initial current is zero. According to Kirchhoff's voltage law, we have The current through the inductance in Equation (2) The peak current of inductance L1 is where D is the duty ratio of tube and T is the operating cycle. When the switch tube is turned off, the inductance L1 and capacitor C1 will realize resonance. According to Kirchhoff's voltage law and current law, it can be known that Let iP(t1) = iPMAX, uCP(t1) = Ui, the current and voltage of the inductance L1 are formulated, respectively, as The equivalent reflection impedance of the secondary side to the primary side can be obtained as where ω is the angular frequency and M is the mutual inductance between the primary and secondary coils. From the above Figure 1, we have L P = L 1 + X P /ω. From Mode stage 1 described above, the switch conduction capacitance C P is shorted. Inductance L 1 is in charge state and the initial current is zero. According to Kirchhoff's voltage law, we have The current through the inductance in Equation (2) The peak current of inductance L 1 is where D is the duty ratio of tube and T is the operating cycle. When the switch tube is turned off, the inductance L 1 and capacitor C 1 will realize resonance. According to Kirchhoff's voltage law and current law, it can be known that World Electr. Veh. J. 2021, 12, 214 6 of 18 Let i P(t1) = i PMAX , u CP(t1) = U i , the current and voltage of the inductance L 1 are formulated, respectively, as where According to Equation (6), the current i CP flowing through the capacitor C P is As shown in Figure 2, the input current i S1 is equal to the current flowing through the inductance L 1 for the parallel resonant circuit of the IDC transmitter, such that According to Kirchhoff's current law (KCL), the total input current i S2 equals to the sum of the current flowing through the capacitor C 1 and the inductance L 1

Simulation Analysis of Input Current
In order to verify the effectiveness and feasibility of the proposed IDC transmitter circuit, the Matlab platform is used to simulate and analyze the traditional PP wireless charging circuit and the IDC PP wireless charging circuit [21,22]. According to the working principle of the PP wireless charging system, the main circuit parameters of the system are calculated, as shown in Table 2. This model mainly analyzes the waveform changes of each device in the transmitter circuit. The output voltage of the automatic voltage rising and falling circuit at the input end is replaced by the DC voltage source that has the steady voltage output, and the corresponding input voltage is set to 12 V and the compensation capacitor in the traditional parallel resonant transmitter circuit is set to 0.094 µF. In the IDC circuit, the filter capacitor and compensation capacitor are both set to 0.047 µF in the transmitter side. Figure 9 compares the inductance current between the parallel resonant circuits for the IDC transmitter and the traditional transmitter. It can be seen that the waveforms of i L1 and i L2 are the same, and the conclusion drawn above can be achieved that parallel resonant circuits for the IDC transmitter are equivalent to resonant circuits for the traditional transmitter through this simulation.
Receiving/Transmitting resonant inductance 7 µH The receiver compensates the capacitance 0.094 µF This model mainly analyzes the waveform changes of each device in the transmitter circuit. The output voltage of the automatic voltage rising and falling circuit at the input end is replaced by the DC voltage source that has the steady voltage output, and the corresponding input voltage is set to 12 V and the compensation capacitor in the traditional parallel resonant transmitter circuit is set to 0.094 µF. In the IDC circuit, the filter capacitor and compensation capacitor are both set to 0.047 µF in the transmitter side. Figure 9 compares the inductance current between the parallel resonant circuits for the IDC transmitter and the traditional transmitter. It can be seen that the waveforms of iL1 and iL2 are the same, and the conclusion drawn above can be achieved that parallel resonant circuits for the IDC transmitter are equivalent to resonant circuits for the traditional transmitter through this simulation.  Figure 10 and Figure 11 show the input current waveform of the traditional and IDC parallel resonance circuits in static mode, respectively. In the figures, iS2n is the input current waveform in practice for the traditional circuit. iS1n is the input current waveform in practice for the IDC circuit. iS2′n is the input current waveform under ideal conditions for the traditional circuit. The reason for the difference between these two waveforms is that there is a deviation between the theoretical situation and the actual situation. In theoretical analysis, the switch tube is often considered an ideal element, and the parasitic capacitance in the switch tube is ignored, resulting in the iS2′n waveform. However, in practice, there is a parasitic capacitor inside the open light tube, and when the circuit is in the resonant state, the parasitic capacitor will release power to the resonant circuit, thus mitigating the degree of the sudden change of the input current and smoothing the current waveform. This discovery is proposed for the first time in this paper, and it is hoped that it will be used as a reference for future research and analysis.
The two groups of simulation waveforms iS1n and iS2n in the figure are the same as those derived from the theoretical model, and the input current waveforms of the resonant unit are significantly different. It can be seen from the figure that there is no difference in the input circuit waveforms of the two kinds of circuits in the time period [t0, t1]. This is because the capacitor current of the switch tube is shorted at this time, so the capacitor current is zero. For the traditional parallel resonance, the input current iS2n in the time period (t0,t1) is equal to the inductance current iL2. When the switch tube is opened in the  Figures 10 and 11 show the input current waveform of the traditional and IDC parallel resonance circuits in static mode, respectively. In the figures, i S2n is the input current waveform in practice for the traditional circuit. i S1n is the input current waveform in practice for the IDC circuit. i S2 n is the input current waveform under ideal conditions for the traditional circuit. The reason for the difference between these two waveforms is that there is a deviation between the theoretical situation and the actual situation. In theoretical analysis, the switch tube is often considered an ideal element, and the parasitic capacitance in the switch tube is ignored, resulting in the i S2 n waveform. However, in practice, there is a parasitic capacitor inside the open light tube, and when the circuit is in the resonant state, the parasitic capacitor will release power to the resonant circuit, thus mitigating the degree of the sudden change of the input current and smoothing the current waveform. This discovery is proposed for the first time in this paper, and it is hoped that it will be used as a reference for future research and analysis. time period (t1,t2), the resonant input current generated by the power exchange between capacitor and inductance is equal to zero. However, for the IDC parallel resonant circuit, the input current iS1n is always equal to the inductive current iL1, so that there will be no sudden change, and the current waveform is smoother. There is no current oscillation brought by the original circuit, and the current oscillation will cause great damage to the power supply. The IDC circuit protects the power supply and improves the charging efficiency.    Figure 12 is the input current waveform of the traditional in parallel resonance circuit on load mode, and Figure 13 is the input current waveform of the IDC in parallel resonance circuit on load mode. As can be seen from the figure, considering the losses of devices and loads, the simulated waveform is basically consistent with the theoretical waveform. It can be seen from the simulation waveform that the input current waveform of the power supply side has a mutation after the traditional parallel resonant circuit is on load, and there is a large amount of charge that cannot be released in the circuit, which leads to a great current conflict. The input current waveform of the IDC is the same as the resonant inductance waveform, which effectively reduces the loss on the power source side during LC oscillation, thus protecting the devices on the power side. Moreover, the waveform can be measured, which plays an important role in the closed-loop regulation part of the system. Figure 12 shows that the IDC has a stronger load-carrying capacity than the traditional topology.  The two groups of simulation waveforms i S1n and i S2n in the figure are the same as those derived from the theoretical model, and the input current waveforms of the resonant unit are significantly different. It can be seen from the figure that there is no difference in the input circuit waveforms of the two kinds of circuits in the time period [t 0 , t 1 ]. This is because the capacitor current of the switch tube is shorted at this time, so the capacitor current is zero. For the traditional parallel resonance, the input current i S2n in the time period (t 0 ,t 1 ) is equal to the inductance current i L2 . When the switch tube is opened in the time period (t 1 ,t 2 ), the resonant input current generated by the power exchange between capacitor and inductance is equal to zero. However, for the IDC parallel resonant circuit, the input current i S1n is always equal to the inductive current i L1 , so that there will be no sudden change, and the current waveform is smoother. There is no current oscillation brought by the original circuit, and the current oscillation will cause great damage to the power supply. The IDC circuit protects the power supply and improves the charging efficiency. Figure 12 is the input current waveform of the traditional in parallel resonance circuit on load mode, and Figure 13 is the input current waveform of the IDC in parallel resonance circuit on load mode. As can be seen from the figure, considering the losses of devices and loads, the simulated waveform is basically consistent with the theoretical waveform. It can be seen from the simulation waveform that the input current waveform of the power supply side has a mutation after the traditional parallel resonant circuit is on load, and there is a large amount of charge that cannot be released in the circuit, which leads to a great current conflict. The input current waveform of the IDC is the same as the resonant inductance waveform, which effectively reduces the loss on the power source side during LC oscillation, thus protecting the devices on the power side. Moreover, the waveform can be measured, which plays an important role in the closed-loop regulation part of the system. Figure 12 shows that the IDC has a stronger load-carrying capacity than the traditional topology. time period (t1,t2), the resonant input current generated by the power exchange between capacitor and inductance is equal to zero. However, for the IDC parallel resonant circuit, the input current iS1n is always equal to the inductive current iL1, so that there will be no sudden change, and the current waveform is smoother. There is no current oscillation brought by the original circuit, and the current oscillation will cause great damage to the power supply. The IDC circuit protects the power supply and improves the charging efficiency.  Figure 12 is the input current waveform of the traditional in parallel resonance circuit on load mode, and Figure 13 is the input current waveform of the IDC in parallel resonance circuit on load mode. As can be seen from the figure, considering the losses of devices and loads, the simulated waveform is basically consistent with the theoretical waveform. It can be seen from the simulation waveform that the input current waveform of the power supply side has a mutation after the traditional parallel resonant circuit is on load, and there is a large amount of charge that cannot be released in the circuit, which leads to a great current conflict. The input current waveform of the IDC is the same as the resonant inductance waveform, which effectively reduces the loss on the power source side during LC oscillation, thus protecting the devices on the power side. Moreover, the waveform can be measured, which plays an important role in the closed-loop regulation part of the system. Figure 12 shows that the IDC has a stronger load-carrying capacity than the traditional topology.
Current shock Current mutation 9.64 9.70 9.66 9.72 9.68 t/ms is2'o/A is2' o Current mutation Figure 12. The input-current waveform of traditional in parallel resonance circuit on load mode. Figure 12. The input-current waveform of traditional in parallel resonance circuit on load mode.  Figure 13. The input-current waveform of IDC parallel resonance on load mode.

Simulation Analysis of Ripple Suppression
Due to AC/DC mixing phenomenon in the amplifier circuit and the existence of inductance and capacitance elements in the resonant circuit, so when the switch is on, the circuit charges the inductance L1 and current flows into the inductance. When the switch tube is cut off, the inductance L1 and the compensation capacitor C1 begin to resonate. When the capacitor C1 transfers all the power to the inductance L1, the current will flow backward into L1. Since the input current iS1 is equal to the inductance current iL1, the input current will increase in the opposite direction, which will cause the ripple in the circuit.
Ripple has a serious impact on the stability of the whole system and will cause great damage to components and directly affects the efficiency of the system by causing disadvantages such as heating of the whole system. Therefore, research on ripple suppression is especially necessary. If the ripple can be reduced, it will make a great contribution to the improvement of efficiency. In this paper, based on Kirchhoff's current law, the topology of the transmitter in parallel and output in series is adopted. As shown in Figure 14, taking parallel phase-shifting of two transmitting terminals as an example, the two modules have the same parameters, and the specific parameters are shown in Table 1.  Figure 15a shows the relationship among a phase-shifting angle, switching frequency and current peak. The phase-shifting angle is in the range of 10-350 degrees, and the switching frequency is in 180-230 K. It can be seen from the figure that when the phaseshifting angle is in the range of 170-190 degrees and the switching frequency is in the range of 196-215 K, the current peak is in the trough state. In addition, with the increase in phase-shifting angle and frequency, the current peak value has an obvious trend of increase. In order to further analyze the relationship between the three optimal points of phase-shifting, frequency was found and a three-dimensional scatter diagram was made as shown in Figure 15b. In this figure, the phase-shifting angle was in the range of 170-190 degrees and the frequency was at 196-215 K. It can be seen from the figure that the Figure 13. The input-current waveform of IDC parallel resonance on load mode.

Simulation Analysis of Ripple Suppression
Due to AC/DC mixing phenomenon in the amplifier circuit and the existence of inductance and capacitance elements in the resonant circuit, so when the switch is on, the circuit charges the inductance L 1 and current flows into the inductance. When the switch tube is cut off, the inductance L 1 and the compensation capacitor C 1 begin to resonate. When the capacitor C 1 transfers all the power to the inductance L 1 , the current will flow backward into L 1 . Since the input current i S1 is equal to the inductance current i L1 , the input current will increase in the opposite direction, which will cause the ripple in the circuit.
Ripple has a serious impact on the stability of the whole system and will cause great damage to components and directly affects the efficiency of the system by causing disadvantages such as heating of the whole system. Therefore, research on ripple suppression is especially necessary. If the ripple can be reduced, it will make a great contribution to the improvement of efficiency. In this paper, based on Kirchhoff's current law, the topology of the transmitter in parallel and output in series is adopted. As shown in Figure 14, taking parallel phase-shifting of two transmitting terminals as an example, the two modules have the same parameters, and the specific parameters are shown in Table 1.  Figure 13. The input-current waveform of IDC parallel resonance on load mode.

Simulation Analysis of Ripple Suppression
Due to AC/DC mixing phenomenon in the amplifier circuit and the existence of inductance and capacitance elements in the resonant circuit, so when the switch is on, the circuit charges the inductance L1 and current flows into the inductance. When the switch tube is cut off, the inductance L1 and the compensation capacitor C1 begin to resonate. When the capacitor C1 transfers all the power to the inductance L1, the current will flow backward into L1. Since the input current iS1 is equal to the inductance current iL1, the input current will increase in the opposite direction, which will cause the ripple in the circuit.
Ripple has a serious impact on the stability of the whole system and will cause great damage to components and directly affects the efficiency of the system by causing disadvantages such as heating of the whole system. Therefore, research on ripple suppression is especially necessary. If the ripple can be reduced, it will make a great contribution to the improvement of efficiency. In this paper, based on Kirchhoff's current law, the topology of the transmitter in parallel and output in series is adopted. As shown in Figure 14, taking parallel phase-shifting of two transmitting terminals as an example, the two modules have the same parameters, and the specific parameters are shown in Table 1.  Figure 15a shows the relationship among a phase-shifting angle, switching frequency and current peak. The phase-shifting angle is in the range of 10-350 degrees, and the switching frequency is in 180-230 K. It can be seen from the figure that when the phaseshifting angle is in the range of 170-190 degrees and the switching frequency is in the range of 196-215 K, the current peak is in the trough state. In addition, with the increase in phase-shifting angle and frequency, the current peak value has an obvious trend of increase. In order to further analyze the relationship between the three optimal points of phase-shifting, frequency was found and a three-dimensional scatter diagram was made as shown in Figure 15b. In this figure, the phase-shifting angle was in the range of 170-190 degrees and the frequency was at 196-215 K. It can be seen from the figure that the  Figure 15a shows the relationship among a phase-shifting angle, switching frequency and current peak. The phase-shifting angle is in the range of 10-350 degrees, and the switching frequency is in 180-230 K. It can be seen from the figure that when the phaseshifting angle is in the range of 170-190 degrees and the switching frequency is in the range of 196-215 K, the current peak is in the trough state. In addition, with the increase in phaseshifting angle and frequency, the current peak value has an obvious trend of increase. In order to further analyze the relationship between the three optimal points of phase-shifting, frequency was found and a three-dimensional scatter diagram was made as shown in Figure 15b. In this figure, the phase-shifting angle was in the range of 170-190 degrees and the frequency was at 196-215 K. It can be seen from the figure that the current peak value is the smallest when the phase-shifting angle is 180 degrees and the frequency is 206 K.
In addition, before 180 degrees, the smaller the angle, the bigger the peak, and after 180 degrees, the bigger the angle, the bigger the peak.
World Electr. Veh. J. 2021, 12, x FOR PEER REVIEW 10 of 18 current peak value is the smallest when the phase-shifting angle is 180 degrees and the frequency is 206 K. In addition, before 180 degrees, the smaller the angle, the bigger the peak, and after 180 degrees, the bigger the angle, the bigger the peak.  Figure 16 shows the input current waveform after phase-shift at 180 degrees in the static condition of the traditional topology. As shown in the figure, iS2n is the input current waveform before phase-shift and iS2′n is the input current waveform after phase-shift. Through comparison, it can be seen that the input current amplitude of the traditional topology has not been improved after the phase-shift, and the waveform has a mutation and distortion. Its fundamental properties have not been changed, and it seems to be more fluctuant without any help to the stability of the whole system. Figure 17 shows the input current waveform of the IDC at 180 degrees phase-shift under static condition. In the figure, iS1n is the input current waveform before the phase-shift of the IDC, and iS1′n is the input current waveform after the phase-shift of the IDC. It can be seen from the figure that the peak value of the input current of the parallel resonant circuit of the IDC decreases significantly after the phase-shift of 180 degrees, and the current is similar to the sine wave, which is very smooth. This is of great help to the stability of the whole system, which can greatly improve the system's efficiency and reduce the loss of power supply.    Figure 16 shows the input current waveform after phase-shift at 180 degrees in the static condition of the traditional topology. As shown in the figure, i S2n is the input current waveform before phase-shift and i S2 n is the input current waveform after phase-shift. Through comparison, it can be seen that the input current amplitude of the traditional topology has not been improved after the phase-shift, and the waveform has a mutation and distortion. Its fundamental properties have not been changed, and it seems to be more fluctuant without any help to the stability of the whole system. Figure 17 shows the input current waveform of the IDC at 180 degrees phase-shift under static condition. In the figure, i S1n is the input current waveform before the phase-shift of the IDC, and i S1 n is the input current waveform after the phase-shift of the IDC. It can be seen from the figure that the peak value of the input current of the parallel resonant circuit of the IDC decreases significantly after the phase-shift of 180 degrees, and the current is similar to the sine wave, which is very smooth. This is of great help to the stability of the whole system, which can greatly improve the system's efficiency and reduce the loss of power supply.
As shown in Figure 18, i S2O is the input current waveform before phase-shifting in the traditional topology, and i S2 'o is the input current waveform after phaseshifting in the traditional topology. It can be seen that the amplitude does not change much after phase-shifting in the traditional topology, and the mutation and conflict of the current become more serious. As shown in Figure 19, i S1o is the input current waveform before phase-shifting in the IDC topology, and i S1 o is the input current waveform after phaseshifting in the IDC topology. It can be seen that the current amplitude drops significantly, and the waveform becomes smooth after phase-shifting in the IDC topology.
World Electr. Veh. J. 2021, 12, x FOR PEER REVIEW 10 of 18 current peak value is the smallest when the phase-shifting angle is 180 degrees and the frequency is 206 K. In addition, before 180 degrees, the smaller the angle, the bigger the peak, and after 180 degrees, the bigger the angle, the bigger the peak.  Figure 16 shows the input current waveform after phase-shift at 180 degrees in the static condition of the traditional topology. As shown in the figure, iS2n is the input current waveform before phase-shift and iS2′n is the input current waveform after phase-shift. Through comparison, it can be seen that the input current amplitude of the traditional topology has not been improved after the phase-shift, and the waveform has a mutation and distortion. Its fundamental properties have not been changed, and it seems to be more fluctuant without any help to the stability of the whole system. Figure 17 shows the input current waveform of the IDC at 180 degrees phase-shift under static condition. In the figure, iS1n is the input current waveform before the phase-shift of the IDC, and iS1′n is the input current waveform after the phase-shift of the IDC. It can be seen from the figure that the peak value of the input current of the parallel resonant circuit of the IDC decreases significantly after the phase-shift of 180 degrees, and the current is similar to the sine wave, which is very smooth. This is of great help to the stability of the whole system, which can greatly improve the system's efficiency and reduce the loss of power supply.  As shown in Figure 18, iS2O is the input current waveform before phase-shifting in the traditional topology, and iS2 'o is the input current waveform after phaseshifting in the traditional topology. It can be seen that the amplitude does not change much after phaseshifting in the traditional topology, and the mutation and conflict of the current become more serious. As shown in Figure 19, iS1o is the input current waveform before phaseshifting in the IDC topology, and iS1′o is the input current waveform after phase-shifting in the IDC topology. It can be seen that the current amplitude drops significantly, and the waveform becomes smooth after phase-shifting in the IDC topology.

Experimental Verification
In this paper, experimental devices for wireless power transmission are applied for experimental verification. Figure 20 shows the physical diagram of the IDC wireless power transmission system. The input DC voltage is supplied by an external power supply, the inductance value is 7 µH, the compensation capacitance of the receiver is 47 nF, and the working frequency of the fixed system is 206 KHz in the experimental test. As shown in Figure 18, iS2O is the input current waveform before phase-shifting in the traditional topology, and iS2 'o is the input current waveform after phaseshifting in the traditional topology. It can be seen that the amplitude does not change much after phaseshifting in the traditional topology, and the mutation and conflict of the current become more serious. As shown in Figure 19, iS1o is the input current waveform before phaseshifting in the IDC topology, and iS1′o is the input current waveform after phase-shifting in the IDC topology. It can be seen that the current amplitude drops significantly, and the waveform becomes smooth after phase-shifting in the IDC topology.

Experimental Verification
In this paper, experimental devices for wireless power transmission are applied for experimental verification. Figure 20 shows the physical diagram of the IDC wireless power transmission system. The input DC voltage is supplied by an external power supply, the inductance value is 7 µH, the compensation capacitance of the receiver is 47 nF, and the working frequency of the fixed system is 206 KHz in the experimental test. As shown in Figure 18, iS2O is the input current waveform before phase-shifting in the traditional topology, and iS2 'o is the input current waveform after phaseshifting in the traditional topology. It can be seen that the amplitude does not change much after phaseshifting in the traditional topology, and the mutation and conflict of the current become more serious. As shown in Figure 19, iS1o is the input current waveform before phaseshifting in the IDC topology, and iS1′o is the input current waveform after phase-shifting in the IDC topology. It can be seen that the current amplitude drops significantly, and the waveform becomes smooth after phase-shifting in the IDC topology.

Experimental Verification
In this paper, experimental devices for wireless power transmission are applied for experimental verification. Figure 20 shows the physical diagram of the IDC wireless power transmission system. The input DC voltage is supplied by an external power supply, the inductance value is 7 µH, the compensation capacitance of the receiver is 47 nF, and the working frequency of the fixed system is 206 KHz in the experimental test.

Experimental Verification
In this paper, experimental devices for wireless power transmission are applied for experimental verification. Figure 20 shows the physical diagram of the IDC wireless power transmission system. The input DC voltage is supplied by an external power supply, the inductance value is 7 µH, the compensation capacitance of the receiver is 47 nF, and the working frequency of the fixed system is 206 KHz in the experimental test. The traditional parallel resonant circuit and the IDC wireless charging circuit were constructed for experimental verification. Figures 21 and 22 present the two topological soft switching waveforms. Both the two topological circuits can realize zero-voltage conduction, and the drive waveform and the voltage stress waveform of the switch tube of IDC are smoother. As shown in Figures 23 and 24, the single-channel input current waveform of the two groups of circuits under no-load condition is measured. As shown in Figures 25 and 26, the input current waveform under two-channel phase-shifting condition is measured. As shown in Figures 27 and 28, the inductance current waveform under noload is measured. As can be seen from the figure, the distortion of input current waveform for the traditional topology is serious and the current peak value does not change after phase-shift. The single-phase input current of the IDC is smoother, which is similar to the sine wave, and the current ripple is effectively reduced after the two-way phase-shifting. The simulation and physical test demonstrate that the peak value of the input current of the traditional topological circuit is higher than that of the IDC, which is caused by the combined action of the compensating capacitor and the parasitic capacitor of the switch tube.  The traditional parallel resonant circuit and the IDC wireless charging circuit were constructed for experimental verification. Figures 21 and 22 present the two topological soft switching waveforms. Both the two topological circuits can realize zero-voltage conduction, and the drive waveform and the voltage stress waveform of the switch tube of IDC are smoother. As shown in Figures 23 and 24, the single-channel input current waveform of the two groups of circuits under no-load condition is measured. As shown in Figures 25 and 26, the input current waveform under two-channel phase-shifting condition is measured. As shown in Figures 27 and 28, the inductance current waveform under no-load is measured. As can be seen from the figure, the distortion of input current waveform for the traditional topology is serious and the current peak value does not change after phase-shift. The single-phase input current of the IDC is smoother, which is similar to the sine wave, and the current ripple is effectively reduced after the two-way phase-shifting. The simulation and physical test demonstrate that the peak value of the input current of the traditional topological circuit is higher than that of the IDC, which is caused by the combined action of the compensating capacitor and the parasitic capacitor of the switch tube. The traditional parallel resonant circuit and the IDC wireless charging circuit were constructed for experimental verification. Figures 21 and 22 present the two topological soft switching waveforms. Both the two topological circuits can realize zero-voltage conduction, and the drive waveform and the voltage stress waveform of the switch tube of IDC are smoother. As shown in Figures 23 and 24, the single-channel input current waveform of the two groups of circuits under no-load condition is measured. As shown in Figures 25 and 26, the input current waveform under two-channel phase-shifting condition is measured. As shown in Figures 27 and 28, the inductance current waveform under noload is measured. As can be seen from the figure, the distortion of input current waveform for the traditional topology is serious and the current peak value does not change after phase-shift. The single-phase input current of the IDC is smoother, which is similar to the sine wave, and the current ripple is effectively reduced after the two-way phase-shifting. The simulation and physical test demonstrate that the peak value of the input current of the traditional topological circuit is higher than that of the IDC, which is caused by the combined action of the compensating capacitor and the parasitic capacitor of the switch tube.                      Figure 29 shows the single-phase input current waveform with load for the traditional topology, Figure 30 is the single-phase input current waveform with load for IDC topology, Figure 31 is the two-way phase-shifting input current waveform with load for the traditional topology, and Figure 32 is the two-way input current waveform with load for IDC topology. Comparing Figures 30 and 24, we can find that there is no obvious distortion in the waveform of the IDC with load. According to Figures 29 and 23, the input current waveform is obviously distorted after the traditional topology is on load, indicating that the IDC has a stronger load-carrying capacity. It can be seen from Figures 32 and 26 that the waveforms are still smooth without distortion after two-way phase-shifting with load in the IDC. According to Figures 31 and 25, the waveforms mutate more seriously after two-way phase-shifting with load in the traditional topology. According to Figures 29-32, the waveform of the IDC is still smooth after the load is accessed, but the input current waveform of the traditional topology has obvious fluctuation. Under onload condition, the input current amplitude of traditional topological circuit is larger than that of IDC.   Figure 29 shows the single-phase input current waveform with load for the traditional topology, Figure 30 is the single-phase input current waveform with load for IDC topology, Figure 31 is the two-way phase-shifting input current waveform with load for the traditional topology, and Figure 32 is the two-way input current waveform with load for IDC topology. Comparing Figures 24 and 30, we can find that there is no obvious distortion in the waveform of the IDC with load. According to Figures 23 and 29, the input current waveform is obviously distorted after the traditional topology is on load, indicating that the IDC has a stronger load-carrying capacity. It can be seen from Figures 26 and 32 that the waveforms are still smooth without distortion after two-way phase-shifting with load in the IDC. According to Figures 25 and 31, the waveforms mutate more seriously after two-way phase-shifting with load in the traditional topology. According to Figures 29-32, the waveform of the IDC is still smooth after the load is accessed, but the input current waveform of the traditional topology has obvious fluctuation. Under on-load condition, the input current amplitude of traditional topological circuit is larger than that of IDC.  Figure 29 shows the single-phase input current waveform with load for the traditional topology, Figure 30 is the single-phase input current waveform with load for IDC topology, Figure 31 is the two-way phase-shifting input current waveform with load for the traditional topology, and Figure 32 is the two-way input current waveform with load for IDC topology. Comparing Figures 30 and 24, we can find that there is no obvious distortion in the waveform of the IDC with load. According to Figures 29 and 23, the input current waveform is obviously distorted after the traditional topology is on load, indicating that the IDC has a stronger load-carrying capacity. It can be seen from Figures 32 and 26 that the waveforms are still smooth without distortion after two-way phase-shifting with load in the IDC. According to Figures 31 and 25, the waveforms mutate more seriously after two-way phase-shifting with load in the traditional topology. According to Figures 29-32, the waveform of the IDC is still smooth after the load is accessed, but the input current waveform of the traditional topology has obvious fluctuation. Under onload condition, the input current amplitude of traditional topological circuit is larger than that of IDC.    The transmission efficiency of the two topologies was measured under the condition of input voltage of 12 V and output voltage of 5 V. The results are shown in Table 3. The experimental data clearly show that the transmission efficiency of the system can be   The transmission efficiency of the two topologies was measured under the condition of input voltage of 12 V and output voltage of 5 V. The results are shown in Table 3. The experimental data clearly show that the transmission efficiency of the system can be   The transmission efficiency of the two topologies was measured under the condition of input voltage of 12 V and output voltage of 5 V. The results are shown in Table 3. The experimental data clearly show that the transmission efficiency of the system can be The transmission efficiency of the two topologies was measured under the condition of input voltage of 12 V and output voltage of 5 V. The results are shown in Table 3. The experimental data clearly show that the transmission efficiency of the system can be improved by using the IDC transmitter circuit, which verifies the feasibility of the proposed variable topology transmitter circuit.

Conclusions
In this paper, a PP resonant wireless power transmission system is proposed, and the input current model of input current, inductance current, and capacitance voltage are obtained from the two topologies by modal analysis and mathematical modeling of the transmitter topology. The correctness of the mathematical model of IDC topology proposed in this paper is verified by simulation results. In addition, the experimental current waveform also reflects that the IDC circuit has a significant improvement effect on the input current waveform of the system. In order to understand the ability of the two topologies to suppress the ripple, Matlab/Simulink simulation shows that the IDC topology with the two phases shifting at 180 degrees has a stronger ability for ripple suppression. Finally, a traditional parallel resonant wireless charging system and IDC wireless charging system platform are built. Setting the operating frequency to 206 kHz and the input voltage to 12 V, the experimental waveforms of resonant inductance current, switch voltage, and input power supply of the two groups of circuits are obtained under no-load and on-load conditions. It is verified that the IDC can effectively reduce the static losses of the system, improve the charging efficiency, and suppress the input current ripple, which plays a better role in the research of the closed-loop control strategy of the system.

Data Availability Statement:
The datasets used and/or analyzed during the current study are available from the corresponding author on request.