Investigation of Electrical Properties of the Al/SiO2/n++-Si Resistive Switching Structures by Means of Static, Admittance, and Impedance Spectroscopy Measurements

In this study, the resistive switching phenomenon in Al/SiO2/n++-Si structures is observed and studied by means of DC, small-signal admittance, and complex impedance spectroscopy measurements. Possible transport mechanisms in the high and low resistance states are identified. Based on the results of the applied measurement techniques, an electrical equivalent circuit of the structure is proposed. We discuss the effect of parasitic elements influencing the measurement results and show that a proper model can give useful information about the electrical properties of the device. A good agreement between the characteristics of the proposed equivalent circuit and the experimental data, based on different measurement procedures, confirms the validity of the used methodology and its applicability to the electrical characterization of RRAMs.


Introduction
The Resistive Random-Access Memory (RRAM) is a promising type of next-generation non-volatile computer memories due to its possible fast switching and low power consumption [1]. It offers promising properties for memory applications, hardware security, in-memory computing, and neuromorphic computing [2][3][4]. The latter application field, in particular, has attracted significant attention. It has been shown that RRAM devices can exhibit accumulative behavior whereby the resistance can be incrementally increased or decreased upon application of successive programming pulses of the same amplitude. This attribute can be used to emulate an artificial synapse, a crucial application for neuromorphic computing [5][6][7]. The two most studied types of RRAM devices are the conductive-bridge RAM (CBRAM), which is an electrochemical metallization memory (ECM) device, and the oxide RAM (OxRAM), a valence change memory (VCM) device [8]. The OxRAM is a device with an oxide resistive layer sandwiched between two inert electrodes. The inert electrode is an electrode that is not (or weakly) electrochemically active. Oxide ions and vacancies are generated upon application of the electric field across the layer. Vacancies form a conductive filament, which links electrodes as an electrical conduction path. A change in the polarization direction results in a disruption of the conductive filament due to Joule heating. Various transport processes in the oxide-based RRAM structures can be responsible for the resistive switching effect depending on the material stack and a fabrication method, e.g., trap-assisted tunneling, Poole-Frenkel emission, SILC, or hopping transport [9]. Many oxide materials exhibiting resistive switching (RS) have been examined in recent years, including HfO 2 , TiO 2 , and Ta 2 O 5 [10][11][12][13][14][15][16][17][18][19]. Silicon oxide has also been tested as a potential candidate for an RS layer in CBRAM and OxRAM devices [20][21][22][23][24][25][26][27]. It would be a promising candidate for these applications due to its well-known properties and fabrication techniques [28,29]. However, there is only a limited number of works related to SiO 2 as an RS layer, and further studies are needed.
Many works on the study of memristor devices concern the metal-insulator-metal (MIM) configuration. The metal-insulator-semiconductor (MIS) structure may be favorable in terms of compatibility with standard CMOS technology. Usually, a memory cell comprises an RRAM device and a selector device, which can be an MOS field-effect transistor. In this case, we have a 1T-1R memory cell configuration. The MIS structure can be easily incorporated into the transistor architecture as a part of the drain region, and the combined device consists of a resistive storage node in series with a select transistor. This type of device is called Contact RRAM (CRRAM) [30][31][32]. This work shows that the MIS silicon diode can also exhibit resistive switching properties. Similar structures were analyzed in the past but in different material configurations [22,23,[33][34][35][36][37][38]. Most of the works regarding RRAM focus on DC measurement-based electrical characterization and extracting a possible conduction mechanism of the switching layer. We show and analyze the measurement results obtained for Al/SiO 2 /very highly doped Si(n) structures with the use of the admittance and impedance spectroscopy measurements. We show that a change in the compliance current results in different conductance levels, which is common for some types of RRAM devices [39,40]. Possible transport mechanisms in the high resistance state (HRS) and the low resistance state (LRS) are indicated and identified. An equivalent circuit of the structure is proposed, which can provide useful information about the RS layer. The results of the work give new insight into the possible origins of the RS effect in the investigated structures.

Materials and Methods
MIS structures were fabricated using standard CMOS compatible processes: wet processing, photolithography, thermal oxidation, and magnetron sputtering. We used 2" n-type highly doped (arsenic) wafers with the resistivity in the range 0.001-0.005 Ω·cm from Siegert Wafer Gmbh (Aachen, Germany). Wafers were cleaned using the standard RCA method. The field oxide was fabricated in a high-temperature furnace using a wet oxidation process. Then, the windows were opened using photolithography and wet etching with HF acid. Subsequently, a thin silicon oxide layer (5-6 nm) was grown in a dry thermal oxidation process (10 min at 820 • C). Aluminum gate electrodes were made using the lift-off process after the photolithography and metal deposition processes. Then, the bottom oxide layer was etched, and bottom Al metallization was formed. Structures were annealed in H 2 /Ar atmosphere in 400 • C for 30 min. The schematic cross-section of the investigated devices is presented in Figure 1. material stack and a fabrication method, e.g., trap-assisted tunneling, Poole-Frenkel emission, SILC, or hopping transport [9]. Many oxide materials exhibiting resistive switching (RS) have been examined in recent years, including HfO2, TiO2, and Ta2O5 [10][11][12][13][14][15][16][17][18][19]. Silicon oxide has also been tested as a potential candidate for an RS layer in CBRAM and OxRAM devices [20][21][22][23][24][25][26][27]. It would be a promising candidate for these applications due to its wellknown properties and fabrication techniques [28,29]. However, there is only a limited number of works related to SiO2 as an RS layer, and further studies are needed. Many works on the study of memristor devices concern the metal-insulator-metal (MIM) configuration. The metal-insulator-semiconductor (MIS) structure may be favorable in terms of compatibility with standard CMOS technology. Usually, a memory cell comprises an RRAM device and a selector device, which can be an MOS field-effect transistor. In this case, we have a 1T-1R memory cell configuration. The MIS structure can be easily incorporated into the transistor architecture as a part of the drain region, and the combined device consists of a resistive storage node in series with a select transistor. This type of device is called Contact RRAM (CRRAM) [30][31][32]. This work shows that the MIS silicon diode can also exhibit resistive switching properties. Similar structures were analyzed in the past but in different material configurations [22,23,[33][34][35][36][37][38]. Most of the works regarding RRAM focus on DC measurement-based electrical characterization and extracting a possible conduction mechanism of the switching layer. We show and analyze the measurement results obtained for Al/SiO2/very highly doped Si(n) structures with the use of the admittance and impedance spectroscopy measurements. We show that a change in the compliance current results in different conductance levels, which is common for some types of RRAM devices [39,40]. Possible transport mechanisms in the high resistance state (HRS) and the low resistance state (LRS) are indicated and identified. An equivalent circuit of the structure is proposed, which can provide useful information about the RS layer. The results of the work give new insight into the possible origins of the RS effect in the investigated structures.

Materials and Methods
MIS structures were fabricated using standard CMOS compatible processes: wet processing, photolithography, thermal oxidation, and magnetron sputtering. We used 2" ntype highly doped (arsenic) wafers with the resistivity in the range 0.001-0.005 Ω•cm from Siegert Wafer Gmbh (Aachen, Germany). Wafers were cleaned using the standard RCA method. The field oxide was fabricated in a high-temperature furnace using a wet oxidation process. Then, the windows were opened using photolithography and wet etching with HF acid. Subsequently, a thin silicon oxide layer (5-6 nm) was grown in a dry thermal oxidation process (10 min at 820 °C). Aluminum gate electrodes were made using the liftoff process after the photolithography and metal deposition processes. Then, the bottom oxide layer was etched, and bottom Al metallization was formed. Structures were annealed in H2/Ar atmosphere in 400 °C for 30 min. The schematic cross-section of the investigated devices is presented in Figure 1.  units were connected to the device under test (DUT) through the ultra-fast remote switching module (RPM). All measurements were carried out at room temperature. The measurement setup is presented in Figure 2. Electrical measurements were made using Keithley 4200-SCS Semiconductor Characterization System (Keithley Instruments, LLC, Solon, OH, USA) combined with Süss MicroTec PM8 low noise probe shield. DC current-voltage characteristics were measured with the static source-measure unit (SMU), whereas the admittance and impedance measurements were carried out using the small-signal capacitance-voltage unit (CVU). Both units were connected to the device under test (DUT) through the ultra-fast remote switching module (RPM). All measurements were carried out at room temperature. The measurement setup is presented in Figure 2.

DC Measurements
In Figure 3, we show the current-voltage characteristics of an Al/SiO2/n ++ Si structure with a gate pad diameter of 156 μm (S1). Initial electroforming voltage is above 2.5 V. Structures were measured with the compliance current (CC) of 20 mA. For a given CC, the set voltage is above 1.2 V. We identify the transport mechanism as the space charge limited current (SCLC). In Figure 4, we show the slope of I-V curves at different states and voltage ranges. In the high-resistance state (HRS) of the SET cycle, we observe that initially, the current is proportional to the applied voltage (Ohmic conduction), and then it obeys Child's quadratic law, which is related to partially filled traps [41,42]. In the high field region, a higher slope of the curve is observed, which is related to fully filled traps. In the low-resistance state (LRS), we have mainly Ohmic conduction. In the RESET cycle, the Ohmic conduction is mainly observed at low voltages. At higher voltage values, carrier transport through the dielectric is a mix of different types of transport mechanisms, and it is hard to identify it in a simple way.

DC Measurements
In Figure 3, we show the current-voltage characteristics of an Al/SiO 2 /n ++ Si structure with a gate pad diameter of 156 µm (S1). Initial electroforming voltage is above 2.5 V. Structures were measured with the compliance current (CC) of 20 mA. For a given CC, the set voltage is above 1.2 V. We identify the transport mechanism as the space charge limited current (SCLC). In Figure 4, we show the slope of I-V curves at different states and voltage ranges. In the high-resistance state (HRS) of the SET cycle, we observe that initially, the current is proportional to the applied voltage (Ohmic conduction), and then it obeys Child's quadratic law, which is related to partially filled traps [41,42]. In the high field region, a higher slope of the curve is observed, which is related to fully filled traps. In the low-resistance state (LRS), we have mainly Ohmic conduction. In the RESET cycle, the Ohmic conduction is mainly observed at low voltages. At higher voltage values, carrier transport through the dielectric is a mix of different types of transport mechanisms, and it is hard to identify it in a simple way.     Figure 5 shows the current-voltage characteristics of the structure S2 with the gate diameter of 74 μm for different CC values. The initial forming voltage is above 2.0 V. At CC = 1 mA, we have not observed a reset current-voltage loop. For a higher CC, we observe an increase in the current in both the high resistance state (HRS) and the low resistance state (LRS). The CC level can be used to modify the conductance of the RRAM structure. This is probably due to the fact that a higher CC increases the size or number of conductive filaments (CF) within the structure [43]. For small CC values, this effect is less pronounced. CFs are probably not completely formed, unstable and non-persistent, and thus, they can be easily dissolved using a very small voltage value.  Figure 5 shows the current-voltage characteristics of the structure S2 with the gate diameter of 74 µm for different CC values. The initial forming voltage is above 2.0 V. At CC = 1 mA, we have not observed a reset current-voltage loop. For a higher CC, we observe an increase in the current in both the high resistance state (HRS) and the low resistance state (LRS). The CC level can be used to modify the conductance of the RRAM structure. This is probably due to the fact that a higher CC increases the size or number of conductive filaments (CF) within the structure [43]. For small CC values, this effect is less pronounced. CFs are probably not completely formed, unstable and non-persistent, and thus, they can be easily dissolved using a very small voltage value.

Small-Signal Measurements
In our study, we also used the small-signal measurement technique to obtain the admittance characteristics of the device. In Figure 6, we show conductance and susceptance of S1 structure measured at the frequency f = 100 kHz. Measurements were carried out in a limited gate voltage range to maintain the structure in one of the states, HRS or LRS.

Small-Signal Measurements
In our study, we also used the small-signal measurement technique to obtain the admittance characteristics of the device. In Figure 6, we show conductance and susceptance of S1 structure measured at the frequency f = 100 kHz. Measurements were carried out in a limited gate voltage range to maintain the structure in one of the states, HRS or LRS.

Small-Signal Measurements
In our study, we also used the small-signal measurement technique to obtain the admittance characteristics of the device. In Figure 6, we show conductance and susceptance of S1 structure measured at the frequency f = 100 kHz. Measurements were carried out in a limited gate voltage range to maintain the structure in one of the states, HRS or LRS. As expected, the conductance in LRS is higher than in HRS (Figure 6a). The measurement data taken in the parallel equivalent circuit were used to extract RPM values at −0.5 V and +0.5 V, as marked in Figure 6a. The imaginary part of the measured admittance is presented in Figure 6b. In the HRS state, the susceptance is positive for negative gate voltages up to −1.0 V, indicating the capacitive behavior of the structure. While moving towards positive gate voltages, one can observe that susceptance becomes negative in the As expected, the conductance in LRS is higher than in HRS (Figure 6a). The measurement data taken in the parallel equivalent circuit were used to extract R PM values at −0.5 V and +0.5 V, as marked in Figure 6a. The imaginary part of the measured admittance is presented in Figure 6b. In the HRS state, the susceptance is positive for negative gate voltages up to −1.0 V, indicating the capacitive behavior of the structure. While moving towards positive gate voltages, one can observe that susceptance becomes negative in the bias range above 0.65 V. The closer to the set voltage, the lower susceptance is observed, and the characteristic tends to the curve representing the susceptance in the LRS. In the LRS, the structure behavior is mainly inductive within the considered gate voltage range. Only in a limited voltage range close to 0.0 V, the structure exhibits capacitive behavior. In general, the admittance of a considered device can be described by a simple electrical equivalent circuit, which is presented in Figure 7. bias range above 0.65 V. The closer to the set voltage, the lower susceptance is observed, and the characteristic tends to the curve representing the susceptance in the LRS. In the LRS, the structure behavior is mainly inductive within the considered gate voltage range. Only in a limited voltage range close to 0.0 V, the structure exhibits capacitive behavior. In general, the admittance of a considered device can be described by a simple electrical equivalent circuit, which is presented in Figure 7. It is particularly important that the series parasitic inductance (LP) and resistance (RP) cannot be omitted when the resistance (RRRAM in Figure 7) in the parallel RC circuit of It is particularly important that the series parasitic inductance (L P ) and resistance (R P ) cannot be omitted when the resistance (R RRAM in Figure 7) in the parallel RC circuit of RRAM structure becomes low, and the capacitance C RRAM simultaneously becomes high. Such a situation occurs when a conductive filament inside RRAM dielectric is formed. As a result, the admittance of the electrical equivalent circuit presented in Figure 7 can be calculated as follows: The conductance and susceptance of the measurement parallel depiction of the considered equivalent circuit are described by the following formulae: where A is equal to (ωC RRAM R RRAM ) 2 .
The sign of the susceptance is determined by the sign of the numerator. In LRS, the capacitance of the RRAM device (C RRAM ) increases according to the increase in the absolute value of the applied voltage. It results from a shortening gap between the growing filament and the top electrode of the device. In such a situation, the parasitic inductance (L P ) can dominate the numerator of Equation (3), imposing the negative value of the measured susceptance. A similar mechanism can be a reason for the negative susceptance of the investigated structures in LRS (Figure 6b).

Complex Impedance Spectroscopy
Some information on the electrical properties of a resistive switching layer (e.g., filaments) and a RRAM device can be extracted from the impedance spectroscopy [44][45][46]. In many cases, a simple parallel RC equivalent circuit is quite enough to approximate the conducting behavior of the investigated structure/dielectric layer in a wide range of frequencies. However, in some situations, it is necessary to extend a simple equivalent RC network by additional parallel RC circuits. For example, it may be dictated by a different behavior of the RRAM structure in LRS and HRS modes. Figure 8a,b present the complex impedance (Z -Z ) of the investigated structure at a given bias voltage (+0.5 V and −0.5 V) for HRS and LRS. The figures combine the measured and simulated data for the electrical equivalent circuits presented in Figures 9 and 10. In our considerations, we assume that a highly doped substrate of the device behaves like a metal electrode. Thus, the elements of the proposed models correspond to the switching layer of the RRAM device and to the parasitic parameters of the measurement setup. A very good match of the measured and simulated data for both HRS and LRS in the frequency range of 20 kHz-1 MHz was obtained.
In Figure 9, we present the electrical equivalent circuit for the measured device in HRS at two bias points. We have three parallel branches representing the electrical behavior of the insulator layer. The capacitance C ox represents the capacitance related to the gate insulator of the device (its value directly corresponds to the approximately 5 nm thick SiO 2 layer and the gate electrode diameter of 156 um). Leakage resistance (R leakage ) represents the gate leakage current that results from tunneling or other transport mechanisms, different than the transport through conducting filaments. The third branch, comprising series resistance and parallel RC circuits, represents the cumulative electrical behavior of conductive filaments. R parasitic describes the spread parasitic resistance brought in by the measurement setup and the series resistance of the device. L parasitic represents the uncompensated inductance of the wiring and the switching matrix in the measurement setup ( Figure 2).
The shape of the fitted impedance at HRS (Figure 8) is mainly determined by a combination of complex semi-circles related to the corresponding parallel RC network. The remaining elements of the proposed equivalent circuit are responsible for the position of the curve at the Z-plane and have less impact on its shape. The branch containing the series connection of the parallel RC circuits and the resistance R 4 reflects the electrical behavior of the conducting filament(s).

Complex Impedance Spectroscopy
Some information on the electrical properties of a resistive switching layer (e.g., filaments) and a RRAM device can be extracted from the impedance spectroscopy [44][45][46]. In many cases, a simple parallel RC equivalent circuit is quite enough to approximate the conducting behavior of the investigated structure/dielectric layer in a wide range of frequencies. However, in some situations, it is necessary to extend a simple equivalent RC network by additional parallel RC circuits. For example, it may be dictated by a different behavior of the RRAM structure in LRS and HRS modes. Figure 8a,b present the complex impedance (Z″-Z′) of the investigated structure at a given bias voltage (+0.5 V and −0.5 V) for HRS and LRS. The figures combine the measured and simulated data for the electrical equivalent circuits presented in Figures 9 and 10. In our considerations, we assume that a highly doped substrate of the device behaves like a metal electrode. Thus, the elements of the proposed models correspond to the switching layer of the RRAM device and to the parasitic parameters of the measurement setup. A very good match of the measured and simulated data for both HRS and LRS in the frequency range of 20 kHz-1 MHz was obtained. In Figure 9, we present the electrical equivalent circuit for the measured device in HRS at two bias points. We have three parallel branches representing the electrical behavior of the insulator layer. The capacitance Cox represents the capacitance related to the gate insulator of the device (its value directly corresponds to the approximately 5 nm thick SiO2 layer and the gate electrode diameter of 156 um). Leakage resistance (Rleakage) represents the gate leakage current that results from tunneling or other transport mechanisms, different than the transport through conducting filaments. The third branch, comprising series resistance and parallel RC circuits, represents the cumulative electrical behavior of conductive filaments. Rparasitic describes the spread parasitic resistance brought in by the measurement setup and the series resistance of the device. Lparasitic represents the uncompensated inductance of the wiring and the switching matrix in the measurement setup ( Figure 2). The shape of the fitted impedance at HRS (Figure 8) is mainly determined by a combination of complex semi-circles related to the corresponding parallel RC network. The remaining elements of the proposed equivalent circuit are responsible for the position of the curve at the Z-plane and have less impact on its shape. The branch containing the series connection of the parallel RC circuits and the resistance R4 reflects the electrical behavior of the conducting filament(s).
In the case of LRS, the proposed equivalent circuit of the investigated structure is as presented in Figure 10. The conducting behavior of the switching layer is represented only The parallel RC network ( Figure 10) is mainly responsible for the shape of the fitted impedance at LRS. The series connection of L and R is represented by a straight line on Zplane (dashed lines in Figure 8b). As in the proposed equivalent circuit, adding parallel capacitance is necessary to match the simulated data to the measured ones. COX and Rleakage were omitted in the electrical equivalent circuit in LRS because their values are negligible compared to C and R in a parallel RC network ( Figure 10).
In Figure 11, we propose a sketch of a hypothetical structure of a conducting filament; the electrical behavior is approximated by proposed equivalent circuits, with the interpretation of different R and C elements in the structure in HRS and LRS.  In the case of LRS, the proposed equivalent circuit of the investigated structure is as presented in Figure 10. The conducting behavior of the switching layer is represented only by a single RC network. Moreover, the equivalent circuit consists series of parasitic elements (R parasitic , L parasitic ). During switching on, the filament increases its volume, so the resultant value of spread resistance of the device decreases. At the same time, the gap between the filament and the top electrode decreases substantially. It is represented by capacitance, the value of which is greater than the value of capacitances corresponding to filament structure at HRS.
The parallel RC network ( Figure 10) is mainly responsible for the shape of the fitted impedance at LRS. The series connection of L and R is represented by a straight line on Z-plane (dashed lines in Figure 8b). As in the proposed equivalent circuit, adding parallel capacitance is necessary to match the simulated data to the measured ones. C OX and R leakage were omitted in the electrical equivalent circuit in LRS because their values are negligible compared to C and R in a parallel RC network ( Figure 10).
In Figure 11, we propose a sketch of a hypothetical structure of a conducting filament; the electrical behavior is approximated by proposed equivalent circuits, with the interpretation of different R and C elements in the structure in HRS and LRS.
A negative value of the susceptance at LRS (Figure 6b) and a negative imaginary component of Z (Figure 8b) is often regarded as proof of an inductive behavior of the structure/conducting filaments [25,44,47]. However, such a behavior can be caused by parasitic uncompensated inductance (L S in Figure 2) of the measurement setup (wiring, switching matrix, etc.). In our considerations, a suitable agreement between the simulated and measured data was obtained for the parasitic inductance; its value of 3.5 µH is comparable to L S . This gives rise to the claim that the L parasitic value in our model is closely related to the measurement setup, rather than the conduction mechanism within the RRAM structure. Based on the obtained measurement, we believe that the studied structure is an OxRAM device. However, further studies are needed to confirm this claim.
impedance at LRS. The series connection of L and R is represented by a straight line on Z plane (dashed lines in Figure 8b). As in the proposed equivalent circuit, adding parall capacitance is necessary to match the simulated data to the measured ones. COX and Rleaka were omitted in the electrical equivalent circuit in LRS because their values are negligib compared to C and R in a parallel RC network ( Figure 10).
In Figure 11, we propose a sketch of a hypothetical structure of a conducting filamen the electrical behavior is approximated by proposed equivalent circuits, with the interpre tation of different R and C elements in the structure in HRS and LRS.  The parallel depictions of the proposed equivalent circuits (at HRS and LRS for f = 100 kHz) consist of elements (G PM , C PM ) whose values correspond to the measured ones marked in Figure 6a,b-real and imaginary parts of admittance, respectively. Static equivalent resistance (R DC ) value extracted from the proposed equivalent circuits agrees with the differential resistance R diff values obtained from the measured static I-V characteristics for both considered bias voltages at HRS and LRS ( Figure 12). A negative value of the susceptance at LRS (Figure 6b) and a negative imaginary component of Z (Figure 8b) is often regarded as proof of an inductive behavior of the structure/conducting filaments [25,44,47]. However, such a behavior can be caused by parasitic uncompensated inductance (LS in Figure 2) of the measurement setup (wiring, switching matrix, etc.). In our considerations, a suitable agreement between the simulated and measured data was obtained for the parasitic inductance; its value of 3.5 μH is comparable to LS. This gives rise to the claim that the Lparasitic value in our model is closely related to the measurement setup, rather than the conduction mechanism within the RRAM structure. Based on the obtained measurement, we believe that the studied structure is an OxRAM device. However, further studies are needed to confirm this claim.
The parallel depictions of the proposed equivalent circuits (at HRS and LRS for f = 100 kHz) consist of elements (GPM, CPM) whose values correspond to the measured ones marked in Figure 6a,b-real and imaginary parts of admittance, respectively. Static equivalent resistance (RDC) value extracted from the proposed equivalent circuits agrees with the differential resistance Rdiff values obtained from the measured static I-V characteristics for both considered bias voltages at HRS and LRS ( Figure 12). Figure 12. Rdiff values extracted from the measurements of S1 structure at different resistance states and considered gate bias voltages.

Conclusions
In this work, current-voltage characteristics of the experimental Al/SiO2/n ++ Si RRAM structures are presented and analyzed. An influence of the compliance current is shown. The small-signal admittance and complex impedance measurements are used to characterize the structure and propose its electrical equivalent circuit. A suitable agreement between characteristics of the proposed equivalent circuit and the experimental data based on different measurement procedures (DC, small-signal admittance, complex impedance spectroscopy) confirms that the used methodology can be a useful technique for investigating electrical properties of RRAM devices, giving new insights into the origins of the resistive switching phenomenon.

Conclusions
In this work, current-voltage characteristics of the experimental Al/SiO 2 /n ++ Si RRAM structures are presented and analyzed. An influence of the compliance current is shown. The small-signal admittance and complex impedance measurements are used to characterize the structure and propose its electrical equivalent circuit. A suitable agreement between characteristics of the proposed equivalent circuit and the experimental data based on different measurement procedures (DC, small-signal admittance, complex impedance spectroscopy) confirms that the used methodology can be a useful technique for investi-gating electrical properties of RRAM devices, giving new insights into the origins of the resistive switching phenomenon.