A Riding-through Technique for Seamless Transition between Islanded and Grid-Connected Modes of Droop-Controlled Inverters

Abstract: This paper presents a seamless transition method for a droop-controlled inverter. The droop control is suitable to make the inverter work as a voltage source in both islanded and grid-connected modes, however, the transfer between theses modes can result in a big inrush current that may damage the system. The proposed method allows the droop-controlled inverter to improve the transient response when transferring between modes, by detecting the inrush current, activating a current control loop during transients, and then transferring back to droop-controlled mode smoothly by using a virtual inductance loop. In addition, a local phase-locked-loop (PLL) is proposed to align the inverter voltage with the grid in order to reduce the transient current during the transition. Therefore, the droop-controlled inverter is able to operate in both grid-connected and islanded modes, providing as well a smooth transition between them, requiring neither synchronization signals nor grid-side information. The control algorithm and design procedure are presented. Experimental results from a laboratory prototype validate the effectiveness of the proposed method.


Introduction
Inverter-based distributed power generation systems (DPGSs) have received much attention recently due to their flexible power-control capability [1,2].Usually, grid-connected inverters with grid-following control are used as interfaces between the grid and DPGSs.However, this control approach may suffer from voltage instabilities, frequency variations, voltage harmonics, and is not able to operate in islanded mode.Alternatively to the grid-following inverter, the grid-forming one is preferred due to its ability to provide many ancillary services defined in IEEE Std.1547 [3], such as load regulation, reactive power compensation, and power quality improvement.However, IEEE Std.1547 does not define the operation of distributed resources (DRs) in intentionally islanded electric power systems (EPSs).
Recently, the term "DR Island System" has been defined by IEEE Std.1547.4 [4] in order to integrate various DRs into EPSs with the possibility of operating as a microgrid [5,6].Four operating modes are presented: (1) area EPS-connected mode; (2) transition to island mode; (3) islanded mode and (4) reconnection mode.The first mode referred to as the DR operation described in the original IEEE Std.1547.In the transition-to-island mode, islanded detection is necessary and then the DR system will be able to disconnect from the main grid, allowing a safe islanded operation.On the other hand, in islanded mode the DR operates without the presence of the main grid.Further, in the reconnection mode the DR should be able to reconnect to the main grid when it is present again.Since the islanding operation has been clearly defined by the IEEE Std.1547.4,future electrical system planning should consider the paralleling issues of islanding generation [5][6][7].
In islanded mode, frequency-and voltage-droop controls are often implemented in the local control of the inverters, which are operated as voltage sources, in order to share real and reactive powers.The droop control method is based on a concept in power system.When AC generator increase output power, the frequency is drooping accordingly [8][9][10].On the other hand, in grid-connected mode, inverters are conventionally controlled as current sources [11][12][13][14].Consequently, a complex system is required in order to accomplish proper transition without undergoing large transient current.This transition between voltage and current source has been intensively studied in the recent years, being difficult to achieve in practice [15][16][17][18][19].The droop-controlled voltage source inverter has been proposed to operate in both grid-connected and islanded modes without requiring a control transition between current and voltage sources [20].The virtual inductance concept was proposed to reduce the inrush current when connecting a new voltage source inverter to an existing microgrid [21][22][23].However, grid synchronization is also required to suppress the peak transient current of the inverter before mode transition.High inrush current may still appear in the transition from islanded to grid-connected modes due to phase error in the phase-locked-loop (PLL) system or in the voltage sensors, especially in case of low line impedance [15].
The authors have presented a droop-controlled voltage source inverter (VSI) with a seamless transition between islanded and grid-connected operation [24,25], in which riding-through control and virtual inductance concept were proposed to suppress transient current.In this paper, we further present full experimental verification and design guideline.As shown in Figure 1, various inverters and local loads are tied to the PCC (point of common coupling) [26].The proposed droop-controlled inverter regulates the voltage and the frequency of the microgrid, whereas the other inverters are operated as current-controlled source (grid-following inverter).The solid-state transfer switch (STS) connects the microgrid to the utility through the impedance Z g , which includes both line and transformer impedances.The inrush current, due to asynchronous operation of STS, is able to be reduced by activating a current control loop.A local PLL is proposed in order to obtain the angle of the grid voltage, which is used to correct the angle of the droop controller voltage reference.In addition, a virtual inductance loop is designed in order to reduce the oscillating current due to the mode transferring between islanded and grid-connected modes.Based on this algorithm, the transient current between the inverter and the grid can be reduced to an acceptable level, without triggering protections of the system.In contrast with those presented in the state-of-the-art [15][16][17][18], this algorithm does not need to sense the grid-side voltage for phase synchronous, which may be difficult to reach if the inverter is far away from the PCC.The method could be extended to inverter-based DPGSs, in order to reduce the inrush current and to ride-through grid power-quality events, such as voltage sags and swells.The paper is organized as follows.Section 2 presents the operation principle of the proposed control approach.Section 3 shows the design methodology of the main control parameters.Section 4 presents the experimental results when the inverter transfers from islanded to grid-connected modes.Section 5 concludes the paper.In islanded mode, frequency-and voltage-droop controls are often implemented in the local control of the inverters, which are operated as voltage sources, in order to share real and reactive powers.The droop control method is based on a concept in power system.When AC generator increase output power, the frequency is drooping accordingly [8][9][10].On the other hand, in gridconnected mode, inverters are conventionally controlled as current sources [11][12][13][14].Consequently, a complex system is required in order to accomplish proper transition without undergoing large transient current.This transition between voltage and current source has been intensively studied in the recent years, being difficult to achieve in practice [15][16][17][18][19].The droop-controlled voltage source inverter has been proposed to operate in both grid-connected and islanded modes without requiring a control transition between current and voltage sources [20].The virtual inductance concept was proposed to reduce the inrush current when connecting a new voltage source inverter to an existing microgrid [21][22][23].However, grid synchronization is also required to suppress the peak transient current of the inverter before mode transition.High inrush current may still appear in the transition from islanded to grid-connected modes due to phase error in the phase-locked-loop (PLL) system or in the voltage sensors, especially in case of low line impedance [15].
The authors have presented a droop-controlled voltage source inverter (VSI) with a seamless transition between islanded and grid-connected operation [24,25], in which riding-through control and virtual inductance concept were proposed to suppress transient current.In this paper, we further present full experimental verification and design guideline.As shown in Figure 1, various inverters and local loads are tied to the PCC (point of common coupling) [26].The proposed droop-controlled inverter regulates the voltage and the frequency of the microgrid, whereas the other inverters are operated as current-controlled source (grid-following inverter).The solid-state transfer switch (STS) connects the microgrid to the utility through the impedance Zg, which includes both line and transformer impedances.The inrush current, due to asynchronous operation of STS, is able to be reduced by activating a current control loop.A local PLL is proposed in order to obtain the angle of the grid voltage, which is used to correct the angle of the droop controller voltage reference.In addition, a virtual inductance loop is designed in order to reduce the oscillating current due to the mode transferring between islanded and grid-connected modes.Based on this algorithm, the transient current between the inverter and the grid can be reduced to an acceptable level, without triggering protections of the system.In contrast with those presented in the state-of-the-art [15][16][17][18], this algorithm does not need to sense the grid-side voltage for phase synchronous, which may be difficult to reach if the inverter is far away from the PCC.The method could be extended to inverterbased DPGSs, in order to reduce the inrush current and to ride-through grid power-quality events, such as voltage sags and swells.The paper is organized as follows.Section 2 presents the operation principle of the proposed control approach.Section 3 shows the design methodology of the main control parameters.Section 4 presents the experimental results when the inverter transfers from islanded to grid-connected modes.Section 5 concludes the paper.

Operation Principle
Figure 2 shows the power stage of the three-phase three-leg inverter supplied by a dc-link, and ended by an LC filter connected to a local load (R ab , R bc , R ac ).The static transfer switch (STS) connects the local load to the main grid through the grid impedance (Z ga , Z gb , Z gc ).The main power stage parameters are given in Table 1.An effective algorithm is proposed in order to allow the inverter ride-through when transferring between islanded and grid-connected modes, without needing for any grid side information.This is especially interesting when the inverter is far away from the STS, so that no high-speed communication system is needed between the STS and the inverter control.Figure 3 shows the proposed overall control diagram of the inverter.Independently from being connected or disconnected to the main grid, the inverter is normally operated in droop-controlled mode (both switches SW 1 and SW 2 are in position 1), and it is able to switch between droop-controlled to riding-through modes in order to suppress the inrush current (thus SW 1 and SW 2 change from position 1 to position 2).With this order, the droop control will be operated first, followed by the riding-through algorithm.

Operation Principle
Figure 2 shows the power stage of the three-phase three-leg inverter supplied by a dc-link, and ended by an LC filter connected to a local load (Rab, Rbc, Rac).The static transfer switch (STS) connects the local load to the main grid through the grid impedance (Zga, Zgb, Zgc).The main power stage parameters are given in Table 1.An effective algorithm is proposed in order to allow the inverter ride-through when transferring between islanded and grid-connected modes, without needing for any grid side information.This is especially interesting when the inverter is far away from the STS, so that no high-speed communication system is needed between the STS and the inverter control.Figure 3 shows the proposed overall control diagram of the inverter.Independently from being connected or disconnected to the main grid, the inverter is normally operated in droop-controlled mode (both switches SW1 and SW2 are in position 1), and it is able to switch between droop-controlled to riding-through modes in order to suppress the inrush current (thus SW1 and SW2 change from position 1 to position 2).With this order, the droop control will be operated first, followed by the riding-through algorithm.

Droop Control
As can be seen in Figure 3, inverter output voltage and current are transferred into a stationary frame where the superscripts are denoted as 's'.The voltage reference Edq * is determined according to

Operation Principle
Figure 2 shows the power stage of the three-phase three-leg inverter supplied by a dc-link, and ended by an LC filter connected to a local load (Rab, Rbc, Rac).The static transfer switch (STS) connects the local load to the main grid through the grid impedance (Zga, Zgb, Zgc).The main power stage parameters are given in Table 1.An effective algorithm is proposed in order to allow the inverter ride-through when transferring between islanded and grid-connected modes, without needing for any grid side information.This is especially interesting when the inverter is far away from the STS, so that no high-speed communication system is needed between the STS and the inverter control.Figure 3 shows the proposed overall control diagram of the inverter.Independently from being connected or disconnected to the main grid, the inverter is normally operated in droop-controlled mode (both switches SW1 and SW2 are in position 1), and it is able to switch between droop-controlled to riding-through modes in order to suppress the inrush current (thus SW1 and SW2 change from position 1 to position 2).With this order, the droop control will be operated first, followed by the riding-through algorithm.

Droop Control
As can be seen in Figure 3, inverter output voltage and current are transferred into a stationary frame where the superscripts are denoted as 's'.The voltage reference Edq * is determined according to

Droop Control
As can be seen in Figure 3, inverter output voltage and current are transferred into a stationary frame where the superscripts are denoted as 's'.The voltage reference E dq * is determined according to both active power versus frequency (P-ω) droop and reactive power versus voltage (Q-V) droop.Both P-ω and Q-V droop equations can be expressed as follows: where ω o is the nominal frequency, P o is the rated active power, E o is the nominal voltage, Q o is the rated reactive power, m is the P-ω droop coefficient, and n is the Q-V droop coefficient.A low-pass filter (LPF) with a cut-off frequency of 10 Hz is used to filter the ripple components when calculating P and Q.Moreover, LPF is able to help stabilize the droop control of the proposed inverter.Note that Q-V droop control is needed just for compensating possible voltage variations in the grid, thus reducing the amount of reactive power injected according to the maximum allowed voltage variations [20].The droop control is suitable to make the inverter work as a voltage source in both islanded and grid-connected modes.However, the transition between these two modes may result in high inrush current that may damage the system.The proposed method will allow the droop-controlled inverter to improve the transient response when transferring between modes, by detecting the inrush current, activating a current control loop during the transient, and then transferring back to the droop-controlled mode smoothly by using a virtual inductance loop.
When a droop-controlled inverter operates in islanded mode, the frequency and amplitude are deviated according to the amount of active and reactive powers delivered by the inverters, as follows: where ∆ω is the frequency deviation (ω − ω o ), ∆E is the amplitude deviation (E − E o ), ∆P is the active power deviation (P − P o ) and ∆Q is the reactive power deviation (Q − Q o ).On the other hand, when the inverter is operated in grid-connected mode, the frequency and amplitude are fixed by the grid, so that the delivered active and reactive powers will be P o and Q o if ω o and E o coincide with the grid frequency and amplitude.From Equations ( 3) and ( 4), power deviations ∆P and ∆Q can be reduced by using large droop coefficients m and n.

Multi-Loop Voltage Control
In order to track the voltage reference E dq * generated by the droop control, a multi-loop voltage control is realized by using a proportional gain k p plus a voltage feedforward, as shown in Figure 3 [21].Due to the feedforward loop, the output voltage of the inverter can be controlled within an acceptable steady-state error and a proper transient behavior.In addition, a time-derivative term of the capacitor voltage is used to reduce the resonance produced by the filter capacitor C f .Here, a proportional gain k d is designed to accomplish a critical damped response of the inverter.Finally, the PWM is realized to produce the switching signals of the inverter.A design example of the multi-loop voltage control will be introduced in the next section.

Riding-through Algorithm
When the inverter is transferred from islanded to grid-connected modes, it may suffer from a large transient current due to the phase difference between E abc and v g,abc .In order to obtain a seamlessly transition, we present a control algorithm able to help the inverter to ride through this transient.Figure 3 shows the proposed control method, including a local phase-lock loop (PLL) [27], a current control, and a virtual inductance loop.The applied local PLL is shown in Figure 4.The subscript 'e' denotes the signal under dq-frame.A PI control is used to determine the phase angle when q-axis component is controlled to zero.The frequency feedforward term ω ff = 377 is to boost transient response when the inverter starts operation.A detailed flow chart is given in Figure 5 in order to illustrate the conditions required during the mode transition.If when closing the STS, the transient current is large enough being bigger than a certain threshold I TH , then the inverter control will temporarily switch to the riding-through mode (SW 1 and SW 2 will switch to position 2) for a time interval T RD .During this time period, the inverter is operated in current control mode with zero current command (i * = 0) and the PLL updates the reference angle of droop controller to align inverter voltage with grid voltage even though the output of droop controller is disable.This action will reduce the phase difference between the inverter and the grid due to the uncoordinated connection.Note that a short time delay T RD is required for the PLL to reach the steady state.After that, the inverter will switch back to droop-controlled mode (SW 1 and SW 2 switch back to position 1) with a virtual inductance that starts with a large virtual inductor value and is gradually reduced to a small final value, expressed as follows [12]: (5) where L vf and L vi are final and initial inductances, respectively, and τ is the time constant.Thus, an induced voltage in ( 6) is produced to react against the transient current.The stability of the inverter can also be improved by means of the virtual inductance loop [23].
Energies 2016, 9, 732 5 of 15 interval TRD.During this time period, the inverter is operated in current control mode with zero current command (i * = 0) and the PLL updates the reference angle of droop controller to align inverter voltage with grid voltage even though the output of droop controller is disable.This action will reduce the phase difference between the inverter and the grid due to the uncoordinated connection.Note that a short time delay TRD is required for the PLL to reach the steady state.After that, the inverter will switch back to droop-controlled mode (SW1 and SW2 switch back to position 1) with a virtual inductance that starts with a large virtual inductor value and is gradually reduced to a small final value, expressed as follows [12]: where Lvf and Lvi are final and initial inductances, respectively, and τ is the time constant.Thus, an induced voltage in ( 6) is produced to react against the transient current.The stability of the inverter can also be improved by means of the virtual inductance loop [23].

Main Control Parameter Design
This section is devoted to presenting a design example in order to fix the multiple parameters of the proposed control algorithms.The discussion will include the droop coefficients, the parameters of the multi-loop voltage control, and the virtual inductance.

Droop Coefficients
According to droop Equations ( 1) and ( 2), the droop coefficients can be designed by using the root locus method [28].Considering two inverters are connected in parallel.One is treated as grid interval TRD.During this time period, the inverter is operated in current control mode with zero current command (i * = 0) and the PLL updates the reference angle of droop controller to align inverter voltage with grid voltage even though the output of droop controller is disable.This action will reduce the phase difference between the inverter and the grid due to the uncoordinated connection.Note that a short time delay TRD is required for the PLL to reach the steady state.After that, the inverter will switch back to droop-controlled mode (SW1 and SW2 switch back to position 1) with a virtual inductance that starts with a large virtual inductor value and is gradually reduced to a small final value, expressed as follows [12]: where Lvf and Lvi are final and initial inductances, respectively, and τ is the time constant.Thus, an induced voltage in ( 6) is produced to react against the transient current.The stability of the inverter can also be improved by means of the virtual inductance loop [23].

Main Control Parameter Design
This section is devoted to presenting a design example in order to fix the multiple parameters of the proposed control algorithms.The discussion will include the droop coefficients, the parameters of the multi-loop voltage control, and the virtual inductance.

Droop Coefficients
According to droop Equations ( 1) and ( 2), the droop coefficients can be designed by using the root locus method [28].Considering two inverters are connected in parallel.One is treated as grid

Main Control Parameter Design
This section is devoted to presenting a design example in order to fix the multiple parameters of the proposed control algorithms.The discussion will include the droop coefficients, the parameters of the multi-loop voltage control, and the virtual inductance.

Droop Coefficients
According to droop Equations ( 1) and ( 2), the droop coefficients can be designed by using the root locus method [28].Considering two inverters are connected in parallel.One is treated as grid and the other is droop-controlled inverter.The corresponding equations of the low-pass filter, droop controller and the angle of voltage are given as: ) where P ins and Q ins are calculated by the measuring inverter output current and output voltage.
Note that is the angle of the voltage E. Thus, the state-space equation of one inverter can be developed from small signal analysis: .
For two inverters, the equations can be expanded as: .
The droop coefficients of the inverter which represent utility are set as very small due to their stiffness.Figure 6 shows the movement of roots when varying the P-ω droop coefficient m value.Note that the grid is assumed to be a stiff voltage source.As can be seen, the two roots become complex conjugate when m increases from 0.0001 to 0.1.Note that the system is stable with a damped oscillation only.Then, we can consider parameter variation in both n and m. Figure 7 shows the roots moving to the right half-plane when increasing both coefficients.These results show that the system will become unstable for large n values.Based on the above observation, droop coefficients m and n can be chosen to achieve an acceptable transient response within the operation range.

Multi-Loop Voltage Control
Figure 8 shows the model of the multi-loop voltage control, including computational and PWM delays.The transfer function from V'(s) to E(s) and the open-loop transfer function from E * (s) to E(s) are given by ( 14) and (15), respectively: We can design the derivative gain kd according to the quality factor with the critically damping condition of (16).As can be seen from Figure 9, the high frequency resonance may cause instability when kd = 0.In the case of kd = 0.00535 (system critically damped), the resonance is clearly suppressed and the phase lagging is improved.In case of over-damping condition (kd = 0.001064), the stability is also guaranteed, but its time response is slower than that of the critically damping case.After determining kd, the proportional gain kp can be designed according to the frequency response of the open-loop transfer function of (15).As shown in Figure 10, the crossover frequency is 790 Hz and phase margin is 59.1° for kp = 3:

Multi-Loop Voltage Control
Figure 8 shows the model of the multi-loop voltage control, including computational and PWM delays.The transfer function from V'(s) to E(s) and the open-loop transfer function from E * (s) to E(s) are given by ( 14) and (15), respectively: We can design the derivative gain kd according to the quality factor with the critically damping condition of (16).As can be seen from Figure 9, the high frequency resonance may cause instability when kd = 0.In the case of kd = 0.00535 (system critically damped), the resonance is clearly suppressed and the phase lagging is improved.In case of over-damping condition (kd = 0.001064), the stability is also guaranteed, but its time response is slower than that of the critically damping case.After determining kd, the proportional gain kp can be designed according to the frequency response of the open-loop transfer function of (15).As shown in Figure 10, the crossover frequency is 790 Hz and phase margin is 59.1° for kp = 3:

Multi-Loop Voltage Control
Figure 8 shows the model of the multi-loop voltage control, including computational and PWM delays.The transfer function from V'(s) to E(s) and the open-loop transfer function from E * (s) to E(s) are given by ( 14) and ( 15), respectively: We can design the derivative gain k d according to the quality factor with the critically damping condition of (16).As can be seen from Figure 9, the high frequency resonance may cause instability when k d = 0.In the case of k d = 0.00535 (system critically damped), the resonance is clearly suppressed and the phase lagging is improved.In case of over-damping condition (k d = 0.001064), the stability is also guaranteed, but its time response is slower than that of the critically damping case.After determining k d , the proportional gain k p can be designed according to the frequency response of the open-loop transfer function of (15).As shown in Figure 10, the crossover frequency is 790 Hz and phase margin is 59.1 • for k p = 3: > 0.5, (under damping) = 0.5, (critical damping) < 0.5, (over damping)

Virtual Inductance Loop
this subsection, we will discuss the parameters design of the virtual inductance loop, including Lvf, Lvi, and τ. Figure 11 shows the equivalent circuit considering the virtual inductance loop.Similarly, the dynamic equation and the root locus are used for stability analysis purposes.Figure 12 shows the root locus when the virtual inductance Lv decreases from 5 H to 80 μH.As demonstrated, roots will be close to the real-axis as Lv increases.That means the stability of the system is improved

Virtual Inductance Loop
In this subsection, we will discuss the parameters design of the virtual inductance loop, including Lvf, Lvi, and τ. Figure 11 shows the equivalent circuit considering the virtual inductance loop.Similarly, the dynamic equation and the root locus are used for stability analysis purposes.Figure 12 shows the root locus when the virtual inductance Lv decreases from 5 H to 80 μH.As demonstrated, roots will be close to the real-axis as Lv increases.That means the stability of the system is improved

Virtual Inductance Loop
In this subsection, we will discuss the parameters design of the virtual inductance loop, including Lvf, Lvi, and τ. Figure 11 shows the equivalent circuit considering the virtual inductance loop.Similarly, the dynamic equation and the root locus are used for stability analysis purposes.Figure 12 shows the root locus when the virtual inductance Lv decreases from 5 H to 80 μH.As demonstrated, roots will be close to the real-axis as Lv increases.That means the stability of the system is improved

Virtual Inductance Loop
In this subsection, we will discuss the parameters design of the virtual inductance loop, including L vf , L vi , and τ. Figure 11 shows the equivalent circuit considering the virtual inductance loop.Similarly, the dynamic equation and the root locus are used for stability analysis purposes.Figure 12 shows the root locus when the virtual inductance L v decreases from 5 H to 80 µH.As demonstrated, roots will be close to the real-axis as L v increases.That means the stability of the system is improved with larger virtual inductance.However, induced voltage drop on the virtual inductance will limit the output current of the inverter, which is a compromise in determining L vf .
Energies 2016, 9, 732 9 of 15 with larger virtual inductance.However, induced voltage drop on the virtual inductance will limit the output current of the inverter, which is a compromise in determining Lvf.L v =80μH When the operation of the inverter transfers back to droop-controlled mode, we assume that the same voltage amplitude exists on Lv, but with a small phase difference δ.By taking account of the phasor analysis, the voltage drop on Lv is 2Vpsin(δ/2) in Figure 11, where Vp means peak voltage value on E. Because of the assumption of a small phase difference δ, the voltage drop can be approximated as Vpδ.Thus, the maximum inrush current Ip of the inverter can be expressed as follows: that can be used to determine Lvi based on the accepted current limitation.Note that a small Lvi value may trigger inverter protection or cause the inverter transfer to riding-through mode more than one time.On the other hand, the time constant τ determines the decay speed of the virtual inductance, which affects the dynamic behavior of the droop control and oscillating current between the inverter and the grid.We can tune the value according to the droop coefficient as well as the line impedance.

Impact on an Inverter-Dominated System
As shown in Figure 1, except for the proposed inverter, the other inverters are controlled as current sources.In this case, the mode switching of the proposed inverter does not result in stability issues due to voltage-follow characteristic of the current-controlled inverters.In an inverterdominated power system, droop control is normally used to accomplish power sharing among multiple voltage-controlled inverters.Traditional voltages-controlled inverters may temporarily supply large currents beyond their rating due to the power mismatch.This situation probably triggers circuit protection and results in unintentional shutdowns of the inverters.However, the proposed inverter is able to switch to ride-through mode to reduce any inrush current due to system disturbances.This can improve the system stability, especially in low-voltage high impedance networks.with larger virtual inductance.However, induced voltage drop on the virtual inductance will limit the output current of the inverter, which is a compromise in determining Lvf.L v =80μH When the operation of the inverter transfers back to droop-controlled mode, we assume that the same voltage amplitude exists on Lv, but with a small phase difference δ.By taking account of the phasor analysis, the voltage drop on Lv is 2Vpsin(δ/2) in Figure 11, where Vp means peak voltage value on E. Because of the assumption of a small phase difference δ, the voltage drop can be approximated as Vpδ.Thus, the maximum inrush current Ip of the inverter can be expressed as follows: that can be used to determine Lvi based on the accepted current limitation.Note that a small Lvi value may trigger inverter protection or cause the inverter transfer to riding-through mode more than one time.On the other hand, the time constant τ determines the decay speed of the virtual inductance, which affects the dynamic behavior of the droop control and oscillating current between the inverter and the grid.We can tune the value according to the droop coefficient as well as the line impedance.

Impact on an Inverter-Dominated System
As shown in Figure 1, except for the proposed inverter, the other inverters are controlled as current sources.In this case, the mode switching of the proposed inverter does not result in stability issues due to voltage-follow characteristic of the current-controlled inverters.In an inverterdominated power system, droop control is normally used to accomplish power sharing among multiple voltage-controlled inverters.Traditional voltages-controlled inverters may temporarily supply large currents beyond their rating due to the power mismatch.This situation probably triggers circuit protection and results in unintentional shutdowns of the inverters.However, the proposed inverter is able to switch to ride-through mode to reduce any inrush current due to system disturbances.This can improve the system stability, especially in low-voltage high impedance networks.When the operation of the inverter transfers back to droop-controlled mode, we assume that the same voltage amplitude exists on L v , but with a small phase difference δ.By taking account of the phasor analysis, the voltage drop on L v is 2V p sin(δ/2) in Figure 11, where V p means peak voltage value on E. Because of the assumption of a small phase difference δ, the voltage drop can be approximated as V p δ. Thus, the maximum inrush current I p of the inverter can be expressed as follows: that can be used to determine L vi based on the accepted current limitation.Note that a small L vi value may trigger inverter protection or cause the inverter transfer to riding-through mode more than one time.On the other hand, the time constant τ determines the decay speed of the virtual inductance, which affects the dynamic behavior of the droop control and oscillating current between the inverter and the grid.We can tune the value according to the droop coefficient as well as the line impedance.

Impact on an Inverter-Dominated System
As shown in Figure 1, except for the proposed inverter, the other inverters are controlled as current sources.In this case, the mode switching of the proposed inverter does not result in stability issues due to voltage-follow characteristic of the current-controlled inverters.In an inverter-dominated power system, droop control is normally used to accomplish power sharing among multiple voltage-controlled inverters.Traditional voltages-controlled inverters may temporarily supply large currents beyond their rating due to the power mismatch.This situation probably triggers circuit protection and results in unintentional shutdowns of the inverters.However, the proposed inverter is able to switch to ride-through mode to reduce any inrush current due to system disturbances.This can improve the system stability, especially in low-voltage high impedance networks.

Experimental Results
A laboratory-scale prototype was built and tested in order to verify the proposed seamless transition method.The experimental setup is shown in Figure 13 and the parameters are given in Table 2.When the STS is OFF, the inverter is operated in islanded mode.The setup of the current threshold is determined based on the inverter rating.In this experiment, the current threshold is set as two times the inverter rating.Figure 14 shows steady-state voltage and current waveforms of the inverter in islanded mode.Figure 15 shows the transient response of the inverter output voltage, calculated active power, and currents when the load is increased.Obviously, the amplitude of inverter output voltage is maintained at the nominal value and the output power of the inverter increases from 1 kW to 2 kW.Notice that the calculated active power shown in Figure 15a is processed by a LPF.

Experimental Results
A laboratory-scale prototype was built and tested in order to verify the proposed seamless transition method.The experimental setup is shown in Figure 13 and the parameters are given in Table 2.When the STS is OFF, the inverter is operated in islanded mode.The setup of the current threshold is determined based on the inverter rating.In this experiment, the current threshold is set as two times the inverter rating.Figure 14 shows steady-state voltage and current waveforms of the inverter in islanded mode.Figure 15 shows the transient response of the inverter output voltage, calculated active power, and currents when the load is increased.Obviously, the amplitude of inverter output voltage is maintained at the nominal value and the output power of the inverter increases from 1 kW to 2 kW.Notice that the calculated active power shown in Figure 15a is processed by a LPF.

Experimental Results
A laboratory-scale prototype was built and tested in order to verify the proposed seamless transition method.The experimental setup is shown in Figure 13 and the parameters are given in Table 2.When the STS is OFF, the inverter is operated in islanded mode.The setup of the current threshold is determined based on the inverter rating.In this experiment, the current threshold is set as two times the inverter rating.Figure 14 shows steady-state voltage and current waveforms of the inverter in islanded mode.Figure 15 shows the transient response of the inverter output voltage, calculated active power, and currents when the load is increased.Obviously, the amplitude of inverter output voltage is maintained at the nominal value and the output power of the inverter increases from 1 kW to 2 kW.Notice that the calculated active power shown in Figure 15a is processed by a LPF.This experiment can verify effectiveness of the multi-loop voltage control.It needs to be mentioned that the root mean square (rms) values shown in Figure 15b are not the same.It is the This experiment can verify effectiveness of the multi-loop voltage control.It needs to be mentioned that the root mean square (rms) values shown in Figure 15b are not the same.It is the This experiment can verify effectiveness of the multi-loop voltage control.It needs to be mentioned that the root mean square (rms) values shown in Figure 15b are not the same.It is the oscilloscope root-mean-square value calculated by taking into account the whole waveform, which is shown on the monitor.Due to the transient behavior of the current, the calculation results include unbalance and thus it are pointless.Figure 16 shows that inverter voltage and grid voltage when the STS is closed at T 1 .At this moment, the phase difference between E abc and v g,abc is equal to 169.9 • .oscilloscope root-mean-square value calculated by taking into account the whole waveform, which is shown on the monitor.Due to the transient behavior of the current, the calculation results include unbalance and thus it are pointless.Figure 16 shows that inverter voltage and grid voltage when the STS is closed at T1.At this moment, the phase difference between Eabc and vg,abc is equal to 169.9°.As can be seen from Figure 17, the inverter current exceeds the threshold limitation at T1. Thus, subsequently the inverter controller automatically switches to the riding-through mode.The current controller of the riding through mode fixes the inverter output current to almost zero and the local PLL aligns the phase angle of the voltage command with respect to the grid at the same time.Since the proposed strategy does not use any phase synchronization, a voltage dip appears in the inverter output as shown in Figure 16 when the STS is closed.The duration of the voltage dip is less than the the clear time (160 ms) in case of abnormal voltage according to IEEE 1547.2-2008[3].After a ridingthrough interval TRD, the inverter switches back to droop-controlled mode at T2, but still works in grid-connected mode.At the same time T2, the virtual inductance loop is initiated.Figure 18 shows exponentially decreasing feature of the designed virtual inductance with Lvi = 3 H, Lvf = 80 μH and τ = 0.3 s (see (5)).As can be seen from Figure 17, the inverter current exceeds the threshold limitation at T 1 .Thus, subsequently the inverter controller automatically switches to the riding-through mode.The current controller of the riding through mode fixes the inverter output current to almost zero and the local PLL aligns the phase angle of the voltage command with respect to the grid at the same time.Since the proposed strategy does not use any phase synchronization, a voltage dip appears in the inverter output as shown in Figure 16 when the STS is closed.The duration of the voltage dip is less than the the clear time (160 ms) in case of abnormal voltage according to IEEE 1547.2-2008[3].After a riding-through interval T RD , the inverter switches back to droop-controlled mode at T 2 , but still works in grid-connected mode.At the same time T 2 , the virtual inductance loop is initiated.Figure 18 shows exponentially decreasing feature of the designed virtual inductance with L vi = 3 H, L vf = 80 µH and τ = 0.3 s (see ( 5)).
Energies 2016, 9, 732 12 of 15 oscilloscope root-mean-square value calculated by taking into account the whole waveform, which is shown on the monitor.Due to the transient behavior of the current, the calculation results include unbalance and thus it are pointless.Figure 16 shows that inverter voltage and grid voltage when the STS is closed at T1.At this moment, the phase difference between Eabc and vg,abc is equal to 169.9°.As can be seen from Figure 17, the inverter current exceeds the threshold limitation at T1. Thus, subsequently the inverter controller automatically switches to the riding-through mode.The current controller of the riding through mode fixes the inverter output current to almost zero and the local PLL aligns the phase angle of the voltage command with respect to the grid at the same time.Since the proposed strategy does not use any phase synchronization, a voltage dip appears in the inverter output as shown in Figure 16 when the STS is closed.The duration of the voltage dip is less than the the clear time (160 ms) in case of abnormal voltage according to IEEE 1547.2-2008[3].After a ridingthrough interval TRD, the inverter switches back to droop-controlled mode at T2, but still works in grid-connected mode.At the same time T2, the virtual inductance loop is initiated.Figure 18 shows exponentially decreasing feature of the designed virtual inductance with Lvi = 3 H, Lvf = 80 μH and τ = 0.3 s (see (5)).   Figure 17 after T2 shows that the virtual inductance can help reduce the circulating current resulting from both droop operation and phase error.It is worth mentioning that the inverter output current shows oscillation after T2 because the droop controller is trying to accomplish power sharing, and it will reach a steady-state after a few cycles.For comparison purposes, Figure 19 shows the same test result as Figure 16 without the virtual inductance loop applied.Obviously, the inverter current of Figure 19 after T2 is higher than that of Figure 17.At the steady-state of the grid-connected operation, the output power of the inverter is 1 kW as shown in Figure 20.Note that the current spikes are different at the instant T1 because Figures 17 and 19 are tested in different instants.
Experimental results show that how the inrush current can be limited to an acceptable level when starting grid-connected operation.When the inverter current is larger than the threshold value, the inverter is switched to ride-through mode and temporarily operated as current mode control with zero current command to reduce the inverter current.When back to droop control mode, the inrush current no longer occurs since the angle of voltage command is updated by PLL to synchronize with the utility and virtual inductance is engaged at the same time.Figure 17 after T 2 shows that the virtual inductance can help reduce the circulating current resulting from both droop operation and phase error.It is worth mentioning that the inverter output current shows oscillation after T 2 because the droop controller is trying to accomplish power sharing, and it will reach a steady-state after a few cycles.For comparison purposes, Figure 19 shows the same test result as Figure 16 without the virtual inductance loop applied.Obviously, the inverter current of Figure 19 after T 2 is higher than that of Figure 17.At the steady-state of the grid-connected operation, the output power of the inverter is 1 kW as shown in Figure 20.Note that the current spikes are different at the instant T 1 because Figures 17 and 19 are tested in different instants.
Experimental results show that how the inrush current can be limited to an acceptable level when starting grid-connected operation.When the inverter current is larger than the threshold value, the inverter is switched to ride-through mode and temporarily operated as current mode control with zero current command to reduce the inverter current.When back to droop control mode, the inrush current no longer occurs since the angle of voltage command is updated by PLL to synchronize with the utility and virtual inductance is engaged at the same time.Figure 17 after T2 shows that the virtual inductance can help reduce the circulating current resulting from both droop operation and phase error.It is worth mentioning that the inverter output current shows oscillation after T2 because the droop controller is trying to accomplish power sharing, and it will reach a steady-state after a few cycles.For comparison purposes, Figure 19 shows the same test result as Figure 16 without the virtual inductance loop applied.Obviously, the inverter current of Figure 19 after T2 is higher than that of Figure 17.At the steady-state of the grid-connected operation, the output power of the inverter is 1 kW as shown in Experimental results show that how the inrush current can be limited to an acceptable level when starting grid-connected operation.When the inverter current is larger than the threshold value, the inverter is switched to ride-through mode and temporarily operated as current mode control with zero current command to reduce the inverter current.When back to droop control mode, the inrush current no longer occurs since the angle of voltage command is updated by PLL to synchronize with the utility and virtual inductance is engaged at the same time.

Conclusions
This paper presents a seamless transition method for droop-controlled inverters between islanded and grid-connected modes.Thus, the inverter is able to transfer between both modes without using any grid-side information.Consequently, the approach is suitable for an IEEE 1547.4 compliant microgrid, in which the voltage source inverter responsible for both frequency and voltage regulation is located far away from the static transfer switch.For this case, an algorithm that coordinates a local PLL and a virtual inductance loop is proposed.Thus, the ver-current will not occur.A control parameter design example and stability analysis are presented as well.The experimental results show that the inverter can transfer from islanded to grid-connected modes even when the inverter voltage is totally out of phase from the grid voltage.

Conclusions
This paper presents a seamless transition method for droop-controlled inverters between islanded and grid-connected modes.Thus, the inverter is able to transfer between both modes without using any grid-side information.Consequently, the approach is suitable for an IEEE 1547.4 compliant microgrid, in which the voltage source inverter responsible for both frequency and voltage regulation is located far away from the static transfer switch.For this case, an algorithm that coordinates a local PLL and a virtual inductance loop is proposed.Thus, the ver-current will not occur.A control parameter design example and stability analysis are presented as well.The experimental results show that the inverter can transfer from islanded to grid-connected modes even when the inverter voltage is totally out of phase from the grid voltage.

Figure 1 .
Figure 1.The proposed droop-controlled voltage source inverter (VSI) inverter in the microgrid system.

Figure 1 .
Figure 1.The proposed droop-controlled voltage source inverter (VSI) inverter in the microgrid system.

Figure 2 .
Figure 2. Power stage of the VSI and its connection to the utility grid.

Figure 3 .
Figure 3.The block diagram of the proposed controller.

Figure 2 .
Figure 2. Power stage of the VSI and its connection to the utility grid.

Figure 2 .
Figure 2. Power stage of the VSI and its connection to the utility grid.

Figure 3 .
Figure 3.The block diagram of the proposed controller.

Figure 3 .
Figure 3.The block diagram of the proposed controller.

Figure 4 .
Figure 4.The block diagram of the applied PLL.

Figure 5 .
Figure 5. Flow chart of the proposed control strategy.

Figure 4 .
Figure 4.The block diagram of the applied PLL.

Figure 4 .
Figure 4.The block diagram of the applied PLL.

Figure 5 .
Figure 5. Flow chart of the proposed control strategy.

Figure 5 .
Figure 5. Flow chart of the proposed control strategy.

Figure 7 .
Figure 7. Root locus when both P-ω and Q-E coefficients vary from 0.0001 to 0.1.

Figure 7 .
Figure 7. Root locus when both P-ω and Q-E coefficients vary from 0.0001 to 0.1.

Figure 7 .
Figure 7. Root locus when both P-ω and Q-E coefficients vary from 0.0001 to 0.1.

Figure 8 .
Figure 8. Model of the multi-loop voltage control.

Figure 9 .
Figure 9. Frequency responses for three different kd.

Figure 9 .
Figure 9. Frequency responses for three different kd.

Figure 9 .Figure 8 .
Figure 9. Frequency responses for three different k d .

Figure 9 .
Figure 9. Frequency responses for three different kd.

Figure 11 .
Figure 11.Simplified circuit considering the virtual inductance loop.

Figure 11 .
Figure 11.Simplified circuit considering the virtual inductance loop.

Figure 11 .
Figure 11.Simplified circuit considering the virtual inductance loop.

Figure 16 .
Figure 16.Inverter output voltage and grid voltage (transient of inverter switching to grid-connected operation) (100 V/div).

Figure 16 .
Figure 16.Inverter output voltage and grid voltage (transient of inverter switching to grid-connected operation) (100 V/div).

Figure 16 .
Figure 16.Inverter output voltage and grid voltage (transient of inverter switching to grid-connected operation) (100 V/div).

Figure 20 .
Figure17after T2 shows that the virtual inductance can help reduce the circulating current resulting from both droop operation and phase error.It is worth mentioning that the inverter output current shows oscillation after T2 because the droop controller is trying to accomplish power sharing, and it will reach a steady-state after a few cycles.For comparison purposes, Figure19shows the same test result as Figure16without the virtual inductance loop applied.Obviously, the inverter current of Figure19after T2 is higher than that of Figure17.At the steady-state of the grid-connected operation, the output power of the inverter is 1 kW as shown in Figure20.Note that the current spikes are different at the instant T1 because Figures17 and 19are tested in different instants.Experimental results show that how the inrush current can be limited to an acceptable level when starting grid-connected operation.When the inverter current is larger than the threshold value, the inverter is switched to ride-through mode and temporarily operated as current mode control with zero current command to reduce the inverter current.When back to droop control mode, the inrush current no longer occurs since the angle of voltage command is updated by PLL to synchronize with the utility and virtual inductance is engaged at the same time.

Table 1 .
Power state parameters.

Table 1 .
Power state parameters.

Table 1 .
Power state parameters.