Modeling and Control of the Distributed Power Converters in a Standalone DC Microgrid

Abstract: A standalone DC microgrid integrated with distributed renewable energy sources, energy storage devices and loads is analyzed. To mitigate the interaction among distributed power modules, this paper describes a modeling and control design procedure for the distributed converters. The system configuration and steady-state analysis of the standalone DC microgrid under study are discussed first. The dynamic models of the distributed converters are then developed from two aspects corresponding to their two operating modes, device-regulating mode and bus-regulating mode. Average current mode control and linear compensators are designed accordingly for each operating mode. The stability of the designed system is analyzed at last. The operation and control design of the system are verified by simulation results.


Introduction
With increasing use of renewable energy sources (RES), the standalone DC microgrid is envisioned as one promising technology to integrate distributed RES, energy storage devices (ESD) and varieties of loads in many power management and distribution applications [1][2][3][4].
In a generic standalone DC microgrid, distributed RES, ESD and loads are interfaced to the DC bus using power electronics converters.There is no specific line regulator; thus, ESD converters or RES converters have to take charge of the bus regulation.Therefore, power converters in the system can be divided into two groups depending on their respective operating modes, bus-regulating mode and device-regulating mode.
In the design of a DC microgrid integrated with distributed power modules, one of the primary concerns is how to avoid the undesirable interaction among different modules.The interaction may appear as two forms: the non-zero output impedance of bus-regulating converters may interfere with the control loops of device-regulating converters, and the non-resistive input impedance of device-regulating converters may affect the control loops of bus-regulating converters.In most applications, the device-regulating converters have to provide strict output voltage regulation to satisfy the voltage requirement of the devices, which, together with the high efficiency of these converters, causes them to perform like constant power sources/loads to the DC bus.Consequently, when the net power of device-regulating converts is towards/against the DC bus, the total closed-loop input impedance of the device-regulating converts can be approximated as a positive/negative incremental resistance, with the magnitude varying with the net power.It may result in significant stability problems, since the impedance interaction is the root of the instability in a source-load interconnected system [5].
To solve the stability issues caused by impedance interaction, several passive damping methods [6,7] and active stabilization methods [8,9] have been proposed.Passive damping methods use passive components, such as resistors, capacitors and inductors, to improve the system stability.Active stabilization methods, on the other hand, usually use some advanced control methods to change the output impedance of the line regulator, so as to avoid the impedance interaction.
However, in a standalone DC microgrid, the regulation of the DC bus is implemented by distributed RES or ESD converters.They should not only be able to regulate the rest of the system in a stable manner, but also operate their own devices efficiently and provide the required protection, such as current limitation.As a result, simple linear control methods are preferred in the design of distributed power converters.The purpose of this work is to develop dynamic models of the distributed converters in a standalone DC microgrid, by which average current mode control and linear compensators could be employed in the control of these converters, so as to improve the performance and stability of the system.This paper is organized as follows.The configuration and operation of the standalone DC microgrid under study are provided in Section 2. In Section 3, dynamic models of the distributed power converters are developed from two aspects, device-regulating mode and bus-regulating mode.Necessary transfer functions for compensator design are derived from these models.The stability of the entire system is analyzed at last.In Section 4, the operation and control design of the system are verified by simulation results.Section 5 concludes this paper.

System Configuration and Operation
Figure 1a shows a simplified architecture of the standalone DC microgrid studied in this work, which is composed of distributed PV arrays, DC loads and battery packs.The target system is based on a 48-V DC bus.These kinds of low voltage DC microgrids have been widely used in residential applications, remote communication stations and data centers [10][11][12].To reduce the development time and cost, as well as to simplify the operation of the system, as shown in Figure 1b, all distributed power sources or loads are interfaced to the DC bus via identical 500-W non-inverting four-switch buck-boost converters, considering their capabilities of bidirectional power flow and voltage step up/down.Very high efficiency over a wide range of operating voltages has already been demonstrated using this topology [13,14].(a) Different operating modes of the standalone DC microgrid are summarized in Table 1.Modes I and II correspond to the case when PV arrays operate in the maximum power point tracking (MPPT) mode, while the DC bus is regulated by the battery packs.Mode III refers to the case when the maximum output power of the PV arrays is greater than the total power demanded by batteries and loads.In this case, to protect the batteries from overcharging, battery charging current is limited; thus, PV converters have to take over the task of bus regulation.In Mode IV, the demanded load power is greater than the total maximum power of PV arrays and battery packs.At this point, load shedding is required in order to maintain the system stability.A simple load shedding scheme based on voltage thresholds can be seamlessly applied [15]; therefore, Mode IV will not be discussed in this paper.From Table 1, it can be concluded that in each operating mode of the standalone DC microgrid, all distributed power converters can be divided into two groups depending on their respective responsibilities: bus-regulating converters and device-regulating converters.PV converters or battery converters take charge of the bus regulation based on the states of the batteries and the voltage level of the DC bus.The rule of the transitions between bus-regulating mode and device-regulating mode is shown in Figure 2. Battery converters switch from the bus-regulating mode to the device-regulating mode when the battery voltage V bat reaches the fully-charged voltage V bat,re f , while the charging current I charge is still positive, and switch back to the bus-regulating mode when the bus voltage V bus is less than its reference value V bus,re f .In the case of PV converters, they switch from the device-regulating mode to the bus-regulating mode when V bus ≥ 1.1V bus,re f and switch back to the device-regulating mode when V bus ≤ 1.05V bus,re f .It should be noted that there is an intermediate state during the transition when both battery converters and PV converters are working in the device-regulating mode.During that state, V bus keeps changing until the next threshold is reached.Based on the above classification, a demonstration circuit diagram of the DC microgrid is shown in Figure 3a, where m converters work in the bus-regulating mode and n converters work in the device-regulating mode.The well-known droop control method [16] is adopted in the bus regulation to guarantee that several distributed converters can operate on the bus simultaneously.Assuming the control loops are well designed in each converter, the bus port of a bus-regulating converter behaves as a voltage source V bus,i in series with a droop resistance R droop,i , while the device port of a device-regulating converter behaves as a constant voltage source V dev,j .Meanwhile, considering the high efficiency of these converters, the device ports of bus-regulating converters and the bus ports of device-regulating converters can be regarded as constant power sinks/sources depending on the direction of the power flow.
When only the effect of each converter with respect to the bus is taken into account, an equivalent circuit diagram of the standalone DC microgrid is obtained in Figure 3b.All of the bus-regulating power modules can be represented as a Thevenin equivalent source (V bus,eq , R droop,eq ), where R droop,eq = R droop,1 • • • R droop,m , and V bus,eq = R droop,eq ∑ m i=1 (V bus,i /R droop,i ).All of the device-regulating power modules can be combined into a power source/sink P dev,eq = ∑ n j=1 P dev,j .
DC bus

Dynamic Modeling and Control Design
The modeling and control design of the distributed converters in a standalone DC microgrid will be discussed from two aspects: device-regulating mode and bus-regulating mode.

Closed-Loop Input Impedance of the Device-Regulating Converters
The small-signal averaged circuit model of a device-regulating converter is shown in Figure 4, where Z dev represents the input impedance of the device.The adopted bidirectional buck-boost converter is supposed to work in the buck mode when V bus > V dev and work in the boost mode when V bus < V dev .Only the continuous conduction mode (CCM) is considered here for simplification, since the device-regulating converters work in CCM for most cases.In the circuit model, the output impedance of bus-regulating converters is assumed to be zero, while the effect of the non-zero output impedance of bus-regulating converters on the dynamics of a device-regulating converter will be discussed in Section 3.3.In the device-regulating converter, the average current mode control method is adopted to simplify the feedback control design, as well as to provide the required current limitation.The small-signal control block diagram of a device-regulating converter is shown in Figure 5. G id (s) and G vd (s) are the transfer functions from control variable d to inductor current îL and device voltage vdev .G ig (s) and G vg (s) are the transfer functions from input voltage vbus to inductor current îL and device voltage vdev .H i (s) and H v (s) are the current and the voltage sensing gains.G ci (s) and G co (s) are the compensators of the inner current loop and outer voltage loop, respectively, and G m is the gain of the pulse width modulator.The derivations of G id (s), G vd (s), G ig (s) and G vg (s) for a device-regulating converter working in the buck mode or boost mode are expressed in Table 2, where In the control design, the target crossover frequency of the inner current loop is f ci = f sw /10, while that of the outer voltage loop is f co = f ci /10, where f sw is the converter switching frequency.The detailed design of the average current mode control for a device-regulating converter is a classic topic [17,18], so it will not be discussed here.
The small-signal control block diagram of a device-regulating converter.
Table 2.The derivations of G id (s), G vd (s), G ig (s) and G vg (s).

Transfer Function Buck Mode
Boost Mode To derive the closed-loop input impedance of a device-regulating converter, the control loops depicted in Figure 5 are expressed as Equation Set 1 The converter input current îbus can be expressed as the linear combination of îL and d as below: where M = D, j = I L in the buck mode and M = 1, j = 0 in the boost mode.Combining Equations 1 and 2, the closed-loop input impedance of a device-regulating converter is derived as: Figure 6 shows a comparison between the derived closed-loop input impedance Z in and the incremental resistance R in of a device-regulating converter when it operates at full power (500 W), where subscripts buck and boost represent that the converter works in the buck or boost mode.It can be seen that the incremental resistance R in is a good approximation to Z in below the crossover frequency ( f co = 1 kHz) of the converter's outer loop.Key parameters of the bidirectional buck-boost converter are shown in Table 3.Other parameters used in this example are V dev,buck = 24 V and V dev,boost = 72 V.The incremental resistance R in is derived based on R in = −V 2 bus /P dev , which assumes no losses exist in a device-regulating converter, and it behaves as a constant power load/source.P dev is positive when the power is transferred from the DC bus to the device.Table 3. Key parameters of the bidirectional buck-boost converter.
100 µH 10 mΩ 1 mF 150 mΩ 100 kHz In a standalone DC microgrid, n device-regulating converters operate on the bus simultaneously.Thus, the total closed-loop input impedance Z in,dev of these converters can be expressed as the parallel combination of their respective input impedance Z in From Equation 4, it can be concluded that the input impedance Z in,dev is determined by the net power P dev,net of the device-regulating converters.When P dev,net < 0, which means the direction of the net power is towards the DC bus, Z in,dev can be approximated as a positive resistance at frequencies below f co .On the contrary, typical negative resistance appears when P dev,net > 0.

Modeling and Control Design of the Bus-Regulating Converters
In a standalone DC microgrid, PV or battery converters work as the bus-regulating converters.Since a relatively low bus voltage of 48 V is chosen in this work, both PV and battery converters can easily be configured working in the buck mode.Figure 7 shows a circuit diagram where m bus-regulating converters and n device-regulating converters are interfaced to the DC bus.Z in,1 − Z in,n represent the closed-loop input impedance of device-regulating converters.Z bus,1 − Z bus,m+n represent the line impedance.To develop the dynamic model of a bus-regulating converter, Z in,1 − Z in,n , Z bus,1 − Z bus,m+n and Z C can be combined into a single impedance Z in,tot to represent their overall dynamics.When bus-regulating Converter 1 is analyzed, Z in,tot can be expressed as: Actually, a simplified expression of Z in,tot can be derived as Z in,tot = Z C,tot Z in,dev if the bus impedance is neglected, where Z C,tot is the total impedance of all bus capacitors.
The averaged small-signal circuit of a bus-regulating converter is depicted in Figure 8; R dev is the equivalent small-signal resistance of the battery pack (R bat ) or PV array (R pv ).Both the CCM and the discontinuous conduction mode (DCM) are taken into account in the small-signal model, since the power processed by the bus-regulating converters varies with the net power P dev,net of device-regulating converters.
In this work, the small-signal model of the battery pack is represented as a voltage source vbat connected in series with its internal resistance R bat .The small-signal model of the PV array is represented as a current source îpv paralleled with a resistance R pv , in which R pv is obtained by the linearization of the nonlinear current-voltage curve of the PV array at its steady-state operating point.Values of R pv used in this work are shown in Figure 9, which are obtained from a PV array model consisting of two series-connected Conergy P 175M PV modules.When a bus-regulating converter works in CCM, the transfer functions of control to inductor current G id,CCM (s) and inductor current to bus voltage G vi,CCM (s) are derived as follows: where Z g = R dev Z C .In DCM, the transfer functions of G id,DCM (s) and G vi,DCM (s) are obtained as follows: where Z g = R dev Z C r 1 and Z load = r 2 (Z L + Z in,tot ).The parameters used in DCM are shown in Table 4, where R e = [(2/M − 1) 2 − 1]R/4, and M is the voltage conversion ratio [19].
Table 4. Parameters of the small-signal DCM model for the buck converter.
The control block diagram of the bus-regulating converters is shown in Figure 10.To provide the required current limitation, average current mode control is also tried in the bus-regulating converters.The droop control method is adopted in the outer control loop for the purpose of current sharing.The resulting expressions for the inner current-loop gain T i (s) and outer voltage-loop gain T v (s) are shown below: where G ci (s) and G co (s) are the compensators for the inner current loop and outer voltage loop, respectively.To achieve the desired crossover frequency and phase margin, different inner compensators G ci,CCM (s) and G ci,DCM (s) are designed according to the conduction mode of the inductor current.Whereas, the outer loop T v (s) is compensated using the same G co (s).The detection of the conduction mode is implemented using the method in [20].
It is a common practice to assume a resistive load in the control design of switching regulators.In this work, control loops T i (s) and T v (s) are designed based on Z in,dev when the net power P dev,net of device-regulating converters is negative, since in this case, the total closed-loop input impedance Z in,dev of device-regulating converters behaves as a positive resistance at low frequencies.Bode plots of T i (s) and T v (s) of a bus-regulating converter when it operates at −300 W (CCM) and −20 W (DCM) are shown in Figure 11, where G ci,CCM (s), G ci,DCM (s) and G co (s) are realized by PI compensators.Key parameters used in this example are m = 2, n = 6, V dev = 60 V, R dev = 20 mΩ, Z bus = 10 mΩ and R droop = 25 mΩ.It can be seen that no right half-plane (RHP) zeroes or poles appear in the loop gains, so the stability and dynamic behavior of the converter could be analyzed using the Bode plots.As shown in the figure, the inner-loop crossover frequency f ci is 10 kHz, and the outer-loop crossover frequency f co is 1 kHz, which all meet the design requirements, f ci = f sw /10 and f co = f ci /10.The phase margins of T i,CCM and T i,DCM are 65 • and 88 • , while the phase margins of T v,CCM and T v,DCM are 70 • and 64 • , respectively.However, when P dev,net is positive, Z in,dev behaves as a negative resistance at low frequencies, which results in one RHP zero in T i (s) and one RHP pole in T v (s).The RHP zero and pole could be calculated numerically, and the effects of the RHP zeroes (circles) and poles (stars) can be observed in the Bode plots shown in Figure 12.In this figure, T i (s) and T v (s) are calculated when the bus-regulating converter operates at 300 W (CCM) and 20 W (DCM), and the PI compensators designed above are still employed in the control loops.So far, it has been demonstrated that loop gains T i (s) and T v (s) of a bus-regulating converter when P dev,net > 0 differ substantially from those when P dev,net < 0. When P dev,net > 0, Bode plots are no longer applicable to the stability analysis, since the RHP zero or pole appears.In order to analyze the stability of the bus-regulating converter, the Nyquist criterion has to be adopted.Actually, it is not difficult to find that the inner current loop T i (s) is no longer stable when P dev,net > 0 by using the Nyquist criterion.However, the stability of a multi-loop controlled converter is not determined by each loop alone, but by both loops working together.For the stability analysis of a bus-regulating converter, two loop gains T 1 (s) and T 2 (s) are measured, as shown in Figure 13.Loop gain T 1 (s) = êy1 / êx1 is measured at Point "1", while loop gain T 2 (s) = êy2 / êx2 is measured at Point "2", where êx1 and êx2 are the small-signal perturbations injected for the measurement of the loop gain and êy1 and êy2 are their corresponding responses, respectively.These two loop gains have been verified regarding their importance in the stability analysis of a multi-loop controlled converter in [21].
. Measurement of the loop gains T 1 (s) and T 2 (s).
Loop gains T 1 (s) and T 2 (s) are expressed as follows: It is easy to find that actually T 2 (s) equals T v (s); thus, one RHP pole exists in T 2 (s).As for T 1 (s), second-order poles appear at the original one due to the cascading of PI compensators.The statement of the Nyquist stability criterion for a continuous system is Z = P − N, where Z is the number of unstable closed-loop poles, P is the number of unstable open-loop poles and N is the number of counter-clockwise encirclements that the Nyquist plot of the loop gain makes around the (−1, j0) point.Nyquist plots of T 1 (s) and T 2 (s) are shown in Figure 14.Both T 1 (s) and T 2 (s) encircle the (−1, j0) point counter-clockwise exactly once (N = 1).As one unstable pole exists in both T 1 (s) and T 2 (s) (P = 1), the closed-loop system is proven to be stable (Z = 0) when P dev,net is positive.While the bus-regulating converter is proven to be stable when P dev,net > 0, knowledge of the system relative stability is still necessary for us.As a result, gain and phase margins of T 1 (s) and T 2 (s) that are defined by the above Nyquist plots are translated into the Bode plots in Figure 15.It can be seen that the control bandwidth of the inner loop is around 10 kHz, while that of the outer loop is 1 kHz, as desired.Fortunately, good system performance can be ensured by the gain and phase margins.Furthermore, to regulate the DC bus voltage, battery and PV converters have to work over a wide range of operating conditions.To guarantee the performance of the bus-regulating converters, loop gains T 1 (s) and T 2 (s) are evaluated under several representative operating conditions.Three power levels (100 W, 200 W and 350 W) are picked out for the PV converters when the solar irradiance is 1000 W/m 2 and the temperature is 25 • C. The PV output voltages V pv and the small-signal linearized resistances R pv corresponding to the three power levels are marked in squares (100 W), triangles (200 W) and stars (350 W) in Figure 9. Three power levels (100 W, 300 W and 500 W) are also picked out for the battery converters.The battery voltage V bat and its internal series resistance R bat are assumed to be constant (V bat = 60 V, R bat = 20 mΩ) when different power is processed, since their variations are much less compared to the PV array.
Bode plots of T 1 (s) and T 2 (s) corresponding to the representative operating conditions are shown in Figure 16.It should be appreciated that neither the gain nor the phase changes significantly over the power levels, device voltages or small-signal device resistances, especially at the crossover frequency.Similar results could also be obtained under other operating conditions, which allows one to conclude that the simple PI compensators designed for the bus-regulating control loops can be implemented under different operating conditions within a reasonable range.

Stability Analysis of the DC Microgrid
Based on the control loops designed in the above subsection (Figure 13), the closed-loop output impedance Z out of a bus-regulating converter can be derived as follows: Actually, the magnitude of Z out is verified to be quite close to R droop due to the adoption of the droop control method and average current mode control.A small-signal equivalent circuit of the standalone DC microgrid can then be obtained in Figure 17, where m converters work in the bus-regulating mode and n converters work in the device-regulating mode.Small-signal Thevenin sources ( vbus,i , Z out,i ) are used to model the closed-loop dynamics of the bus-regulating converters.However, when the closed-loop input impedance Z in,1 − Z in,n is derived in Subsection 3.1, it is assumed that the output impedance Z out,1 − Z out,m of bus-regulating converters is zero.Therefore, it needs to be determined that whether the transfer functions G id (s), G vd (s) that were used to derive Z in,1 − Z in,n in Subsection 3.1 are modified by the none-zero output impedance Z out,1 − Z out,m .Middlebrook's extra element theorem (EET) [5,19] is employed here to determine how the addition of Z out,1 − Z out,m alters these transfer functions.Take G vd (s) as an example.The modified transfer function can be expressed as follows: where G vd (s)| Z out,tot =0 is the transfer function G vd (s) derived in Section 3.1 and Z out,tot is the combination of Z out,1 − Z out,m , Z bus,1 − Z bus,m+n and Z C .When device-regulating Converter 1 is analyzed, Z out,tot can be expressed as below: Additionally, a simplified expression of Z out,tot is derived as below if the bus impedance is neglected: The definition and derivation of the impedance Z N and Z D for a device-regulating converter are described in Table 5.
From Equation 16, it can be easily obtained that when the inequalities of Z out,tot Z N and Z out,tot Z D are satisfied, G vd (s) ≈ G vd (s)| Z out,tot =0 , which means the control loops of the device-regulating converter are not interfered with obviously.Therefore, the comparison between Z out,tot and Z N , Z D needs to be implemented.A standalone DC microgrid, which consists of eight distributed power modules, is taken as an example, where two battery converters work in the bus-regulating mode; three PV converters and three load converters work in the device-regulating mode.The power processed by each converter is listed as follows: P bat = 300 W, P pv = 300 W and P load = 500 W. The comparison result is shown in Figure 18, where both the load converter (buck mode) and the PV converter (boost mode) are analyzed.It can be concluded that the control loops of the device-regulating converter are not affected significantly by the non-zero output impedance of the bus-regulating converters, since a wide separation can be observed between Z out,tot and Z N , Z D .Therefore, the closed-loop input impedance Z in,1 − Z in,n derived in Subsection 3.1 is proven to be a good approximation to the value when Z out,tot is taken into account.Since it has already been verified in Section 3.2 that the stability and performance of the designed bus-regulating control loops are not affected considerably by the input impedance of device-regulating converters, a low degree of interaction among the distributed converters can be predicted in the designed standalone DC microgrid, and the system is stable.

Simulation Results
In order to verify the control design of distributed power converters in a standalone DC microgrid integrated with distributed PV arrays and battery packs, system simulations have been carried out using SimPowerSystems/Simulink.A schematic diagram of the simulated standalone DC microgrid is shown in Figure 19.The simulated system consists of three distributed PV arrays, two battery packs and three resistive loads.All of these distributed devices are connected to a 48-V DC bus via identical 500-W bidirectional buck-boost converters.The configuration of the simulated standalone DC microgrid is shown in Table 6.For the consideration of a stable operation of the system, the maximum discharging power of the battery packs, as well as the maximum output power of the PV arrays, is greater than the total power demand of the loads.In this simulation, a PV array model is chosen from the library of SimPowerSystems, which is composed of two Conergy P 175M modules connected in series.To emulate the fully-charged status of the battery in a short time, a simple model of the battery pack is adopted, which consists of an ideal voltage source in series with a constant internal resistance.

Figure 1 .
Figure 1.(a) Architecture of the standalone DC microgrid.(b) Power stage of the adopted bidirectional non-inverting buck-boost converter.

Figure 2 .
Figure 2. Diagram of the transitions between bus-regulating mode and device-regulating mode.

Figure 3 .
Figure 3. (a) Circuit diagram of the DC microgrid where m converters work in the bus-regulating mode and n converters work in the device-regulating mode.(b) Equivalent circuit diagram.

Figure 4 .
Figure 4. Averaged small-signal circuit of a device-regulating converter when it operates in (a) the buck mode or in (b) the boost mode.

Figure 6 .
Figure 6.Comparison between the closed-loop input impedance Z in and incremental resistance R in of a device-regulating converter when (a) P dev > 0 and (b) P dev < 0.

Figure 7 .
Figure 7. Circuit diagram of the bus-regulating converters.

Figure 8 .Figure 9 .
Figure 8. Averaged small-signal circuit of a bus-regulating converter when it works in (a) continuous conduction mode (CCM) or in (b) discontinuous conduction mode (DCM).

Figure 10 .
Figure 10.The control block diagram of bus-regulating converters.

Figure 11 .
Figure 11.Bode plots of (a) T i (s) and (b) T v (s) when P dev,net < 0.

Figure 12 .
Figure 12.Bode plots of (a) T i (s) and (b) T v (s) when P dev,net > 0.

Figure 15 .
Figure 15.Bode plots of (a) T 1 (s) and (b) T 2 (s) with gain and phase margins when P dev,net > 0.

Figure 16 .
Figure 16.Bode plots of (a) T 1 (s) and (b) T 2 (s) when the bus-regulating converter works at different steady-state operating points.

Figure 17 .
Figure 17.Small-signal equivalent circuit of the standalone DC microgrid.

Figure 18 .
Figure 18.Comparison between Z out,tot and Z N , Z D when (a) the load converter or (b) the PV converter is analyzed.

Figure 19 .
Figure 19.Schematic diagram of the simulated standalone DC microgrid.

Table 1 .
Operating modes of the standalone DC microgrid.

Table 5 .
Definition and derivation of Z N and Z D for a device-regulating converter.