Improving the Stability and Accuracy of Power Hardware-in-the-Loop Simulation Using Virtual Impedance Method

Power hardware-in-the-loop (PHIL) systems are advanced, real-time platforms for combined software and hardware testing. Two paramount issues in PHIL simulations are the closed-loop stability and simulation accuracy. This paper presents a virtual impedance (VI) method for PHIL simulations that improves the simulation’s stability and accuracy. Through the establishment of an impedance model for a PHIL simulation circuit, which is composed of a voltage-source converter and a simple network, the stability and accuracy of the PHIL system are analyzed. Then, the proposed VI method is implemented in a digital real-time simulator and used to correct the combined impedance in the impedance model, achieving higher stability and accuracy of the results. The validity of the VI method is verified through the PHIL simulation of two typical PHIL examples.


Introduction
Power hardware-in-the-loop (PHIL) systems represent an emerging novel technique that is being increasingly applied in power systems for equipment testing and validation.The typical building blocks of a PHIL simulator are shown in Figure 1.Such a simulator is generally composed of three major parts: (I) the original power system (OPS), which is modeled in a real-time simulator; (II) the interface equipment (IE), which links the hardware and the simulated system [1]; and (III) the piece of hardware under test (HUT).The reference signal is obtained on the OPS side, and it is applied to the terminals of the actual hardware through the IE to establish a virtual exchange of power between the simulated virtual network and the power HUT.In a PHIL system, the simulated network and the HUT are both operating at a high power level [2][3][4][5].Many simulation platforms that support PHIL simulations are commercially available [6][7][8][9][10][11][12][13][14], and such simulations have been extensively used for testing and design of distributed generation systems [15][16][17][18] and electric vehicles [19].Moreover, PHIL systems offer several advantages over other analysis and testing methods.These systems minimize the cost and risk of examining various extreme conditions and maximize the likelihood of identifying hidden defects in an apparatus before their impacts are discovered in actual operations.Thus, the potentially serious consequences can be avoided.
The key element in a PHIL system is the simulation/hardware interface.Ideally, the IE between the HUT and the OPS should have an infinite bandwidth, unity gain, and zero time delay.However, an ideal IE in a PHIL system is neither achievable nor affordable.Moreover, some types of errors (IE bandwidth, sensor noise, time delay, and ripple of the IE) may cause severe stability issues or unacceptable accuracy issues in the results [20][21][22][23][24][25].Therefore, these concerns are worth researching, The impedance method has been widely used in grid-connected systems.The impedance of a grid-connected voltage-source converter is critical to any analysis of the stability and resonance between the converter and the grid, including that with the filter of the converter [34].Particularly, a grid-connected voltage-source converter can be modeled as a current source in parallel with an impedance [35], and the stability of the system is determined by the magnitude of the impedance that can be improved by increasing the output impedance at the harmonic frequencies [36].Similarly, to improve the stability of a PHIL system [37,38], a virtual impedance (VI) method [39][40][41] can be introduced.
This paper is the first to describe the application of the VI method to improve the stability and accuracy of the PHIL simulations.This method can be conveniently implemented on the OPS side.The stability criterion for a PHIL simulation is based on the equivalent impedance model, which is a simple model including an OPS impedance and a combined impedance of the HUT and the IE.The VI method is used to correct the combined impedance in the impedance model.The accuracy of a PHIL system has also been investigated and is herein discussed.Through the PHIL simulations of two typical PHIL examples, it is revealed that the VI method obtains a higher stability and accuracy than another method.
The remainder of this paper is organized as follows.In Section 2, the impedance model of the PHIL simulation is established.The stability and accuracy of the PHIL simulation are analyzed.Then, the VI method and its design rules are presented in Section 3. In Section 4, PHIL simulation results are reported to verify the effectiveness of the proposed method.Finally, Section 5 presents the conclusions.The impedance method has been widely used in grid-connected systems.The impedance of a grid-connected voltage-source converter is critical to any analysis of the stability and resonance between the converter and the grid, including that with the filter of the converter [34].Particularly, a grid-connected voltage-source converter can be modeled as a current source in parallel with an impedance [35], and the stability of the system is determined by the magnitude of the impedance that can be improved by increasing the output impedance at the harmonic frequencies [36].Similarly, to improve the stability of a PHIL system [37,38], a virtual impedance (VI) method [39][40][41] can be introduced.
This paper is the first to describe the application of the VI method to improve the stability and accuracy of the PHIL simulations.This method can be conveniently implemented on the OPS side.The stability criterion for a PHIL simulation is based on the equivalent impedance model, which is a simple model including an OPS impedance and a combined impedance of the HUT and the IE.The VI method is used to correct the combined impedance in the impedance model.The accuracy of a PHIL system has also been investigated and is herein discussed.Through the PHIL simulations of two typical PHIL examples, it is revealed that the VI method obtains a higher stability and accuracy than another method.
The remainder of this paper is organized as follows.In Section 2, the impedance model of the PHIL simulation is established.The stability and accuracy of the PHIL simulation are analyzed.Then, the VI method and its design rules are presented in Section 3. In Section 4, PHIL simulation results are reported to verify the effectiveness of the proposed method.Finally, Section 5 presents the conclusions.

PHIL System Model
Figure 1 shows the overall architecture of a PHIL simulation.As mentioned in the introduction, the system consists of three fundamental subsystems: the original power system (OPS), the interface equipment (IE) and the hardware under test (HUT).As shown in Figure 1, the IE connects the real-time simulator and the real system.The most important components of the IE are the power amplifier (PA), a digital-to-analog converter (DAC) and an analog-to-digital converter (ADC).
The generic PHIL model, shown in Figure 2, is based on the ideal transformer method (ITM) [29].The ITM is one of the most conventional and straightforward methods for implementing a PHIL simulation.

PHIL System Model
Figure 1 shows the overall architecture of a PHIL simulation.As mentioned in the introduction, the system consists of three fundamental subsystems: the original power system (OPS), the interface equipment (IE) and the hardware under test (HUT).As shown in Figure 1, the IE connects the realtime simulator and the real system.The most important components of the IE are the power amplifier (PA), a digital-to-analog converter (DAC) and an analog-to-digital converter (ADC).
The generic PHIL model, shown in Figure 2, is based on the ideal transformer method (ITM) [29].The ITM is one of the most conventional and straightforward methods for implementing a PHIL simulation.This paper focuses on the simulation of the power grid (OPS side).The majority of the grid impedance arises from long distribution wires and low-power transformers.This impedance can be modeled as an inductor in series with a resistor for simplicity.Therefore, this impedance can be modeled by its Thévenin equivalent.An ideal grid voltage source Us(s) is placed in series with a grid impedance Zs(s) on the OPS side.The load Zl(s) is the equivalent load on the HUT side.To facilitate the simulation, a voltage amplifier reproduces the simulated voltage Uin(s) as a physical voltage Uout(s) and imposes it on the load resistor.The actual current iout(s) drawn by the resistor is measured, and the measured signal is fed back into the simulated circuit by a current source producing a current iin(s).The main procedures for a PHIL simulation is described as follows.
To build an accurate and flexible PHIL system, a PA in the laboratory is applied.The schematic diagram of the PA, which employs a single-phase H-bridge converter connected to the HUT, is provided in Figure 3.An output filter is used to suppress high-frequency switching components to prevent them from entering the HUT.As shown in Figure 4, a voltage controller Gc(s) based on the Proportion Integration (PI) controller is proposed.Gc(s) can be formulated as (1) This paper focuses on the simulation of the power grid (OPS side).The majority of the grid impedance arises from long distribution wires and low-power transformers.This impedance can be modeled as an inductor in series with a resistor for simplicity.Therefore, this impedance can be modeled by its Thévenin equivalent.An ideal grid voltage source U s (s) is placed in series with a grid impedance Z s (s) on the OPS side.The load Z l (s) is the equivalent load on the HUT side.To facilitate the simulation, a voltage amplifier reproduces the simulated voltage U in (s) as a physical voltage U out (s) and imposes it on the load resistor.The actual current i out (s) drawn by the resistor is measured, and the measured signal is fed back into the simulated circuit by a current source producing a current i in (s).The main procedures for a PHIL simulation is described as follows.
To build an accurate and flexible PHIL system, a PA in the laboratory is applied.The schematic diagram of the PA, which employs a single-phase H-bridge converter connected to the HUT, is provided in Figure 3.An output filter is used to suppress high-frequency switching components to prevent them from entering the HUT.

PHIL System Model
Figure 1 shows the overall architecture of a PHIL simulation.As mentioned in the introduction, the system consists of three fundamental subsystems: the original power system (OPS), the interface equipment (IE) and the hardware under test (HUT).As shown in Figure 1, the IE connects the realtime simulator and the real system.The most important components of the IE are the power amplifier (PA), a digital-to-analog converter (DAC) and an analog-to-digital converter (ADC).
The generic PHIL model, shown in Figure 2, is based on the ideal transformer method (ITM) [29].The ITM is one of the most conventional and straightforward methods for implementing a PHIL simulation.This paper focuses on the simulation of the power grid (OPS side).The majority of the grid impedance arises from long distribution wires and low-power transformers.This impedance can be modeled as an inductor in series with a resistor for simplicity.Therefore, this impedance can be modeled by its Thévenin equivalent.An ideal grid voltage source Us(s) is placed in series with a grid impedance Zs(s) on the OPS side.The load Zl(s) is the equivalent load on the HUT side.To facilitate the simulation, a voltage amplifier reproduces the simulated voltage Uin(s) as a physical voltage Uout(s) and imposes it on the load resistor.The actual current iout(s) drawn by the resistor is measured, and the measured signal is fed back into the simulated circuit by a current source producing a current iin(s).The main procedures for a PHIL simulation is described as follows.
To build an accurate and flexible PHIL system, a PA in the laboratory is applied.The schematic diagram of the PA, which employs a single-phase H-bridge converter connected to the HUT, is provided in Figure 3.An output filter is used to suppress high-frequency switching components to prevent them from entering the HUT.As shown in Figure 4, a voltage controller Gc(s) based on the Proportion Integration (PI) controller is proposed.Gc(s) can be formulated as As shown in Figure 4, a voltage controller G c (s) based on the Proportion Integration (PI) controller is proposed.G c (s) can be formulated as Energies  To achieve a higher stability of the PA, an active damping factor Kc for the PA inverter is added to the system.The digital controller of the PA is subject to a computation delay, a pulse-width modulation (PWM) delay and other delay components, which can be represented by Gd(s).KPWM represents the transfer function of the inverter.Thus, the transfer function of the PA can be formulated as DAC and ADC interface cards are needed to exchange signals between the real-time simulator and the hardware.For simplicity, the DAC and ADC are considered as part of an approximate equivalent model of the interface subsystem.The transfer function of the DAC and ADC components of the interface GDA(s) includes a small time delay Td, and it can be formulated as For mathematical analysis, a simpler and approximate equivalent circuit is adopted, where GIE(s) represents the combination of GDA(s) and GPA(s): Thus, the equivalent transfer function block diagram of the PHIL simulation model can be established as shown in Figure 5.To establish an equivalent impedance model, the equivalent circuit is formulated as The reference signal U in (s) can be amplified into output voltage U out (s) through the IE.The output voltage U out (s) imposes on the HUT, which is formulated as According to Kirchhoff's law, the following two equations can be obtained: According to Equations ( 5)-( 8), Zl(s) can be converted into a combined impedance Zlc(s) that includes GIE(s).Thus, the impedance model illustrated in Figure 6 is obtained.The stability and accuracy analysis based on this model are described as followings.To achieve a higher stability of the PA, an active damping factor K c for the PA inverter is added to the system.The digital controller of the PA is subject to a computation delay, a pulse-width modulation (PWM) delay and other delay components, which can be represented by G d (s).K PWM represents the transfer function of the inverter.Thus, the transfer function of the PA can be formulated as DAC and ADC interface cards are needed to exchange signals between the real-time simulator and the hardware.For simplicity, the DAC and ADC are considered as part of an approximate equivalent model of the interface subsystem.The transfer function of the DAC and ADC components of the interface G DA (s) includes a small time delay T d , and it can be formulated as ( For mathematical analysis, a simpler and approximate equivalent circuit is adopted, where G IE (s) represents the combination of G DA (s) and G PA (s): Thus, the equivalent transfer function block diagram of the PHIL simulation model can be established as shown in Figure 5.
Energies 2016, 9, 974 4 of 15 To achieve a higher stability of the PA, an active damping factor Kc for the PA inverter is added to the system.The digital controller of the PA is subject to a computation delay, a pulse-width modulation (PWM) delay and other delay components, which can be represented by Gd(s).KPWM represents the transfer function of the inverter.Thus, the transfer function of the PA can be formulated as DAC and ADC interface cards are needed to exchange signals between the real-time simulator and the hardware.For simplicity, the DAC and ADC are considered as part of an approximate equivalent model of the interface subsystem.The transfer function of the DAC and ADC components of the interface GDA(s) includes a small time delay Td, and it can be formulated as For mathematical analysis, a simpler and approximate equivalent circuit is adopted, where GIE(s) represents the combination of GDA(s) and GPA(s): Thus, the equivalent transfer function block diagram of the PHIL simulation model can be established as shown in Figure 5.To establish an equivalent impedance model, the equivalent circuit is formulated as The reference signal U in (s) can be amplified into output voltage U out (s) through the IE.The output voltage U out (s) imposes on the HUT, which is formulated as According to Kirchhoff's law, the following two equations can be obtained: According to Equations ( 5)-( 8), Zl(s) can be converted into a combined impedance Zlc(s) that includes GIE(s).Thus, the impedance model illustrated in Figure 6 is obtained.The stability and accuracy analysis based on this model are described as followings.To establish an equivalent impedance model, the equivalent circuit is formulated as ( The reference signal U in (s) can be amplified into output voltage U out (s) through the IE.The output voltage U out (s) imposes on the HUT, which is formulated as According to Kirchhoff's law, the following two equations can be obtained: Energies 2016, 9, 974 5 of 16 According to Equations ( 5)-( 8), Z l (s) can be converted into a combined impedance Z lc (s) that includes G IE (s).Thus, the impedance model illustrated in Figure 6 is obtained.The stability and accuracy analysis based on this model are described as followings.

Stability Analysis
A PHIL simulation system can be represented by the equivalent circuit depicted in Figure 6, for which the output current can be written as This can be rearranged to yield the following equation: In this case, it is assumed that the source voltage is stable when the system is unloaded.Hence, both Us(s) and 1/Zs(s) are stable; therefore, the stability of the current depends on the stability of the second term on the right-hand side of Equation (10).The stability of the system can be estimated from the following equation: Therefore, Zlc(s) and Zs(s) determine the stability of the PHIL system.According to [42], if the frequency responses of Zs(s) and Zlc(s) intersect at fi, then the phase margin (PM) must be positive (PM > 0°).Thus, PM is formulated as To improve the stability of the system, it is necessary to compensate and correct for the combined impedance Zlc(s).To this end, the magnitude and phase margin of the combined impedance Zlc(s) are increased near the intersection frequency.

Accuracy Evaluation
The accuracy of a PHIL simulation can be estimated by comparing the combined impedance Zlc(s) to the actual impedance Zl(s).Because most of the errors in such a system arise from the IE, the impedance error is calculated based on the HUT subsystem, where the combined impedance Zlc(s) is the most important component in terms of accuracy.The impedance error E(s) can be evaluated as follows:

Proposal to Improve the Stability and Accuracy of PHIL Simulations
Based on the impedance model, the combined impedance Zlc(s) can be shaped by means of the VI.Thus, the accuracy of a PHIL simulation can be enhanced by introducing a paralleling impedance to shape the combined impedance Zlc(s).
Figure 7 shows the equivalent circuit for the PHIL simulation system with a paralleling impedance Zcp(s).

Stability Analysis
A PHIL simulation system can be represented by the equivalent circuit depicted in Figure 6, for which the output current can be written as This can be rearranged to yield the following equation: In this case, it is assumed that the source voltage is stable when the system is unloaded.Hence, both U s (s) and 1/Z s (s) are stable; therefore, the stability of the current depends on the stability of the second term on the right-hand side of Equation (10).The stability of the system can be estimated from the following equation: Therefore, Z lc (s) and Z s (s) determine the stability of the PHIL system.According to [42], if the frequency responses of Z s (s) and Z lc (s) intersect at f i , then the phase margin (PM) must be positive (PM > 0 • ).Thus, PM is formulated as To improve the stability of the system, it is necessary to compensate and correct for the combined impedance Z lc (s).To this end, the magnitude and phase margin of the combined impedance Z lc (s) are increased near the intersection frequency.

Accuracy Evaluation
The accuracy of a PHIL simulation can be estimated by comparing the combined impedance Z lc (s) to the actual impedance Z l (s).Because most of the errors in such a system arise from the IE, the impedance error is calculated based on the HUT subsystem, where the combined impedance Z lc (s) is the most important component in terms of accuracy.The impedance error E(s) can be evaluated as follows: Energies 2016, 9, 974 6 of 16

Proposal to Improve the Stability and Accuracy of PHIL Simulations
Based on the impedance model, the combined impedance Z lc (s) can be shaped by means of the VI.Thus, the accuracy of a PHIL simulation can be enhanced by introducing a paralleling impedance to shape the combined impedance Z lc (s).
Figure 7 shows the equivalent circuit for the PHIL simulation system with a paralleling impedance Z cp (s).The shaped impedance Zeq(s) becomes As shown in Equation ( 14), to compensate the magnitude of impedance Zlc(s), it is necessary to make the impedance Zeq(s) equal to the impedance Zl(s).Thus, the impedance Zcp(s) can be derived as follows: In this way, the impedance error introduced by the IE can be eliminated.Figure 8 shows the block structure of the equivalent transfer function of the PHIL system with equivalent impedance.The basic model depicted in Figure 8a can be transformed into the diagram shown in Figure 8b.The equivalent transformation presented in Figure 8c shows the equivalent model as it is implemented on the OPS side.Figure 9 illustrates the implementation of the paralleling impedance.Moreover, because of the flexibility of the PHIL system provided by software simulation, various function blocks can be easily implemented in the simulation for a signal preprocessing.As shown in Figure 9, the introduction of the compensated block GEP(s) does not alter the PHIL system topology, it simply requires the insertion of a function block in the path of the feedback current signal to compensate for the error in the PHIL system.The equivalent transfer function can be calculated as follows: Figure 7. Equivalent circuit for the PHIL simulation system with a paralleling virtual impedance (VI).
The shaped impedance Z eq (s) becomes As shown in Equation ( 14), to compensate the magnitude of impedance Z lc (s), it is necessary to make the impedance Z eq (s) equal to the impedance Z l (s).Thus, the impedance Z cp (s) can be derived as follows: In this way, the impedance error introduced by the IE can be eliminated.Figure 8 shows the block structure of the equivalent transfer function of the PHIL system with equivalent impedance.The basic model depicted in Figure 8a can be transformed into the diagram shown in Figure 8b.The equivalent transformation presented in Figure 8c shows the equivalent model as it is implemented on the OPS side.The shaped impedance Zeq(s) becomes As shown in Equation ( 14), to compensate the magnitude of impedance Zlc(s), it is necessary to make the impedance Zeq(s) equal to the impedance Zl(s).Thus, the impedance Zcp(s) can be derived as follows: In this way, the impedance error introduced by the IE can be eliminated.Figure 8 shows the block structure of the equivalent transfer function of the PHIL system with equivalent impedance.The basic model depicted in Figure 8a can be transformed into the diagram shown in Figure 8b.The equivalent transformation presented in Figure 8c shows the equivalent model as it is implemented on the OPS side.Figure 9 illustrates the implementation of the paralleling impedance.Moreover, because of the flexibility of the PHIL system provided by software simulation, various function blocks can be easily implemented in the simulation for a signal preprocessing.As shown in Figure 9, the introduction of the compensated block GEP(s) does not alter the PHIL system topology, it simply requires the insertion of a function block in the path of the feedback current signal to compensate for the error in the PHIL system.The equivalent transfer function can be calculated as follows: Figure 9 illustrates the implementation of the paralleling impedance.Moreover, because of the flexibility of the PHIL system provided by software simulation, various function blocks can be easily implemented in the simulation for a signal preprocessing.As shown in Figure 9, the introduction of the compensated block G EP (s) does not alter the PHIL system topology, it simply requires the insertion of a function block in the path of the feedback current signal to compensate for the error in the PHIL system.The equivalent transfer function can be calculated as follows:

GIE(s) 1/Zl(s) Zs(s)
The paralleling impedance improves the simulation performance of the PHIL system.However, the shaped impedance Z cp (s) may still intersect with impedance Z s (s) in the high-frequency range.Thus, an additional series virtual impedance is proposed.Figure 10 shows the structure of the PHIL system with the addition of a series impedance Z cs (s).This series impedance is equivalent to a low-pass filter, the purpose of which is to ensure system stability and to avoid high-frequency components arising from numerical computations.The equivalent series impedance can be obtained as follows: The equivalent transformation is presented in Figure 11.The equivalent model is implemented on the OPS side.Figure 12 illustrates the implementation of the series impedance.This function block can be easily implemented on the OPS side.This series impedance is equivalent to a low-pass filter, the purpose of which is to ensure system stability and to avoid high-frequency components arising from numerical computations.The equivalent series impedance can be obtained as follows:

OPS
The equivalent transformation is presented in Figure 11.The equivalent model is implemented on the OPS side.Figure 12 illustrates the implementation of the series impedance.This function block can be easily implemented on the OPS side.This series impedance is equivalent to a low-pass filter, the purpose of which is to ensure system stability and to avoid high-frequency components arising from numerical computations.The equivalent series impedance can be obtained as follows: The equivalent transformation is presented in Figure 11.The equivalent model is implemented on the OPS side.This series impedance is equivalent to a low-pass filter, the purpose of which is to ensure system stability and to avoid high-frequency components arising from numerical computations.The equivalent series impedance can be obtained as follows: The equivalent transformation is presented in Figure 11.The equivalent model is implemented on the OPS side.

Description of the PHIL Platform
To verify the efficacy of the proposed method, two typical PHIL scenarios were simulated.Note that this paper focuses on the simulation of the power grid (OPS side).The majority of the grid impedance arises from long distribution wires and low-power transformers, and this impedance can be modeled as an inductor in series with a resistor for simplicity [42].Firstly, a linear HUT scenario was theoretically analyzed.The impedance-based stability criterion was used to assess the stability of the PHIL system.The VI method was applied to this first scenario to improve the stability of the linear PHIL simulation.Then, a second scenario with a nonlinear HUT subsystem was established.A more complicated circuit was simulated to represent this scenario, and the validity of the VI method was again confirmed through this PHIL experiment.
Figure 13 shows the setup for the PHIL simulation platform.The platform included a real-time digital simulator (RTDS).The OPS was simulated in the RTDS using RTDS Technologies' RSCAD graphical user interface (GUI) with a circuit simulation time step of 50 µs.An RTDS Giga-Transceiver Analogue Input (GTAI) card was used to import the feedback current signal.The reference output voltage signal was measured and transferred by a Giga-Transceiver Analogue Output (GTAO) card.
Energies 2016, 9, 974 8 of 15 To verify the efficacy of the proposed method, two typical PHIL scenarios were simulated.Note that this paper focuses on the simulation of the power grid (OPS side).The majority of the grid impedance arises from long distribution wires and low-power transformers, and this impedance can be modeled as an inductor in series with a resistor for simplicity [42].Firstly, a linear HUT scenario was theoretically analyzed.The impedance-based stability criterion was used to assess the stability of the PHIL system.The VI method was applied to this first scenario to improve the stability of the linear PHIL simulation.Then, a second scenario with a nonlinear HUT subsystem was established.A more complicated equivalent circuit was simulated to represent this scenario, and the validity of the VI method was again confirmed through this PHIL experiment.
Figure 13 shows the setup for the PHIL simulation platform.The platform included a real-time digital simulator (RTDS).The OPS was simulated in the RTDS using RTDS Technologies' RSCAD graphical user interface (GUI) with a circuit simulation time step of 50 μs.An RTDS Giga-Transceiver Analogue Input (GTAI) card was used to import the feedback current signal.The reference output voltage signal was measured and transferred by a Giga-Transceiver Analogue Output (GTAO) card.A prototype of a three-phase switch-type PA was built and tested in the lab.It includes three independent H-inverters and possesses the ability to generate PWM voltages from a constant direct current (DC)-voltage source.Field-programmable gate array (FPGA; EP4C115F23I7N) and advanced RISC (reduced instruction set computer) machine (ARM; STM32F417ZGT6) processors are used to control the PA.The switching frequency of the power amplifier is 12.8 kHz (with a sampling frequency of 25.6 kHz).The DC-link voltage is 450 V, and the output filter's parameters are equal to Lo = 0.2 mH and Co = 60 μF.A PI controller is used as the output voltage regulator, with parameters of KP = 6 and Ki = 200, and the active damping regulator applies a damping factor of Kc = 5.A total time delay of 100 μs is assumed for the IE.For further analysis and comparison, the voltages are A prototype of a three-phase switch-type PA was built and tested in the lab.It includes three independent H-inverters and possesses the ability to generate PWM voltages from a constant direct current (DC)-voltage source.Field-programmable gate array (FPGA; EP4C115F23I7N) and advanced RISC (reduced instruction set computer) machine (ARM; STM32F417ZGT6) processors are used to Energies 2016, 9, 974 9 of 16 control the PA.The switching frequency of the power amplifier is 12.8 kHz (with a sampling frequency of 25.6 kHz).The DC-link voltage is 450 V, and the output filter's parameters are equal to L o = 0.2 mH and C o = 60 µF.A PI controller is used as the output voltage regulator, with parameters of K P = 6 and K i = 200, and the active damping regulator applies a damping factor of K c = 5.A total time delay of 100 µs is assumed for the IE.For further analysis and comparison, the voltages are represented as per-unit (p.u.) values.
Stability Analysis: The original circuit for the first scenario was simulated using the PHIL model as shown in Figure 14.It can be assumed that impedance Z s is a combination of inductor L s and resistor R s and that impedance Z l is a combination of inductor L l and resistor R l .The effects of different values of inductor L s and inductor L l on the simulation stability were investigated.Table 1 shows the simulation parameters used in the analysis.The grid impedance Zs(s) and the impedance Zl(s) are set using the simulation parameters, which are shown in Table 1.The combined impedance Zlc(s) and the compensated impedance Zlc′(s) can be calculated using Equations ( 18) and ( 19): ' ( ) ( ) ( ) ( ) The frequency responses of the grid impedance Zs(s), the impedance Zl(s), the combined impedance Zlc(s), and the compensated impedance Zlc′(s) are shown in Figure 15.The grid impedance Z s (s) and the impedance Z l (s) are set using the simulation parameters, which are shown in Table 1.The combined impedance Z lc (s) and the compensated impedance Z lc (s) can be calculated using Equations ( 18) and ( 19): The frequency responses of the grid impedance Z s (s), the impedance Z l (s), the combined impedance Z lc (s), and the compensated impedance Z lc (s) are shown in Figure 15.
Figure 15a,b show that the phase difference between impedance Z s (s) and the uncompensated impedance Z lc (s) approaches 180 • when inductor L s is greater than or equal to inductor L l , indicating that the PM is negative (PM < 0 • ).Thus, the PHIL simulation is unstable.By contrast, when inductor L s is smaller than inductor L l , the simulation is stable.Figure 15c shows that in Case 3, there is no frequency intersection in the high-frequency range, as estimated using the impedance model.It is found that the compensated impedance Z lc (s) and impedance Z s (s) lead to critical stability.Thus, the stability of PHIL simulations can be improved using the VI method.
The impedance error of the PHIL simulation is illustrated in Figure 16.The compensated error that is calculated using Equation ( 21) is less than the uncompensated error calculated using Equation (20).

Experimental Results
To confirm the efficacy of the proposed method, two typical PHIL simulations were established and tested.The proposed method was compared with the typical ITM method [29], which is one of the most conventional and straightforward methods of implementing PHIL simulations.

Scenario 1: Hardware with Linear Behavior
As shown in Figure 14, the first considered scenario involved the resistor R and inductor L load circuit.The values of resistor R and inductor L are listed in Table 1.The simulation time step was set to 50 µs, and the parameters of the PA were designed as described in Section 4.1.
Simulations were operated with various values of inductor L l and inductor L s , and the output voltage waveforms and simulation errors for two cases are shown in Figures 17 and 18. Figures 17a  and 18a show that the uncompensated PHIL simulation is unstable when inductor L s ≥ L l , whereas Figures 17b and 18b show that the stability is significantly improved using the VI method.
Figure 19a,b show that when inductor L s < L l , the output voltage and the output voltage errors are improved, and Figure 19c shows that the accuracy is also improved.Thus, the effectiveness of the proposed method is confirmed.To confirm the efficacy of the proposed method, two typical PHIL simulations were established and tested.The proposed method was compared with the typical ITM method [29], which is one of the most conventional and straightforward methods of implementing PHIL simulations.

Scenario 1: Hardware with Linear Behavior
As shown in Figure 14, the first considered scenario involved the resistor R and inductor L load circuit.The values of resistor R and inductor L are listed in Table 1.The simulation time step was set to 50 µs, and the parameters of the PA were designed as described in Section 4.1.
Simulations were operated with various values of inductor Ll and inductor Ls, and the output voltage waveforms and simulation errors for two cases are shown in Figures 17 and 18. Figures 17a and  18a show that the uncompensated PHIL simulation is unstable when inductor Ls ≥ Ll, whereas Figures 17b and 18b show that the stability is significantly improved using the VI method.Figure 19a,b show that when inductor Ls < Ll, the output voltage and the output voltage errors are improved, and Figure 19c shows that the accuracy is also improved.Thus, the effectiveness of the proposed method is confirmed.

Voltage Error
Time (s).

Scenario 2: Hardware with Nonlinear Behavior
In practice, there are always nonlinear components on the HUT side.Thus, in the second considered PHIL scenario, a diode rectifier, which is a typical nonlinear device, is used.The circuit diagram is shown in Figure 20.In this case, the inductor is placed in series with a diode block, and a small capacitor is placed in parallel with the resistor.The parameters of the simulated circuit are shown in Figure 20.The simulation time step was set to 50 µs, and the parameters of the PA were designed as described in Section 4.1.

Scenario 2: Hardware with Nonlinear Behavior
In practice, there are always nonlinear components on the HUT side.Thus, in the second considered PHIL scenario, a diode rectifier, which is a typical nonlinear device, is used.The circuit diagram is shown in Figure 20.In this case, the inductor is placed in series with a diode block, and a small capacitor is placed in parallel with the resistor.The parameters of the simulated circuit are shown in Figure 20.The simulation time step was set to 50 µs, and the parameters of the PA were designed as described in Section 4.1.
In practice, there are always nonlinear components on the HUT side.Thus, in the second considered PHIL scenario, a diode rectifier, which is a typical nonlinear device, is used.The circuit diagram is shown in Figure 20.In this case, the inductor is placed in series with a diode block, and a small capacitor is placed in parallel with the resistor.The parameters of the simulated circuit are shown in Figure 20.The simulation time step was set to 50 µs, and the parameters of the PA were designed as described in Section 4.1.

Conclusions
This paper presents an effective VI method for enhancing the stability and accuracy of PHIL simulations.The proposed VI method is easy to be implemented in a digital real-time simulator.The VI method offers greatly simplified implementation on the OPS side.Therefore, it is suitable for most practical PHIL simulations involving highly complex circuits and nonlinear components.Through the establishment of an impedance model for a PHIL simulation, the stability and accuracy of the system can be analyzed.Furthermore, the stability and accuracy of PHIL simulations can be improved using the VI method.Simulations of two typical PHIL cases (one linear HUT and one nonlinear HUT) are presented to demonstrate these improvements, thereby verifying the validity of the VI method.

Figure 1 .
Figure 1.Basic building blocks of a power hardware-in-the-loop (PHIL) simulation.

Figure 1 .
Figure 1.Basic building blocks of a power hardware-in-the-loop (PHIL) simulation.

Figure 2 .
Figure 2. Structure diagram of a PHIL simulation system.

Figure 2 .
Figure 2. Structure diagram of a PHIL simulation system.

Figure 2 .
Figure 2. Structure diagram of a PHIL simulation system.

Figure 4 .
Figure 4. Transfer function block diagram of the switching PA.

Figure 5 .
Figure 5. Transfer function block diagram of the PHIL simulation system.

Figure 4 .
Figure 4. Transfer function block diagram of the switching PA.

Figure 4 .
Figure 4. Transfer function block diagram of the switching PA.

Figure 5 .
Figure 5. Transfer function block diagram of the PHIL simulation system.

Figure 5 .
Figure 5. Transfer function block diagram of the PHIL simulation system.

Figure 6 .
Figure 6.Equivalent circuit for the PHIL simulation system.

Figure 7 .
Figure 7. Equivalent circuit for the PHIL simulation system with a paralleling virtual impedance (VI).

Figure 8 .
Figure 8. Transfer function diagram of the PHIL system: (a) s-domain model; (b) equivalent transformation I; (c) equivalent transformation II.

Figure 8 .
Figure 8. Transfer function diagram of the PHIL system: (a) s-domain model; (b) equivalent transformation I; (c) equivalent transformation II.

Figure 8 .
Figure 8. Transfer function diagram of the PHIL system: (a) s-domain model; (b) equivalent transformation I; (c) equivalent transformation II.

Figure 9 .Figure 10 .
Figure 9. Implementation of a paralleling VI on the original power system (OPS) side.

Figure 11 .
Figure 11.Transfer function block diagram for the PHIL system based on the VI model.

Figure 9 .Figure 9 .Figure 10 .
Figure 9. Implementation of a paralleling VI on the original power system (OPS) side.

s) OPS Figure 11 .
Figure 11.Transfer function block diagram for the PHIL system based on the VI model.

Figure 10 .
Figure 10.Equivalent circuit for the PHIL system based on the VI model.

Figure 9 .Figure 10 .
Figure 9. Implementation of a paralleling VI on the original power system (OPS) side.

Figure 11 .
Figure 11.Transfer function block diagram for the PHIL system based on the VI model.

Figure 12
Figure 12  illustrates the implementation of the series impedance.This function block can be easily implemented on the OPS side.

Figure 11 .
Figure 11.Transfer function block diagram for the PHIL system based on the VI model.

Figure 12
Figure 12  illustrates the implementation of the series impedance.This function block can be easily implemented on the OPS side.

Figure 11 .
Figure 11.Transfer function block diagram for the PHIL system based on the VI model.

Figure 12 Figure 12 .
Figure 12  illustrates the implementation of the series impedance.This function block can be easily implemented on the OPS side.U s (s) Z s (s) OPS

Figure 12 .
Figure 12.Implementation of the VI on the OPS side.

Figure 14 .
Figure 14.Topology used in the first PHIL simulation scenario, with a linear resistance/inductor (RL) load circuit.

Figure 16 .
Figure 16.Diagram for evaluating the impedance accuracy of a PHIL simulation.

Figure 16 .
Figure 16.Diagram for evaluating the impedance accuracy of a PHIL simulation.

Figure 20 .
Figure 20.Topology used in the second PHIL simulation scenario, with a nonlinear load.

Figure 21 compares
Figure 21 compares the experimental results for the uncompensated and compensated PHIL simulations.Better accuracy is achieved in the compensated PHIL simulation, confirming the effectiveness of the proposed compensation method.

Figure 20 .
Figure 20.Topology used in the second PHIL simulation scenario, with a nonlinear load.

Figure 21
Figure 21 compares the experimental results for the uncompensated and compensated PHIL simulations.Better accuracy is achieved in the compensated PHIL simulation, confirming the effectiveness of the proposed compensation method.Energies 2016, 9, 974 13 of 15

Table 1 .
Figure 14.Topology used in the first PHIL simulation scenario, with a linear resistance/inductor (RL) load circuit.the value of the impedance Zs and impedance Zl.

Table 1 .
the value of the impedance Z s and impedance Z l .