Reconfiguration of Urban Photovoltaic Arrays Using Commercial Devices

A recent approach to mitigate the adverse effects of photovoltaic (PV) arrays operating under mismatching conditions is the dynamic electrical reconfiguration of the PV panels. This paper introduces a procedure to determine the best configuration of a PV array connected in a series-parallel structure without using complex mathematical models. Such a procedure uses the experimental current vs. voltage curves of the PV panels, which are composed of multiple PV modules, to construct the power vs. voltage curves of all of the possible configurations to identify the optimal one. The main advantage of this method is the low computational effort required to reconstruct the power vs. voltage curves of the array. This characteristic enables one to implement the proposed solution using inexpensive embedded devices, which are widely adopted in industrial applications. The proposed method, and its embedded implementation, were tested using a hardware-in-the-loop simulation of the PV system. Finally, the real-time operation and benefits of the proposed solution are illustrated using a practical example based on commercial devices.


Introduction
Urban photovoltaic (PV) systems are formed, in general, by a few PV panels driven by a grid-connected inverter.Moreover, the PV panels are connected in a series-parallel (SP) configuration [1][2][3], which enables one to reach the large DC voltages required by the inverter.Despite the existence of other array configurations, such as total cross-tied (TCT), bridge-linked (BL) or honey-comb (HC) [4], the SP configuration is the most widely adopted in commercial systems due to its simplicity and reduced number of connections.In such a way, the manufacturers of commercial inverters commonly describe the device ratings in terms of SP arrays, e.g., see Sunny Boy 1200 [5] or the Solar Edge SE6000 datasheets [6].The PV inverter operates to achieve two objectives: deliver the PV power to the grid with an unitary power factor and, at the same time, track the optimal operating condition to achieve the maximum power production in the PV array [7,8].
In uniform conditions, i.e., all of the PV panels exhibiting the same parameters, temperature and solar irradiance, the electrical characteristics of the PV array are proportional to the ones of any panel, just scaled in voltage by the number of panels in series and scaled in current by the number of strings in parallel.Hence, there exists a single optimal operating condition despite the connection between the PV panels [9][10][11].However, if some (or all) PV panels exhibit different parameters, e.g., different irradiance due to shade, the PV array produces a different maximum power depending on the electrical connections between the panels.Moreover, in those mismatched conditions, the PV array exhibits multiple maximum power points (MPP) instead of a single one, as in uniform conditions [12][13][14].
Mismatched conditions commonly occur in urban PV installations due to shade generated by objects adjacent to the array, e.g., trees, buildings, posts, other PV arrays, etc. Figure 1 shows some commercial PV systems affected by urban shade: since the Sun moves along the day, a PV panel can be fully irradiated, partially shaded or completely shaded, depending on the hour of the day.
+ FAJAO ID=@A@ 2 8 F=AI 2 =HJE=O ID=@A@ 2 8 F=AI 2 =HJE=O ID=@A@ 2 8 F=AI The reconfiguration of PV systems consists of modifying the electrical connections between the panels to increase the power production of a PV array operating under mismatched conditions [15,16].Such a technique has been analyzed in the literature concerning the reconfiguration of PV modules [17,18], which are the basic units forming the commercial PV panels.However, taking into account that commercial panels are formed by two or more PV modules connected in series, e.g., the BP585 PV panel, this paper focuses on a more realistic scenario: reconfiguring panels instead of modules.In addition, a large amount of solutions use analytical models to evaluate the best set of connections for a given shading profile [19][20][21][22].Nevertheless, since costly processing devices, such as full-size computers, must be avoided in commercial applications to improve the profitability of the system, this paper is aimed at implementing a reconfiguration algorithm in commercial-friendly (and inexpensive) embedded systems, like FPGAs or DSPs.Therefore, the algorithm proposed in this paper is based on simple manipulations of experimental measurements to avoid the adoption of complex computational models, providing a fast and accurate solution.
The paper is organized as follows.Section 2 presents the basic concepts of PV systems' reconfiguration.Then, Section 3 presents the proposed solution to reconfigure the connections between PV panels based on experimental data.The simulation platform used to evaluate the proposed method is presented in Section 4, and the performance of this solution is illustrated in Section 5. Finally, the conclusions close the paper.

Reconfiguration of PV Systems
In an SP array, multiple panels are connected in series to form strings, and the strings are connected in parallel to form the array.Considering that each panel is formed by two or more modules connected in series, a string is composed of a number of series-connected modules.Moreover, each module has a diode connected in antiparallel, named the bypass diode, which is used to protect the cells forming the module.The bypass diode provides an alternative path for the string current when a PV module is operating under mismatching conditions; thus, avoiding not only the dissipation of power in the cells of the mismatched PV module [23], but also the reduction of the current in the string [15].
Figure 2 illustrates the operation of the bypass diodes under uniform and mismatching conditions for a simple string of two PV modules.Under uniform conditions, the bypass diodes are reverse biased, and no current flows through them (see Figure 2a).If the module M 2 is shaded, its maximum current (I pv2,max ) is lower than the maximum current of M 1 (I pv2,max ).Then, if the string current (I st ) is lower than I pv2,max (Figure 2b), no current flows through the bypass diode of M 2 ; however, if I st > I pv2,max , the difference between I st and I pv2,max flows through the bypass diode of M 2 to avoid the string current limitation and the power dissipation in the cells of M 2 .The activation and deactivation of the bypass diodes produce multiple maximum power points in the power vs. voltage (P-V) curves of the PV arrays [15,24,25].Therefore, if the panels in an SP PV array are organized in different ways (i.e., different configurations), it is possible to obtain different P-V curves from the same PV panels involved.Moreover, one of those configurations will have a global MPP higher than the other configurations.

I pv1
The classical reconfiguration of PV systems consist of modifying the electrical connections between the modules of the PV array.In SP arrays, such a procedure consists of moving, electrically, a module from one string to another one.To illustrate this concept, Figure 3 shows a PV array formed by two strings, St 1 and St 2 , where each string is formed by two modules.Therefore, four modules (M 1 -M 4 ) form the PV array.Such modules can be connected in three different configurations CF 1 , CF 2 and CF 3 , as described in Figure 3.In this way, if the PV array originally operates in CF 1 , the electrical connections between the modules can be modified to configure the array in CF 2 or CF 3 .Such a procedure is performed using commercial controlled switches, e.g., relays or MOSFETs, which are organized in matrices to reduce the required space [26,27].Figure 4 shows the experimental current-voltage (I-V) curves of one module from a BP 2150S PV panel [28] operating under different shading conditions.Four BP 2150S PV panels under different mismatched conditions were used to simulate the three configurations CF 1 , CF 2 and CF 3 , obtaining the power curves presented at Figure 4: CF 1 and CF 3 produce almost the same maximum power (57.7 W at 21.84 V), while CF 2 produces 16.18% more power (67 W at 21.47 V) just by connecting the four modules in a different way.This example puts in evidence the advantages of PV reconfiguration systems: provide higher power in comparison with static arrays; it requires simple switching elements with negligible power losses; and its cost is low in comparison with distributed maximum power point techniques that require one power converter for each PV panel (e.g., the Power optimizer from Solar Edge [29]).

Module voltage [V]
Array voltage [V] MPP in CF and CF  A large amount of reconfiguration solutions proposed in literature, e.g., [30], are focused on structures similar to the one reported in Figure 3, i.e., reconfigure PV modules and not PV panels.However, commercial PV systems are constructed using PV panels formed by two or more PV modules; hence, the reconfiguration of modules using commercial devices is not possible.Therefore, the following section proposes a procedure to reconfigure PV panels based on experimental data.

Reconfiguration of Panels Based on Experimental Data
Several reconfiguration solutions are based on processing models to evaluate the array configuration that provides the highest power in the operating conditions to which the array is subjected, e.g., [15,31].However, such an approach requires a large amount of calculations to estimate the maximum power of each configuration due to the complex non-linear systems required to model a PV array.
Instead, this paper proposes to reconstruct the I-V curves of the PV array from the I-V curves of the PV panels to ensure the identification of the best configuration.Therefore, it is required to acquire the I-V curve of each panel in the array by performing a current/voltage sweep to measure both the voltage and current.This process can be done by using DC/DC converters, as reported in [32]; however, that device could be complex and costly; hence, this paper proses a simpler solution.
In a similar way, some commercially-available PV optimizers, designed for small PV installations (4, 8, 16 or 24 panels), acquire the I-V curve of each panel in the array for reconfiguration and monitoring purposes.This is the case of the ENDANA PV optimizer [33].Moreover, the ENDANA device also enables disconnecting PV panels from the array for either maintenance purposes or to exclude shading panels from a PV string.Therefore, it is possible to assume that the inclusion of a device for tracing the I-V curve of each panel and the inclusion of switches to dynamically change the array electrical connections do not significantly degrade the economic viability of small PV installations.

Structure of the Reconfiguration System
The structure of the proposed system is presented in Figure 5a.It is composed of the PV panels, a switches' matrix, a sweep device, an embedded controller and a commercial PV inverter.The switches' matrix, the sweep device and the controller are described in the following paragraphs.The PV panels are connected to the switches' matrix, which is implemented by a set of interconnected relays to obtain low power losses, as reported in [15,21,33,34].The switches' matrix has two main functions defined by the controller algorithm: connect each PV panel to some string of the array, and connect each PV panel to the sweep device.
The switches' matrix can be implemented in a centralized structure, as show in [15,21], or in a distributed structure, as proposed in [33].In a centralized structure, each PV panel must be wired to the switches' matrix; therefore, it needs to be located close to the PV panels to avoid high ohmic losses and high installation costs caused by long cables.A distributed switches' matrix is composed of multiple units (remote units) located close to the PV panels.In this case, a set of PV panels (e.g., four PV panels in [33]) are connected to each remote unit, which is able to connect any PV panel to any string of the array or to an I-V tracing device located in a central unit ( [33]).Hence, a distributed switches' matrix reduces considerably the cabling requirements and, as a consequence, the ohmic losses and the installation costs in comparison with a centralized matrix.The design and implementation of different switches matrices are reported in [15,21,34,35].
On the other hand, the circuit proposed to perform the voltage sweep (sweep device) in each panel only requires a capacitor, a set of switches, current/voltage sensors and an optional resistor to discharge the capacitor.Moreover, since the solution proposed in this paper is designed to be implemented in commercial-friendly (and inexpensive) embedded controllers, the voltage/current data from each panel are acquired using analog-to-digital converters (ADC) available in most embedded devices, such as DSP or FPGA.
The structure of the sweep device is depicted in Figure 5a: the capacitor C SD is connected in parallel to the PV panel under test by means of the switches S SD1 and S SD2 .The capacitor C SD starts discharging, since the switch S SD3 is closed at the beginning of the test.Then, switch S SD3 is set open, and the PV panel starts charging the capacitor from 0 V to the panel open-circuit voltage (V OC,P ), performing a sweep on the I-V curve.The control of the switches is performed by the embedded controller used to implement the reconfiguration algorithm.Moreover, the voltage and current data of the panel are acquired by means of ADCs available in that embedded controller.When the panel current is zero, switch S SD3 is closed to discharge the capacitor, so that a new test can be performed for another panel.The time required to perform a sweep of an I-V curve depends on the value of C SD and on the panel current.Therefore, the longest sweep time is obtained at the lower irradiance condition.With the aim of providing an equation for the time required to perform the voltage sweep, the ideal single-diode model [36], given in Equation (1), is used.Taking into account that the PV current charges the capacitor, which in turn defines the PV voltage, the differential equation given in Equation ( 2) describes the evolution of the PV voltage.
Solving Equation (2) requires numerical methods and the identification of the parameters of the PV model; therefore, an estimation of the capacitor charge time is obtained by considering a PV current equal to I SC,min , which corresponds to the minimum short-circuit current to be tested.In the light of such an assumption, the time required to perform a voltage sweep T SD is approximated by Equation (3).It must be highlighted that Equation (3) must be used for selecting the value of C SD and to set the acquisition time of the ADCs in the embedded controller.Therefore, expression Equation ( 3) is not used in the normal operation of the reconfiguration system.
The discharge of the capacitor C SD can be done by means of an additional resistor R SD when switch S SD3 is closed.The design of R SD depends on the desired discharge time T dis and minimum C SD voltage accepted to start a new test δv pv , as given in Equation ( 4).A fast discharge can be imposed by reducing R SD (even to a short-circuit) at the expense of increasing the stress in C SD .However, C SD can be implemented with a parallel array of multiple smaller capacitors to reduce the stress in each individual capacitor and, at the same time, to increase the reliability of the sweep device.
Each panel of the PV array must be sequentially connected to the sweep device to obtain the I-V curve of all of the PV panels.Therefore, the time T sweep required to acquire all of the I-V curves is given in Equation ( 5), where M stands for the number of strings in the array and N stands for the number of panels in each string; hence, N × M represents the number of panels in the array.Moreover, T SW represents the time required to open and close switches S SD1 , S SD2 and S SD3 in the following sequence: S SD1 and S SD2 are closed, and S SD3 is open at the same time of performing the voltage sweep, while S SD1 and S SD2 are open and S SD3 is closed at the same time of discharging the capacitor.Therefore, T SW is equal to the time required to open and close a switch.It must be clarified that S SD1 and S SD2 are part of the switches' matrix associated with each panel; hence, the connection to the sweep device is considered as an additional string in the switches' matrix.
Finally, the embedded controller has two main functions: first, it processes the reconfiguration algorithm; and second, it coordinates the operation of the switches' matrix to set the new configuration and to trace the I-V curve of all of the panels using the sweep device.The controller algorithm is described in the flowchart of Figure 5b.It starts acquiring the I-V curve of all of the PV panels, then it defines an array configuration and use interpolation to generate the array I-V curve to identify the global maximum power point (GMPP).Such a process is repeated for all of the possible configurations to identify the one that provides the highest GMPP (best configuration).Subsequently, the embedded controller defines the state of each switch (open/closed) in the switches' matrix to set the best configuration in the PV array.This process is done using digital signals wired to the switches' control inputs.The vector S SW represents those signals in Figure 5a.
The following subsections describe in detail the process to trace the I-V curve of each configuration, illustrating it with an application example.

Evaluation of Possible Array Configurations
To select the array configuration that produces the highest power, all of the possible options must be tested.Since, in general, every panel must be able to be connected to any string, the number of possible configurations (NCF) is given by the combination of all of the PV panels (M × N) and the number of panels in each string (N), as shown in Equation (6).
Such a number grows exponentially for increments in the number of panels.For example, a PV array formed by two strings of four panels (N = 4 and M = 2) has 35 possible configurations, while a PV array formed by two strings of twelve panels (N = 12 and M = 2) has 1,352,078 possible configurations.Since the common approach in the literature is to use models to evaluate the effectiveness of a given configuration, e.g., [37][38][39][40], the evaluation of all of the possible configurations is a slow process.Hence, some algorithms have been proposed in the literature to search the best configuration without evaluating all of the possibilities, e.g., [41,42]; however, it is not easy to find a solution that ensures, by means of an analytical proof, that it reaches the optimal configuration.Therefore, the solution proposed in this paper is focused on a different approach: reduce, as much as possible, the time required to evaluate each configuration, which eventually reduces the time required to test all of the possible options.It is clear that testing all of the possibilities ensures the detection of the best configuration.
To speed-up the evaluation of each configuration, complex optimization algorithms and non-linear models must be avoided.Therefore, the proposed solution constructs the array I-V curve from the interpolation of the experimental data measured from the panels using few multiplications and additions, as illustrated in Figure 6: the I-V curve of each string is obtained by adding the voltage generated by the corresponding panels for the same current.This process requires the interpolation of the panel voltage if the requested current does not correspond to a current value measured by the sweep device.Similarly, the I-V curve of the array is obtained by adding the current of each string generated at the same voltage.In this case, the interpolation of the string current is required if the requested voltage does not correspond to a voltage value available in the string data.Since commercial PV inverters have limitations in terms of input voltage, i.e., minimum and maximum array voltage, the array I-V curve is constructed only within that range, which reduces the amount of data required to evaluate.
It is worth noting that the interpolation process is not required to evaluate all of the points of the string I-V curve, since some panels could exhibit the same current values for part of the curve.Similarly, if the voltages of the strings I-V curve match, no interpolation is required to construct the array I-V curve.
The interpolation of a single value requires four additions, one division and one multiplication Equation (7).The division instruction is included in the instructions set architecture (ISA) of some high-level processors; however, other simpler processors require implementing the division using multiplication instructions.Hence, the six floating-point instructions described in Equation ( 7) must be mapped to fixed-point and float-point instructions in the assembler, including data movement between registers and memory, additions, subtractions, data shift, logic operations, among others [43].
To estimate the processing time of the reconfiguration algorithm, it is necessary to take into account all of the data points in each I-V curve, the number of panels in each string, the number of strings in the array and the number of possible configurations of the array.Since the reconfiguration algorithm includes both fixed and float point instructions, the performance of the algorithm cannot be measured in instructions; instead, it must be measured in clock cycles.This is because the number of clock cycles required by one fixed-point instruction is, in general, different from the number of clock cycles required by one floating-point instruction.
Nevertheless, to accurately estimate the processing time of the reconfiguration algorithm, it would be necessary to take into account the number of clock cycles required by other sub-processes in the embedded system: function invocation, handle vectors, decision instructions, control flow, communications, among others.However, the number of clock cycles of those sub-processes depends on the technology used to implemented the algorithm, which makes the construction of a mathematical expression difficult to calculate the processing time exactly.Therefore, an accurate evaluation of the processing time required by the reconfiguration algorithm, in therms of clock cycles, should be performed experimentally.This procedure is illustrated in the example presented in Section 5.

Application Example Based on Commercial Devices
To illustrate the proposed reconfiguration solution, a PV installation based on the commercial PV inverter Sunny Boy 1200 [5] is assumed.Such an inverter has a nominal DC voltage V DC_nom = 120 V, maximum DC voltage and current values equal to 400 V and 12.6 A, respectively, and minimum DC voltage equal to 100 V.The installation uses the commercial PV panels BP-3155 from British Petroleum [44], which are formed by three modules.Each PV panel has nominal MPP voltage (V mpp ) and MPP current (I mpp ) equal to 34.9 V and 4.5 A, respectively.Hence, to match the nominal requirements of the PV inverter, the PV array must be constructed using two strings of four panels each (eight panels, 24 modules), resulting in an operation voltage and current equal to 139.6 V and 9 A, respectively.
Figure 7 shows, at the top left, the I-V curves of the eight PV panels, which are based on the experimental I-V curves of BP 2150 PV panels [28] subjected to a solar irradiance equal to 625 W/m 2 .The PV 1 panel is non-shaded; hence, its three modules exhibit the same electrical characteristics.The panel PV 8 is uniformly shaded; hence, its three modules also exhibit the same electrical characteristics.Instead, the modules PV 2 -PV 7 are non-uniformly shaded; therefore, the I-V curves of such panels describe irregular electrical characteristics due to the activation of the bypass diodes of some modules.
Using samples of such I-V curves, the algorithm tests all possible configurations following the control algorithm given in Figure 5b.Such a procedure detects the following configuration as the best (CFB): first string as [PV 1 PV 2 PV 3 PV 6 ] and second string [PV 4 PV 5 PV 7 PV 8 ].That configuration provides 370.1 W at an array voltage V a = 110 V, which is within the operation range of the PV inverter.To illustrate the power increment achieved by the proposed solution, the worst configuration (CFW) for this PV installation is given by the strings [PV 1 PV 2 PV 3 PV 7 ] and [PV 4 PV 5 PV 6 PV 8 ], providing 313.2 W at an array voltage V a = 135 V.It is worth noting that the difference between CFB and CFW is only in the permutation of PV 6 and PV 7 , but such a modification generates a difference of ∆η = 18.14% in the power production.Similarly, if the default configuration of the array is different from CFB, the proposed reconfiguration system will optimize the panels' connections to improve the power delivered to the inverter, which eventually reduces the return-of-the-investment time by increasing the energy produced.

Simulation Platform Implementation Using Commercial Devices
With the aim of illustrating the performance of the PV array reconfiguration system, a hardware-in-the-loop (HIL) simulator was used to test the proposed solution implemented on a practical embedded device.HIL simulation was used because it ensures the same irradiance and shading conditions for multiple experiments [45], which is not possible using PV panels due to the variability of the solar irradiance.Moreover, the HIL simulator enables one to test the behavior of the proposed reconfiguration solution implemented on a real embedded device to reproduce the conditions of a real commercial deployment.
The proposed simulation platform is illustrated in Figure 8.This platform is composed of two main blocks: the HIL simulator and the embedded device processing the reconfiguration solution.The first block (HIL) emulates the PV system, and it is implemented in Simulink Desktop Real-Time (SDRT) [46].This HIL simulator processes the models of the PV array (composed of two strings of four PV panels each, i.e., 4 × 2), the switches' matrix, a DC/DC boost converter to perform the maximum power point tracking (MPPT) and the load.The second block is the embedded controller implemented on a DSP TMS320F28335 from Texas Instruments, which processes both the proposed reconfiguration algorithm and the MPPT technique.
PV system (HIL)  The PV array is implemented in the HIL using a MATLAB function based on a database of the I-V curves of the different configurations for each shading condition.The PV array function receives two parameters: the configuration defined by the switches' matrix and the operating voltage imposed by the power converter; moreover, it provides the array current according to the array I-V curve.Similarly, the switches' matrix is implemented using a MATLAB function that receives a vector with the state of all of the switches (S SW ) from the embedded controller, and it provides the configuration to the PV array function.The power converter is implemented using the ideal state-space average model on an S-function.Its input current is provided by the PV array function, while the duty cycle is provided by the embedded controller.Finally, the power converter imposes the voltage to the PV array, and it delivers the generated power to a resistive load.
The PV system emulator and the embedded controller exchange information using an RS-232C channel instead of discrete analog and digital signals.This structure enable one to reduce the wiring between the two devices without impacting the validity of the experiments, since the same information is transferred: the reconfiguration algorithm, on the embedded device, sends the optimal configuration of the array to the switches' matrix of the PV system; while the PV system sends the current and voltage of the PV array to the embedded system, which are used by the MPPT technique (implemented in the controller) to update the duty cycle of the Boostconverter implemented in the HIL simulator.The adopted MPPT algorithm is the perturb and observe (P&O) [47].It is worth noting that the P&O may be trapped in a local MPP or in the global MPP depending on the starting point (duty cycle) after a new configuration is set by the switches' matrix.
The HIL system is processed in a Dell precision T7600 workstation with the following characteristics: processor Intel Xeon E5-2667 of 2.9 GHz, 32 GB of RAM memory, one COM Intel C600/X79 and a real-time operation imposed by the SDRT.The embedded device, TMS320F28335 DSP [48], used to implement both reconfiguration and MPPT algorithms has the following characteristics: CPU of 32 bits of 150 MHz, IEEE-754 single-precision floating-point unit (FPU) with 150 MIPS, 68 kB RAM memory, 512 kB Flash memory, 18 PWM channels with high resolution, 12-bit 12.5 MSPSADC and serial connectivity (three UART, one SPI, one I2C, one CANand one McBSP).
The sequence diagram in Figure 9 describes the run-time interaction between the PV system emulator and the embedded controller.The controller has four main software objects: Timer, Reconfiguration, Linear Interpolation and P&O; while the emulator has four main objects: PV array, Switches Matrix and DC/DC Converter.The simulation starts with the Reconfiguration object sending the state of all the switches to the Switches Matrix object with the message SetupCfg(0) to set the initial configuration of the PV array.From such information, the Switches Matrix determines the array configuration to be set in the PV array by the message PVarrayCfg(0).Then, an infinite loop (loop Main) starts on the controller, where Reconfiguration calculates the optimal voltage (Vp) and current (Ip) for the actual configuration and operating condition.Later, Reconfiguration sends a message (SetupOP(Vp,Ip)) to P&O to set the starting point of the P&O algorithm close to the global MPP.This is why the proposed structure enables the classical P&O algorithm to overcome the multi-maximum problem present in mismatched PV arrays.This is a major advantage over classical PV systems with no updated information about the approximated position of the global MPP.
Once Vp is received by P&O, it calculates the duty cycle of the DC/DC Converter (d), required to set the PV array voltage (Vop).Then, that duty cycle is set to DC/DC Converter using message SetupConverter(d).The DC/DC Converter sets the operating voltage (Vop) to the PV Array using PVArrayOP(Vop) message.The PV array function returns the operating voltage and current (Vop,Iop) to the P&O obtained with d using message ResponseOP(Vop,Iop).Again, the P&O uses Vop and Iop to calculate a new duty cycle in order to track the closest MPP.
The Timer is configured to set the variable delay to ON every 90 s to start the combined fragment break (RecAlgorithm), which executes the reconfiguration algorithm.When an interpolation is required within the reconfiguration algorithm, Reconfiguration sends the two points (P1 and P2) to the Linear Interpolation using InterpolationTP(P1,P2), which replies with the interpolated point (Pint) using ResponseInterp(Pint). Once the optimal configuration (configuration) has been determined, the reconfiguration algorithm ends by sending the state of all of the switches to the Switches Matrix using the SetupCfg(configuration) message.Finally, the Switches Matrix sets the best configuration to the PV array (PVarrayCfg(configuration)).It is worth noting that while the reconfiguration algorithm is running, the P&O algorithm does not run; therefore, the converter duty cycle remains constant.
It must be highlighted that both reconfiguration and MPPT algorithms are processed by the TMS320F28335 DSP; hence, that embedded device could be used without modifications in a real application (commercial deployment).In that case, the HIL simulator will be replaced by the real PV panels, the switches' matrix and the power converter.

Simulation Results Based on Experimental Data
This section presents a practical example to illustrate the real-time operation of the proposed reconfiguration system running in the deployment-ready embedded device TMS320F28335 DSP.
The PV array considered for the simulations is composed of two strings of four panels each (N = 4 and M = 2), which has 35 possible configurations that should be evaluated to find the best one for a given shading condition.The time delay between two consecutive executions of the reconfiguration algorithm (t recon f ig ) was set to 90 s, because one run of the reconfiguration algorithm takes around 36 s; moreover, in some cases, the PV power variability can be up to 60% in 60 s, as reported in [49].However, it is worth noting that the PV power variability also depends on the area occupied by the PV array, the geometry of that area, the velocity of the clouds, fast objects' movement around the array (animals, bird droppings), etc.

Simulated Shading Conditions
Four different shading conditions were simulated to illustrate the performance of the proposed reconfiguration system.Each shading condition is generated from different I-V curves of the eight PV panels that form the array; then, the I-V curve of the PV array is generated by using the interpolation process described in Section 3.2.
The description of each shading condition is given bellow, and the P-V curves of the eight PV panels for each condition are illustrated in Figure 10.The array P-V curves for the best and worst configuration for each shading condition are shown in Figure 11.Note that each P-V curve has multiple local MPPs and one global MPP; however, the global MPP of the best configuration is significantly higher than the global MPP of the worst configuration.The numerical values of the global MPPs of both the best and worst configurations for each shading condition are shown in Table 1.That table also reports the increment in the power production with respect to the worst configuration.Finally, the electrical connections between the PV panels for the best and worst configurations are shown in Table 2.

Voltage [V]
Table 2 also reports two additional configurations: "Initial with RA" (RA, reconfiguration algorithm) (CF 0 ) and "Without RA" (CF 18 ).Initial with RA corresponds to the initial configuration set in the emulation system for the dynamic simulation of the reconfiguration system presented in Section 5.3.Without RA corresponds to the configuration set in the emulation system for the dynamic simulation of the classical (static) PV system presented in Section 5.5.

Sampling Time and Time Delay of the Sweep Device and Switches
The TMS320F28335 DSP has a fast 12-bit ADC capable of sampling analog signal at 12.5 MHz (80-ns conversion time).However, since a single ADC is available to acquire two signals (PV voltage and current), those signals could be sampled at a maximum frequency of 6.25 MHz, which remains very fast.
To define the sampling frequency for tracing the I-V curves, the following conditions must be taken into account: first, the time required to trace the I-V curve depends on the sweep device capacitor C SD , as given in Equation (3); second, the number of samples per curve must enable an accurate reproduction of the I-V curve without overloading the DSP memory.Those conditions are addressed below.
Considering a minimum short-circuit current of 1 A for this example (as depicted in Figure 7) and a maximum open-circuit voltage equal to 38 V, the sweep device capacitor C SD = 39 µF is calculated from Equation (3) to ensure a maximum sweep time equal to 1.5 ms.Those values provide an acceptable trade-off between capacitor size, cost and time delay.Other capacitors and sweep times can be adopted taking into account the following conditions: larger capacitors will require larger time delays, which in turn increases the reconfiguration time and capacitor cost; while smaller capacitors enable one to reduce the reconfiguration time; however, higher sampling frequencies and shorter processing times are required to acquire the I-V curve data.
The commercially available capacitor MKT1820639015 fulfills the requirements of capacitance and maximum voltage for this application (39 µF, 63 V).Another option is to implement C SD using multiple capacitors in parallel to improve the system reliability.In that case, three capacitors MKT1820615015 (15 µF, 63 V) can be used in parallel to provide a much higher maximum current derivative, so that the capacitors stress is reduced.However, this last solution increases the cost of the sweep device.To discharge the capacitor C SD without a significant stress, the additional resistor R SD = 8.25 Ω is calculated from Equation (4) to ensure a maximum discharge time T dis = 1.5 ms.
Resistor R SD must support a maximum power R SD × (I SC.max ) 2 = 3 W, where I SC.max = 5 A is the maximum short-circuit current possible in the adopted PV panels.The commercially-available resistor 83F8R25 fulfills those conditions.
Taking into account that a PV curve must be acquired for each PV panel and a PV curve must be constructed for each string and the array, those PV curves are defined to have 160 samples each, so that the DSP memory is not overloaded.Since the PV curves are acquired in 1.5 ms, the sampling frequency of each channel of the ADC is set to 110 kHz.
Another time delay present in the hardware of the reconfiguration system concerns the switches' operation.To provide an inexpensive solution, general purpose electro-mechanical relays, such as the G5LE-1A4-DC24, can be adopted.Those types of relays have an average operation time of 15 ms.Based on the previous time delays of the sweep device and switches, the total time required to acquire all the PV panels I-V curves is calculated from Equation (5) as T sweep = 264 ms.Moreover, each reconfiguration cycle requires opening and closing, simultaneously, some relays in the switches' matrix to set the new configuration; therefore, an additional 15-ms delay is imposed by the switching matrix.Finally, the time required by the hardware of the reconfiguration system is 279 ms for each reconfiguration cycle.

Dynamic Simulation of the Reconfiguration System
A dynamic simulation of the proposed reconfiguration system was carried out considering the PV array operating under the four different shading conditions described in Section 5.1.The simulation results are presented in Figure 12a: the plots at the top and center correspond to the power and voltage of the PV array, respectively, while the plot at the bottom reports the shading condition (SC) and the time intervals in which the reconfiguration algorithm (RA) is running (Run) and stopped (Stop).Moreover, the black dashed lines illustrate the instants in which a run of the reconfiguration algorithm finishes, while the purple dashed lines report the instants in which the shadowing conditions change.
The simulation starts with the PV array in Configuration 0 (CF 0 in Table 2) under the shading condition No. 1 (SC 1 ), where the P&O algorithm tracks an MPP around 40 V obtaining a power of 150 W. At 29.3 s, the RA starts, and it takes 33.4 s (i.e., t recon f ig = 33.4s) to find the best configuration, which, in this case, is CF 8 .Such a configuration is set by the switches' matrix at 67.88 s (including the 279-ms delay of the hardware) to produce a significant increment of 147% in the PV array power (from 150 W-371 W).
It is observed that each time the RA ends (black dashed lines), the PV power is increased or remains constant, depending on the existence of a change of the shading conditions.Moreover, each time the shading condition changes, there is a reduction in the PV array power, which means that the array configuration must be optimized again.
As explained at the beginning of Section 5, the time period selected to run the RA consecutively is 90.0 s (i.e., t ck_recon f ig = 90.0s); therefore, at 119.3 s, the RA starts again with t recon f ig = 37.2 s.At that time, the shading conditions have not changed; hence, there is no change in the configuration of the PV array and, as consequence, no change in the PV array power and voltage.The first change in the shading conditions, from SC 1 to SC 2 , is produced at 172.3 s, which leads to a reduction in the PV array power and voltage.Then, the RA starts at 208.5 s, with t recon f ig = 36.2s, obtaining that the best configuration for SC 2 is CF 14 (see Table 2).CF 14 is set at 247.56 s, producing a small increase in the PV power (1%) and a reduction in the PV voltage.Such a reduction shows that the voltage of the global MPP for CF 14 under SC 2 is lower than the global MPP voltage for CF 8 under the same shading profile.The RA runs again between 296.6 s and 335.7 s (t recon f ig = 38.4s); however, the configuration does not change since the shading condition is the same (SC 2 ).
The shading condition changes again at 344.3 s, this time from SC 2 to SC 3 .Therefore, after the subsequent run of the RA, the new optimal configuration CF 22 is set at 419.38 s (t recon f ig = 37.6 s + hardware delay of 279 ms).Once again, the change in the configuration produces an increment in the PV array power (21%).
At 441.3 s, there is a new change in the shading profile from SC 3 to SC 4 .The RA set the new optimal configuration is CF 4 at 506.78 s (t recon f ig = 36.6s + 279 ms).The configuration change produces a PV power increment of 22%.The last change in the shading conditions, from SC 4 to SC 1 , is produced at 541.9 s.As expected, the RA determines the new optimal configuration CF 8 , and the PV power and voltage are the same obtained after the first run of the RA.This time CF 8 is set at 588.08 s (t recon f ig = 33.6 s + 279 ms).
To illustrate the behavior of both the reconfiguration system and P&O algorithm, Figure 12b shows the trajectory of the operating point, on the array P-V curve, for the dynamic conditions between 430 s and 630 s of the previous simulation.The operating points are also illustrated in Figure 12a in the plot at the top of the Figure .The sequence starts with the PV array at Point 1 (112.9V, 405.9 W) that correspond to global MPP of CF 22 under SC 3 (black line).The change from SC 3 to SC 4 , at 441.3 s, changes the P-V curve to the yellow trace; therefore, the P&O tracks the local MPP closest to the last global MPP tracked (112.9V), which is Point 2 (111.4V, 344.7 W).
After the run of the RA (506.78 s), the P-V curve changes to the brown trace, which corresponds to CF 4 , and the P&O algorithm tracks the new operating Point 3 (111.3V, 421.7 W).With the change in the shading conditions from SC 4 to SC 1 , at 541.9 s, the new operating point is 4 (111.0V, 304.9 W); then, the P&O algorithm tracks the closest MPP: Point 5 (132.7 V, 353.6 W).Finally, the RA runs and determines that CF 8 is the best configuration for SC 1 , and it sets the operating point to 6 (112.7 V, 371.4 W), which is the global MPP.

Calculation Burden of the Reconfiguration Algorithm
The software objects implemented on the embedded controller (ESin Figure 9) were programmed in the C language and compiled by using Code Composer Studio [43], which is an optimized compiler for the TMS320F28335 DSP.That compilation transforms each operation written in the C language (e.g., interpolation, communication with SDRT, etc.) into multiple fixed-point and floating-point instructions, including also control flow operations, which require different numbers of clock cycles.Moreover, the number of operations performed depends on the shading conditions; therefore, the performance of the RA is analyzed by using the number of clock cycles (ck cycles ) and the time required to find the best configuration t recon f ig .
For example, in the results presented in Section 5.3, the first execution of RA requires 5,050,855,766 clock cycles to evaluate the 35 possible configurations and to determine the best configuration (SC 1 ).In the TMS320F28335, such a number of clock cycles is translated into 33.672s, because each cycle takes 6.67 ns (i.e., clock of 150 MHz).
The calculation burden of the proposed RA is evaluated by using t recon f ig i and ck cycles i for each run of the RA in the simulation results presented in Figure 12a.The sub-index i represents the number of the RA executions.The values of t recon f ig i and ck cycles i are shown in Table 3, which also reports the deviation with respect to the average values (36.128 s and 5,416,534,590 clock cycles, respectively).
Table 3 shows that t recon f ig i and ck cycles i change depending on the shading conditions.However, those measurements also depend on other factors, like the communication delays, since even when the shading condition is the same, the simulation time is slightly different.Finally, the longest processing time t recon f ig,MAX must be shorter than the time period selected to run the RA consecutively.In this example, t recon f ig,MAX = 38.388s < 90 s.It must be noted that the processing time will increase for a higher number of panels; therefore, an evaluation of the calculation burden must be performed for each case to ensure a correct selection of the embedded device and RA time period.

Tests without Accounting for Array Reconfiguration
With the aim of illustrating the advantage of the proposed reconfiguration system over the classical static PV array, the simulation performed in Section 5.3 is repeated considering a PV array with a fixed configuration (CF 18 ).CF 18 is selected because it is not the best or the worst in terms of power production.The test conditions are the same ones used to evaluate the PV system with reconfiguration, namely a duration close to 613 s and changes on the shading conditions at the same instants of time.The simulation results for this classical PV system are shown in Figure 13a.At the simulation start, the output power of the PV systems with and without reconfiguration is similar prior to the first run of the RA (29.91 s).Nonetheless, the output power of the PV system without reconfiguration is lower in comparison to the proposed solution after the first run of the RA.In the simulation, the shading condition sequence is: SC 1 , SC 2 , SC 3 , SC 4 and SC 1 .For such a sequence, the static PV system produces 230 W, 34 W, 85 W, 70 W and 80 W less power in comparison to the reconfiguration system.It is worth noting that the difference in the power wasted for SC 1 at the beginning and at the end of the simulation indicates that the MPPT tracks different local MPPs in both cases.This is due to the MPP detected by the P&O depends on the last operating point prior to the change in the shading profile as reported in Figure 13b, which shows the evolution of the operating points in the simulation.
The reduced power production is translated into a significant reduction in the energy delivered to the load.The system with reconfiguration produced 55.96 Wh during the simulation, while the system without reconfiguration only produced 44.55 Wh.Therefore, the increment in the energy production with the proposed RA is 25.61%.
The operating points of the static PV array during the simulation, starting from 430 s, have the following trajectory, as reported in Figure 13b; moreover, those operating points are also illustrated in Figure 13a.The sequence starts with the PV array at Point 1, which corresponds to a local maximum for CF 18 under SC 3 .After the change on the shading conditions, the operating point moves to 2 on the P-V curve of SC 4 .Then, the MPPT moves the operating point to 3, which is the closest local MPP.For the next change of the shading profile, the operating point moves to 4 and then to 5. It should be noted that the operating point never reaches the global MPP, which explains why the power produced by this static solution is significantly lower in comparison with the PV reconfiguration system.
With the aim of illustrating the cost-benefit of the reconfiguration solution over the static PV solution, the costs of both solutions are analyzed.The cost of the PV inverter is U.S. $680, and each PV panel has a cost of U.S. $85.The TMS320F28335 DSP has a cost of U.S. $35.The sweep device requires a capacitor with a costs equal to U.S. $10, a resistor with a cost equal to U.S. $2 and a relay to discharge the capacitor.Moreover, the switches' matrix must support four panels per strings and three strings (one string is used for the sweep device), which requires 82 relays according to [15].In addition, the DSP, switches' matrix and sweep device must be placed in a PCB with a costs near U.S. $10.Taking into account that each relay has a cost of U.S. $1.3, the reconfiguration system (DSP, switches' matrix and sweep device) has a costs close to U.S. $165.Therefore, the complete PV installation with reconfiguration capabilities (including the inverter and eight panels) has a total cost of U.S. $1525.Taking into account that, in this example, the reconfiguration solution produces 25.61% more energy, the static PV system will need, approximately, three or four additional PV panels (depending on the strings' configuration) to produce the same energy provided by the reconfigurable PV system.This means that an equivalent static PV system (with three and four additional PV panels) will costs between U.S. $1615 and U.S. $1700, which is between 6% and 11.5% more expensive.In this case, the reconfiguration solution is the option with the lower cost per kWh.
Finally, the example presented in this section is a particular case of study to demonstrate the operation and benefits of the proposed reconfiguration system.However, depending on the shading profiles present in a particular PV installation, the dynamic behavior of the reconfiguration system (Section 5.3) could produce a negligible, or even null, power increment with respect to the static PV array.Therefore, it is required to analyze the economic viability of the reconfiguration system for the particular geographic location and shading patterns exhibited in a given application.This procedure can be done using simulations of the annual energy production and costs analyses for the PV installation with and without the reconfiguration system, so that the effective cost-benefit of this solution can be evaluated.

Conclusions
A reconfiguration algorithm for PV arrays in a series-parallel structure, based on the I-V curves of the PV panels, was proposed.This algorithm starts measuring the I-V curves of the PV panels using a simple and inexpensive sweep device.Then, the P-V curves of all possible configurations are constructed from the I-V curves of the panels to determine the configuration that provides the highest global MPP.The proposed algorithm uses interpolation to minimize the arithmetic operations executed in the embedded system in order to reduce, as much as possible, the time required to evaluate each configuration.The reduction in the calculation time enables the evaluation of all of the possible configurations in a reasonable time using inexpensive embedded devices.
The proposed algorithm was implemented on the embedded system TMS320F28335 DSP.The PV system, i.e., PV array, switches' matrix, DC/DC converter and load, was emulated using a the Simulation Desktop Real-Time toolbox from MATLAB.This approach enables one to evaluate the performance of the proposed solution in a hardware-in-the-loop environment, to guarantee the repetitiveness of the operating conditions to provide a fair comparison of different solutions.
The real-time operation and benefits of the reconfiguration solution were evaluated using a practical example based on commercial devices.Those HIL tests were performed considering a PV array formed by two strings of four panels each (4 × 2).The experiments consider four changes in the shading conditions to evaluate the reconfiguration speed, where the average time required to find the best configuration was 36.128s plus 279 ms required to obtain the experimental I-V curves of all of the PV panels.Those results were compared with a classical static PV system with a typical MPPT technique.In this particular case, the reconfigurable PV system produces an increment of 25.61% in the energy generated.To obtain the same energy with a fixed PV system, it would be necessary to add three or four panels to the array depending on the strings' configuration, which would be more expensive than the hardware required to perform the reconfiguration.However, it is important to note that the economical viability of the proposed reconfiguration system has to be evaluated for each particular application.
It is worth noting that the reconfiguration solution can be applied to small PV arrays (e.g., residential applications) in order to obtain a reasonable number of possible configurations and switches.Moreover, this solution can be improved in the following ways: the time between two consecutive runs of the algorithm could be optimized by introducing a circuit to detect a change in the shading conditions, so that the reconfiguration only runs when it is required.Other possible improvement would be to reduce, even more, the calculation time by introducing a combinational optimization algorithm.In this case, the reconfiguration solution could be suitable for larger PV arrays.

Figure 1 .
Figure 1.Shading profiles affecting commercial PV systems in urban environments.

3 StringFigure 3 .
Figure 3. Possible configurations of a series-parallel (SP) array with two strings of two modules each.

Figure 6 .
Figure 6.Example of the interpolation procedures to construct the I-V curve of one configuration for an SP array with two strings of two modules each.

Figure 7 .
Figure 7. Best and worst configurations for the application example.

Figure 8 .
Figure 8. Block diagram and hardware implementation of the proposed simulation platform.

Figure 9 .
Figure 9. Sequence diagram of the simulation platform.

Figure 10 .
Figure 10.P-V curves of the PV panels for the shading conditions.

4 Figure 11 .
Figure 11.Array P-V curves for best and worst configurations for each shading condition.

Figure 12 .
Figure 12.Behavior of the PV array with the proposed reconfiguration algorithm.(a) Dynamic behavior of PV array power, voltage and reconfiguration algorithm runtime; (b) Operating points in the P-V curves from 430 s.

Figure 13 .
Figure 13.Behavior of the PV array with fixed configuration.(a) Dynamic behavior of PV array power and voltage; (b) Operating points in the P-V curves.

Table 1 .
Information of the best and worst configuration of the PV array for each shading condition.