LCL Filter Parameter and Hardware Design Methodology for Minimum Volume Considering Capacitor Lifetimes

: A design methodology for minimum volume of LCL ﬁlters applied to grid connected converters is proposed. It combines the determination of ﬁlter parameter values (inductances and capacitances) to hardware design (component technology and inductor construction). Using the proposed strategy, different combinations of L-C-L that meet standard restrictions are determined. The inﬂuence of the harmonic content that results from ﬁlter design is considered in order to estimate component losses, and ﬁlter and bus capacitor lifetimes. Results are presented for ﬁlters that lead to the smallest volume, highest capacitor lifetime, or a compromise between both. A case study with three different magnetic material technologies and two types of capacitors is done. The design methodology is experimentally validated for a 1 kW converter. Step-by-step procedures for the determination of ﬁlter parameters and inductor hardware design are provided.


Introduction
Be it for renewable energy generation or uninterruptible power sources, the use of pulse-width modulated power converters enables the synthesis of voltages with low harmonic distortion.These converters operate at switching frequencies well above the fundamental of 50/60 Hz [1,2].Switching produces high frequency harmonics that must be attenuated to avoid disturbances to other loads connected to the grid.Therefore, there are specific standards that determine the harmonic injection limits [3][4][5].
The use of passive filters is common for the mitigation of harmonic currents at switching frequency, well above the control system active range.However, due to their low attenuation rate, purely inductive filters (L) may result in large and heavy components, because a high inductive reactance is needed; which also leads to a high voltage drop [6].For these motives, the use of LCL filters becomes attractive due to their reduced component dimensions.The main disadvantage associated to LCL filters is the instability caused by the resonance of filter elements, demanding some sort of damping [7][8][9][10].
The definition of the electrical parameters of the LCL inductance and capacitance is not a trivial task.Based on a limit of harmonic injection determined by the standard, the LCL filter design methodologies are diverse [1,2,[6][7][8][9][11][12][13][14][15].The most common strategy consists of setting a fixed value for the filter capacitance (C f ), usually chosen as a value equal to or below 5% of the base capacitance (C b ), and to design the converter (L c ) and grid (L g ) side inductors with a ratio "r" between them.This ratio is sometimes adjusted to achieve a desired filter performance [8,11,16].
A slightly different approach is to set C f ≤ 0.05C b and determine L c for a desired current ripple (∆I) at the converter input, calculating L g using the ratio "r" [6,7,9,14].Similarly, it is also possible to design L c to obtain a certain harmonic current amplitude at the switching frequency [12].Other methodologies of designing LCL filters may include modeling the system using the extended harmonic domain [2], using filter transfer functions [6,13], or employing genetic algorithms [17].
With respect to the component design, a discussion on the relation of losses to the inductance value, including damping losses, was done by [1], where it was shown that there is a minimum value for the inductance of the LCL filter to minimize losses.Another work [18], seeks to optimize the relationship between losses and volume, taking into consideration the temperature of the magnetic materials.However, neither authors have evaluated the impact of the technologies they used on the losses and volume, which are decisive to the design.In [16] the use of different magnetic material technologies for the LCL filter is studied, but not from a design methodology perspective.In [19] a design methodology for the LCL filter including EMI consideration is presented; nanocrystalline cores are chosen among four materials, but no comparative analysis among component designs is included.
In the aforementioned works that analyzed the LCL filter considering component design, none have considered the influence of the filter design on the capacitors, despite the fact that the current ripple on the converter side influences the losses and lifetime of the filter and DC bus capacitors (C bus ) [20].On the other hand, works that discuss capacitor lifetime do not do it in conjunction with the parametric and hardware design of the filter.These works aim to evaluate the capacitor lifetime using mission profiles [20,21], or seek optimization of volume, cost, reliability, and losses, making use of linearized models of the physical characteristics of the capacitors [22].
This way, the literature on the subject lacks design methodologies that propose to optimize the parametric LCL filter design (values of L and C) in light of losses, volume and capacitor lifetime; discussing the advantages and disadvantages from decisions in the parametric design; considering the impact on the hardware and addressing the used technologies.
A common objective for optimization is cost [23][24][25][26], for competitive market reasons.However, component cost has periodical and local variations, involving non-deterministic variables that depend of technological development, competition among manufacturers, geopolitical factors, availability, and market segment.This way, the obtained results in a cost optimization may be localized, and not applicable to other situations.On the other hand, volume and loss optimization can be more useful, and employed in different situations, permitting an ideal compromise among design variables.
With this in mind, this work employs a design methodology based on the sweeping of C f values, and of the amplitude of the switching frequency harmonic current in L c (converter-side).Based on the specifications of the converter and normative restrictions, numerous combinations of L-C-L are found by sweeping.The discretion of possible solutions is made by analyzing the hardware design of each component, considering the use of different technologies, present on a database.With the converter waveforms, losses and temperature in each component are estimated, as well as the lifetimes of capacitors C f and C bus .With this, the objective is to, while meeting normative restrictions, minimize filter volume, maximize capacitor lifetimes, or find a suitable compromise between both.The design methodology is summarized in Figure 1.The parametric design is validated by waveform measurement, demonstrating compliance to the adopted standard.The hardware design is validated by loss measurement, since it is dependent on their adequate estimation.

Filter Parametric Design
As a case study, the input stage of a double-conversion uninterruptible power source (UPS) will be analyzed, as illustrated in Figure 2.This UPS topology consists of two converters connected back-to-back: a rectifier in the input stage, which regulates DC bus voltage and corrects power factor; and an inverter on the output stage, which provides a sinusoidal voltage to the load [27].
Converter topology: input stage of double-conversion UPS with common neutral point connection.
As mentioned, the LCL filter is designed to meet the restrictions of injected harmonics into the grid.In this work, the IEC 61000-3-4 standard [5] is considered.The LCL filter is designed per-phase, since this topology allows the converter to be split into three singlephase half-bridge converters.The L-C-L values are determined using the transfer function of the filter.
In order to find an optimal design considering losses, volume and capacitor lifetimes, the developed methodology performs a sweep of filter capacitance (C f ) values and of harmonic current amplitudes (I c, f s ) on the converter-side inductor (L c ).The purpose of this sweep is to explore the filter design possibilities considering normative limits, while not being restricted to a predetermined value of current ripple and/or filter capacitance.The reduction of filter volume is evaluated in light of a possible compromise with capacitor lifetimes.
The developed methodology does not consider the presence of grid inductance nor of an input transformer, since these are typically unknowns.Therefore, the filter is designed for a grid without any inductive characteristic, meeting by itself the restrictions determined by the adopted standard.Otherwise, the grid and transformer leakage inductances would add to the grid-side inductor (L g ).

Converter-Side Inductor
With a phase-shifted PWM modulation, the expression for the converter-side voltage (v c ) comprises its DC and fundamental components, as well as its switching harmonics and side lobes.The LCL filter is designed to attenuate the highest amplitude harmonic generated by the converter, which occurs at the switching frequency ( f s ): at which V DC is the bus voltage, m a the modulation index, and J 0 a zero order Bessel function.Disregarding voltage drops on the inductors, m a can be determined by: where V g is the grid voltage (RMS value).Assuming a Thévenin equivalent circuit in which L g and C f are part of the grid impedance, the value of L c can be determined using the transfer function of an L filter: where V c (s) is replaced by V c, f s from (1), and I c (s) is replaced by the amplitude of the current harmonic of L c at the switching frequency (I c, f s ), which is varied by the sweep.

Grid-Side Inductor
The grid-side inductor is designed to attenuate the remaining harmonics that are not filtered by L c and C f .The transfer function of the LCL filter with passive damping is used: at which R f is the value of the damping resistor, V c (s) once more is replaced by V c, f s , and I g (s) is replaced by its highest harmonic amplitude (I g, f s ).
The value of I g, f s is determined using the limit of admissible harmonic current, set by the standard.It is specified in terms of the ratio between the amplitudes of the switching frequency to the low frequency current: I g, f s /I g,l f .For IEC 61000-3-4, I g, f s /I g,l f must be ≤0.6%.
The dependence of L g with regards to C f , L c and R f is shown in (4).R f is related to the resonant frequency ( f res ), which must be between 10 times the low frequency and 0.5 times the switching frequency [6,7]: Since R f and L g are both unknowns, the procedure of obtaining the value of L g is iterative.As a starting point, f res = f s /2 can be assumed.R f is calculated by (6) and used in (4) to estimate L g .Then, f res and R f are re-calculated, and ( 4) is used once more.With the second estimate of L g , f res and R f are adjusted with ( 5) and ( 6).This procedure reduces the need for iterations of L g and f res , that must be repeated until the desired attenuation of I g, f s /I g,l f is obtained.
The developed methodology results in a set of L c , L g and C f that meet standard restrictions.Given a converter with the specifications shown in Table 1, the resulting inductances are illustrated in Figure 3, for a sweep of C f from 1.8% to 6.7% of C b .The values of L c and L g are plotted as a function of I c, f s normalized with respect to the amplitude of the low frequency component (I c, f s /I c,l f ).This ratio is varied from 7% to 27%.The values chosen for the sweep of C f and I c, f s /I c,l f may vary according to the rated power of the converter and component availability.In Figure 3, the inverse proportion of L c and L g is observed, and how the increase of C f reduces the value of L g required to meet the standard.

Filter Hardware Design
Typically, LCL filter design methodologies are limited to the determination of electrical parameters of capacitance and inductance.These are seldom considered in conjunction with the technologies that will be used to construct the filter.The process of designing the components involves adequately modeling the particular characteristics of each technology.The combined analysis of the parametric and hardware design is proposed, in order to determine the optimal relation or compromise for LCL filter losses and volume, and capacitor lifetimes of C f and C bus .

Inductor Sizing
In the developed methodology, different magnetic material technologies are considered for the construction of the inductors.To determine the volume and losses of the LCL filter inductors, the design is performed considering three magnetic core technologies for L g and L c : non-grain oriented silicon steel (NGO steel) [30], for its low cost and high magnetic flux density; Kool Mµ [31], for its relatively high magnetic flux density, but lower core losses than silicon steel; and 3C92 ferrite [32], for its low magnetic losses.
A database is built to compare the design of each inductor using these technologies.It contains 21 sizes of NGO steel sheet (EI geometry), with lengths ranging from 14 mm to 300 mm; 35 sizes of Kool Mµ core (toroid geometry), considering up to 5 stacked cores, totaling 175 possible core sizes, with relative magnetic permeabilities ranging from 26 to 125; and 28 sizes of 3C92 ferrite (EE geometry), considering up to 5 stacked cores, totaling 140 possible solutions.For conductors, solid copper wires are considered for L g and stranded wire for L c , because the latter operates with high frequency.
A step-by-step procedure for the design of each inductor is shown in Appendix A. By using the proposed strategy for inductor sizing, their design will be limited by temperature rise, as a function of copper and core losses.As an indirect consequence of designing the inductors for the smallest possible volume, as is intended in the proposed methodology, when considering losses and heating, the inductor must also have low losses, in order to limit temperature rise.

Capacitor Losses and Lifetime
To achieve an optimized LCL filter, it is necessary that the capacitors be designed considering metrics that go beyond the traditional approach of simply defining the total required capacitance.While the capacitor losses can be used as a metric, a more useful parameter is the estimated capacitor lifetime.This allows a design choice that brings the best cost-benefit considering the system lifetime, since capacitors are notoriously known for being one of the electronic components most prone to failure [33].
The capacitor loss model is approximated by considering only its equivalent series resistance (ESR).This value is obtained from manufacturer datasheets, valid for steady state operation, and is a function of the frequency.The ESR is multiplied by the capacitor current harmonic spectrum, and by summing the individual contribution of each harmonic, the total electrical loss in the capacitor is obtained.Thus, for both C f and C bus , losses (P C ) and temperature (T C ) are determined as: where I C,i is the RMS amplitude of the ith current harmonic and ESR i its corresponding ESR, that varies with temperature.R Th is the total thermal resistance of the capacitor, given by the manufacturer, and T amb the ambient temperature.When there are capacitors in parallel in the DC bus, the current I C is split.Since losses and temperature are interdependent, P C and T C are determined iteratively.The initial temperature used to determine P C is T C = T amb ; with this value, the ESR i are determined, and P C is calculated, with which a new T C is estimated; this process is repeated until the change in T C between iterations is below 1%.Only the thermal equilibrium state is analyzed.
The T amb to be considered in the loss and lifetime calculations will depend on the positioning of heat sources around the converter and filter, and the type of cooling system employed.This determination is complex and beyond the scope of this work.With this in mind, it is assumed that only natural convection is present and that T amb = 50 • C.
One of the main reasons for capacitor failure is the degradation of its dielectric, caused by voltage and temperature stresses building up over time.Thus, it is possible to estimate lifetime using a parameterized model, created from statistical failure data for each component under stress conditions [20,34].
Each capacitor technology has particular characteristics that influence its behavior in terms of losses and lifetime.For the hardware of the filter, film capacitors (C4AF series [35]) are chosen, due to its advantages in terms of cost and volume.For similar reasons, electrolytic capacitors (Type DCMC [36]) are chosen for the DC bus.
Given a determined electrothermal stress, the lifetime (Lt C f ) of the film capacitor C f is [20]: where Lt r f is the rated lifetime of the film capacitor, V r f and T r f its rated voltage and temperature, V C f the voltage over C f , and n C f its voltage stress coefficient.
The lifetime (Lt C bus ) of an electrolytic capacitor (C bus ) is [20]: where Lt r is the rated lifetime for the electrolytic capacitor, T r its rated temperature, V r its rated voltage, V C bus the voltage over C bus , n 2 the voltage stress factor, I C bus the capacitor current, I r the rated current, ∆T r the temperature rise at I r , and n 1 the temperature stress coefficient.Only the nominal voltage and power levels were considered for the UPS system.

Application of the Proposed Methodology
To demonstrate the combination of the LCL filter parametric (Section 2) and hardware (Section 3) design methodologies, the converter specifications from Table 1 and the values of L g , L c and C f shown in Figure 3 are used.The design of each component is addressed in the following sections.

Filter Inductors L g and L c
The volumes of L g and L c , for each magnetic material technology (NGO Steel, Kool Mµ and 3C92 ferrite) are presented in Figure 4.The technologies are being identified for each point of I c, f s /I c,l f and C f .Similar to the behavior of inductance shown in Figure 3, the volumes for L g tend to increase as I c, f s /I c,l f gets higher, with larger volumes associated to smaller capacitances for C f .For L c , the volumes tend to reduce as I c, f s /I c,l f gets higher.For L g , it is observed that the inductors built with 3C92 ferrite are the largest, due to their low flux density capacity.Inversely, the NGO steel inductors result in the lowest volumes due to the high flux density supported by the material.This fact makes NGO steel the most indicated for the construction of L g .Kool Mµ material supports intermediate flux density levels relative to the others, and results in volumes smaller than 3C92 ferrite, but larger than NGO steel.
For L c , the smallest volumes are obtained with Kool Mµ material for most points of I c, f s /I c,l f .The inductor volumes reduce as I c, f s /I c,l f is increased for Kool Mµ and 3C92 ferrite cores, following the behavior of Figure 3.The opposite happens to NGO steel cores, due to the significant increase in core losses.This is predicted because the inductor is designed considering its relationship of losses, volume and temperature, as described in Appendix A. When high losses are estimated, larger cores are selected to reduce magnetic flux density, also increasing the surface area for heat transfer.Thus, volumes for L c using NGO Steel increase rather than decrease when I c, f s /I c,l f rises.For this same reason, at the last point of I c, f s /I c,l f in Figure 4, it is possible to build an L c with 3C92 ferrite core that is smaller than a Kool Mµ-built inductor: the latter material has a higher core loss characteristic than the former, which stands out as I c, f s /I c,l f is increased.
Based on the characteristics of each technology, the application of the proposed methodology makes it possible to select the magnetic material that will result in the smallest volume for L g and L c , for the considered values of I c, f s /I c,l f and C f .The selection of the smallest volume for L c and L g for the converter from Table 1 will result in the volumes of L c + L g shown in Figure 5.In it, the coloration of the markers identify which magnetic material resulted in the smallest volume for each inductor.The left side of the marker corresponds to the magnetic material of L g , and the right side to L c .
Having a freedom of choice for combinations of L-C-L considering normative restrictions, it is demonstrated that there is a specific value of I c, f s /I c,l f that will result in the smallest inductor volumes.

Filter Capacitor C f
The complete analysis of the LCL filter volume is done considering the contribution of C f .Figure 6 shows the variation of the total volume (C f + L g + L c ) of the filter for the swept values of I c, f s /I c,l f and C f .Similarly to Figure 5, the coloration of the markers identify which magnetic material resulted in the smallest volume for each inductor.The individual contribution of each component to the total filter volume is also shown.The combined volumes show that even if the largest capacitor values (47 µF and 55 µF) result in smallest inductor volumes (Figure 5), the intermediate value of 24.5 µF results in the smallest volume for the LCL filter (Figure 6).differs from the recurrent decision to choose L c = L g [1,8,15,37].The capacitance value that minimized filter volume, C f = 24.5 µF, corresponds to 2.9% of C b , which is in accordance to the usual C f ≤ 5% of C b [6,7,9,14,15,17].
The second parameter under consideration for the LCL filter design is the filter capacitor lifetime.It is estimated using (9), resulting in Figure 7.For low I c, f s /I c,l f , there is a longer estimated lifetime, due to the low harmonic content absorbed by the capacitor (at low I c, f s /I c,l f most harmonics are filtered by L c ).As I c, f s /I c,l f is increased, more harmonics are filtered by C f , increasing losses and reducing lifetime.Since R Th and ESR are higher for the smaller capacitance values, the lifetime estimation for the 15 µF and 24.5 µF is significantly smaller than the others as I c, f s /I c,l f is increased.
As can be seen in Figure 7, the highest estimated lifetime for all values of C f is given at the lowest value of I c, f s /I c,l f (7%).If the C f value that minimizes filter volume (24.5 µF) is chosen for I c, f s /I c,l f = 7%, the maximum Lt C f design would result in an LCL filter with a volume 9.5% higher than the minimum volume, which was obtained at I c, f s /I c,l f = 17%.In contrast, at I c, f s /I c,l f = 17% the estimated lifetime is 29% smaller than at I c, f s /I c,l f = 7%, choosing the latter could be considered a reasonable trade-off.

Bus Capacitors C bus
The last parameter under consideration is the bus capacitor lifetime.The total required capacitance (C * bus ) is calculated as a function of hold-up time [38].The minimum capacitance of the DC Bus for the converter from Table 1 is estimated as C * bus = 3.76 mF.The following combinations of parallel capacitors were considered for each half of the DC bus: 16 × 470 µF, 4 × 1900 µF, or 2 × 3900 µF.Their volumes are (each bus half): 632 cm 3 , 352 cm 3 , and 374 cm 3 , respectively.The lifetime for each individual capacitor in the DC bus is estimated using (10), resulting in Figure 8.The variation of lifetime using the three possible combinations of parallel capacitors are plotted for comparison.
Given the tested configurations for the DC Bus, the overall best result in estimated lifetime was achieved using 4 × 1900 µF, besides having the smallest volume.This result may seem counter-intuitive, as it is expected that when the current stresses are divided among more capacitors (e.g., 16 × 470 µF), estimated lifetime will increase.However, taking into consideration actual capacitor R Th , ESR and current limits, when individual lifetimes are being considered, it is slightly worse to use 470 µF capacitors than using 1900 µF, for the DCMC series [36].This seemingly counter-intuitive result demonstrates the importance of considering individual characteristics when designing the hardware, as was similarly shown in Section 4.1 for the inductors.
Similarly to C f , when I c, f s /I c,l f increases, the estimated lifetime of C bus decreases, because of the higher harmonic currents (Figure 8).Lt C bus is also influenced by C f , with higher values increasing harmonic currents in C bus , reducing lifetime.As discussed in Section 4.2, when using C f = 24.5 µF, the minimum volume for the LCL filter was obtained with I c, f s /I c,l f = 17%, but the volume difference to I c, f s /I c,l f = 7% (lowest value considered) was of 9.5%.Given the same capacitance value in the filter (24.5 µF), and with 4 × 1900 µF in the DC bus, the difference in Lt C bus between I c, f s /I c,l f = 17% and 7% is of 4.4%.This difference in lifetime is smaller than what was found for Lt C f , which was of 29%.Since using I c, f s /I c,l f = 7% benefits both Lt C bus and Lt C f , the possible trade-off between filter volume and capacitor lifetime, mentioned at the end of Section 4.2, may continue be considered reasonable.

Experimental Results
The developed methodology for the LCL filter design is validated experimentally using two metrics.The first one is verifying that the designed filter meets the normative restrictions (IEC 61000-3-4), validating the parametric design (Section 2).
The second metric is the conformity of estimated power loss to the loss measurement, corresponding to the hardware design (Section 3).Capacitor lifetimes are directly related to their losses, as given by ( 7) through (10); and estimating inductor losses correctly is crucial for the entire design procedure, as described in Appendix A.
A 3 kW converter is considered as the case study for experimental results.To simplify the prototype, only a single-phase (1 kW) half-bridge is built, since the topology of Figure 2 allows that the LCL filter be designed per-phase.Furthermore, as described in Section 2, the LCL filter is designed to meet normative restrictions by itself, and therefore inductances of the grid and/or transformers at the input are disregarded.To avoid these influences, the converter is operated with reversed power flow, with a DC source at the bus, and a 1 kW load in series with L g (AC side).Either way, the LCL filter is attenuating the harmonics generated by converter switching.
The test setup is shown in Figure 9. Waveforms are measured with a Tektronix MDO3034 oscilloscope, and losses are measured using a Yokogawa WT1600 power meter.Total losses are P loss = P in − P out .To separate semiconductor, filter, and DC Bus losses, the MOSFET losses (P MOS ) are estimated using the method presented by [39,40].The estimated P loss is equal to the sum of all estimated losses, P loss = P L g + P L c + P C f + P C bus + P R f + P MOS (11) where P L g and P L c are the total losses (A15) estimated in the grid and converter-side inductors, P C f and P C bus the losses (7) in the filter and bus capacitors, and P R f joule losses in the damping resistor ).The converter specifications for the experimental results (single-phase) are shown in Table 2.The methodology is applied considering a sweep of C f from 1.5% to 9.12% of C b , and I c, f s /I c,l f from 3% to 17%.The resulting volumes are shown in Figure 10.The estimated lifetimes Lt C f and Lt C bus are shown in Figure 11.Only one 1900 µF capacitor is used for each half of the DC bus.

Rated power 1 kW
Switching frequency 20 kHz AC side voltage 127 V/60 Hz DC side voltage 430 V The filter volume is minimized with C f = 5 µF and I c, f s /I c,l f = 7%, as shows Figure 10.For these values, the lifetime of C f is only 1.5% smaller than the maximum value (at I c, f s /I c,l f = 3%), and for C bus the lifetime is 0.3% smaller, as shows Figure 11.Though the capacitor lifetime is not maximized in this solution, it is considered a good compromise, and more useful than selecting I c, f s /I c,l f = 3%, whose volume is 9.5% larger.For the chosen operating point with C f = 5 µF, the corresponding inductances are L g = 423 µ H and L c = 1.48 mH.The filter is designed to meet the IEC 61000-3-4 standard with a safety margin of 2/3 of the maximum admissible harmonic amplitude, or I g, f s /I g,l f ≈ 0.4%.In Figure 13 the harmonic amplitudes of current over the frequency spectrum in L c and L g are presented.The measured ratio of I g, f s /I g,l f is of 0.41%, close to the stipulated value of approximately 0.4%.

Conclusions
In this work a two-stage methodology for parametric and hardware design of LCL filters for grid-connected converters was presented.The first stage (parametric design) is based on the sweep of possible filter capacitances (C f ) and harmonic current content at the converter (I c, f s ).It is employed to determine different combinations of L-C-L that meet the restrictions of the standard.The second stage (filter hardware design) determines the hardware for each combination of L-C-L that was obtained in the first stage, taking into account practical aspects and particularities of each technology.
The influence of using different technologies for the core material of the inductors of the LCL filter was discussed.It was addressed how their individual characteristics relate to the frequency and switching harmonics, distinctly influencing the final design of each inductor.A step-by-step procedure for the parametric and hardware design of the components was presented.The relationship among the value of C f , the amount of harmonics absorbed by it, and how these influence the total volume of the LCL filter was also considered.
In addition to the filter volume criterion, the lifetime of the filter and bus capacitors was considered.In this way, a broader perspective design-wise was possible, where compromises between filter volume and capacitor lifetimes were discussed.
The results have shown that when using the proposed methodology, the joint analysis of the parametric and hardware designs makes it possible to identify the values of current harmonics and capacitances that minimize the filter volume, maximize the lifetimes of the capacitors, or a compromise between both, with all methods meeting the normative restrictions.

Nomenclature
The following nomenclature is used in this manuscript: rise is estimated once again.This process is repeated until the temperature rise between iterations (δT L ) is smaller than 1%.If this condition is met, thermal equilibrium is assumed.
If the final T L is above the limit for a given magnetic material (T Lmax ), a larger (higher energy) core is selected from the database, and the whole design process is reset.Thus, an iterative loop is formed with the purpose of reducing inductor losses and T L .
The T Lmax is particular to each magnetic material, and determined by the manufacturer.All magnetic cores were designed for a T L below 65% of their respective T Lmax .This value, adopted as a safety margin, is a designer criteria, that can be easily changed in the proposed design methodology.

Figure 3 .
Figure 3. Inductance of L c and L g as a function of I c, f s /I c,l f , for different C f .

Figure 4 .
Figure 4. Inductor volumes of L c and L g with different technologies as a function of I c, f s /I c,l f , for different C f .

Figure 5 .
Figure 5. Technologies that result in smallest combined volume of L c + L g , as a function of I c, f s /I c,l f , for different C f .

Figure 7 .
Figure 7.Estimated lifetime for C f (Lt C f ) as a function of I c, f s /I c,l f .

Figure 8 .
Figure 8.Estimated lifetime (Lt C bus ) for each capacitor in the DC bus, as a function of I c, f s /I c,l f .

Figure 10 .
Figure 10.Total filter volume: L c + L g + C f , as a function of I c, f s /I c,l f , for the converter from Table2.

Figure 11 .
Figure 11.Estimated capacitor lifetimes as a function of I c, f s /I c,l f .(a) Lt C f .(b) Lt C bus .The oscilloscope and power meter measurements are shown in Figure 12.The oscilloscope waveforms in channel 1 show the drain-to-source voltage over the MOSFET; channel 2 the AC-side voltage; channel 3 the current in L c ; and channel 4 the current in L g .The total losses measurement is: P loss = 1001.7 − 960.6 = 41.1 W, corresponding to the reading of elements P1 − P5.Measurements were taken at other points of the circuit: P1 − P2 = 22.1 W represents the losses of the converter (MOSFET and DC Bus combined); P2 − P3 = 12.6 W represent P L c ; P3 − P4 = 3.3 W represent P C f and P R f combined; P4 − P5 = 3.1 W represent P L g .Estimated losses were: 3.66 W for P L g ; 13.38 W for P L c ; 0.10 W for P C f ; 2.19 W for P R f ; 16.49 W for P MOS ; and 3.50 W for P C bus , adding up to 39.32 W. The difference between the measured and estimated value is of 1.78 W, corresponding to 4.33% of the measured value.

Table 2 .
Converter specifications for experimental results (single-phase).