A Symbiotic Organism Search-Based Selective Harmonic Elimination in a Switched Capacitor Multilevel Inverter

Multilevel inverters are increasingly being employed for industrial applications, such as speed control of motors and grid integration of distributed generation systems. The focus is on developing topologies that utilize fewer lower-rating switches and power sources while working efficiently and reliably. This work pertains to developing a three-phase multilevel inverter that employs switching capacitors and a single DC power supply that produces a nine-stage, threephase voltage output. A recently proposed powerful meta-heuristic technique called symbiotic organism search (SOS) has been applied to identify the optimum switching angles for Selective Harmonic Elimination (SHE) from the output voltage waveform. A thorough converter analysis has also been done in the MATLAB/SIMULINK environment and is validated with the real-time hardware-in-the-loop (HIL) experiment results.


Introduction
Multilevel Inverters (MLIs) are state-of-the-art power electronic converters that have taken the place of traditional inverters in many applications, such as renewable energy systems, grid integration systems, mechanical drives, electric vehicles, and FACTS [1][2][3][4]. MLIs are mostly preferred in different applications because of their efficient power generating features with lower switching losses and low voltage stress across switches [5]. MLIs are mainly classified as Neutral Point Clamped (NPC), Flying Capacitor (FC), and Cascaded H-bridge Inverter [6][7][8][9]. The first two (NPC and FC) suffer from voltage imbalance, and their component counts that dramatically increase with an increasing number of voltage levels. Cascaded H-bridge Inverters can generate significant voltage levels with fewer switches, but each unit of the H-bridge requires an isolated dc source. To mitigate the limitations of classical MLIs, several switched capacitor MLIs have been explored, which have the essential characteristics of inherent voltage balance, voltage boosting feature with the least number of input DC power supplies, and switching components.
The performance of the converter depends largely on the selection of modulation method. The effective modulation strategy reduces the harmonics of output voltage and current to a level acceptable under IEEE 519 standards. SHE is a low frequency-based modulation strategy in which non-transcendental multivariable equations are solved to find the angles corresponding to desired harmonic elimination. A low switching frequency modulation scheme has less switching loss than a high-frequency modulation scheme.

a.
A single dc source is required in the nine-level topology to generate a nine-level three-phase output voltage. b.
In this topology, a small number of devices (switches, capacitors, and diodes) can increase the output voltage. The voltage stress across the components is also restricted to the source voltage. c.
A nature-inspired meta-heuristic approach called the symbiotic optimum search (SOS) was used to find the optimum angles. d.
SHE PWM technique was employed for controlling the output voltage.
This paper is organized as follows. Section 2 describes the basic circuit configuration of the nine-level SCMLI and its operation. Section 3 describes the SHE PWM technique to control the operation of the inverter. In Section 4, the SOS algorithm and its main stages are briefly explained. Power loss analysis is explained in Section 5. Analysis and consideration of simulation and test results are shown in Section 6. Section 7 concludes. Figure 1 illustrates the single-phase version of the proposed nine-level switched capacitor MLI (SCMLI). The proposed topology has the features of boosted voltage and self-balanced capacitor voltage. Table 1 shows the switch states for generating different voltage levels. Figure 2 illustrates the circuit diagram of a three-phase nine-level MLI. Each phase consists of three capacitors (C 1 , C 2 , and C 3 ), ten switches (S 1 to S 10 ), and a single input voltage source. This topology has the advantage of low voltage stress across the switches and capacitors, limited to V dc . Figure 3 represents all possible voltage levels (0, ±0.5V dc , ±V dc , ±1.5V dc , and ±2V dc ) generated by the SCMLI. a. A single dc source is required in the nine-level topology to generate a nine-l three-phase output voltage. b. In this topology, a small number of devices (switches, capacitors, and diodes) increase the output voltage. The voltage stress across the components is also stricted to the source voltage. c. A nature-inspired meta-heuristic approach called the symbiotic optimum sea (SOS) was used to find the optimum angles.

Circuit Configuration of the Proposed SCMLI
d. SHE PWM technique was employed for controlling the output voltage.
This paper is organized as follows. Section 2 describes the basic circuit configura of the nine-level SCMLI and its operation. Section 3 describes the SHE PWM techniqu control the operation of the inverter. In Section 4, the SOS algorithm and its main sta are briefly explained. Power loss analysis is explained in Section 5. Analysis and con eration of simulation and test results are shown in Section 6. Section 7 concludes. Figure 1 illustrates the single-phase version of the proposed nine-level switched pacitor MLI (SCMLI). The proposed topology has the features of boosted voltage and balanced capacitor voltage. Table 1 shows the switch states for generating different v age levels. Figure 2 illustrates the circuit diagram of a three-phase nine-level MLI. E phase consists of three capacitors (C1, C2, and C3), ten switches (S1 to S10), and a single in voltage source. This topology has the advantage of low voltage stress across the switc and capacitors, limited to Vdc. Figure 3 represents all possible voltage levels (0, ±0.5 ±Vdc, ±1.5Vdc, and ±2Vdc) generated by the SCMLI.   a. A single dc source is required in the nine-level topology to generate a ninethree-phase output voltage. b. In this topology, a small number of devices (switches, capacitors, and diodes) increase the output voltage. The voltage stress across the components is also stricted to the source voltage. c. A nature-inspired meta-heuristic approach called the symbiotic optimum se (SOS) was used to find the optimum angles.

Circuit Configuration of the Proposed SCMLI
d. SHE PWM technique was employed for controlling the output voltage.
This paper is organized as follows. Section 2 describes the basic circuit configura of the nine-level SCMLI and its operation. Section 3 describes the SHE PWM techniqu control the operation of the inverter. In Section 4, the SOS algorithm and its main st are briefly explained. Power loss analysis is explained in Section 5. Analysis and con eration of simulation and test results are shown in Section 6. Section 7 concludes. Figure 1 illustrates the single-phase version of the proposed nine-level switched pacitor MLI (SCMLI). The proposed topology has the features of boosted voltage and balanced capacitor voltage. Table 1 shows the switch states for generating different age levels. Figure 2 illustrates the circuit diagram of a three-phase nine-level MLI. E phase consists of three capacitors (C1, C2, and C3), ten switches (S1 to S10), and a single in voltage source. This topology has the advantage of low voltage stress across the swit and capacitors, limited to Vdc. Figure 3 represents all possible voltage levels (0, ±0.5 ±Vdc, ±1.5Vdc, and ±2Vdc) generated by the SCMLI.

The Selective Harmonic Elimination Technique (SHE)
SHE PWM is a technique that can be used to control the harmonics in a power electronic converter and its application, especially the MLI (input or output) waveform.
Switching losses are generally high in high-power converters, significantly reducing the converter's efficiency. Reducing these losses is a subject of importance [23]. Compared with other PWM techniques, the SHE PWM operates at a fundamental or close to fundamental frequency. It results in reducing the switching power losses and better harmonic performance. This feature adds it to an advantageous solution for many applications, such as grid-connected converters and medium-voltage drive applications.

a.
Motor drive converters: SHE PWM is used to eliminate low order voltage harmonics, reducing both the acoustic noise and common-mode voltage. b.
Active rectifiers: SHE PWM can be used to minimize the line current THD and balance each cell's voltage and power levels. c.
Grid-connected converters: SHE PWM can be applied to grid-connected converters to minimize harmonics, reduce switching losses, and reduce filtering requirements, along with other benefits, such as interfacing photovoltaic systems with the grid.
The formulation of SHE PWM includes variable levels, unequal, non-symmetrical, half-wave symmetry and quarter-wave symmetry. The quarter-wave symmetry is simplest because sine coefficient of odd harmonics, the dc component and even harmonics are all equivalent to zero, making calculation easier and requiring the least number of equations for a solution due to a high degree of symmetry in the waveform. N variables are required for switching angles with constraints 0 < δ 1 < δ 2 < δ 3 . . . < δ N < π/2. In half-wave symmetric formulation, 2 N transitions are considered in the half period. Both cosine and sine terms of odd harmonics need to be controlled in this method. In non-symmetric formulation, 4 N + 2 transitions need to be formulated in the entire period. This is the least attractive of all the formulations [24][25][26].
The objective function 'O' that needs to be minimized is given by Equation (1): where V dc is the dc source voltage, V 1 represents the fundamental voltage, F i represents the Fourier equations for obtaining four angles, and the following equations give the constraints [27][28][29][30]: Energies 2022, 15, 89 6 of 18 The objective function defined by Equation (1) consists of two terms: one is to maintain the fundamental voltage, and the second is to minimize the harmonic components. These four Equations (2) to (4) are a set of transcendental equations, also called the SHE equations. There are four angles (δ 1 , δ 2 , δ 3 , and δ 4 ); therefore, four things can be controlled. Formulation (2) is used to set the fundamental voltage to the desired value, whereas (3), (4), and (5) are formulated to eliminate the dominating 5th, 7th, and 11th order harmonic components by equating them to zero. These equations are solved by a metaheuristic technique to determine the optimum values of the unknown angles.

Symbiotic Organism Search (SOS) Algorithm
In this paper, a new and robust metaheuristic technique known as Symbiotic Organism Search (SOS) [31][32][33] is used to determine the firing angles, which helps in mitigating and controlling the lower-order harmonics of the proposed inverter. This method is influenced by the natural phenomena of the ecosystem. Different organisms within the ecosystem depend on each other symbiotically to adapt to the changes and survive. A symbiotic relationship is mainly classified into three types:

•
Mutualism is an association between two organisms in which each benefit, e.g., the cooperation between coral reefs and algae.

•
Commensalism is an association between two organisms in which one organism benefits without harming another organism, e.g., tree frogs use plants as protection and shelter. • Parasitism is a relationship amid two organisms in which one is benefited though the other is harmed, e.g., mosquitoes feed on the blood of other organisms.
The symbiotic algorithm begins with generating a random population, in which the system has 'n' organisms (n: number of angles) in the ecosystem. Over the succeeding stages, the population is upgraded with each generation following the above-mentioned processes (mutualism stage, commensalism stage, and parasitism stage). Furthermore, an updated value in each step is accepted only if it has improved functional values compared to the previous one. This method of optimization continues till it satisfies the termination criteria [28,29]. Figure 4 shows the SOS algorithm in which the flow chart shows all important stages discussed above, including initialization, mutualism, commensalism, and parasitism.
The following steps reflect the above discussion.
Step 1: At modulation index M = 1, a random ecosystem is defined for i = i:n, initialization of maximum iteration MaxIter = 50, number of angles Npar = 4, and their limit are also defined with minimum value (0) and maximum value (π/2).
Step 2: In the mutualism phase, a mutual vector is defined with two different mutual organisms X(i) and X(j) to ascend their survival. X(j) is an arbitrary organism from the ecosystem chosen to interact with organism X(i). These organisms form a mutualistic relationship with the aim to increase their survival. A new candidate solution is calculated for X(i) and X(j) based on the mutualistic symbiosis amid organisms X(i) and X(j), given by Equation (6) and Equation (7), respectively:

Power Loss Calculation
The semiconductor devices used in power converters include losses, mainly conduction losses, switching losses, gate driver losses, and off-state losses. Since the gate driver losses and off-state losses are negligibly small, they can be neglected. Hence, the conduction and switching losses are the major contributors for efficiency reduction. Unlike ideal switches, there are some losses in the practical switches categorized as static (conduction) losses and dynamic (switching) losses. When the switch is in a conducting state, there is certainly a voltage drop due to equivalent resistance of the switch, which results in conduction power loss. During turn-on and turn-off processes of the switch, it absorbs some power due to the non-zero value of the voltage and current across the switch for at least some microseconds, which results in switching power loss.

Conduction Loss
The conduction loss mainly occurs due to the internal resistance of switches, diodes, and capacitors. The conduction loss of any device can be calculated by the product of a voltage drop and current flow in the device: A random number vector is rand(1, Npar). The mutualistic endeavor to boost their survival ability is reflected in the component of the Equations (6) and (7), (X best − Mutual vector ). In this case, X best is essential, since it reflects the maximum level of adaptability. Equation (8) rpresents a mutual vector that depicts the connection between X(i) and X(j). This vector offers a unique feature, mainly when two creatures are far apart in the search space. This enables the exploration of new solutions. Furthermore, both interacting organisms are updated concurrently rather than being updated individually. Finally, if the organism's new fitness is higher than the prior value, it will be updated.
Step 3: Similarly, from the ecosystem, a random creature X(j) is chosen to interact with X(i). X(i) will gain from X(j), but there will be no profit or harm to organism X(j) in this interaction. The new value of X(i) is obtained from X(i) and X(j) based on the commensalism relationship. The new value is accepted only if it is better than the previous interaction. The following equation gives the updated value of X(i): where (X best − X(j)) denotes the benefit or advantage supplied by X(j) in assisting X(i) in maximizing its survival in the environment. The best solution is used as the reference point in the SOS method, allowing it to utilize the optimistic regions near the best answer. This aids in the acceleration of convergence.
Step 4: A parasite vector is formed by duplicating organism X(i), and a arbitrarily chosen organism X(j) from the environment serves as the parasite vector's host, provided that X(i) = X(j). This parasite vector competes with other randomly chosen species, except its originator. The parasite vector replaces its host organism X(j) during this phase. Then, for both species fitness levels are assessed. If the parasite vector's fitness value is higher, it will kill the host and take over the ecosystem's position. If X(j) has a higher fitness value, it will be immune to the parasite, and the parasite will be unable to thrive in the environment.
The technique described above (steps 2-4) is continued until the maximum number of iterations has been achieved.

Power Loss Calculation
The semiconductor devices used in power converters include losses, mainly conduction losses, switching losses, gate driver losses, and off-state losses. Since the gate driver losses and off-state losses are negligibly small, they can be neglected. Hence, the conduction and switching losses are the major contributors for efficiency reduction. Unlike ideal switches, there are some losses in the practical switches categorized as static (conduction) losses and dynamic (switching) losses. When the switch is in a conducting state, there is certainly a voltage drop due to equivalent resistance of the switch, which results in conduction power loss. During turn-on and turn-off processes of the switch, it absorbs some power due to the non-zero value of the voltage and current across the switch for at least some microseconds, which results in switching power loss.

Conduction Loss
The conduction loss mainly occurs due to the internal resistance of switches, diodes, and capacitors. The conduction loss of any device can be calculated by the product of a voltage drop and current flow in the device: or: where I L is the load current flowing through the conduction path, V on is the total voltage drop across the path, pR sw is the sum of resistances of all the switches, qR d is the sum of forward resistances of all the diodes, and rR c is the sum of resistances of all the capacitors.

Switching Loss
Switching loss occurs when the switch is transitioning either from off-state to on-state or from on-state to off-state. Considering the linear approximation between the voltage (V) and current (I) during the turning on (t on ) and turning off (t o f f ) processes, the energy loss across x th swich can be expressed by the following equations: where I x and I x , are the currents available in the switch after the on-state and before the off-state conditions. Therefore, the total switching loss for the x th switch is given by: where N on,x and N o f f ,x represent the number of times x th that the switch turns on and turns of in a cycle and T is the time period of fundamental cycle. Therefore, the total switching loss of the proposed inverter is given by:

Efficiency
In the power loss analysis, we have considered only major losses, i.e., conduction loss and switching loss. Efficiency can be calculated by the ratio of the output power to the input power, where the input power is the sum of output power and losses: The above equations can be used to calculate the efficiency of the topology under different operating conditions.

Results and Discussion
In the SOS algorithm, all three stages (mutualism, symbiosis, and parasitism) are repeated till it get to the maximum number of iterations (MaxIter); in this case, MaxIter is taken as 50 and the total number of optimum angles is taken as 4. The convergence speed depends on factors such as the initial solution, step size, and, most importantly, the method (algorithm) used. The number of iterations plays an essential role in the optimization problem. There usually are two ways to terminate an algorithm:

1.
Depending on the termination criteria.

2.
The preset value of the termination.
The fewer iterations required to reach the termination criteria, the better the algorithm is. At the same time, the preset value of termination is used in algorithms known to converge to the desired fitness value after some iterations. As the objective function of the SOS algorithm reaches the desired minimum value within ten iterations in most modulation index cases, any number higher than ten could be chosen. In the present case, the number of iterations is chosen as 50 to avoid premature termination. Additionally, the THD of the output voltage depends on the resultant optimum angles obtained after successful convergence of the algorithm after meeting the desired criterion. Figure 5 shows the convergence of objective functions within the algorithm. It is observed that the cost function reaches its minimum value within ten iterations of the algorithm and provides optimum angles as output. The contours of angles δ 1 , δ 2 , δ 3 , and δ 4 for distinct values of the modulation index is shown in Figure 5, which indicates all feasible solutions for angles at different modulation indices. The convergence characteristic of the SOS algorithm for the SHE problem is shown in Figure 6. Figure 7 illustrates the contour representation of the switching angles (in radians) with the varying modulation index corresponding to the proposed topology. function reaches its minimum value within ten iterations of the algorithm and provides optimum angles as output. The contours of angles δ1, δ2, δ3, and δ4 for distinct values of the modulation index is shown in Figure 5, which indicates all feasible solutions for angles at different modulation indices. The convergence characteristic of the SOS algorithm for the SHE problem is shown in Figure 6. Figure 7 illustrates the contour representation of the switching angles (in radians) with the varying modulation index corresponding to the proposed topology.  function reaches its minimum value within ten iterations of the algorithm and provides optimum angles as output. The contours of angles δ1, δ2, δ3, and δ4 for distinct values of the modulation index is shown in Figure 5, which indicates all feasible solutions for angles at different modulation indices. The convergence characteristic of the SOS algorithm for the SHE problem is shown in Figure 6. Figure 7 illustrates the contour representation of the switching angles (in radians) with the varying modulation index corresponding to the proposed topology.

Comparison with Differential Evolution and Genetic Algorithm
The SOS algorithm is compared with two powerful metaheuristic techniques, i.e., differential evolution and Genetic Algorithm. The THD curve for the three algorithms for nine-level output is shown in Figure 8. It could be observed that the THD obtained by using the SOS algorithm for a wide range of modulation indexes is less than DE and GA, especially for higher modulation indexes. The Y-axis is zoomed-in Figure 9 to show the THD value in the three cases clearly. Thus, this is a significant advantage of using the SOS algorithm: the THD has a lower value for a range of modulation indexes.

Comparison with Differential Evolution and Genetic Algorithm
The SOS algorithm is compared with two powerful metaheuristic techniques, i.e., differential evolution and Genetic Algorithm. The THD curve for the three algorithms for nine-level output is shown in Figure 8. It could be observed that the THD obtained by using the SOS algorithm for a wide range of modulation indexes is less than DE and GA, especially for higher modulation indexes. The Y-axis is zoomed-in Figure 9 to show the THD value in the three cases clearly. Thus, this is a significant advantage of using the SOS algorithm: the THD has a lower value for a range of modulation indexes.
The SOS algorithm is compared with two powerful metaheuristic techniques, i.e., differential evolution and Genetic Algorithm. The THD curve for the three algorithms for nine-level output is shown in Figure 8. It could be observed that the THD obtained by using the SOS algorithm for a wide range of modulation indexes is less than DE and GA, especially for higher modulation indexes. The Y-axis is zoomed-in Figure 9 to show the THD value in the three cases clearly. Thus, this is a significant advantage of using the SOS algorithm: the THD has a lower value for a range of modulation indexes.  The SOS algorithm is compared with two powerful metaheuristic techniques, i.e., differential evolution and Genetic Algorithm. The THD curve for the three algorithms for nine-level output is shown in Figure 8. It could be observed that the THD obtained by using the SOS algorithm for a wide range of modulation indexes is less than DE and GA, especially for higher modulation indexes. The Y-axis is zoomed-in Figure 9 to show the THD value in the three cases clearly. Thus, this is a significant advantage of using the SOS algorithm: the THD has a lower value for a range of modulation indexes. Modulation Index (m) THD (pu) Figure 9. Zoomed view. Figure 9. Zoomed view.

Simulation Results
The proposed nine-level SCMLI topology has been simulated in a Simulink environment. Table 2 shows the parameters used in the simulation study. Simulation results are taken across the load, with the angles corresponding to the modulation index, M = 1. Figure 10 shows three-phase voltages for three cycles from 0.02 s to 0.08 s, which illustrates that 120 • displaces all phase voltages and their amplitude reaches 200 V and signifies twice voltage boosting capability of the nine-level SCMLI. Figure 11 shows the phase voltage (volts) and phase current (A) (multiplied by a gain of 50 to make it visible) for phase A with RL load, which approximates the sinusoidal waveform across the load. The FFT analysis of the phase voltage has been carried out to validate the elimination of the undesired harmonics, as shown in Figure 12. It is evident that the fundamental voltage is 100%, whereas the 5 th , 7 th and 11 th order harmonics are minimized to a negligible value, and the total harmonic distortion (THD) has reduced to 12.46%. These significant harmonic components go on diminishing with the increase in modulation index, as shown in Figure 13.         The harmonic representation in Figure 13 shows the variation of different harmonics amplitude in p.u. with the variation of modulation index. High value of the 3rd harmonic in the lower harmonic index range indicates that there is no solution for 3rd harmonic elimination in that range.

Hardware in-the-Loop Results for the SHE Implementation Using the SOS Algorithm
The proposed SCMLI topology was modeled in Typhoon's HIL platform to validate the simulation result. The Typhoon's HIL platform provide real-time results for the modeled system and it is a precursor for developing and testing a hardware prototype. The HIL arrangement is shown in Figure 14. The three-phase circuit model was developed in Typhoon's Integrated Development Environment (IDE). The control circuit for SHE for the three-phase SCMLI is also modeled in HIL-IDE. The model is emulated in HIL. The results are observed on the DSO. The parameters in HIL were taken to be the same as in the simulation. The results obtained were found to be in validation with the simulation results. The three-phase voltages across the load are 120° out of phase, and each phase voltage has an amplitude of 200 V. This is shown in Figure 15. Figure 16 shows the voltage and current waveforms for one phase, similar to the simulation results in Figure 11. The three-phase current across the load is shown in Figure 17. The load current is for the R-L load. The three-phase currents are balanced and close to the sinusoidal waveform. The phase current across a varying load (resistive for three cycles and inductive for three cycles) is shown in Figure 18. The hardware-in-the-loop results validate the operation of the proposed three-phase SCMLI. The harmonic representation in Figure 13 shows the variation of different harmonics amplitude in p.u. with the variation of modulation index. High value of the 3rd harmonic in the lower harmonic index range indicates that there is no solution for 3rd harmonic elimination in that range.

Hardware in-the-Loop Results for the SHE Implementation Using the SOS Algorithm
The proposed SCMLI topology was modeled in Typhoon's HIL platform to validate the simulation result. The Typhoon's HIL platform provide real-time results for the modeled system and it is a precursor for developing and testing a hardware prototype. The HIL arrangement is shown in Figure 14. The three-phase circuit model was developed in Typhoon's Integrated Development Environment (IDE). The control circuit for SHE for the three-phase SCMLI is also modeled in HIL-IDE. The model is emulated in HIL. The results are observed on the DSO. The parameters in HIL were taken to be the same as in the simulation. The results obtained were found to be in validation with the simulation results. The three-phase voltages across the load are 120 • out of phase, and each phase voltage has an amplitude of 200 V. This is shown in Figure 15. Figure 16 shows the voltage and current waveforms for one phase, similar to the simulation results in Figure 11. The three-phase current across the load is shown in Figure 17. The load current is for the R-L load. The three-phase currents are balanced and close to the sinusoidal waveform. The phase current across a varying load (resistive for three cycles and inductive for three cycles) is shown in Figure 18. The hardware-in-the-loop results validate the operation of the proposed three-phase SCMLI.

Conclusions
In this paper, we examine the operation of the proposed three-phase, nine-stage, multi-stage switched capacitor inverter that utilizes the SOS-based selective harmonic elimination technique. The SOS algorithm to solve SHE equations results in lower THD for a wide range of modulation indexes than the DE and GA algorithm. MATLAB/Simulink results for the nine-level inverter are presented, and FFT analysis has been carried out for one of the phases, demonstrating the elimination of desired lower-order harmonics. The simulation results have been validated through Typhoon's hardware-in-the-loop testbed.

Conclusions
In this paper, we examine the operation of the proposed three-phase, nine-stage, multi-stage switched capacitor inverter that utilizes the SOS-based selective harmonic elimination technique. The SOS algorithm to solve SHE equations results in lower THD for a wide range of modulation indexes than the DE and GA algorithm. MATLAB/Simulink results for the nine-level inverter are presented, and FFT analysis has been carried out for one of the phases, demonstrating the elimination of desired lower-order harmonics. The simulation results have been validated through Typhoon's hardware-in-the-loop testbed.