Impact on Current-Interrupting Characteristic by Parameter Settings of Superconducting Hybrid DC Circuit Breaker

: DC faults cause severe disruption in not only the DC system but also the AC system because the fault current is very large and rapidly increases. The DC circuit breaker used to separate the DC faults from the power system is still being researched, but it is very expensive due to the use of multiple power semiconductors to interrupt a large fault current in a short time. However, if the quench characteristic of a superconductor is used, the amplitude of fault current can be reduced. Therefore, it is possible to effectively interrupt a large fault current even if a relatively cheap mechanically passive DC circuit breaker is used. In the current study, a superconducting hybrid DC circuit breaker is proposed, and the limiting characteristics of each element are analyzed. By using two superconducting elements, the quench occurs sequentially twice according to the magnitude of the fault current, and the current-limiting reactor and resistance are used. If a current-limiting reactor is used in the DC system, the fault current rises slowly at the beginning of the fault, and the use of resistance can reduce the magnitude of the fault current. The inductance of the current-limiting reactor and resistance parameter settings of the hybrid DC circuit breaker was analyzed by the step-changing case method, and the interrupting characteristic of the DC circuit breaker was improved.


Introduction
The MTDC (multiterminal DC) system, called the electrical power system of the future, is expected to improve power quality and system stability. Since end power devices such as PVs (photovoltaics) and batteries use DC, it is also more advantageous in terms of power losses. However, the problem of fault interruption is more complex than for the AC power system because the DC fault current is larger, and there is no natural zero crossing. Therefore, the research of developing DCCBs (direct current circuit breakers) that enable the circuit breaker to operate in a short time is conducted. A solid DCCB, using a high-cost power switch to interrupt fault current in a short time, is too expensive to apply in practice. To solve this problem, a hybrid DCCB, using a mechanical switch and a small number of power electronic switches, has been proposed. Nevertheless, since several power electronic switches are required to reduce the interrupting time, the power burden by the power electronic switch must be reduced.
The superconducting element performs a quench operation in which resistance occurs above the critical current, and the superconducting current limiter using this characteristic is effective in limiting the fault current. The SFCL (superconducting current limiter) generally helps to reduce the interrupting capacity of a circuit breaker, but it also protects power devices and prevents their lifespan from being shortened. However, the superconducting element takes a long time to recover after removing the fault compared to quenching. This is a disadvantage in the protection coordination of the circuit breaker relaying system. Therefore, reducing this recovery time is also an important task to be solved.

Modeling of Superconducting Hybrid DCCB
The proposed DCCB operates sequentially through the resistance of an HTSC (hightemperature superconductor), an MS (mechanical switch) that generates an arc, and a varistor. The resistance of the HTSC is made to generate resistance when a current above the critical current flows; when the current flowing through the MS flows above the threshold current, the MS interrupts the fault current by generating arc resistance. In the normal state, the resistance of the varistor is large, near infinity, but when the surge voltage generated after complete interruption is higher than the breakdown voltage, the resistance decreases, and the surge energy is dissipated.
In this section, we introduce how each element is modeled, how they are constructed, and how DCCB operates as a whole.

Equivalent Circuit and Operational Process
The modeling of the elements of the superconducting hybrid DCCB is reviewed in Section 2.2. In this section, the overall configuration, equivalent circuit, and operation process of the proposed superconducting hybrid DCCB is reviewed. Figure 1 below shows the equivalent circuit of the proposed superconducting hybrid DCCB.
First, there is the main circuit, with an MS acting as the main circuit breaker, and an auxiliary circuit connected in parallel to it [9][10][11]. The main circuit has an LC resonance circuit connected in parallel with the MS, and when an arc occurs in the MS, a circulating current flows through the LC circuit and resonates. As a result, the arc current is zero; the moment the current becomes zero, the arc is removed, and the MS is completely interrupted. At this time, the smaller the current flowing through the MS, the shorter the time it takes for complete interruption. Therefore, the interruption time can be reduced by connecting RSC1 (resistance of HTSC1) in series with the MS. However, in a situation where the fault current is large, the current flowing through HTSC1 increases, so the power burden in HTSC1 increases, which may lead to damage. To prevent this, the auxiliary circuit is connected in parallel with the main circuit. The auxiliary circuit consists of RSC2 (resistance of HTSC2), CLR1 connected in series, and CLR2 connected in parallel. When RSC1 is quenched, fault current flows toward RSC2, and the current may or may not flow toward CLR2, depending on the critical current The auxiliary circuit consists of R SC2 (resistance of HTSC2), CLR1 connected in series, and CLR2 connected in parallel. When RSC1 is quenched, fault current flows toward R SC2 , and the current may or may not flow toward CLR2, depending on the critical current value setting of R SC2 . In this paper, the critical current setting of RSC2 is set to 140% of RSC1, and, as a result, the commutated current first flows toward RSC2, and then, when the fault current becomes larger, RSC2 is quenched, and the current flows toward CLR2. The reason The resistance of HTSC should be modeled to have superconducting properties. Therefore, when the current flowing through the superconductor is less than the critical current, the resistance of HTSC is '0 ; when it exceeds that, resistance is rapidly generated. When resistance is generated by a fault current, the resistance increases more rapidly while dissipating heat by generated resistance. The resistance of the HTSC increases gradually, and the rate of increase becomes slow as it approaches conducting state resistance. The series of actions in which a superconductor generates resistance is called quench, and it has different patterns depending on the physical structure of the superconductor or the properties of the material. In this paper, a thin-film type YBCO (yttrium barium copper oxide) superconductor is considered. The critical temperature of YBCO is 90 K (−183 • C), which is higher than 77 K, which is the boiling point of liquid nitrogen, so it is the most widely used superconducting element because maintenance cost is more economical than using liquid helium. Therefore, the resistance of YBCO is modeled, and the formula is expressed as follows [11][12][13][14]: RSC stands for HTSC resistance. Equation (1) is a curve representing a resistance that is quenched at t 0 and increases to conducting state resistance R n . t 1 refers to the time at which the quench condition is released due to reasons such as fault elimination. After that, it is set to follow the recovery curve, as in Equation (2). τ means the time constant; the closer it is to 0, the faster it gets closer to conducting state resistance. a means the reference slope of the recovery curve.

Resistance Modeling of Arc
If the MS is opened while the current is flowing, arc discharge occurs between the two electrodes. This discharge is a self-sustained discharge. When a large current flows through the cathode, resistance heat is generated accordingly, and a large number of electrons are released by heat absorption. Therefore, a large current continuously flows, and a process in which a large number of electrons are released is repeated, and the discharge sustains without external ionization. The conductance of arc can generally be expressed as a function of the heat quantity between the electrodes [14][15][16][17][18][19]. The heat quantity Q between the two electrodes is expressed as Equation (3) below.
P in (t) means the difference between the incoming power of the two electrodes, and P o means the power emitted as thermal energy of the arc channel (=column). P o also means the amount of heat that MS can withstand. Using Equation (3), the arc conductance  (4) can be obtained, and then, it can be expressed as Equation (5) through the mathematical process.
Equation (5) is called the general arc equation, and by applying Mayr's assumption to it, the arc equation can be obtained as Equation (6).
Mayr's assumption: f (Q(t)) = ke Q(t) /e Q 0 Mayr s assumption : where k denotes the Boltzmann constant. Q o is expressed as Q o = τ o · P o through the arc generation time constant τ o . Based on this equation, the arc resistance can be modeled by applying the black-box model.

Resistance Modeling of Varistor
Varistor is a compound word of variable and resistor and is one of the transient current suppression devices developed to protect the circuit from sudden fluctuations in voltage or current. In this paper, a ZnO varistor composed of zinc oxide was used. The microstructure of the ZnO varistor, a polycrystalline ceramic element, consists of a ZnO grain and an intergranular boundary surrounding it. It is known that ZnO grains supply electric charge, and the intergranular boundary causes breakdown characteristics. Therefore, varistor resistance usually has a resistance of 1 to 10 GΩ, and, during operation, resistance occurs according to the curve, as shown in Equation (7) below. α means the resistance ratio linear index; the higher the value, the closer the ideal varistor. Usually, it has a value of 6 to 8, and, in this paper, it is assumed to be 8. V b stands for breakdown voltage [19][20][21][22][23].
The equivalent circuit of the varistor is composed of a series resistance and a capacitor, as shown in Figure 2 below. The series resistance is the ZnO grain resistance R ZnO and is constant, but R gb is the resistance of the intergranular boundary, which follows Equation (7) above. L is an inductance of conducting leads, and C denotes the capacitance of the intergranular boundary.
Equation (5) is called the general arc equation, and by applying Mayr's assumption to it, the arc equation can be obtained as Equation (6).
Mayr's assumption: Mayr's assumption: where k denotes the Boltzmann constant. Qo is expressed as Qo = • Po through the arc generation time constant . Based on this equation, the arc resistance can be modeled by applying the black-box model.

Resistance Modeling of Varistor
Varistor is a compound word of variable and resistor and is one of the transient current suppression devices developed to protect the circuit from sudden fluctuations in voltage or current. In this paper, a ZnO varistor composed of zinc oxide was used. The microstructure of the ZnO varistor, a polycrystalline ceramic element, consists of a ZnO grain and an intergranular boundary surrounding it. It is known that ZnO grains supply electric charge, and the intergranular boundary causes breakdown characteristics. Therefore, varistor resistance usually has a resistance of 1 to 10 GΩ, and, during operation, resistance occurs according to the curve, as shown in Equation (7) below. means the resistance ratio linear index; the higher the value, the closer the ideal varistor. Usually, it has a value of 6 to 8, and, in this paper, it is assumed to be 8. Vb stands for breakdown voltage [19][20][21][22][23].
The equivalent circuit of the varistor is composed of a series resistance and a capacitor, as shown in Figure 2 below. The series resistance is the ZnO grain resistance RZnO and is constant, but Rgb is the resistance of the intergranular boundary, which follows Equation (7) above. L is an inductance of conducting leads, and C denotes the capacitance of the intergranular boundary.

Equivalent Circuit and Operational Process
The limiting and interrupting characteristics are completely different depending on whether CLR1 and CLR2 are set to resistance or inductance. For example, if CLR1 is set to resistance and CLR2 is set to inductance, RSC1 is quenched, causing rapid commutation toward the auxiliary circuit. On the other hand, if CLR1 is set to inductance and CLR2 is set to resistance, the change of commutating current in the auxiliary circuit will be smooth.

Equivalent Circuit and Operational Process
The limiting and interrupting characteristics are completely different depending on whether CLR1 and CLR2 are set to resistance or inductance. For example, if CLR1 is set to Energies 2021, 14, 2469 6 of 13 resistance and CLR2 is set to inductance, R SC1 is quenched, causing rapid commutation toward the auxiliary circuit. On the other hand, if CLR1 is set to inductance and CLR2 is set to resistance, the change of commutating current in the auxiliary circuit will be smooth. Figures 3 and 4 below are graphs showing current-limiting and -interrupting characteristics according to the impedance setting of CLR1 and CLR2.     Figure 4, where only the resistance is connected, and HTSC2′s quenching is also fast. After HTSC2 is quenched, the current begins to flow toward CLR2. In the case of Figure 4, since inductance is connected in parallel with HTSC2, there is a      Figure 4, where only the resistance is connected, and HTSC2′s quenching is also fast. After HTSC2 is quenched, the current begins to flow toward CLR2. In the case of Figure 4, since inductance is connected in parallel with HTSC2, there is a   Figure 4, where only the resistance is connected, and HTSC2's quenching is also fast. After HTSC2 is quenched, the current begins to flow toward CLR2. In the case of Figure 4, since inductance is connected in parallel with HTSC2, there is a slight current-limiting effect. In Figure 3, it can be seen that since the current-limiting effect is large after quenching, the current reaches the zero point immediately, resulting in a complete interruption (arc discrimination).
In terms of the overall operation, the peak value of i arc is smaller in Figure 3 than in Figure 4, so it has the advantage of lowering the MS performance; however, there is also a disadvantage in that the interrupting time is longer than that in Figure 4.

Simulation and Results
In Section 2, the element modeling and operation process of the proposed superconducting hybrid DCCB and how the CLR impedance setting affects the overall operation process are reviewed. In this section, we review the simulation setting conditions and the case-by-case results. Figure 5 is a simulated DC system for verification of the proposed superconducting hybrid DCCB. It is converted to DC using a three-phase rectifier from the AC grid and smoothed using a capacitor to make it closer to DC. In the DC terminal, it is connected to the load Z Load through the DC line impedance Z line and the fault resistance R Fault , and the closing switch is connected in parallel with the load to simulate a fault. Detailed parameters of the DC system are listed in Table 1. And the modeling parameters of the proposed superconducting hybrid DCCB are specified in Table 2.
Energies 2021, 14, x FOR PEER REVIEW 7 of 13 slight current-limiting effect. In Figure 3, it can be seen that since the current-limiting effect is large after quenching, the current reaches the zero point immediately, resulting in a complete interruption (arc discrimination).
In terms of the overall operation, the peak value of iarc is smaller in Figure 3 than in Figure 4, so it has the advantage of lowering the MS performance; however, there is also a disadvantage in that the interrupting time is longer than that in Figure 4.

Simulation and Results
In Section 2, the element modeling and operation process of the proposed superconducting hybrid DCCB and how the CLR impedance setting affects the overall operation process are reviewed. In this section, we review the simulation setting conditions and the case-by-case results. Figure 5 is a simulated DC system for verification of the proposed superconducting hybrid DCCB. It is converted to DC using a three-phase rectifier from the AC grid and smoothed using a capacitor to make it closer to DC. In the DC terminal, it is connected to the load ZLoad through the DC line impedance Zline and the fault resistance RFault, and the closing switch is connected in parallel with the load to simulate a fault. Detailed parameters of the DC system are listed in Table 1. And the modeling parameters of the proposed superconducting hybrid DCCB are specified in Table 2. The cases were largely divided into the case where CLR1 is the inductance and CLR2 is the resistance (CASE1), and the case where CLR1 is the resistance and CLR2 is the inductance (CASE2). When the inductance is 2 and 3 mH, the resistance is set to 0, 0.5, 1, 2, 4, 8, 16 Ω. Figure 6 shows a case where CLR1 is the inductance and CLR2 is the resistance. Inductance is 2 mH, and the resistance is changed. Figure 7 shows the results when the inductance value is set to 3 mH.  The cases were largely divided into the case where CLR1 is the inductance and CLR2 is the resistance (CASE1), and the case where CLR1 is the resistance and CLR2 is the inductance (CASE2). When the inductance is 2 and 3 mH, the resistance is set to 0, 0.5, 1, 2, 4, 8, 16 Ω. Figure 6 shows a case where CLR1 is the inductance and CLR2 is the resistance. Inductance is 2 mH, and the resistance is changed. Figure 7 shows the results when the inductance value is set to 3 mH.          As can be seen from Figure 6, at 2 mH, the smaller the resistance, the faster the breaking speed, and the lower the peak value of the arc current i arc . Figure 7 shows that as the resistance decreases to 3 mH, the peak of the arc current greatly decreases, but the interrupting time does not change significantly. In both Figures 6 and 7, it can be seen that the arc current fluctuates greatly, but the peak value of the CB current, which is the total current, is not significantly different. This means that in the case of CASE1, the total impedance of the proposed superconducting hybrid DCCB is not significantly affected by the CLR impedance, but the interrupting characteristic can be improved. In Figures 8 and 9, unlike Figures 6 and 7, CLR1 is the resistance and CLR2 is the inductance. Inductance and resistance settings are shown in Figures 6 and 7 above.
Energies 2021, 14, x FOR PEER REVIEW 9 of 13 As can be seen from Figure 6, at 2 mH, the smaller the resistance, the faster the breaking speed, and the lower the peak value of the arc current iarc. Figure 7 shows that as the resistance decreases to 3 mH, the peak of the arc current greatly decreases, but the interrupting time does not change significantly. In both Figures 6 and 7, it can be seen that the arc current fluctuates greatly, but the peak value of the CB current, which is the total current, is not significantly different. This means that in the case of CASE1, the total impedance of the proposed superconducting hybrid DCCB is not significantly affected by the CLR impedance, but the interrupting characteristic can be improved. In Figures 8 and 9, unlike Figures 6 and 7, CLR1 is the resistance and CLR2 is the inductance. Inductance and resistance settings are shown in Figures 6 and 7 above.  As mentioned in Section 2, when CLR1 is the resistance and CLR2 is the inductance, the impedance of the auxiliary circuit is greatly affected by CLR1. In addition, since HTSC2′s quenching does not occur when the resistance is greater than 1Ω, there is no significant difference in Figures 8 and 9. It can be seen that the interrupting time is delayed in Figure 9 only when RCLR1 is 0, 0.5 Ω. This is because when HTSC2 is quenched, the As can be seen from Figure 6, at 2 mH, the smaller the resistance, the faster the breaking speed, and the lower the peak value of the arc current iarc. Figure 7 shows that as the resistance decreases to 3 mH, the peak of the arc current greatly decreases, but the interrupting time does not change significantly. In both Figures 6 and 7, it can be seen that the arc current fluctuates greatly, but the peak value of the CB current, which is the total current, is not significantly different. This means that in the case of CASE1, the total impedance of the proposed superconducting hybrid DCCB is not significantly affected by the CLR impedance, but the interrupting characteristic can be improved. In Figures 8 and 9, unlike Figures 6 and 7, CLR1 is the resistance and CLR2 is the inductance. Inductance and resistance settings are shown in Figures 6 and 7 above.  As mentioned in Section 2, when CLR1 is the resistance and CLR2 is the inductance, the impedance of the auxiliary circuit is greatly affected by CLR1. In addition, since HTSC2′s quenching does not occur when the resistance is greater than 1Ω, there is no significant difference in Figures 8 and 9. It can be seen that the interrupting time is delayed in Figure 9 only when RCLR1 is 0, 0.5 Ω. This is because when HTSC2 is quenched, the As mentioned in Section 2, when CLR1 is the resistance and CLR2 is the inductance, the impedance of the auxiliary circuit is greatly affected by CLR1. In addition, since HTSC2's quenching does not occur when the resistance is greater than 1Ω, there is no significant difference in Figures 8 and 9. It can be seen that the interrupting time is delayed in Figure 9 only when RCLR1 is 0, 0.5 Ω. This is because when HTSC2 is quenched, the current change toward the auxiliary circuit decreases as the inductance increases, so the current flowing toward the MS becomes larger than when the inductance is small. Therefore, the time for zero crossing through LC resonance is longer. As a result, the smaller the resistance of the CLR circuit, the shorter the interrupting time and the smaller the peak value of i arc .
Based on these results, in the case of Figures 6-9, it can be confirmed that the interrupting time is shortest when CLR resistance is 0. In particular, when the CLR resistance in Figure 8 is 0, it can be seen that the interrupting time is the shortest among all cases. However, if CLR1 resistance becomes 0, the discharging current of L will flow largely after SW is opened, so setting it to 0 may cause damage to the device. In addition, overcurrent flows through HTSC2, causing damage to HTSC2. Therefore, an appropriate parameter setting is needed.

Discussion
The importance of setting parameters has been mentioned earlier. In this section, we check the appropriate parameter setting through a case study.
The circuit using inductance for CLR1 and resistance for CLR2 shows relatively good results. Although the interrupting time is slow, the peak of arc current decreases to a large value. In this case, the smaller the resistance and inductance, the shorter the interrupting time (arc dissipation time). However, the peak of the arc current does not show a constant aspect. The aspect is that the smaller the resistance, the smaller the peak of the arc current, but there are many exceptions. Tables 3 and 4 below describe the interrupting time and peak of arc current results according to the case study.
As can be seen from the tables, as the resistance and inductor decrease, the peak of the arc current also decreases. However, when the resistance of CLR2 decreases, the current flowing to the power SW of the auxiliary circuit, CLR1, increases. This causes an increase in the capacity of the power SW, which leads to economic losses. The cut-off current of power SW is more related to CLR2 than CLR1. This is because HTSC2 is squeezed out of the auxiliary circuit, and the resistance of the auxiliary circuit is greatly affected by CLR2. Therefore, the larger the resistance, the lower the unit cost of the power SW. The unit price of the power SW occupies a large portion of the proposed superconducting hybrid DCCB, so the overall unit price is also expensive.  Overall, the largest portion of cost of the proposed superconducting hybrid DCCB is the power electronic switch. Since the price of the SW increases exponentially as the capacity of the SW increases, it is important to lower the current capacity. The current flowing through the SW varies according to the impedance type and size of CLR1 and CLR2. If CLR1 is set to resistance and CLR2 is set to inductance, the current flowing through the SW is greatly reduced, but on the contrary, the interrupting time is lengthened because the current flowing through the mechanical switch is large. Therefore, when inductance in CLR1 and resistance in CLR2 are set, the current flows more toward the SW, so the overall proposed system cost is higher, but the interrupting time is shorter. Additionally, depending on the size of resistance and inductance, the interrupting time can be further shortened, and the fault current flowing through the SW can be further increased. In conclusion, due to the application of the superconducting element, the magnitude of the fault current can be effectively reduced. Compared with a conventional hybrid DCCB, it is confirmed that the number and capacity of power electronic SWs can be significantly reduced, and the larger the applied system size, the more advantageous in terms of cost.

Conclusions
The proposed superconducting hybrid DCCB is advantageous in terms of price and site compared to other DCCBs, but the review on parameter settings was insufficient to increase its performance. Therefore, in the current study, the operation of the proposed superconducting hybrid DCCB, according to parameter settings, was simulated, and the results were reviewed.
Modeling for each element of the proposed DCCB was proposed, and its behavior was examined. The overall operating characteristics were different depending on the impedance setting of CLR1 and CLR2. When CLR1 is set to inductance and CLR2 to resistance (CASE1), the current limiting effect is excellent, but since the quenching of RSC2 is delayed, the interrupting time is relatively delayed. On the contrary, when CLR1 is set to resistance and CLR2 to inductance (CASE2), the interrupting time is faster, but the peak of the arc current is increased, and, after interrupting, a large overcurrent is caused by the discharge current of CLR2 inductance. Therefore, HTSC2 could be damaged.
The interrupting time and arc current were reviewed when the parameters were changed for the two cases above the simulation. Through this, the effect of changing the resistance and inductance on the results was examined. As a result, CASE1 of inductance was greatly influenced by inductance, with relatively little influence by resistance. In CASE2, above a specific inductance value, the result was constant regardless of the resistance change. CASE1 and CASE2 had similar minimum interrupting times, but CASE2 had a significantly larger arc current peak value.
The following contents were verified through this simulation.
• Changing the parameters of CASE1 greatly affects the result value.

•
The smaller the CLR1 inductance and CLR2 resistance, the shorter the interrupting time and the smaller the peak of the arc current tends to be.

•
There are many exceptions where the peak of the arc current decreases when CLR2 resistance increases. • As CLR2 resistance increases, the capacity of the power SW in the auxiliary circuit should increase.
Through the parameter case study, we reviewed the interrupting characteristic and found a parameter setting that could be improved. However, it was confirmed that the price could be disadvantageous when considering the capacity of the power SW. In a system where system stability is prioritized, the optimal parameter setting can be used, but if not, an optional parameter setting will be required. This study contributes to the protection and stability improvement of power systems using DC, such as future DC-powered systems or railway systems.