Hybrid Islanding Detection Method of Photovoltaic-Based Microgrid Using Reference Current Disturbance

: This paper proposes a new hybrid islanding detection method for grid-connected photovoltaic system (GCPVS)-based microgrid. In the presented technique, the suspicious islanding event is initially recognized whilst the absolute deviation of the point of common coupling (PCC) voltage surpasses a threshold. After an intentional delay, a transient disturbance is injected into the voltage source inverter’s d -axis reference current to decline the active power output. As a result, the PCC voltage reduces in islanding operating mode whilst its variation is negligible in the grid presence. Therefore, the simultaneous drop of PCC voltage and active power output is used as an islanding detection criterion. The effectiveness of the proposed algorithm is investigated for various islanding and non-islanding scenarios for a practical distribution network with three GCPVSs. The simulation results in MATLAB/Simulink show successful islanding detection with a small non-detection zone within 300 ms without false tripping during non-islanding incidents. In addition to the precise and fast islanding classiﬁcation, the presented scheme is realized inexpensively; its thresholds are determined self-standing, and its output power quality degradation is eminently small. Moreover, the active power output is restored to the nominal set after islanding recognition, enhancing the chance of GCPVS generation at its highest possible level in the autonomous microgrid.


Introduction
The growing demand for clean and reliable energy enforces the integration of renewable energy resources in the distribution network over the past decades. Among all existing technologies, grid-connected photovoltaic system (GCPVS) attracts most attention due to its worldwide availability, noise-free operation, low maintenance cost, and maximum contribution in supporting the peak-demand of summer noon [1].
Putting the mentioned benefits aside, the connection of GCPVS to the distribution network accompanies a few challenges such as islanding. Islanding occurs when a part of the utility including one or multiple distributed generators (DGs) is isolated unintentionally from the upstream network while remains energized [2]. In this unwanted situation, the DG generation must be ceased/controlled timely to avoid jeopardizing the repair crew who think the downstream network is de-energized. The sensitive equipment of the isolated region may be also damaged regarding the overcurrent/overvoltage of the unsynchronized reclosing. In this regard, IEEE std 1547-2018 and UL 1741 determine 2 s as the maximum permissible time for islanding protection [3,4].
Various islanding detection methods (IDMs), broadly categorized into remote and local groups, have been presented . In local schemes, divided into the passive, active, and hybrid, a DG/PCC variable is monitored continuously. When the grid is lost, the local variable(s) shifts to the new level regarding the cut of active/reactive power fed into/received from the utility. Thus, an islanding situation is inferred in passive IDMs when a local criterion deviates from the preset threshold [5][6][7][8]. For instance, Nale et al. stated that the decaying DC component of the PCC voltage is prominent during the islanding operation [5]. When the aggregative absolute error between the estimated voltage and pure sine wave over a cycle exceeds 9%, islanding has been concluded accordingly. Since this variable exhibits the same behavior under short-circuit faults, the authors suggested the measurement of the PCC superimposed current angle, which poses negative and positive sets during grid-connected and islanding modes, respectively. Similarly, the abrupt PCC voltage change during the normal to islanding transition has been presented by Dubey et al. [6]. The DG voltage is estimated by Fourier-Taylor transformation within a moving window and least square error method. The authors demonstrated that the average deviation between the estimated signal in three phases and pure sine waveform grows sharply after islanding inception. The results unveiled successful islanding detection in less than 55 ms except for the narrow (−1%, +1%) range of relative active and reactive power mismatches. Abyaz et al. applied six commercial relays, including the rate of change of frequency, rate of change of voltage (ROCOV), rate of change of phase angle, and under/over frequency (UF/OF) [7]. It is underlined that the combination algorithm classifies islanding within a cycle without nuisance tripping in non-islanding switching transients. The passive plans are realized simply and cost-effectively; however, they suffer a large non-detection zone (NDZ), i.e., the situations wherein the IDM fails to identify islanding.
Recently, mathematical tools have been developed to distinguish normal and islanding modes [9][10][11][12][13]. Extensive tests are initially performed to tune the settings for precise islanding recognition. Although these passive IDMs have shown an outstanding performance in islanding and non-islanding incidents, the settings depend fully on the studied system characteristics, i.e., the tedious islanding and non-islanding scenarios should be repeated for a new network to readjust the settings.
The injection of an intentional disturbance into the DG's controller has been adopted in active IDMs [14][15][16][17][18][19]. This disturbance does not influence the PCC frequency and voltage in the grid-tied mode. Conversely, it enlarges/facilitates the deviation of the local variable(s) during islanding, shortening the NDZ and detection time effectively. Wang et al. established positive feedback of the PCC voltage into the inverter's d-axis reference current [14]. The PCC voltage is thereby destabilized during islanding phenomena, actuating the under/over voltage (UV/OV) relay. Samui and Samantaray indicated reliable performance of the voltage positive feedback (VPF) algorithm under critical islanding incidents, even in the presence of a static load [15]. The upper and lower margins of the positive feedback gain have been also reformulated to attain the minimum NDZ and maximum stability. It is argued in [16] that the VPF scheme fails to distinguish islanding situations with a surplus active power due to the PV input power limitation in a given meteorological condition. Consequently, negative absolute feedback has been introduced to shift the PCC voltage beyond the minimum standard limit in all scenarios. Sivadas and Vasudevan defined a three-level active power reference (P ref ) disturbance of the inverter-based DGs [17]. When the DG operates in parallel with the grid, the d-axis equivalent resistance at PCC tracks the P ref fluctuations while its variation is almost negligible during the islanding operating mode. Although the experimental tests revealed an accurate detection of the presented technique even in a fully balanced island, the development to the multi-DGs case (especially more than two) is complex and costly. In active techniques, the NDZ and detection time alleviate notably; however, the imposed disturbance deteriorates the power quality through amplifying the current harmonics. The dependency of the thresholds upon the DG/grid settings is known as another demerit.
The advantages of combining passive and active IDMs have motivated the researchers to present hybrid plans [20][21][22]. These algorithms are strong islanding classifiers with lower power quality degradation and smaller NDZ in comparison with active and passive IDMs, respectively. On the other hand, the high complexity and cost as well as large detection time are reported as their main shortfalls. Rostami  of a reactive impedance at PCC and the measurement of ROCOV for islanding detection purposes [20]. The reactive impedance has been switched on under suspicious events so that the islanding has been recognized by the ROCOV. In spite of the successful classification of the islanding and non-islanding events, the method settings have been figured out by extensive simulations. A two-level maximum power point tracking (MPPT)-based IDM for GCPVS has been proposed by these authors [21]. Suspicious events have been categorized in the first stage based on the DG voltage index. Subsequently, a disturbance has been triggered into the MPPT algorithm to ride the output voltage below the minimum standard threshold.
Contrary to the local methodologies, remote IDMs are based on a telecommunication channel between the upstream substation and DG(s). By this means, islanding situation is recognized whilst the broadcast signal has not been received at the DGs' terminal [23][24][25]. Although these IDMs are proven to be accurate and fast, the high burden cost makes them impractical for small-scale microgrids.
It is concluded from the literature that presenting a new IDM with small NDZ and detection time, straightforward and inexpensive structure, and negligible power quality degradation is of interest. The presented scheme should not destabilize the GCPVS to augment its contribution in supporting the autonomous microgrid as well. In this perspective, this paper proposes a new hybrid technique based on a disturbance injection into the d-axis reference current. The suspicious islanding situations are firstly recognized by a passive criterion when the absolute PCC voltage deviation enlarges a voltage threshold. Afterwards, a transient disturbance is inserted into the d-axis reference current, reducing the active power output. Hence, the PCC voltage decreases drastically in islanding condition whereas its variation is marginally in the grid-connected mode. The simultaneous descent of PCC voltage and active power output is thereby the islanding detection criterion of the recommended technique.
In addition to the small NDZ, the proposed scheme provides several advantages including: • Fast islanding detection within 300 ms; • Simple and cost-effective structure; • Reverting the GCPVS active power to the pre-islanding set after islanding classification, boosting the chance of full generation in the standalone microgrid; • Negligible effect on the output power quality.
The rest of the paper is organized as follows. The proposed hybrid algorithm and the selection criteria of the settings are elaborated in the next Section. The functionality of the presented scheme is then investigated in Section 3 under various critical islanding and non-islanding scenarios in MATLAB platform. In Section 4, the outcomes are compared with the existing IDMs. The concluding remarks are finally described in Section 5.

Methodology Description
Grid-tie voltage source inverter (VSI) incorporates two independent controllers as depicted in Figure 1. The voltage control loop tracks the maximum power point (MPP) through setting the duty cycle of the DC/DC converter. In DC/AC converter, the current controller is responsible for balancing the input (PV array) and output powers, synchronizing the injected current to the PCC voltage, and ensuring the output power quality requirements. In this control loop, the active power output (P DG ) tracks a reference power (P ref ). This aim is realized by eliminating the steady-state error between P DG and P ref through various control strategies. According to the reference frame in where the output current is transformed, a suitable controller is applied, e.g., proportional-resonant (PR) and proportional-integral (PI) controllers in αβ and dq reference frames, respectively. In this paper, the current control loop in dq reference frame is employed in where the three-phase output current is transformed to the DC components. Hence, the PI controller is exploited to remove the steady-state error between P DG and P ref as follows ( Figure 2) [26]: where I d,ref stands for the d-axis reference current. Moreover, k P and k I are the proportional and integral gains of the PI controller. It worth mentioning that PLL and PWM in Figure 1 represent the phase-lock loop and pulse width modulation technique, respectively. The dand q-axis quantities are also denoted by "d" and "q" subscripts in Figure 2.
Energies 2021, 14, x FOR PEER REVIEW 4 of 15 this paper, the current control loop in dq reference frame is employed in where the threephase output current is transformed to the DC components. Hence, the PI controller is exploited to remove the steady-state error between PDG and Pref as follows ( Figure 2) [26]: where Id,ref stands for the d-axis reference current. Moreover, kP and kI are the proportional and integral gains of the PI controller. It worth mentioning that PLL and PWM in Figure  1 represent the phase-lock loop and pulse width modulation technique, respectively. The d-and q-axis quantities are also denoted by "d" and "q" subscripts in Figure   In the proposed hybrid algorithm, the RMS PCC voltage is measured to compute the absolute voltage deviation (|ΔVPCC|). Since the PCC voltage can be raised or lowered after the island formation, the absolute deviation is exploited in this work. Suspicious islanding incidents are identified whilst the |ΔVPCC| exceeds a voltage threshold (VT). In these circumstances, a negative current disturbance (ΔIDIS) is injected into Id,ref for a short duration, e.g., 0.2 s, as follows: The negative disturbance is selected in the proposed algorithm to consider the inherent power limitation of GCPVS in a given meteorological situation. This disturbance is also equipped with an intentional delay to avoid nuisance tripping in non-islanding transient switching as explained later. The active power output drops sharply through the  this paper, the current control loop in dq reference frame is employed in where the threephase output current is transformed to the DC components. Hence, the PI controller is exploited to remove the steady-state error between PDG and Pref as follows ( Figure 2) [26]: where Id,ref stands for the d-axis reference current. Moreover, kP and kI are the proportional and integral gains of the PI controller. It worth mentioning that PLL and PWM in Figure  1 represent the phase-lock loop and pulse width modulation technique, respectively. The d-and q-axis quantities are also denoted by "d" and "q" subscripts in Figure   In the proposed hybrid algorithm, the RMS PCC voltage is measured to compute the absolute voltage deviation (|ΔVPCC|). Since the PCC voltage can be raised or lowered after the island formation, the absolute deviation is exploited in this work. Suspicious islanding incidents are identified whilst the |ΔVPCC| exceeds a voltage threshold (VT). In these circumstances, a negative current disturbance (ΔIDIS) is injected into Id,ref for a short duration, e.g., 0.2 s, as follows: The negative disturbance is selected in the proposed algorithm to consider the inherent power limitation of GCPVS in a given meteorological situation. This disturbance is also equipped with an intentional delay to avoid nuisance tripping in non-islanding transient switching as explained later. The active power output drops sharply through the In the proposed hybrid algorithm, the RMS PCC voltage is measured to compute the absolute voltage deviation (|∆V PCC |). Since the PCC voltage can be raised or lowered after the island formation, the absolute deviation is exploited in this work. Suspicious islanding incidents are identified whilst the |∆V PCC | exceeds a voltage threshold (V T ). In these circumstances, a negative current disturbance (∆I DIS ) is injected into I d,ref for a short duration, e.g., 0.2 s, as follows: The negative disturbance is selected in the proposed algorithm to consider the inherent power limitation of GCPVS in a given meteorological situation. This disturbance is also equipped with an intentional delay to avoid nuisance tripping in non-islanding transient switching as explained later. The active power output drops sharply through the injected disturbance; however, the P DG fall has an insignificant impact on PCC voltage in the normal operating mode since it is strictly governed by the utility. In contrast, the PCC voltage in the islanded operating mode can be expressed by [14][15][16]: where R is the resistive part of the local load parallel RLC model, defined in IEEE std 929 [27]. Furthermore, the post-islanding voltage is shown by V po . The active power output reduction yields a PCC voltage drop regarding Equation (3). Therefore, the simultaneous drop of PCC voltage and active power output beyond the predefined thresholds, i.e., ∆P DG ≤ Th P and ∆V PCC ≤ Th V , is the final criterion of the proposed hybrid IDM. Moreover, a further condition is established in the presented IDM to discriminate short-circuit fault situation. Similar to [8,16], this state is identified whilst DG output current (I DG ) in any phase exceeds 125%, as shown in Section 3.5.
The realization and flowchart of the recommended scheme are illustrated in Figures 2 and 3, respectively. It is apparent that the structure of the proposed method is straightforward and inexpensive, implementable into the existing VSIs with a minimum effort. In addition, P DG reduces during the disturbance injection, i.e., DG current amplitude decreases for a linear load. Hence, it does not disturb the power quality of the distribution network.
Energies 2021, 14, x FOR PEER REVIEW 5 of 15 injected disturbance; however, the PDG fall has an insignificant impact on PCC voltage in the normal operating mode since it is strictly governed by the utility. In contrast, the PCC voltage in the islanded operating mode can be expressed by [14][15][16]: where R is the resistive part of the local load parallel RLC model, defined in IEEE std 929 [27]. Furthermore, the post-islanding voltage is shown by Vpo. The active power output reduction yields a PCC voltage drop regarding Equation (3). Therefore, the simultaneous drop of PCC voltage and active power output beyond the predefined thresholds, i.e., ΔPDG ≤ ThP and ∆ ′ ≤ ThV, is the final criterion of the proposed hybrid IDM. Moreover, a further condition is established in the presented IDM to discriminate short-circuit fault situation. Similar to [8,16], this state is identified whilst DG output current (IDG) in any phase exceeds 125%, as shown in Section 3.5.
The realization and flowchart of the recommended scheme are illustrated in Figures  2 and 3, respectively. It is apparent that the structure of the proposed method is straightforward and inexpensive, implementable into the existing VSIs with a minimum effort. In addition, PDG reduces during the disturbance injection, i.e., DG current amplitude decreases for a linear load. Hence, it does not disturb the power quality of the distribution network.
Measure output voltage and current

Thresholds Selection Criteria
In order to ensure reliable islanding detection, the voltage threshold (VT) as well as the settings of the active power (ThP) and PCC voltage (ThV) should be quantified accurately. The selection criteria of these settings are described as follows.

Voltage Threshold
In the proposed technique, the passive criterion is responsible for classifying the suspicious islanding events under |ΔVPCC| VT condition. Hence, the presented disturbance would be more triggered under a lower VT set, enhancing the chance of critical islanding events with a small voltage variation. On the other hand, the nuisance disturbance activation raises during non-islanding incidents with voltage fluctuation greater than VT. This parameter should be thereby defined as a compromise between minimum nuisance activation (prevent high active power drop) and minimum NDZ. Since the time duration of the injected disturbance is short, 0.2 s, for instance, the voltage threshold is quantified in

Thresholds Selection Criteria
In order to ensure reliable islanding detection, the voltage threshold (V T ) as well as the settings of the active power (Th P ) and PCC voltage (Th V ) should be quantified accurately. The selection criteria of these settings are described as follows.

Voltage Threshold
In the proposed technique, the passive criterion is responsible for classifying the suspicious islanding events under |∆V PCC | ≥ V T condition. Hence, the presented disturbance would be more triggered under a lower V T set, enhancing the chance of critical islanding events with a small voltage variation. On the other hand, the nuisance disturbance activation raises during non-islanding incidents with voltage fluctuation greater than V T . This parameter should be thereby defined as a compromise between minimum nuisance activation (prevent high active power drop) and minimum NDZ. Since the time duration of the injected disturbance is short, 0.2 s, for instance, the voltage threshold is quantified in the term of NDZ. In this regard, the PCC voltage in the normal operating mode can be expressed as follows [14][15][16]: where V pr and ∆P are the pre-islanding PCC voltage and active power mismatch, received from/fed into the network before island formation. By combining Equations (3) and (4), the PCC voltage variation after islanding inception (∆V PCC ) can be given by: where ∆V PCC equals to V po − V pr . Based on the recent expression, the NDZ of a given voltage threshold includes the relative active power mismatches (∆P/P DG ) with |∆V PCC | < V T . This zone is illustrated in Figure 4 for various V T sets in the nominal pre-islanding voltage (V pr = 100%). It is readily seen that the NDZ of the presented hybrid IDM is small in comparison with the conventional IDMs, e.g., the voltage relay's one with (−29.13%, 17.35%).
Energies 2021, 14, x FOR PEER REVIEW 6 of 15 the term of NDZ. In this regard, the PCC voltage in the normal operating mode can be expressed as follows [14][15][16]: where Vpr and ΔP are the pre-islanding PCC voltage and active power mismatch, received from/fed into the network before island formation. By combining Equations (3) and (4), the PCC voltage variation after islanding inception (ΔVPCC) can be given by: where ΔVPCC equals to Vpo − Vpr. Based on the recent expression, the NDZ of a given voltage threshold includes the relative active power mismatches (ΔP/PDG) with |ΔVPCC| < VT. This zone is illustrated in Figure 4 for various VT sets in the nominal pre-islanding voltage (Vpr = 100%). It is readily seen that the NDZ of the presented hybrid IDM is small in comparison with the conventional IDMs, e.g., the voltage relay's one with (−29.13%, 17.35%).

Active Power and PCC Voltage Thresholds
As explained earlier, the GCPVS's real power output plummets after disturbance injection, reducing the PCC voltage for this time being. In order to determine ThV and ThP analytically, the output voltage and active power reduction should be initially quantified. The amount of ∆ ′ and ΔPDG drop can be defined in the term of current disturbance size (ΔIDIS) as follows: where Ipo is the GCPVS's post-islanding current before inserting the disturbance. The recent expression is derived by modifying Equation (3) during islanding mode, before and after disturbance injection. By assuming ΔIDIS = 20%, for instance, the GCPVS's current and PCC voltage decline by 20%. Subsequently, PDG shifts to 64% of its pre-disturbance activation level, implying a 36% fall. Therefore, islanding can be distinguished successfully by selecting ThV and ThP greater than −20% and −36%, respectively, i.e., the simultaneous ∆ ′ ≤ ThV and ΔPDG ≤ ThP would be ensured during islanding. According to the aforementioned explanation, the voltage threshold is assigned as 1% in this paper to inject the disturbance in all scenarios except the narrow [−2.03%, 1.97%] range of the relative active power mismatches. Further, ThP and ThV are selected −20% and −10%, respectively, to ensure islanding classification after imposing a 20% current disturbance (ΔIDIS = 20%).

Active Power and PCC Voltage Thresholds
As explained earlier, the GCPVS's real power output plummets after disturbance injection, reducing the PCC voltage for this time being. In order to determine Th V and Th P analytically, the output voltage and active power reduction should be initially quantified. The amount of ∆V PCC and ∆P DG drop can be defined in the term of current disturbance size (∆I DIS ) as follows: where I po is the GCPVS's post-islanding current before inserting the disturbance. The recent expression is derived by modifying Equation (3) during islanding mode, before and after disturbance injection. By assuming ∆I DIS = 20%, for instance, the GCPVS's current and PCC voltage decline by 20%. Subsequently, P DG shifts to 64% of its pre-disturbance activation level, implying a 36% fall. Therefore, islanding can be distinguished successfully by selecting Th V and Th P greater than −20% and −36%, respectively, i.e., the simultaneous ∆V PCC ≤ Th V and ∆P DG ≤ Th P would be ensured during islanding.
According to the aforementioned explanation, the voltage threshold is assigned as 1% in this paper to inject the disturbance in all scenarios except the narrow [−2.03%, 1.97%] range of the relative active power mismatches. Further, Th P and Th V are selected −20% and −10%, respectively, to ensure islanding classification after imposing a 20% current disturbance (∆I DIS = 20%).

Simulation Results
In this section, the performance of the proposed hybrid algorithm has been assessed in MATLAB/Simulink platform. Various islanding and non-islanding scenarios have been simulated for the case study system depicted in Figure 5. In this practical network, three large-scale GCPVSs are linked at the end of two parallel lines, connected to the two feeders. The PCC voltage and output current of the GCPVSs, denoted by "1","2", and "3" subscripts for the first, second, and third DGs are exploited in the islanding detection process. The parameters of this prototype system are detailed in Table 1.

Simulation Results
In this section, the performance of the proposed hybrid algorithm has been assessed in MATLAB/Simulink platform. Various islanding and non-islanding scenarios have been simulated for the case study system depicted in Figure 5. In this practical network, three large-scale GCPVSs are linked at the end of two parallel lines, connected to the two feeders. The PCC voltage and output current of the GCPVSs, denoted by "1","2", and "3" subscripts for the first, second, and third DGs are exploited in the islanding detection process. The parameters of this prototype system are detailed in Table 1.  All islanding and non-islanding conditions are yielded by opening/closing circuit breakers (CBs) at t = 0.5 s. The local loads (L1, L2, and L3) are also set to create different active/reactive power mismatches and load quality factors (Qfs) for single and multi-DGs cases. These studies are analyzed thoroughly and presented in the following subsections.

Active and Reactive Power Mismatches
The amount of active and reactive power mismatches plays a critical role in the PCC voltage variation of the islanded area. IEEE std 1547-2018 and UL 1741 emphasize conducting the tests for difference relative active and reactive power mismatches (ΔQ) within the (−5%, +5%) range. Accordingly, the initial analysis has been carried out in cases 1-11 for various ΔP and ΔQ levels inside the voltage relays' blind zone ( Table 2). The results, including the reference and output d-axis current (for case 3), the PCC voltage, and active power output waveforms for a few scenarios are depicted in Figure 6. The decision indices of these scenarios are also tabulated in Table 2.   All islanding and non-islanding conditions are yielded by opening/closing circuit breakers (CBs) at t = 0.5 s. The local loads (L 1 , L 2 , and L 3 ) are also set to create different active/reactive power mismatches and load quality factors (Q f s) for single and multi-DGs cases. These studies are analyzed thoroughly and presented in the following subsections.

Active and Reactive Power Mismatches
The amount of active and reactive power mismatches plays a critical role in the PCC voltage variation of the islanded area. IEEE std 1547-2018 and UL 1741 emphasize conducting the tests for difference relative active and reactive power mismatches (∆Q) within the (−5%, +5%) range. Accordingly, the initial analysis has been carried out in cases 1-11 for various ∆P and ∆Q levels inside the voltage relays' blind zone ( Table 2). The results, including the reference and output d-axis current (for case 3), the PCC voltage, and active power output waveforms for a few scenarios are depicted in Figure 6. The decision indices of these scenarios are also tabulated in Table 2.
It is evident from Figure 6c that the PCC voltage deviation results in a |∆V PCC | greater than V T (except in case 4) at t = 0.6 s due to the active and reactive power mismatches. Thereafter, the proposed disturbance is injected into I d,ref (Figure 6a), reducing the active power output by around 36% during the [0.7 s, 0.8 s] interval as shown in Figure 6b. As a result, the DG terminal voltage drops by 20% for this time frame. Since the ∆V PCC and ∆P DG go beyond the preset thresholds simultaneously, the islanding detection signal is triggered at 0.8 s.
According to the illustrated outputs in Table 2 and Figure 6, the presented approach classifies islanding in all situations except the well-balanced island wherein the output voltage fluctuation is negligible (∆V PCC < V T ). The disturbance has not been stimulated and accordingly, the proposed IDM fails to find islanding. This result matches with the computed NDZ in Section 2.2.1. It is evident from Figure 6c that the PCC voltage deviation results in a |ΔVPCC| greater than VT (except in case 4) at t = 0.6 s due to the active and reactive power mismatches. Thereafter, the proposed disturbance is injected into Id,ref (Figure 6a), reducing the active power output by around 36% during the [0.7 s, 0.8 s] interval as shown in Figure 6b. As a result, the DG terminal voltage drops by 20% for this time frame. Since the ∆ ′ and ΔPDG go beyond the preset thresholds simultaneously, the islanding detection signal is triggered at 0.8 s.

Load Quality Factor
During the islanding event, load quality factor (Q f ) has a substantial effect on local quantities. This variable is defined as the ratio of the maximum reactive power stored in the load inductor/capacitor to the active power consumed by the resistive part. In the parallel RLC branch of the local load model, this variable is quantified as follows: where R, C, and L represent the load resistance, capacitor, and inductor, respectively. As mentioned in IEEE std 1547-2018 and UL 1741, islanding assessment with the load quality factor lower than 2.5 and 1.0 is mandatory. In this regard, the first local load (L 1 ) is tuned in cases 12-18 to simulate several Q f s with +5% active power imbalance. The outputs of these scenarios are shown in Table 2 and Figure 7 (for case 14 with Q f = 1.5).

Multi DGs
Most large-scale PV plants are constructed through several VSIs, connected to the nearby bus. The PV systems are connected to the distinct buses in real applications as well. The presented hybrid scheme should be effective in such practical cases. The CB1 and CB3 are opened to this end to simulate an islanding with distinct bus and near bus case studies. The loads are also adjusted to provide various power mismatches, as given in Table 2. In the distinct bus connection cases, since the second and third DGs behave almost the same, the variation of the PCC voltage and active power output are presented for the first, and the second GCPVSs, respectively. In the same bus connection, the provided out- The results reveal a coincident shift of active power output and PCC voltage to the stipulated thresholds after 0.3 s of islanding onset. The total detection time includes 100 ms for classifying the suspicious event, 100 ms for an intentional time delay, and 100 ms to decline P DG and V PCC . These time frames which are the same as other islanding circumstances are also highlighted in Figure 7.

Multi DGs
Most large-scale PV plants are constructed through several VSIs, connected to the nearby bus. The PV systems are connected to the distinct buses in real applications as well. The presented hybrid scheme should be effective in such practical cases. The CB 1 and CB 3 are opened to this end to simulate an islanding with distinct bus and near bus case studies. The loads are also adjusted to provide various power mismatches, as given in Table 2.
In the distinct bus connection cases, since the second and third DGs behave almost the same, the variation of the PCC voltage and active power output are presented for the first, and the second GCPVSs, respectively. In the same bus connection, the provided outputs represent the second and third DGs, respectively.
According to the presented results in Figures 8 and 9 (for cases 19 and 26) and Table 2, the DGs' active power output diminishes after inserting a disturbance inside the (0.7 s, 0.8 s) time frame. This active power fall is around 0.15 MW for the first GCPVS and 0.30 MW for the second and third ones, implying the~30% reduction. The DGs' end voltage is consequently dropped by almost 15%. Just as same as other islanding scenarios, the islanding detection signal is therefore activated at t = 0.8 s.
Most large-scale PV plants are constructed through several VSIs, connected to the nearby bus. The PV systems are connected to the distinct buses in real applications as well. The presented hybrid scheme should be effective in such practical cases. The CB1 and CB3 are opened to this end to simulate an islanding with distinct bus and near bus case studies. The loads are also adjusted to provide various power mismatches, as given in Table 2. In the distinct bus connection cases, since the second and third DGs behave almost the same, the variation of the PCC voltage and active power output are presented for the first, and the second GCPVSs, respectively. In the same bus connection, the provided outputs represent the second and third DGs, respectively.
According to the presented results in Figures 8 and 9 (for cases 19 and 26) and Table  2, the DGs' active power output diminishes after inserting a disturbance inside the (0.7 s, 0.8 s) time frame. This active power fall is around 0.15 MW for the first GCPVS and 0.30 MW for the second and third ones, implying the ~30% reduction. The DGs' end voltage is consequently dropped by almost 15%. Just as same as other islanding scenarios, the islanding detection signal is therefore activated at t = 0.8 s. The presented analyzes confirm effective islanding detection of the proposed hybrid IDM under various critical scenarios. The detection time is also 300 ms for all cases, short enough to restore GCPVSs to the nominal sets for facilitating the chance of PV generation at its maximum level in the standalone microgrid.

Non-Islanding Events
The distribution network is frequently exposed to the switching transients which enough to restore GCPVSs to the nominal sets for facilitating the chance of PV generation at its maximum level in the standalone microgrid.

Non-Islanding Events
The distribution network is frequently exposed to the switching transients which may trigger the proposed disturbance. Although the disturbance injection is inevitable in such situations, the PCC voltage and active power output should cross the corresponding thresholds at the same time. The analysis is developed for several non-islanding incidents in cases 27-36, including capacitor switching, prompt load change, and third DG interruption. These scenarios are realized through opening/closing the CBs at t = 0.5 s as detailed in Table 3. In this table, the minimum recorded voltage and active power change of the first or second DG are tabulated for two intervals; during the non-islanding event and during the disturbance injection. The outputs of several cases are also shown in Figure 10.  The results in Table 3 and Figure 10 indicate that the PCC voltage deviation is small in several cases so that the disturbance would not be triggered. The voltage deviation, however, activates the proposed disturbance in other conditions; the ∆ ′ crosses ThV during the non-islanding event whereas PDG remains unchanged for this time being. During the disturbance injection, the active power output reduces so that the ΔPDG/PDG goes The results in Table 3 and Figure 10 indicate that the PCC voltage deviation is small in several cases so that the disturbance would not be triggered. The voltage deviation, however, activates the proposed disturbance in other conditions; the ∆V PCC crosses Th V during the non-islanding event whereas P DG remains unchanged for this time being. During the disturbance injection, the active power output reduces so that the ∆P DG /P DG goes under Th P . Meanwhile, the PCC voltage variation is negligible since it is strictly controlled by the utility. Hence, the equipped 0.1 s delay between detecting the suspicious islanding condition and disturbance injection prevents false tripping in switching transients.

Short-Circuit Faults
Short-circuit faults frequently occur in the electrical power system. The proposed IDM should categorize such situations and de-energize GCPVS for preventing probable damages. As explained earlier, an I DG ≥ 125% condition is considered in the detection process to discriminate fault events. This capability has been explored for the case study system by simulating a single-phase to the ground (AG), double-phase to the ground (ABG), and three-phase to the ground (ABCG) short-circuit faults, nearby of the first GCPVS. The current of the faulted phase (phase A) of these scenarios under several fault resistance (R F ) is displayed in Figure 11 (cases 37, 41, and 45). The detection time of the fault scenarios is shown in Table 4 as well. It is noteworthy that in the presented results, the GCPVS is protected against the overcurrent through an instantaneous relay installed at its terminal. This relay is set to disconnect the GCPVS with a 50 ms delay after observing I DG ≥ 125% in any phase [28].

Comparison with Existing Methodologies
In addition to the small NDZ and detection time, the level of complexity and cost as well as the thresholds' dependency upon the case study system are among the paramount features of the IDMs. The impact of injected disturbance should be also limited during the normal operating mode. In this section, the proposed technique has been compared with the existing IDMs, summarized in Table 5.  Figure 11. GCPVS output current of the faulted phase. The outputs imply successful fault detection of the presented IDM under all states within 25 ms. Furthermore, the faulted current in Figure 11 goes down after instantaneous overcurrent relay tripping. The safety of the sensitive equipment is ensured accordingly.

Comparison with Existing Methodologies
In addition to the small NDZ and detection time, the level of complexity and cost as well as the thresholds' dependency upon the case study system are among the paramount features of the IDMs. The impact of injected disturbance should be also limited during the normal operating mode. In this section, the proposed technique has been compared with the existing IDMs, summarized in Table 5. • Based on the provided analyzes, the presented methodology detects islanding within 300 ms under various cases except for the small range of active power imbalance. Therefore, it can be considered among the fast and accurate existing IDMs.

•
In active and hybrid IDMs with periodic disturbance injection, the power quality is degraded, even in grid-tied operating mode. Whereas, the proposed algorithm exploits a short-duration disturbance under suspicious islanding events. Thus, the power quality remains almost unchanged during grid-connected situations.

•
The total cost of the proposed technique includes the measurement of the output current, voltage, active power estimation, and a pre-defined disturbance injection into I d,ref . Hence, the investment for sensors, microcontroller/digital signal processor, and a signal generator is estimated lower than 100 USD. By contrast, the realization of the remote techniques is costly, especially for small-scale microgrids [24][25][26].

Conclusions
This paper deals with a new hybrid methodology for detecting islanding operations of GCPVSs. The first level of the proposed scheme is dedicated to recognizing the suspicious islanding events when the absolute PCC voltage exceeds the predetermined voltage threshold. Following this, a transient 20% disturbance is injected into the VSI's d-axis reference current to decrease the active power output. In this way, the PCC voltage declines by 30% to 36% despite the PV generation level. Hence, the simultaneous drop of the active power output and the PCC voltage is defined as the islanding detection criterion.
The presented results of numerous islanding scenarios revealed an effective islanding detection within 300 ms with a narrow NDZ. Since the imposed disturbance removes after a short duration, the active power output is re-established at the GCPVS's highest possible level. Therefore, islanding is found without destabilizing the GCPVS, unlike most active and hybrid IDMs. This facilitates the voltage and frequency recovery and demand supply of the autonomous microgrid. The outputs of various non-islanding case studies remarked that one of the mentioned indices, i.e., ∆V PCC and ∆P DG , remained unchanged during the disturbance injection time frame. Hence, unlike a few active IDMs, the proposed approach has not failed in detecting the islanding mode in the presence of multiple DGs.
In addition to the outstanding performance, it is shown that the realization of the presented technique is simple and cost-effective. While the thresholds of the most local techniques depend highly on the GCPVS/network settings, V T , Th V , and Th P are defined self-standing. Hence, the presented IDM can be integrated into the existing VSIs with a minimum effort.