Zero Voltage Switching Condition in Class-E Inverter for Capacitive Wireless Power Transfer Applications

: This paper presents a complete design methodology of a Class-E inverter for capacitive wireless power transfer (CWPT) applications, focusing on the capacitance coupling influence. The CWPT has been investigated in this paper, because most of the literature refers to inductive power transfer (IWPT). However, CWPT in perspective can result in lower cost and higher reliability than IWPT, because it does not need coils and related shields. The Class-E inverter has been selected, because it is a single switch inverter with a grounded MOSFET source terminal, and this leads to low costs and a simple control strategy. The presented design procedure ensures both zero voltage switching (ZVS) and zero derivative switching (ZDS) conditions at an optimum coupling coefficient, thus enabling a high transmission and conversion efficiency. The novelties of the proposed method are that the output power is boosted higher than in previous papers available in the literature, the inverter is operated at a high conversion efficiency, and the equivalent impedance of the capacitive wireless power transfer circuit to operate in resonance is exploited. The power and the efficiency have been increased by operating the inverter at 100 kHz so that turn-off losses, as well as losses in inductor and capacitors, are reduced. The closed-form expressions for all the Class-E inverter voltage and currents waveforms are derived, and this allows for the understanding of the effects of the coupling coefficient variations on ZVS and ZDS conditions. The analytical estimations are validated through several LTSpice simulations and experimental results. The converter circuit, used for the proposed analysis, has been designed and simulated, and a laboratory prototype has been experimentally tested. The experimental prototype can transfer 83.5 W at optimal capacitive coupling with operating at 100 kHz featuring 92.5% of the efficiency, confirming that theoretical and simulation results are in good agreement with the experimental tests.


Introduction
Over the last few years, wireless power transfer (WPT) has increasingly attracted industry and academia attention, and it is utilized in an increasing number of applications. One of the WPT systems main applications is that of battery charging in biomedical implants [1], electric vehicle wireless charging [2][3][4], mobile phone and electronic consumers [5,6], moving robots [7], and wireless sensors [8,9]. This is due to advantages introduced by this technology; some of them are as follows: WPT allows the product to be completely sealed, making it waterproof; it facilitates the charging process avoiding the use of bulky power cables; and finally, it allows the product life to be increased. By eliminating the physical limitations of connectors, like mating cycles and corrosion of contacts, wireless power transfer results in more robust products [10].
The capacitive wireless power transfer (CWPT) is a recent alternative to the more investigated inductive wireless power transfer (IWPT) [11][12][13]. A schematic block representation of a CWPT system is shown in Figure 1. The architecture is similar to an IWPT system [14,15], but coupling among the primary and secondary sides is based on the electric field, rather than the magnetic field. A primary inverter impresses a highfrequency alternative voltage to the transmission circuit. An electric field-based power transfer between metallic plates without a direct electrical connection is achieved. In a wireless charging application, requiring the load to be supplied by a DC voltage, the power received from the secondary plates is rectified to supply a load. Compared to an IWPT system, a CWPT system has several advantages, such as:

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Lower cost: CWPT does not need expensive magnetic cores and Litz wires to reduce the parasitic resistance due to skin and proximity effects [15,16]. The power is transferred through low-cost metallic plates. Because of this characteristic, a CWPT also results in smaller volumes and weights than IWPT. • Higher stability in metallic surrounding environment: metallic materials block an inductor magnetic flux transmitted between two coils. Additionally, eddy currents induced by a changing magnetic field generate heat and increase the power losses and safety concerns. • Capability to transfer power through metal barriers thanks to the coupling capacitive effect.

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Less leakage flux leading to less electromagnetic interference (EMI): an IWPT system uses a magnetic field whose flux tends to propagate in any direction; in contrast, a CWPT system uses an electrical field that traps energy between metal plates [17,18]. To capitalize on these advantages over IWPT, several research projects have recently started to study and improve CWPT [10]. In a CWPT system, the metal plates are electrically coupled through the air, leading to a coupling capacitance of a few picofarads. To reduce the equivalent capacitive reactance of the system, the converter must be operated at a high switching frequency, and this results in high switching losses in hard switching converters. Wide bandgap (WBG) devices represent a suitable solution to transfer a high power at a high switching frequency, but they also result in a significant cost increase and EMI problems [18].
A suitable solution to overcome these problems is constituted by the utilization of soft-switching converters, e.g., resonant converters, where LC networks are utilized to reduce switching power losses due to voltage and current crossing during the switch turnon and turn-off. The zero voltage switching (ZVS) condition is usually referred to a voltage equal to zero across the switching devices [19] and its turn-on, and this reduces to zero the turn-on losses. In a power MOSFET, turn-on loss is due to the dissipation of the energy stored in the MOSFET output parasitic capacitance, and this energy is reduced to zero when the voltage across the capacitance is zero.
The Class E converter is appropriate for a high-frequency operation, because it can achieve ZVS, and under optimum operation, the voltage derivative is also zero. This last condition is known as the zero derivative switching (ZDS) condition, and it plays a key role to reduce EMI interference [20]. The total harmonic distortion (THD) of the output voltage is very small. For this reason, this converter is one of the best solutions for the realization of inverters with a rated power of up to a few hundred Watts. Additionally, being made up from one single MOSFET, it allows the reduction of the converter cost and dimension and increases its reliability. Moreover, this circuit results in an easy gate drive requirement, because it is composed of a grounded single switch. In this converter, the switch ZVS turns on and high efficiencies are possible if the component values of the resonant circuit are properly chosen [21][22][23].
For this reason, several studies have been made to use the Class-E topology for capacitive WPT. In [24], a capacitive Class-E inverter for rotating applications has been presented. The experimental setup operates at 6.78 MHz, and it can transfer 20 W with 80% efficiency. A capacitive Class-E 2 DC-DC converter able to transfer 1.7 W over a distance of 5 mm with 75% efficiency operating at 1 MHz is presented in [25]. In [26], a Class-E power amplifier for capacitively coupled for biomedical implants is presented. The system can transfer 5 W with 96.34% efficiency operating at 13.56 MHz. Being designed for biomedical applications, the rated output power is limited to ensure safe operations. In [27], a Class-E capacitive power transfer with a full-wave rectifier able to transfer 3 W with 85% efficiency operating at 6.78 MHz is presented. In [28], the ZVS operation of a capacitive Class-E inverter is extended by adding or removing capacitances to operate in resonance. The experimental setup operates at 2 MHz and can transfer 360 mW. In [29], an LC capacitive Class-E inverter able to transfer 10 W operating at 1 MHz with 93.4% conversion efficiency is presented. Finally, in [30], a capacitive Class-E inverter able to transfer 9.45 W operating at 1 MHz with 98.44% efficiency is presented.
A Class-E inverter circuit is sensitive to the parameters due to the CWPT operations, e.g., at a given input voltage, the power flow strongly depends on the capacitive coupling, that is, to the distance of the plates. Some researchers have been led out to maintain the ZVS operation by a proper control methodology such as in [28], where suitable capacitors have been added to achieve ZVS despite the variations of the capacitive coupling or load conditions. To preserve ZVS operation without a control methodology approach in the case of the distance variation between the two plates of CWPT, an impedance matching circuit in the Class-E converter is needed; in [31], the variation of capacitive coupling is analyzed versus the distance of the plates, this paper investigation is derived at a constant resistive load. ZVS also depends on the load when the distance among the capacitive plates is constant [25].
This paper investigates the influence of the capacitor coupling at a constant load to determine the conditions that allow the soft-switching operations to be maintained. The analysis is based on the analytical model developed in [32,33]; several simulations have been carried out to evaluate the effects of capacitive coupling on the ZVS operative conditions. A laboratory prototype has been built and tested to validate the analysis and simulation results. The experimental Class-E inverter with single silicon super junction MOSFET features a 100 kHz switching frequency, a Vin = 21 V input voltage, and an output power rate up to Po = 83.5 W with maximum efficiency of 92.5%. Furthermore, the analysis of the capacitive coupling impact in CWPT on the ZVS operation allows optimizing the converter design giving some correct guidelines for an effective project of a CWPT system with a Class-E converter.
The paper in brief is organized as follows. In Section 2, the analysis of the coupling capacitance in CWPT applications is introduced to clarify the issues focused in the paper. In Section 3 the Class-E converter is analyzed, and an optimum design procedure is carried out. In Section 4, the variation of the coupling capacitance and its impact on ZVS operation are investigated. In Section 5, simulations and experimental results are presented to show the ZVS and ZDS versus different coupling capacitance conditions at a constant load.
Finally, the processed data are discussed and linked to derive appropriate design constraints for the Class E converter in CWPT applications.

LC Compensated Capacitive Wireless Power Transfer System
The four-plate parallel structure, shown in Figure 2a, represents the most common solution to create air-coupled capacitors [9]. As shown in [34] and Figure 2a, plates P1 and P3 represent the primary side plates, while P2 and P4 are the secondary side plates. In general, the coupling between the plates Pi and Pj is modeled by a capacitance Cij. The couplings C12 and C34 are known as main capacitances, while C14, C23, C24, and C13 are called cross-coupling capacitances. Adopting the parallel structures shown in Figure 2a and assuming that the plates P1 and P2 are distant enough from P3 and P4 the cross-coupling capacitances can be neglected, making the analysis of the circuit easier. The analysis proposed in this paper is valid for any four-plate architecture system; therefore, even the cross-coupling capacitances are taken into account. By applying the Kirchhoff voltage law (KVL) and the Kirchhoff current law (KCL) to Figure 2a, it is possible to reconfigure the sixcapacitance matrix into the equivalent π-topology circuit shown in Figure 2b, where 24 13 14 23 23  14  24  34  13  14  23 24 The plates being coupled through the air, the values of these capacitances usually are of few pF; thus, a high operating frequency must be used. To transfer the desired power to the load at any frequency, two external capacitances C1 and C2 are connected in parallel with CA and CB and must be designed to resonate with inductances L1 and L2 at an angular frequency ω0. The insertion of these two external capacitances produces two equivalent capacitances C1 = Cext1 + CA and C2 = Cext2 + CB, as shown in Figure 2b. To reduce the reactive power due to the low coupling between metal plates and increase the active output power, two external inductances L1 and L2 must be designed; to resonate with the capacitances C1 and C2, their values are derived as follows where kc is the coupling factor, and it is expressed as Being C1 >> CM and C2 >> CM, the coupling coefficient kc ≅ 0.

Equivalent Impedance
The knowledge of the equivalent impedance of the CWPT is crucial to achieve ZVS. Usually, the external capacitances are higher than the cross-capacitance, thus C1 = Cext1 + CA ≅ Cext1 and C2 = Cext2 + CB ≅ Cext2. The geometry of the plates is symmetrical resulting in where α = CM 2 − C1C2 and β = R + RL. The impedance Zeq = Req + j Xeq real and imaginary parts are The sign of the reactive part Xeq changes depending on the value of the coupling capacitance CM. The value of CM resulting in Xeq = 0 Ω is ( ) If CM < C0, the reactance Xeq > 0 Ω and the equivalent impedance is resistive-inductive with On the other hand, CM > C0 results in Xeq < 0 Ω and the equivalent impedance is resistive-capacitive with The blue trace in Figure 3a represents the ratio between the equivalent resistance Req and the load resistance RL, while the red trace represents the reactance Xeq for different values of capacitive coupling CM. In Figure 3b, the ratio is between the equivalent resistance Req and the load resistance RL, while the red trace represents the reactance Xeq for different values of load resistance RL. In Figure 3c, the variation of Req/R under both coupling and load resistance variation is shown, while in Figure 3d, the 3D plot of the reactive part Xeq for different coupling and load resistance is shown.

Efficiency and Output Power
The efficiency is calculated as where the ratio between the input and output currents is expressed by applying the KVL and KCL to the circuit of Figure 2b as Assuming that the CWPT operates at the resonance, (14) simplifies as ( ) Thus, the transmission efficiency is and the output current is expressed as ( ) leading to an output power given by

CWPT Class-E Inverter Circuit Analysis
In this section, the integration of the CWPT system with the Class-E inverter is presented.

Assumptions
The analysis is derived according to the following assumptions.

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The duty cycle D of the MOSFET is 0.5; • The MOSFET turns ON and OFF instantly; • The MOSFET ON-resistance is zero; • The MOSFET output capacitance is linear and frequency invariant; • The loaded quality factor QL of the resonant network is high enough such that the currents through the transformer windings are sinusoidal (e.g., QL > 7); • The choke inductance is large enough to neglect the input current ac component. The dc resistance of the choke inductor is ignored. The self-capacitance of the choke inductor is absorbed into the shunt capacitance of the MOSFET. Figure 4a shows the Class-E DC-AC inverter for capacitive wireless power applications. Here, Vi is the DC supply voltage source, Lf is the choke inductor, S is the switch implemented by using a power MOSFET, and Cshunt is the voltage-shaping shunt capacitor across the switch. The power MOSFET output capacitance and the selfcapacitance of the choke are included in the overall capacitance Cshunt connected in parallel with the switch.

Circuit Descriptions
In some applications, it is preferable to work at not excessively high frequencies, especially when the transferred power is high. Therefore, to integrate the CWPT into the Class-E inverter topology, it is necessary to add the capacitances C1 and C2 and the inductances L1 and L2, as shown in Figure 4a. The circuit can be represented in the basic topology of Figure 4b introducing the equivalent impedance of CWPT Zeq. Then, the components Cr and Lr, representing the resonant tank, can be properly tuned to achieve inductive load for soft-switching operation. The typical voltage and current waveforms of the circuit operating at ZVS/ZDS conditions are shown in Figure 5.    Figure 4b shows the DC-AC Inverter where the CWPT system is replaced by its equivalent impedance Zeq = Req + j Xeq. As discussed in the previous section, depending on the value of CM, the equivalent reactance results to be either inductive or capacitive, as shown in Figure 3b. Let us assume that the system is working at the switching frequency f = ω/(2π).

Optimum Design Procedure
Depending on the application, an optimal value of coupling CM opt must be defined.
To reduce the current circulation, the reactive part of the equivalent impedance Xeq must be canceled by adding an external reactance Xext in series, leading to In this way, when the system operates at CM = CM opt , the equivalent impedance of the CWPT system is purely resistive Zeq = Req. The external inductance, which must be series connected to the LC resonant tank when Xeq < 0 Ω to satisfy (19), is When Xeq > 0 Ω, the external capacitance series-connected with the LC resonant tank to satisfy (19) is given by Assuming that the load resistance RL, the operating frequency f0 = ω0/(2π), and the output power Po values are known as design specifications, the expressions for the components needed to reach the ZVS and ZDS condition at CM = CM opt are given by [35] Regarding the choke inductor, it can be calculated as [36] 14 eq If the position of plates is not in the optimal position, the coupling is different from the nominal value CM opt , and therefore (19) is not satisfied. An in-depth analysis of the Class-E inverter under misalignment between plates is derived in Section 4.

Design Example
In this case of study, the considered power inverter has a nominal output power PO = 100 W, the load resistance is RL = 10 Ω, the operating frequency is f0 = 100 kHz, and the quality factor is selected to be QL = 10. The parasitic resistances are assumed to be R1 = R2 = 0.1 Ω.
The proposed design procedure is represented as a flowchart in Figure 6. Starting from the four plates capacitive wireless power transfer structure, the equivalent π electric circuit can be extrapolated. Defining the system characteristics, such as the operating frequency, the output power, and the load resistance, the equivalent impedance Zeq can be calculated. To cancel the reactive part Xeq, a capacitor Cext can be added if Xeq > 0.

Analytical Model
In this section, the analytical expressions of current and voltage waveforms across the components are derived. According to Figure 4, an equivalent impedance ZT = RT + j XT can be defined; its phase is The current through the series-resonant circuit is sinusoidal and given by ( ) where Im is the amplitude, and φ is the initial phase. The vector relationship between the angle ψ and φ is shown in Figure 7. If XT > 0 Ω, the voltage across the equivalent inductance VLT leads by 90° the voltage across the equivalent resistance VRT, as shown in Figure 7a; while if XT < 0 Ω, voltage VRT leads by 90° voltage VCT, as shown in Figure 7b. If the impedance is resistive-inductive, the first harmonic of the voltage v 1 shunt applied to ZT can be split into the voltage across the equivalent resistance RT and that across the equivalent reactance XT.
Using (31), the relationship between the angles ψ and φ, at a fixed duty cycle is derived as This relationship is also shown in Figure 8, for three different values of the duty cycle. The drain to source voltage across the MOSFET is If the choke inductance Lf is big enough to assume the input current II to be constant, the input voltage VI can be calculated as the average value of the vs Under the assumptions used for this analysis, the power losses for the circuit can be neglected. This means that Po = Vo Io and Pi =Vi Ii. Thus, the amplitude of the current through the resonant tank can be expressed as

Voltage and Current Waveforms
The equations shown in the previous section allow the study of the system behavior under capacitive coupling changes. Using (34) and (36), the voltage and the current through the MOSFET for three different values of coupling capacitance CM were calculated. The waveforms computed using the previous equations using the nominal values summarized in Table 1 are shown in Figure 9.  10 Ω The dotted lines in Figure 9 represent the current through the MOSFET is, while the continuous line is the drain to source voltage vs. Note that the ZVS/ZDS condition is achieved only for the optimum value of coupling capacitance CM opt = 32 pF. When the plates are strayed leading to a lower coupling capacitance CM < CM opt , the ZVS condition is still achieved, as shown for CM = 25 pF. When CM = CM opt , at ωt = 0 both ZCS and ZVS are reached, being both the current and the voltage across the MOSFET zero, while, when ωt =180°, only ZVS is achieved, being the current different from zero. When the plates come closer with respect to the optimum position CM > CM opt , the ZCS condition is not achieved at ωt = 0, while it is almost achieved CM < CM opt .

Simulation and Experimental Results
To validate the analysis results obtained using the analytical equations, the circuit was implemented in LTSpice and validated experimentally.

Simulations
The results obtained by using the analytical model described in the previous section are here validated through simulations. The circuit is implemented in LTSpice as shown in Figure 10 with the values component values shown in Table 1. To evaluate the effects of misalignment, three different values of coupling capacitance CM were studied. Figure  11a shows the current and voltage waveforms resulting at CM = 25 pF. The power delivered to the load is reduced to Po = 89 W, and also the efficiency reduces to ɳ = 0.91. In Figure 11b, the case with CM = CM opt = 32 pF is considered, both ZVS and ZDS are achieved, the output power is Po = 92 W, and the system efficiency is ɳ = 0.95. Finally, the circuit with CM = 45 pF is simulated, ZVS condition is not achieved, and the transmitted power increases to Po = 95 W, but the converter efficiency further decreases to ɳ = 0.89, as shown in Figure 11c. Note that at CM = 25, pF ZVS is still achieved, but the voltage stress across the MOSFET significantly increases if compared with the other couplings.

Experimental Results
To validate the simulations, a power converter experimental circuit has been realized. A picture of the experimental setup is shown in Figure 12a. An enlargement of the PCB board is shown in Figure 12b, while the equivalent electric circuit is shown in Figure 12c. The four plates are steel made. The measured values and the component parasitic resistances are given in Table 2. The inductance was made by using AWG40 Litz wire to reduce the parasitic resistance at fs = 100 kHz. A Silicon Super Junction MOSFET-R6020JNJ is used [37]. The main MOSFET parameters are reported in Table 3.
The experimental tests were performed under three different values of CM. Figure   The measured transmission efficiency is ɳ = 92.5%. Finally, in Figure 13c, the waveforms at CM = 45 pF are shown. The current flowing through the resonant tank stays approximately constant to I = 8.3 A, but the voltage across the load is Vo = 47.8 V, the transmitted power Po = 90.6 W, and a transmission efficiency ɳ = 88.5%. Concerning the achievement of the ZVS condition, it can be seen that for CM = 25 pF, the ZVS condition is still achieved, but the voltage stress across the MOSFET is increased reaching a maximum voltage VDS max ≅ 90 V.

Parameter
Value Operating with CM = CM opt = 32 pF, both the ZVS/ZDS conditions are achieved, while when the coupling increases as for CM = 45 pF, the ZVS condition is not achieved anymore, leading to ringing and switching power losses.
The converter also results in a very low output voltage total harmonic distortion (THD) as shown in Table 4, where the DC component and the THD of the output voltage for the three different capacitive couplings are summarized. Although the conversion efficiency is highly sensitive to coupling variation, the THD of the output voltage is also very low when the converter operates outside the optimum coupling.
An enlargement of the turn-on switching voltage and current waveforms for the three coupling cases is shown in Figure 14. The blue trace represents the voltage across the MOSFET vS, while the red trace represents the current iS. It can be seen that for both the cases, CM = 25 pF and CM = 32 pF ZVS is achieved, while for CM = 45 pF, the ZVS condition is not achieved, and a higher current oscillation occurs after the turn-on, thus leading to higher switching losses. The experimental results confirm both the analysis and simulation results. Mutual capacitance CM is one of the key parameters to investigate to achieve the ZVS and ZDS operations. The same transient behavior obtained from analytical equations and simulations is highlighted. When plates are moved from the optimal position, ZVS is still reached, but the power is transferred to the load, and the efficiency decreases. On the other hand, when the plates are placed at a closer distance than that of the optimal position, the transferred power increases, but the ZVS is not achieved, leading to a lower transmission efficiency. The abovementioned behavior of the converter versus coupling capacitance CM is illustrated in Figure 15, where the experimentally measured output power and conversion efficiency are shown. The maximum DC-AC conversion efficiency occurs at the optimum coupling capacitance CM opt . This is due to the achievement of the ZVD/ZDS condition, which drastically reduces the MOSFET switching losses, while the conduction losses are mainly related to the switch current root mean square (RMS) is,rms (Figure 9) and the RDS,ON of the chosen device [38,39]. Figure 15 also shows that the transferred power increases if the plate coupling increases.  In Table 5, the comparison in terms of output power, efficiency, operating frequency, and capacitive coupling between Class-E circuits available in the literature is shown. As shown, the proposed solution allows the increase of the transferred power operating at reduced switching frequency despite the low capacitive coupling.

Conclusions
This paper presents a complete analysis and the design procedure of the CWPT system based on a Class-E inverter. The analysis is focused on the coupling capacitance and its effects on the design constraints. It has been shown that the inverter satisfies both ZVS and ZDS conditions at a selected optimum coupling capacitance CM opt and satisfies ZVS conditions for 0 < CM < CM opt , yielding a high conversion efficiency. The expressions for the inverter current and voltages have been determined as functions of the coupling capacitance CM, so that the converter behavior also under misalignment between plates is predicted. Simulations and experimental results have been provided to validate the theoretical derivations.
Using the results of this paper, CWPT Class-E inverters can be designed for applications with fixed or variable coupling coefficient at any fixed load impedance. Additionally, thanks to the LC compensation, the operation at a lower frequency is allowed. This feature is obtained through a simpler control strategy with reduced switching losses and high quality of output waveforms (low THD). Therefore, compared with the similar experimental setup available in the literature, the proposed system is characterized by a higher output power transfer and a lower switching frequency.
Lower switching frequency operation allows controlling the system using controllers with low computational capabilities, which can be a useful feature for low-cost applications.
Furthermore, it operates at a lower frequency, leading to core losses reduction. On the other hand, this solution is useful for those applications where the optimization of the dimension and weight of the inverter is not of primary importance.
Practical applications of the considered CWPT circuit are in a wide variety of areas, including wireless power charging, induction heating, wireless-charged biomedical transplants, DC-DC power conversion, and DC-AC power inversion.
As future development, the performance of the DC-AC inverter using different four plates structures will be evaluated. A comparison between different structure solutions in terms of horizontal and vertical misalignment will be studied. Additionally, an extensive analysis of the power losses in the circuit will be evaluated, placing attention on the MOSFET losses and the losses due to parasitic components.