Discrete Fundamental AC Voltage Controller for Three-Phase Standalone Converters

: Voltage control of standalone converters with LC ﬁlter is usually based on proportional-resonant or proportional-integral controllers, which often require further active damping methods to achieve stability. These solutions place design constraints in the selection of the closed-loop pole locations which limit the achievable bandwidth and increase the design complexity. In contrast, in state-space based controllers, the closed-loop poles can be placed freely through state feedback, which makes them particularly suitable for high order plants and/or low sampling frequencies. Among the modern control methods, direct pole placement is a simple technique that enables the establishment of a straightforward relationship between outcome and design, as opposed to more advanced approaches. This paper presents a discrete state-space voltage controller for standalone converters with LC output ﬁlter. The proposed method combines the direct pole placement technique with a virtual disturbance observer in order to compensate the effects produced by the load and model mismatches. The design process takes into account both the ﬁlter parameters and the sampling frequency, rendering the performance of the obtained controller independent of both. The result is a streamlined design procedure that leads to consistent outcomes for a wide range of plant parameter variations, requiring only one input: the desired closed-loop bandwidth.


Introduction
Voltage source inverters (VSI) have commonly been used for uninterruptible power supplies (UPS), distributed generation systems (DG), dynamic voltage restorers (DVR), ground power units (GPU) for airplanes and other high-performance AC voltage sources. In order to meet the requirements in terms of voltage waveform quality, an LC filter is commonly used at the output of the inverter (sometimes LCL filters are used where the second inductor operates as part of the feeder impedance [1,2]) which brings up the issue of damping the LC resonance otherwise system stability and/or waveform quality might be compromised. Passive damping, being the easiest way, produces high energy losses [3] thus a more suitable method to dampen the LC resonance is by means of a properly designed control scheme.
Plenty of voltage controllers belonging to both the classic (transfer function) and modern (state-space) control theory have been proposed in the past. Classic controllers can be, in general, categorized into two groups regarding the control structure, namely the dual-loop voltage-current control [4][5][6][7][8] and the single-loop voltage control [9][10][11][12].
Dual-loop control strategies [4] have been widely employed in DG and UPS applications due to their good performance and inherent robustness. They involve the usage of an outer voltage loop to ensure steady-state tracking performance and an inner current loop to provide fast dynamic compensation for system disturbances and improving stability. By behaving as a virtual impedance [5], the inner current loop increases the dampening of the filter resonance and the load disturbance rejection but it also bounds the overall bandwidth [6]. Moreover, it has been shown that the aforementioned approach only presents good results when the intrinsic delay regarding digital implementation has a negligible phase lag effect [6] or is specifically taken into account in the design [7]. Still, continuous-time domain design and subsequent discretization for digital implementation can introduce discrepancies depending on the discretization method used [13], therefore direct design in the discrete-time domain is advisable [8].
Single-loop control methods are the preferred choice in low pulse ratio applications such as GPUs due to their improved dynamic performance [9]. However, the lack of degrees of freedom implies a tradeoff between performance and stability difficult to overcome. In order to mitigate this issue, some strategies have already been published. An active damping scheme is presented in [12], but it involves an iterative complex design procedure based on root locus and Bode plots to obtain the controller gains. In [11], a signal-shaping based control method to improve the dampening of the filter resonance is proposed but its sensitivity to parameter variation and sampling frequency limits its application. The pole placement technique is employed in [10] but with limited performance because only the output voltage is measured and no mechanism is included to estimate the rest of the plant information.
State-space control is particularly attractive in the case of LC filters because it enables the setting of the resonant dynamics (i.e., resonance damping) directly through state feedback. As a result of this, similar performance as in dual-loop controllers can be achieved but without the bandwidth constraints of cascade control [14]. In addition, by adopting a direct discrete-time design, it is possible to model the sample-and-hold and time lag effects in an accurate manner [15], further improving the achievable bandwidth and overall robustness.
The most popular methods among the state-space linear controllers are linear quadratic control (LQ), robust control (H ∞ ) and deadbeat control. Solutions based on optimal control theory like LQ [16,17] rely on the optimization of a performance index but the selection of the weighting matrices is not clear. H ∞ based controllers [18][19][20] allow the designer to stablish a set of predefined objectives but the design methodology is highly complex and the outcome is not guaranteed thus, the viability of the controller has to be checked by trial an error. Deadbeat controllers [21,22] achieve the fastest dynamic response at the cost of a large control effort which leads to a high sensitivity to model mismatches difficult to address.
As opposed to the previous techniques, the direct pole placement method [23,24] is interesting because it enables the specification of performance goals in terms of the closed-loop pole locations therefore, a direct relationship between outcome and design is established. However, to the best of the authors' knowledge, very few works has been published taking advantage of this technique. In [24], the controller is designed in the continuous-time domain without taking into account the time delays nor the effects of discretization, therefore, its performance is diminished since it relies on multiple pole-zero cancellations. The controller presented in [23] is developed in the discrete-time domain but it relies on the minimization of the output impedance at the fundamental frequency to increase the overall robustness. This strategy requires the usage of bandpass filters to avoid differentiation, therefore, a tradeoff between noise amplification and the derivative range has to be established. In [25], a controller combining a pole-placement designed compensator and a Kalman filter is presented. The controller offers good performance but the key parameters which define the behavior of the observer have to be estimated, therefore, the relationship between outcome and design is not straightforward.
In this paper, a design methodology for a discrete state-space voltage controller for VSIs with LC output filter is presented. The proposal employs a compensator to establish the overall performance and an observer to estimate the unmeasured state (only the output voltage is sensed) and to eliminate the steady-state errors. The proposed controller is developed in the stationary reference frame (αβ) using the pole placement technique and designed directly in the discrete-time domain for maximum accuracy and improved ro-bustness. As opposed to classical transfer function based designs, the closed-loop poles are placed in suitable locations regardless of the LC filter resonance and sampling frequencies and without requiring further damping nor decoupling terms. Placing the poles in specified locations establishes a direct relationship between performance and design, leading to fast and predictable transient responses with low control effort and no overshoot. Moreover, integration with external control loops (such as droop control for instance) is facilitated since the separation of their respective dynamics-thus avoiding undesired interactions is easier. The net result is a streamlined design procedure that leads to consistent outcomes for a wide range of plant parameter variations and which it only requires one input from the designer: the desired closed-loop bandwidth.
The rest of the paper is organized as follows: In Section 2, the models for the plant and load disturbance are obtained. Section 3 presents the design methodology for the proposed controller. Section 4 assesses the robustness of the proposal to different loads. In Section 5, the proposed controller is validated through experimental tests and Section 6 ends this work with the conclusions.

Plant and Disturbance Models
In this section, the model of the system dynamics-including disturbances-for the voltage controller shown in Figure 1 is obtained. L f and C f are the reactive elements of the filter whereas R L represents the inductor parasitic resistance; i L is the inductor current, i C the capacitor current and i o the load current; v C is the capacitor voltage and u d is the VSI output voltage. The plant models for both the compensator and the observer are obtained through a multi-stage process in which each step adds features to the model obtained in the previous stage. Figure 1. Standalone loaded VSI with LC output filter and voltage controller.

Plant Model for the Compensator
The process begins with the formulation of a continuous-time description of the system dynamics in the stationary reference frame. This model, already expressed in state-space notation, relates the LC filter output voltage v C (t) to the VSI output voltage u d (t): The continuous-time model of the plant for the compensator is described by (2). The load current i o is a disturbance and, consequently, non-controllable therefore its contribution is eliminated from the previous model (1) (the effect of the load current will be handled by the observer). In addition, the equivalent series resistance (ESR) of the filter capacitor (C f ) is disregarded, since its effect appears far above the frequencies of interest [26] and its contribution to the overall dynamics is negligible.
The discrete representation is obtained by means of the zero-order-hold equivalent (ZOH) [27] which allows for the half sample delay introduced by the pulse width modulator (PWM) [28] to be included.
One sample delay is then added to the control output (u) to account for the computational delay as follows [27]: The discrete model of the control plant is obtained by joining expressions (3) and (4): The final plant model (5) relates the output voltage v C (k) to the control output u(k).

Plant and Disturbance Model for the Observer
In order to eliminate the steady state error produced by the load current and plant modeling mismatches, the proposed controller implements the disturbance estimation technique [27] through a resonant action in the observer. The resonant action is accomplished by means of a pair of conjugated poles at the fundamental frequency ω 1 , as to be able to compensate for both the positive and negative sequences of the disturbance, and determines the manner in which the plant and disturbance models are developed.
The procedure to obtain the plant for the observer is detailed below. First, the load current i o is stricken from the real plant and replaced with an input equivalent disturbance ω [27] as shown in Figure 2. Next, a description of ω is required: a sinusoidal signal at the fundamental frequency ω 1 containing both sequences is described in the continuous-time domain by which, after being rewritten in state-space notation, results in The discrete state-space disturbance model is obtained by means of the ZOH equivalent (again, to include the effect of the PWM modulator): In order for the observer to be able to estimate the input equivalent disturbance ω, the compensator plant model previously developed (5) is augmented with the disturbance model (8): The resulting plant model allows the observer to estimate the filter states x 2 and the input equivalent disturbance ω from the system output v C and the controller output u.

Controller Design
The structure of the proposed controller ( Figure 3) comprises an state feedback gain K to stablish the overall performance, a feedforward gain N to correct the open-loop errors at the fundamental frequency and a Luenberger observer to estimate the unmeasured state i L and the steady-state error characterized by the virtual signal ω defined in the previous section. The resulting control law is where u is the control output, v * C is the reference, v C is the measured state and the variables marked with the caret are estimates produced by the observer. Figure 3. Block diagram of the proposed controller.
In addition, for implementation purposes, a saturator is included between the control output and the plant as to include a simple anti-windup mechanism [29]. By feeding back the saturated signal (u sat ) to the observer, the consistency between the estimated states and the plant states is maintained, thus the windup problem is avoided.
The key characteristic of this proposal is the usage of the observer to produce the correction effort required to compensate the steady-state error. The input equivalent disturbance (ω), embodies all the negative effects derived from model mismatches and disturbances in a single signal which is then cancelled through the addition of its estimate ( ω) to the control output. This technique enables the placement of the controller in the feedback path rather than in the more common direct path [23,24]. As a result, faster responses are achieved due to the existence of a direct path from the reference to the plant therefore, excitation of the controller modes is avoided. In addition, less control effort is required since both the plant and the controller are driven by the same signal and estimation errors are minimized as a consequence.
The design procedure for the proposed controller presented below is carried out in two steps. First, the compensator is obtained assuming all states are known. Next, the observer is designed by selecting the dynamics of the estimation error thanks to the separation principle [27].

Compensator Design
The plant model in (5) is comprised of a pair of conjugated poles at the resonance frequency ω r and an extra pole as a result of the state augmentation with the computational delay. The main goal is to achieve a stable response with minimum control effort by preselecting the closed-loop poles positions in a suitable manner through the following control law: The closed-loop system model is obtained by substitution of the aforementioned control law in the compensator plant (5) resulting in and the characteristic polynomial containing the desired closed-loop locations is The closed-loop pole locations can be picked out in a straightforward manner by selecting p i but the task becomes easier to carry if the locations are determined first in the continuous-time domain and mapped afterwards onto the discrete domain via the pole-zero matching method z = e jωT s [27]: The location of the resonant poles (p 1,2 ) is determined in agreement with the radial projection technique [27]. This method aims to minimize the control effort by increasing the damping factor of poorly damped open-loop poles without altering their natural frequency. An additional benefit of this technique is that it allows the design procedure to be independent of the LC filter configuration since it is taken into account through its resonance frequency.
The remaining pole (p 3 ) determines the overall response of the closed-loop system through its bandwidth (ω c ), thus enabling the usage of the well known formulas for time and frequency domain specification for first order systems [27]. The maximum achievable bandwidth is determined by the DC-link dynamics and the LC filter frequency response. Higher bandwidths improve the transient response by giving rise to large control efforts at the cost of increasing the stress on the DC-link [30]. Beyond the resonance frequency, the required control effort to overcome the filter attenuation would be substantial, leading the power converter into the overmodulation region. Furthermore, the higher the bandwidth the closer the dominant pole is to the resonant pair and the greater the interaction between them.
The final step in the compensator design procedure is to determine the value of the input gain N. The purpose of this gain is to achieve unity gain at the fundamental frequency by adjusting the location of the transmission zero from the reference to the output. Figure 4 shows the closed-loop pole distribution and the subsequent frequency response obtained after applying the following criterion: for the damping factor of the resonant poles (p 1,2 ) a value of ζ = 0.707 is proposed, which allows for a good tradeoff between speed of response and overshoot. As for the frequency of the dominant pole (p 3 ), a value ω c of three times the fundamental frequency has been selected, which corresponds to a 2.3 ms rise time.  The state-feedback gain K can be obtained numerically by solving the Ackermann's formula [27] for the compensator but the usage of a software tool such as Matlab (the one used in this case) is recommended in order to avoid errors.

Observer Design
Regarding the selection of the type of discrete observer, two alternatives are available: full order observers or reduced order observers [27]. Full order observers estimate all the state variables and this is the recommended option would the control variable measurements be too noisy. Reduced order observers allow the order of the estimator to be reduced by the number of sensed outputs, thus achieving higher bandwidth and faster response. Since the ability to reject disturbances depends on the efficiency and speed of the observer to estimate them, this characteristic is of particular interest in this application.
The procedure to determine the closed-loop positions for the observer poles is similar as for the compensator. The characteristic polynomial containing the desired locations is where F bb and F ab are submatrices of F 3 obtained after eliminating the contribution of the measured variable (the full procedure for obtaining them can be found in [27]) and L is the state feedback gain to place the poles in the desired locations. The discrete parameterized expression is obtained in the same manner as before: As opposed to the compensator, there is no physical actuator to be driven here, therefore there are no restrictions on where to place the poles but beyond the Nyquist frequency of course. However, in order for the overall response of the controller to be governed by the compensator, the dominant pole of the observer (p 5 ) should be placed at a higher frequency than the one from the compensator (p 3 ). As a rule of thumb, the frequency of the dominant pole of the observer (ω o ) should be at least twice the frequency of the dominant pole of the compensator to avoid interactions [27]. As for the resonant poles (p 6,7 ), the same locations selected for the compensator (p 1,2 ) can be used here as long as they are sufficiently apart from the dominant pole. The delay pole (p 4 ) is already well placed, there is no need to relocate it. Figure 5 illustrates the relationship between the open-loop and closed-loop poles for both the observer and the compensator as well as the output impedance. The closed-loop frequency response remains the same as in Figure 4b since the closed-loop system is still governed by the dominant pole of the compensator. The proposed design provides zero output impedance at both sequences of the fundamental in addition to the dampening of the resonance frequency. As a result, both the transient and steady-state responses are improved since the output voltage distortion is reduced.
As in the case of the compensator, the usage of a software tool to obtain the state feedback gain L is recommended, otherwise the gain has to be obtained by solving Ackermann's formula for the observer [27].

Stability Analysis
Both modeling mismatches and loads displace the closed-loop poles with respect to their intended locations but the latter is far more threatening hence the former is disregarded. The analysis is conducted in a similar fashion as it is done in [10]. The root locus of the closed-loop system when the system is loaded with a purely resistive and a purely inductive load is plotted in order to represent the extremes between which an R-L load can vary (mixed R-L loads will produce similar outcomes as the inductive loads but less severe due to the extra damping provided by the resistive component). The parameters of both the controller and the output filter employed in the analysis are displayed in Table 1.
[0.171 1.243 1.367 1.240] T × 10 3 Figure 6a shows the effects on the system poles for a purely resistive load. At extremely low impedances, the system becomes marginally stable due to the resonant poles of the plant (farthest pair to the right) being displaced to the low frequency region. As the impedance increases, the controller is quite capable of compensating the influence of the load. The net effect is an slight reduction on the overall bandwidth, represented by an small displacement of the dominant pole (farthest real pole to the right). Figure 6b depicts the impact of connecting a purely inductive load to the system. The main effect of this type of loads is the increment of the resonance frequency of the combined system, which it can lead to instability. As opposed to the previous case, small load impedances push the resonant poles of the plant to higher frequencies. In addition, the system response is no longer determined by a single real pole but by a complex pair as a result of the displacement of the dominant poles of both the observer and the compensator.
The extra pole introduced by the load (farthest to the right) barely contributes to the overall dynamics since it is always partially cancelled by its own zero. As the load inductance increases, the closed-loop poles travel towards the intended locations, both increasing the stability and the speed of response.

Experimental Results
The proposed controller is tested in a 4 kW two-level three-phase VSC working as an inverter and connected to a 10 kW DC voltage source. The hardware and control parameters are presented in Table 1 and a photograph of the experimental setup is shown in Figure 7. The LC filter is designed in accordance with the method proposed in [31]. The third test is carried out at half the sampling and switching frequencies which sets the critical frequency ( f s /6) [12] close to the resonance frequency of the output filter. The evaluation of the obtained results is done accordingly to the IEC 62040 standard [32], which it specifies the performance and test requirements of voltage-controlled standalone converters.  Figure 10.      Figure 8a,b show the output voltage and load current waveforms at the time of connection and disconnection respectively. The output voltage remains stable at both load steps indicating that the controller has been able to fully compensate them. In Figure 8c, the normalized tracking error is depicted alongside the limits imposed by the IEC standard. It can be seen that the system reaches steady-state in around 2 ms and the normalized voltage error is around 1-2%. Figure 9a,b show the output voltage and load current waveforms at the time of connection and disconnection respectively. As it can be seen, the converter is able to supply the load with a distorted current while maintaining the output voltage. In Figure 9c, the normalized tracking error is depicted alongside the limits imposed by the IEC standard. The lack of a discernible voltage transient means that the load step is fully compensated by the control and the absence of distortion in the voltage error indicates that the load disturbance is successfully rejected. Figure 10a,b show the output voltage and load current waveforms at the time of connection and disconnection respectively. The load current displays the classic square shape of rectifiers, however, the output voltage waveform remains much less distorted. Figure 10c depicts the normalized tracking error and the limits defined in the IEC standard. It can be seen that the response of the converter has been slightly slowed and, despite the distortion, the tracking error is within the limits defined by the standard. Figure 10d displays the harmonic spectrum of the output voltage and the load current. Although the harmonic content of the load current is quite high, the controller is able to impose an output impedance low enough so that the total voltage distortion does not exceed the limit imposed by the IEC standard (8%). The largest amplitude harmonics are, as expected, the fifth and the seventh, which are below the limits as well.

Conclusions
In this paper, a voltage controller for standalone converters with LC output filter, capable of controlling both sequences of the fundamental component with zero steadystate error, has been presented. The proposed controller offers fast transient responses with low control effort regardless of the output filter parameters and sampling frequency. The design procedure, based on the direct pole placement technique, is straightforward and it only requires the designer to define the desired closed-loop bandwidth. The theoretical analysis has shown a wide stability range, therefore, the controller can be applied in situations in which the load can reach very low values of impedance. The viability of the presented controller has been validated through experimental tests and the obtained results were found in compliance with the IEC 62040 standard.

Conflicts of Interest:
The authors declare no conflict of interest.

Abbreviations
The following abbreviations are used in this manuscript: