Real Time Simulation of Power Electronics Medium Voltage DC-Grid Simulator

: Power electronics medium-voltage (MV) systems must comply with the requirements deﬁned in grid codes. These systems’ compatibility with the standards can be validated by specialized testing equipment: grid simulators. This paper presents a hardware in the loop (HiL) implementation and the simulation results of a MV multiphase DC/DC converter designed for MV DC grid emulation. By using ABB’s reliable, patented power converter hardware topology (US 10978948 B2) and by applying advanced control algorithms, the presented system can be used for special purposes, such as the emulation of fault events in a DC-grid used for the certiﬁcation of other devices, or for other research goals. The presented concept of a power electronics DC-grid simulator (PEGS-DC) is characterized by high power capability and high voltage quality. In this paper, the general idea of a power electronics grid simulator applied for the testing of MV electrical systems is discussed. Then, details related to the PEGS-DC, such as its hardware topology and the applied modulation method are presented. Subsequently, the HiL setup is described. The main scope of this article focuses on model the description and presenting recorded HiL simulations.


Introduction
The rapid development of the electric power sector, caused by renewable energy sources, active loads, and energy storage, challenges power grids, in terms of their stable and reliable operation. These systems are connected to the grid only if they meet specific requirements related to voltage quality and safe operation, as defined in standards or recommendations, e.g., in [1,2].
According to these standards, the higher harmonics of voltage and voltage THD must be limited. Furthermore, electrical systems should react in a specific manner depending on the type of grid faul events. Grid-tied systems, such as wind turbines, must remain connected under fault conditions to maintain the nominal voltage by delivering reactive power. Some grid-tied systems are allowed to operate only for a short time, due to safety reasons. For example, according to the anti-islanding protection described in IEEE Std 1547 [3], PV panels must be disconnected from the grid within 2 s.
To address these requirements, specialized testing equipment, called grid emulators, have been developed [4]. These systems are characterized by very low voltage harmonics of a high order, and they can simulate grid fault events, such as voltage sags, frequency variation, and weak or strong grids. They can also simulate a customized grid voltage spectrum by injecting voltage harmonics.
Most converter topologies reported in the technical literature have been designed for AC grid emulation and do not have a sufficient power capability to test modern multimegawatt MV applications [5][6][7][8][9][10]. In the literature, there are two competitive solutions providing an appropriate level of voltage and power for modern MV applications [11,12]. voltage; voltage at the point of common coupling (PCC). A multiphase buck converter is able to step down the input voltage (DC-link voltage) to the rated level of the device under testing (DUT). Phase chokes are required to limit the currents circulating between the phases, as well as to reduce output current ripples. Additionally, an RC filter is used to reduce output voltage ripples, which are mainly caused by the switching of the converter's thyristors.
The designed AC/DC/DC conversion system allows for bidirectional energy flow between the AC Grid and DUT, providing a wide testing capability for different types of devices that generate or consume power.  Figure 1. Simplified structure of simulated electrical system [35].
The focus of this paper is a multiphase DC/DC converter used for DC-grid emulation. Selected parts of the system are simulated using a simplified approach, which does not consider some real system behaviors, e.g., the AC grid dynamic response or the nonlinear effect of the semiconductor switching of the ARU. However, this allows for a faster model execution.
Both the active rectifier and the DC/DC converter are based on the NPC topology, which is highly reliable, but requires advanced control algorithms to obtain a high voltage quality and to balance the DC-link voltages, which is necessary for stable system operation. As mentioned before, the ARU model is simplified, but considers the following: the effect of DC/DC power converter phase voltages asymmetry, caused by nonideal switching of thyristors of the DC/DC converter; system parameter uncertainties; and dynamic load current changes to DC-link voltage.
The selected DC/DC converter topology and the parameters of the output filter unit (OFU) affect, both the dynamic performance of the system, and the output voltage quality. In the presented case, the original ABB patented solution shown in Figure 2 is used for the DC/DC conversion stage. The converter consists of six NPC legs, which produce positive or negative voltage pulses relative to the midpoint of the DC link.  Simplified structure of simulated electrical system [35].
The focus of this paper is a multiphase DC/DC converter used for DC-grid emulation. Selected parts of the system are simulated using a simplified approach, which does not consider some real system behaviors, e.g., the AC grid dynamic response or the nonlinear effect of the semiconductor switching of the ARU. However, this allows for a faster model execution.
Both the active rectifier and the DC/DC converter are based on the NPC topology, which is highly reliable, but requires advanced control algorithms to obtain a high voltage quality and to balance the DC-link voltages, which is necessary for stable system operation. As mentioned before, the ARU model is simplified, but considers the following: the effect of DC/DC power converter phase voltages asymmetry, caused by nonideal switching of thyristors of the DC/DC converter; system parameter uncertainties; and dynamic load current changes to DC-link voltage.
The selected DC/DC converter topology and the parameters of the output filter unit (OFU) affect, both the dynamic performance of the system, and the output voltage quality. In the presented case, the original ABB patented solution shown in Figure 2 is used for the DC/DC conversion stage. The converter consists of six NPC legs, which produce positive or negative voltage pulses relative to the midpoint of the DC link. voltage; voltage at the point of common coupling (PCC). A multiphase buck converter is able to step down the input voltage (DC-link voltage) to the rated level of the device under testing (DUT). Phase chokes are required to limit the currents circulating between the phases, as well as to reduce output current ripples. Additionally, an RC filter is used to reduce output voltage ripples, which are mainly caused by the switching of the converter's thyristors.
The designed AC/DC/DC conversion system allows for bidirectional energy flow between the AC Grid and DUT, providing a wide testing capability for different types of devices that generate or consume power.  The focus of this paper is a multiphase DC/DC converter used for DC-grid emulation. Selected parts of the system are simulated using a simplified approach, which does not consider some real system behaviors, e.g., the AC grid dynamic response or the nonlinear effect of the semiconductor switching of the ARU. However, this allows for a faster model execution.
Both the active rectifier and the DC/DC converter are based on the NPC topology, which is highly reliable, but requires advanced control algorithms to obtain a high voltage quality and to balance the DC-link voltages, which is necessary for stable system operation. As mentioned before, the ARU model is simplified, but considers the following: the effect of DC/DC power converter phase voltages asymmetry, caused by nonideal switching of thyristors of the DC/DC converter; system parameter uncertainties; and dynamic load current changes to DC-link voltage.
The selected DC/DC converter topology and the parameters of the output filter unit (OFU) affect, both the dynamic performance of the system, and the output voltage quality. In the presented case, the original ABB patented solution shown in Figure 2 is used for the DC/DC conversion stage. The converter consists of six NPC legs, which produce positive or negative voltage pulses relative to the midpoint of the DC link.

DC Output Voltage Modulation
To modulate the DC output voltage, an interleaved carrier-based PWM modulation scheme was used [36,37]. Due to the regular phase shift between carrier signals of the modulator (see Figure 3a), this technique provides very low output voltage ripples and high control dynamic [37]. Nevertheless, it requires implementing control algorithms to overcome issues related to the converter phase current unbalance [38] and controlling the neutral point potential of the DC-link [37]. This problem is especially important in the case of MV applications, where switching logic restrictions significantly limits the voltage modulation area. It is crucial that the HiL model is laid out so as to be able to reproduce these phenomena.
Each phase leg of the converter is controlled by comparing the carrier signals with one of the modulating waveforms, Figure 3a. At each sampling instant, one of three possible switching states {−1, 0, +1} is selected to control each of the six converter phases independently, Figure 3b. Within each phase leg, thyristors are controlled according to the classical approach known from AC applications [39], Figure 4.

DC Output Voltage Modulation
To modulate the DC output voltage, an interleaved carrier-based PWM modulation scheme was used [36,37]. Due to the regular phase shift between carrier signals of the modulator (see Figure 3a), this technique provides very low output voltage ripples and high control dynamic [37]. Nevertheless, it requires implementing control algorithms to overcome issues related to the converter phase current unbalance [38] and controlling the neutral point potential of the DC-link [37]. This problem is especially important in the case of MV applications, where switching logic restrictions significantly limits the voltage modulation area. It is crucial that the HiL model is laid out so as to be able to reproduce these phenomena.
Each phase leg of the converter is controlled by comparing the carrier signals with one of the modulating waveforms, Figure 3a. At each sampling instant, one of three possible switching states {−1, 0, +1} is selected to control each of the six converter phases independently, Figure 3b. Within each phase leg, thyristors are controlled according to the classical approach known from AC applications [39], Figure 4.

HiL Setup
The laboratory setup is presented in Figure 5. The system consists of a host computer, the main controller, the control hardware of ACS6000, and the real-time simulator. The AC800 PEC controller uses a CPU with FPGA to realize the control algorithm of choice, [40]. The CPU is used by a real-time operating system to execute, both tasks responsible for control and protections, with sampling intervals smaller than 1 ms, and other functions, such as system configuration, which are enabled at longer sampling intervals. The

DC Output Voltage Modulation
To modulate the DC output voltage, an interleaved carrier-based PWM modulation scheme was used [36,37]. Due to the regular phase shift between carrier signals of the modulator (see Figure 3a), this technique provides very low output voltage ripples and high control dynamic [37]. Nevertheless, it requires implementing control algorithms to overcome issues related to the converter phase current unbalance [38] and controlling the neutral point potential of the DC-link [37]. This problem is especially important in the case of MV applications, where switching logic restrictions significantly limits the voltage modulation area. It is crucial that the HiL model is laid out so as to be able to reproduce these phenomena.
Each phase leg of the converter is controlled by comparing the carrier signals with one of the modulating waveforms, Figure 3a. At each sampling instant, one of three possible switching states {−1, 0, +1} is selected to control each of the six converter phases independently, Figure 3b. Within each phase leg, thyristors are controlled according to the classical approach known from AC applications [39], Figure 4.

HiL Setup
The laboratory setup is presented in Figure 5. The system consists of a host computer, the main controller, the control hardware of ACS6000, and the real-time simulator. The AC800 PEC controller uses a CPU with FPGA to realize the control algorithm of choice, [40]. The CPU is used by a real-time operating system to execute, both tasks responsible for control and protections, with sampling intervals smaller than 1 ms, and other functions, such as system configuration, which are enabled at longer sampling intervals. The

HiL Setup
The laboratory setup is presented in Figure 5. The system consists of a host computer, the main controller, the control hardware of ACS6000, and the real-time simulator. The AC800 PEC controller uses a CPU with FPGA to realize the control algorithm of choice, [40]. The CPU is used by a real-time operating system to execute, both tasks responsible for control and protections, with sampling intervals smaller than 1 ms, and other functions, such as system configuration, which are enabled at longer sampling intervals. The FPGA is reserved for very fast control, protections, and communication, with sampling rates in the range 25 ns-25 us. A host PC is used as a user interface to the HiL, allowing programing of the AC800 PEC controller and the real-time simulator, and it contains the software necessary for debugging and data acquisition. The real-time simulator is an OPAL OP5707 featuring an INTEL ® CPU with eight cores and used to execute, in real-time, models FPGA is reserved for very fast control, protections, and communication, with sampling rates in the range 25 ns-25 us. A host PC is used as a user interface to the HiL, allowing programing of the AC800 PEC controller and the real-time simulator, and it contains the software necessary for debugging and data acquisition. The real-time simulator is an OPAL OP5707 featuring an INTEL ® CPU with eight cores and used to execute, in realtime, models developed in Matlab/Simulink environment with Xilinx ® FPGA Virtex-7; enabling access to OP5707 I/O cards [41]. The AC800 PEC controller, OP5707 simulator, and host PC are connected to the LAN via Ethernet.

AC800 PEC Main
Control SW  The Ethernet connection is used by the host PC to upload firmware, monitor signals, and debug both the controller and real-time simulator. A fiber optics connection between the ACS800 PEC and ACS6000 control hardware permits real-time digital communication, which is used by the main controller to transfer thyristor switching commands and receive measurements from the ACS6000. Finally, the thyristor switching signals undergo opticalto-electrical conversion and are read by the OP5707, which in turn generates feedback signals to establish closed-loop control.

Model of the Active Rectifier
The active rectifier controls the DC link voltage and simultaneously compensates the reactive power. By applying PWM to control the power semiconductors, the input currents are shaped to be as sinusoidal as possible, with a low content of higher harmonics. The detailed HiL implementation of the ARU vector control is not crucial, considering that the main purpose of this paper is to simulate the DC/DC converter. Additionally, it is important to reduce the computational effort related to the model execution, so as to run it with the highest possible sampling frequency, which improves accuracy.
Thus, the ARU model was simplified to a system consisting of two capacitors and a PI controller of the full DC-link voltage; the PI controller includes an anti-windup feature. This approach allows simulating the DC-link voltage unbalances and voltage excursions caused by rapid load current changes.
In Figure 6, a model of the active rectifier is presented. DC-link voltage values were calculated based on a model designed in the standard Simulink library. Since the Sim-Power System library was used to model the DC/DC converter, additional SimPower System blocks, representing controllable voltage sources, were applied. The Ethernet connection is used by the host PC to upload firmware, monitor signals, and debug both the controller and real-time simulator. A fiber optics connection between the ACS800 PEC and ACS6000 control hardware permits real-time digital communication, which is used by the main controller to transfer thyristor switching commands and receive measurements from the ACS6000. Finally, the thyristor switching signals undergo opticalto-electrical conversion and are read by the OP5707, which in turn generates feedback signals to establish closed-loop control.

Model of the Active Rectifier
The active rectifier controls the DC link voltage and simultaneously compensates the reactive power. By applying PWM to control the power semiconductors, the input currents are shaped to be as sinusoidal as possible, with a low content of higher harmonics. The detailed HiL implementation of the ARU vector control is not crucial, considering that the main purpose of this paper is to simulate the DC/DC converter. Additionally, it is important to reduce the computational effort related to the model execution, so as to run it with the highest possible sampling frequency, which improves accuracy.
Thus, the ARU model was simplified to a system consisting of two capacitors and a PI controller of the full DC-link voltage; the PI controller includes an anti-windup feature. This approach allows simulating the DC-link voltage unbalances and voltage excursions caused by rapid load current changes.
In Figure 6, a model of the active rectifier is presented. DC-link voltage values were calculated based on a model designed in the standard Simulink library. Since the SimPower System library was used to model the DC/DC converter, additional SimPower System blocks, representing controllable voltage sources, were applied.  Abbreviations and symbols used in Figure 6 are explained in Table 1.

Model of 6-Phase DC/DC Step-Down Converter
The DC/DC converter was modelled using specialized toolboxes in Matlab/Simulink and OPAL-RT, dedicated to the modelling of electrical circuits and power electronics converters. The buck converter, which is connected to the ARU, is represented by controllable voltage sources, Figure 6. The reference voltages are calculated according to the mathematical model realized in Simulink. For the calculation of this model, measurements of the DC-link currents are required. A six-phase DC/DC power electronics converter was modelled using OPAL-RT blocks "TSB3_hiZR1". They are controlled according to gate control signals provided by the ACS800 PEC. They are read by the dedicated blocks "TSBIn" of OPAL-RT. Measurements of currents and voltages were realized using Matlab SimPower System, Figure 7. The same library was used to design the remaining part of the electrical circuit model (see parameters in Table 2). Abbreviations and symbols used in Figure 6 are explained in Table 1.

Model of 6-Phase DC/DC Step-Down Converter
The DC/DC converter was modelled using specialized toolboxes in Matlab/Simulink and OPAL-RT, dedicated to the modelling of electrical circuits and power electronics converters. The buck converter, which is connected to the ARU, is represented by controllable voltage sources, Figure 6. The reference voltages are calculated according to the mathematical model realized in Simulink. For the calculation of this model, measurements of the DC-link currents are required. A six-phase DC/DC power electronics converter was modelled using OPAL-RT blocks "TSB3_hiZR1". They are controlled according to gate control signals provided by the ACS800 PEC. They are read by the dedicated blocks "TSBIn" of OPAL-RT. Measurements of currents and voltages were realized using Matlab SimPower System, Figure 7. The same library was used to design the remaining part of the electrical circuit model (see parameters in Table 2).   The DUT was modelled as a standard controllable current source available in Sim-Power System. The "OPTrigger" function is used to store the results. Some measurements are sent via an analog output to the AC800 PEC to be used for control. For this purpose, "OPFcnCommonAnalogOut" was utilized.

HiL Simulation Results
In this chapter, the HiL-simulation results are presented, to show the performance of the modelled system. First, the static characteristics are shown. Then, the output voltage is described in the frequency domain. After that, the dynamic system response is evaluated. Finally, selected issues related to the converter topology are explained.

Static Characteristics
In Figure 8a, an average value of the PCC voltage, depending on the voltage modulation index is presented. The obtained characteristic is linear, except at the boundaries of the control range, where switching logic restrictions influence the voltage control margins, because of the reduced width of the generated voltage pulses. In Figure 8b, a characteristic of the relative error of the voltage modulation, referring to the expected voltage, is presented. In the voltage range 0.5-4.5 kV, these error values are below 0.5%, complying with the requirements of IEEE Std1709. The DUT was modelled as a standard controllable current source available in Sim-Power System. The "OPTrigger" function is used to store the results. Some measurements are sent via an analog output to the AC800 PEC to be used for control. For this purpose, "OPFcnCommonAnalogOut" was utilized.

HiL Simulation Results
In this chapter, the HiL-simulation results are presented, to show the performance of the modelled system. First, the static characteristics are shown. Then, the output voltage is described in the frequency domain. After that, the dynamic system response is evaluated. Finally, selected issues related to the converter topology are explained.

Static Characteristics
In Figure 8a, an average value of the PCC voltage, depending on the voltage modulation index is presented. The obtained characteristic is linear, except at the boundaries of the control range, where switching logic restrictions influence the voltage control margins, because of the reduced width of the generated voltage pulses. In Figure 8b, a characteristic of the relative error of the voltage modulation, referring to the expected voltage, is presented. In the voltage range 0.5-4.5 kV, these error values are below 0.5%, complying with the requirements of IEEE Std1709. One of the most important factors that determines if the converter can be used as a DC-grid emulator is the level of voltage oscillations, which mainly originate from the switching frequency of the thyristors or from the DC-link voltage fluctuations, i.e., ARU voltage oscillations. In Figure 9, a static characteristic of peak-to-peak PCC voltage ripples is shown. Similarly, the root mean square (RMS) and normalized values of these ripples are presented in Figures 10 and 11, respectively. The normalized values of the voltage ripples were below 1% in the modulation index range midx ∈ (0.1, 1), which is way below what is recommended in the IEEE Std1709.
As mentioned in subchapter 2, the low amplitude of the voltage ripple is the main One of the most important factors that determines if the converter can be used as a DC-grid emulator is the level of voltage oscillations, which mainly originate from the switching frequency of the thyristors or from the DC-link voltage fluctuations, i.e., ARU voltage oscillations. In Figure 9, a static characteristic of peak-to-peak PCC voltage ripples is shown. Similarly, the root mean square (RMS) and normalized values of these ripples are presented in Figures 10 and 11, respectively. The normalized values of the voltage ripples were below 1% in the modulation index range m idx ∈ (0.1, 1), which is way below what is recommended in the IEEE Std1709. voltage oscillations. In Figure 9, a static characteristic of peak-to-peak PCC voltage ripples is shown. Similarly, the root mean square (RMS) and normalized values of these ripples are presented in Figures 10 and 11, respectively. The normalized values of the voltage ripples were below 1% in the modulation index range midx ∈ (0.1, 1), which is way below what is recommended in the IEEE Std1709.
As mentioned in subchapter 2, the low amplitude of the voltage ripple is the main advantage of multiphase converters. Additionally, due to the interleaved modulation scheme, for some converter operating points, the switching ripples are fully eliminated, i.e., at midx ∈ {1/6, 3/6, 5/6}. Due to the impact of the switching logic restrictions at midx ∈ {2/6, 4/6}, the obtained values are increased [37].   voltage oscillations. In Figure 9, a static characteristic of peak-to-peak PCC voltage ripples is shown. Similarly, the root mean square (RMS) and normalized values of these ripples are presented in Figures 10 and 11, respectively. The normalized values of the voltage ripples were below 1% in the modulation index range midx ∈ (0.1, 1), which is way below what is recommended in the IEEE Std1709.
As mentioned in subchapter 2, the low amplitude of the voltage ripple is the main advantage of multiphase converters. Additionally, due to the interleaved modulation scheme, for some converter operating points, the switching ripples are fully eliminated, i.e., at midx ∈ {1/6, 3/6, 5/6}. Due to the impact of the switching logic restrictions at midx ∈ {2/6, 4/6}, the obtained values are increased [37].   The impedance of the choke must be chosen so that the obtained current ripple, caused by the phase-to-phase voltage, does not exceed the overcurrent threshold under a steady-state, as well as during dynamic operation of the power converter. In Figure 12a, the peak-to-peak values of the phase current ripples are presented. Switching logic restrictions, which are typical for thyristor-based power electronics converters, must be compensated by the control, to avoid phase current unbalances. Nevertheless, in most cases, these algorithms lead to increased current ripples at some operating points, where the impact of the switching logic restrictions is the most significant, e.g., midx ∈ {2/6, 4/6}, as is visible in Figure 12a.
The phase currents of the power converter must be balanced to avoid overcurrent trips. Figure 12b shows an example of balanced currents for the three converter phases. As mentioned in subchapter 2, the low amplitude of the voltage ripple is the main advantage of multiphase converters. Additionally, due to the interleaved modulation scheme, for some converter operating points, the switching ripples are fully eliminated, i.e., at m idx ∈ {1/6, 3/6, 5/6}. Due to the impact of the switching logic restrictions at m idx ∈ {2/6, 4/6}, the obtained values are increased [37].
The impedance of the choke must be chosen so that the obtained current ripple, caused by the phase-to-phase voltage, does not exceed the overcurrent threshold under a steadystate, as well as during dynamic operation of the power converter. In Figure 12a, the peak-to-peak values of the phase current ripples are presented. Switching logic restrictions, which are typical for thyristor-based power electronics converters, must be compensated by the control, to avoid phase current unbalances. Nevertheless, in most cases, these algorithms lead to increased current ripples at some operating points, where the impact of the switching logic restrictions is the most significant, e.g., m idx ∈ {2/6, 4/6}, as is visible in Figure 12a.
The phase currents of the power converter must be balanced to avoid overcurrent trips. Figure 12b shows an example of balanced currents for the three converter phases.
caused by the phase-to-phase voltage, does not exceed the overcurrent threshold under a steady-state, as well as during dynamic operation of the power converter. In Figure 12a, the peak-to-peak values of the phase current ripples are presented. Switching logic restrictions, which are typical for thyristor-based power electronics converters, must be compensated by the control, to avoid phase current unbalances. Nevertheless, in most cases, these algorithms lead to increased current ripples at some operating points, where the impact of the switching logic restrictions is the most significant, e.g., midx ∈ {2/6, 4/6}, as is visible in Figure 12a.
The phase currents of the power converter must be balanced to avoid overcurrent trips. Figure 12b shows an example of balanced currents for the three converter phases. A common issue related to NPC power converters is DC-link voltage unbalance [36]. Figure 13 shows the % error of DC-link voltages relative to the nominal value of the DClink voltage, depending on the modulation index, under converter no-load operation. A common issue related to NPC power converters is DC-link voltage unbalance [36]. Figure 13 shows the % error of DC-link voltages relative to the nominal value of the DC-link voltage, depending on the modulation index, under converter no-load operation. Switching logic restrictions cause modulation errors in the phase voltages. These errors are the highest in the range of the modulation index around 1/3 and 2/3. Due to this fact, the unbalancing of the DC-link voltages is around 1% in that case. This level of error is acceptable and does not reduce the PCC voltage range and the modulation accuracy.

Analysis in the Frequency Domain
Since higher harmonics in the PCC voltage have a negative impact on devices connected to the grid, or can even cause microgrid system instability [42], it is important to shape accordingly the voltage spectrum of the converter, whose purpose is grid emulation. Figures 14-17 show two representative examples of voltage time-domain transients and their spectrum obtained for the designed system. In Figure 15, the dominant higher frequencies are caused by thyristors switching. Figure 17 show the spectrum of PCC voltage ( Figure 16) at one of the operating points, where switching ripples are almost fully eliminated, due to the interleaved PWM scheme. Switching logic restrictions cause modulation errors in the phase voltages. These errors are the highest in the range of the modulation index around 1/3 and 2/3. Due to this fact, the unbalancing of the DC-link voltages is around 1% in that case. This level of error is acceptable and does not reduce the PCC voltage range and the modulation accuracy.

Analysis in the Frequency Domain
Since higher harmonics in the PCC voltage have a negative impact on devices connected to the grid, or can even cause microgrid system instability [42], it is important to shape accordingly the voltage spectrum of the converter, whose purpose is grid emulation. Figures 14-17 show two representative examples of voltage time-domain transients and their spectrum obtained for the designed system. In Figure 15, the dominant higher frequencies are caused by thyristors switching. Figure 17 show the spectrum of PCC voltage ( Figure 16) at one of the operating points, where switching ripples are almost fully eliminated, due to the interleaved PWM scheme.
nected to the grid, or can even cause microgrid system instability [42], it is important to shape accordingly the voltage spectrum of the converter, whose purpose is grid emulation. Figures 14-17 show two representative examples of voltage time-domain transients and their spectrum obtained for the designed system. In Figure 15, the dominant higher frequencies are caused by thyristors switching. Figure 17 show the spectrum of PCC voltage ( Figure 16) at one of the operating points, where switching ripples are almost fully eliminated, due to the interleaved PWM scheme.   nected to the grid, or can even cause microgrid system instability [42], it is important to shape accordingly the voltage spectrum of the converter, whose purpose is grid emulation. Figures 14-17 show two representative examples of voltage time-domain transients and their spectrum obtained for the designed system. In Figure 15, the dominant higher frequencies are caused by thyristors switching. Figure 17 show the spectrum of PCC voltage ( Figure 16) at one of the operating points, where switching ripples are almost fully eliminated, due to the interleaved PWM scheme.

Steady-State Operation
In Figure 18, a time-domain transient of the PCC voltage is shown. A very low level of voltage ripples, i.e., 18 Vp-p, was obtained, due to the regular distribution of carrier signals of the voltage modulator and also the perfect balancing of the phase currents ( Figures  19 and 20). The currents have the same amplitudes and shape, which is difficult to obtain, considering the switching logic restrictions impacting on the phase voltages in every modulation period of the DC/DC power converter.

Steady-State Operation
In Figure 18, a time-domain transient of the PCC voltage is shown. A very low level of voltage ripples, i.e., 18 Vp-p, was obtained, due to the regular distribution of carrier signals of the voltage modulator and also the perfect balancing of the phase currents ( Figures  19 and 20). The currents have the same amplitudes and shape, which is difficult to obtain, considering the switching logic restrictions impacting on the phase voltages in every modulation period of the DC/DC power converter. In Figure 18, a time-domain transient of the PCC voltage is shown. A very low level of voltage ripples, i.e., 18 V p-p , was obtained, due to the regular distribution of carrier signals of the voltage modulator and also the perfect balancing of the phase currents (Figures 19 and 20). The currents have the same amplitudes and shape, which is difficult to obtain, considering the switching logic restrictions impacting on the phase voltages in every modulation period of the DC/DC power converter.
In Figure 18, a time-domain transient of the PCC voltage is shown. A very low level of voltage ripples, i.e., 18 Vp-p, was obtained, due to the regular distribution of carrier signals of the voltage modulator and also the perfect balancing of the phase currents ( Figures  19 and 20). The currents have the same amplitudes and shape, which is difficult to obtain, considering the switching logic restrictions impacting on the phase voltages in every modulation period of the DC/DC power converter.  In Figure 18, a time-domain transient of the PCC voltage is shown. A very low level of voltage ripples, i.e., 18 Vp-p, was obtained, due to the regular distribution of carrier signals of the voltage modulator and also the perfect balancing of the phase currents ( Figures  19 and 20). The currents have the same amplitudes and shape, which is difficult to obtain, considering the switching logic restrictions impacting on the phase voltages in every modulation period of the DC/DC power converter.

Change of Reference Voltage Modulation Index
To emulate various grid events, it is necessary to be able to control fast voltage changes, [43]. Figure 21 shows the transient of the PCC voltage during a step change of the modulation index. The time constant of the voltage control is mainly determined by the output circuits (chokes and RC filter). The slew rate of the reference signal must be adjusted so that a maximum acceptable voltage overshoot level is not exceeded, and so that grid connected devices are not damaged.

Change of Reference Voltage Modulation Index
To emulate various grid events, it is necessary to be able to control fast voltage changes, [43]. Figure 21 shows the transient of the PCC voltage during a step change of the modulation index. The time constant of the voltage control is mainly determined by the output circuits (chokes and RC filter). The slew rate of the reference signal must be adjusted so that a maximum acceptable voltage overshoot level is not exceeded, and so that grid connected devices are not damaged.
To emulate various grid events, it is necessary to be able to control fast voltage changes, [43]. Figure 21 shows the transient of the PCC voltage during a step change of the modulation index. The time constant of the voltage control is mainly determined by the output circuits (chokes and RC filter). The slew rate of the reference signal must be adjusted so that a maximum acceptable voltage overshoot level is not exceeded, and so that grid connected devices are not damaged. Step change of PCC voltage.

Load Change
For grid emulators, the most demanding test is an emergency shutdown of a device connected to the grid. Figure 22 shows the currents of the three-phase choke during a rapid change of the load current. Step change of PCC voltage.

Load Change
For grid emulators, the most demanding test is an emergency shutdown of a device connected to the grid. Figure 22 shows the currents of the three-phase choke during a rapid change of the load current.
To emulate various grid events, it is necessary to be able to control fast voltage changes, [43]. Figure 21 shows the transient of the PCC voltage during a step change of the modulation index. The time constant of the voltage control is mainly determined by the output circuits (chokes and RC filter). The slew rate of the reference signal must be adjusted so that a maximum acceptable voltage overshoot level is not exceeded, and so that grid connected devices are not damaged. Step change of PCC voltage.

Load Change
For grid emulators, the most demanding test is an emergency shutdown of a device connected to the grid. Figure 22 shows the currents of the three-phase choke during a rapid change of the load current. From the grid emulation perspective, the most important aspect is to avoid a converter trip due to overvoltage of the DC-link and also to avoid a high transient of the current, which was obtained in the presented system.

Multiphase DC/DC Converter Control Issues
As mentioned in the introduction to this chapter, there are some issues related to the multiphase DC/DC converter topology, making its control relatively complex. The most important of those issues are related to system parameter uncertainty and switching logic restrictions. In Figure 23, the converter phase currents are shown during voltage modulation in the range that is highly affected by switching logic. It is visible that the currents are permanently unbalanced due to the phase voltage modulation error. Owing to this, the margin to the overcurrent threshold is lower, and there is a risk of converter trip during dynamic states, e.g., a rapid change of DUT current. For this reason, it is important to design an appropriate control to ensure balanced currents [38]. In the presented example, the phase current controller was enabled at the time instant 23.2 s, equalizing the DCcomponent of the currents.
To provide a stable system operation, NPC power converters require the balancing of the DC-link voltage. A respective model of the active rectifier is needed. Figure 24 shows the DC-link voltages during converter operation with a disabled function to balance the DC-link voltages; the difference between these voltages is increased, which can result in tripping the converter. At the time instant 20.7 s, a controller of neutral point potential of the DC-link was activated. Then, in 0.2 s the DC-link voltages were balanced to the level defined by the controller's hysteresis. This hysteresis is equal to 40 V and must be higher than the expected DC-link voltage ripples.
As mentioned in the introduction to this chapter, there are some issues related to the multiphase DC/DC converter topology, making its control relatively complex. The most important of those issues are related to system parameter uncertainty and switching logic restrictions. In Figure 23, the converter phase currents are shown during voltage modulation in the range that is highly affected by switching logic. It is visible that the currents are permanently unbalanced due to the phase voltage modulation error. Owing to this, the margin to the overcurrent threshold is lower, and there is a risk of converter trip during dynamic states, e.g., a rapid change of DUT current. For this reason, it is important to design an appropriate control to ensure balanced currents [38]. In the presented example, the phase current controller was enabled at the time instant 23.2 s, equalizing the DCcomponent of the currents. To provide a stable system operation, NPC power converters require the balancing of the DC-link voltage. A respective model of the active rectifier is needed. Figure 24 shows the DC-link voltages during converter operation with a disabled function to balance the DC-link voltages; the difference between these voltages is increased, which can result in tripping the converter. At the time instant 20.7 s, a controller of neutral point potential of the DC-link was activated. Then, in 0.2 s the DC-link voltages were balanced to the level defined by the controller's hysteresis. This hysteresis is equal to 40 V and must be higher than the expected DC-link voltage ripples.

Discussion
In this paper, the concept of a power electronics DC-grid simulator, designed to test medium voltage DC-grid-connected devices, such as PV panels, storage systems, and DC/AC converters used for general purposes, was presented. To emulate the DC-grid, a controllable DC-voltage source was designed. It allowed simulating the bidirectional energy flow between tested devices and the main electrical system. The main investigation was related to the control validation and performance evaluation of the DC/DC multiphase converter.
The presented approach of HiL simulations assumes a plant model optimization in terms of complexity; contrary to the DC/DC converter, whose detailed simulation was the main purpose of this study, the active rectifier was modelled in a simplified manner. At the same time, all the important issues observed in a real system, such as DC-link voltage

Discussion
In this paper, the concept of a power electronics DC-grid simulator, designed to test medium voltage DC-grid-connected devices, such as PV panels, storage systems, and DC/AC converters used for general purposes, was presented. To emulate the DC-grid, a controllable DC-voltage source was designed. It allowed simulating the bidirectional energy flow between tested devices and the main electrical system. The main investigation was related to the control validation and performance evaluation of the DC/DC multiphase converter.