Modeling of Average Current in Ideal and Non-Ideal Boost and Synchronous Boost Converters Modeling of Average Current in Ideal and Non-Ideal Boost and Synchronous Boost Converters

: This paper provides a modeling approach for average current control (ACC) operating in open-loop conﬁguration. The converters chosen are non-ideal boost and synchronous boost converters operating in continuous conduction mode (CCM). Initially, these converters are mathematically modeled considering all the non-idealities using volt-sec and amp-sec balance equations and simulated using MATLAB and Simulink. The open-loop transfer function of the switch current or inductor current (G id ) to the duty ratio is derived using the state space averaging (SSA) technique and analyzed using MATLAB/Simulink. It is observed that the G id of the converters is highly stable in open loop. A larger magnitude resonance is observed in ideal boost and synchronous boost converters than the non-ideal converters. However, the low frequency gain and the crossover frequency remained the same. With the increase in the load resistance, higher resonance and lower low frequency gain is observed in non-ideal boost and non-ideal boost synchronous boost converters. The derived transfer function is validated against the standard switch model using LTSpice software. Abstract: This paper provides a modeling approach for average current control (ACC) operating in open-loop configuration. The converters chosen are non-ideal boost and synchronous boost converters operating in continuous conduction mode (CCM). Initially, these converters are mathematically modeled considering all the non-idealities using volt-sec and amp-sec balance equations and simulated using MATLAB and Simulink. The open-loop transfer function of the switch current or inductor current (G id ) to the duty ratio is derived using the state space averaging (SSA) technique and analyzed using MATLAB/Simulink. It is observed that the G id of the converters is highly stable in open loop. A larger magnitude resonance is observed in ideal boost and synchronous boost converters than the non-ideal converters. However, the low frequency gain and the crossover frequency remained the same. With the increase in the load resistance, higher resonance and lower low frequency gain is observed in non-ideal boost and non-ideal boost synchronous boost converters. The derived transfer function is validated against the standard switch model using LTSpice software.


Introduction
ACC is one of the popular current control techniques employed in power factor correction (PFC) circuits. In ACC, the transfer function of G id is mathematically modeled using various control techniques such as small signal analysis and state space averaging (SSA), etc., and its features such as stability, cut-off frequency, etc., in open loop are analyzed. Although ACC cannot provide quick control, it offers high noise immunity. Figure 1 shows an open-loop ACC for a non-ideal DC-DC converter.

Introduction
ACC is one of the popular current control techniques employed in power factor correction (PFC) circuits. In ACC, the transfer function of Gid is mathematically modeled using various control techniques such as small signal analysis and state space averaging (SSA), etc., and its features such as stability, cut-off frequency, etc., in open loop are analyzed. Although ACC cannot provide quick control, it offers high noise immunity. Figure  1 shows an open-loop ACC for a non-ideal DC-DC converter.   In the past, several attempts were made to determine the G id for different converters operating in CCM and DCM operations. ACC for an ideal boost converter was determined by selecting an appropriate controller, shown in [1], based on small signal modeling (SSM) approach for CCM. The non-idealities such as the switch resistance and equivalent series resistances (ESR) of the inductor and capacitor were not considered during ACC modeling.
As the switching frequency (f s ) increases, the overall converter size decreases. In [2], ACC for a buck converter operating in CCM is presented for different frequencies, namely wide frequency (WF), high frequency (HF), and low frequency considering a single loop as shown in Figure 1. The transfer function was derived using the SSM approach. The presence of ESRs plays a vital role in the WF and LF ranges. From simulation and experimental results, it was noted that the WF transfer function is of second order and has a zero. The zero frequency was lesser than that of the complex poles. The HF transfer function was first order due to a pole zero cancellation. These dynamics were studied for a non-ideal buck converter in CCM.
In [3], a comparative analysis of various control techniques for achieving low total harmonic distortion (THD) and high power factor (PF) is shown. Some of the techniques for increasing the PF are peak current mode (PCM) control, average current control (ACC), hysteresis control, borderline control, and fuzzy logic. It was concluded that to obtain a high PF and low THD, fuzzy controllers are best-suited. The traditional PI controller provided a PF of around 0.98, whereas the fuzzy controller provided a PF of 0.99. The closed control was achieved for the boost converter topology operating in CCM. However, the modeling of the converter under an open and closed loop for ideal and non-ideal conditions was not discussed.
In [4,5], a new technique called circuit averaging is introduced to analyze G vd (perturbed output voltage to duty cycle) without deriving the actual transfer function using LTSpice software. This method provides a shorter computation time and lesser modeling effort. The bode plots derived using SSA from MATLAB/Simulink and circuit averaging from LTSpice software matched perfectly. However, the ACC for the converters was not proposed using circuit averaging techniques.
In [6], ACC for boost converter operating in CCM using SSM is modeled and simulated for two conditions of the load, namely resistive load and current sink. The zero frequency decreased by a factor of two and the damping decreased to 14% in the case of a current sink load. However, no comments on the low frequency gain were provided. The behavior of the synchronous boost converter under such conditions was not studied.
ACC is mainly used for PFC in DC-DC converters in order to make the output voltage from the rectifier in phase with the output current. To achieve this, the rectifier should consider the DC-DC converter as a resistive load. An application of ACC using a boost converter operating in CCM is presented in [7]. The power factor was greater than 0.9 for 120 V and 230 V. Though ACC was used, the modeling and comparative analyses of boost and synchronous boost converters considering the non-idealities were not shown.
In [8], mathematical modeling for transformerless DC-DC converters is presented and simulated using MATLAB/Simulink. The converters were modeled using 'commonly used blocks' and analyzed by deriving the volt-sec and amp-sec balance equations. This type of modeling provided both the transient and steady-state responses. The converters that were modeled were buck, boost, buck-boost, and cuk operating in CCM under ideal conditions. In [9], similar converters along with SEPIC operating in CCM are modeled; however, 'Mux' and 'fcn' blocks were used instead of 'commonly used blocks'. Along with DC-DC converters, a controlled three-phase rectifier was modeled considering an inductive load.
The modeling for isolated DC-DC converters such as ideal flyback and forward converter was performed and simulated using MATLAB/Simulink [10]. The closed-loop modeling of the converters was performed using PI controllers. It was concluded that the flyback converter for the selected specifications was better-suited than the forward converter considering the response time. The ideal flyback converter showed lesser (a) duty ratio and (b) filter inductance and, hence, the conduction losses were reduced.
Modeling of DC-DC converters is extremely important to understand the dynamics of the converter and design inductor and capacitor. The steady-state modeling of DC-Energies 2021, 14, 5158 3 of 17 DC converters was simulated using MATLAB/Simulink. Three different approaches for modeling buck, boost and buck-boost converters were considered. In practice, the DC-DC converters possess various parameters such as diode drop (V d ), MOSFET drop (R sw ), and ESRs of inductor and capacitor (R L and R c , respectively), which in turn cause a decrease in the output voltage. The behavior of converters changes when modeled considering non-idealities. Mathematical modeling considering the non-ideality (inductor ESR) for these converters was investigated. The DC transfer functions for the converters were also derived using the state space averaging approach [11].
In [12], the transfer functions for the constant voltage operation (G vd ) for ideal buck, boost, and buck-boost converters operating in CCM are derived using various methods, namely SSM, SSA, and circuit averaging techniques. It was shown that the ideal boost and buck-boost converters were unstable in open-loop mode due to the presence of right-halfplane (RHP) zeroes. In achieving closed-loop control in DC-DC converters, the design of controllers plays an extremely critical role, especially during phase reversal. The various steps to be taken while designing a controller are shown in [13].
The primary aim of this paper w to identify the optimal choice of DC-DC converters between boost and synchronous boost for ACC in open loop. Since the converters designed are for similar output voltage and current ratings, their performances were compared. The G id for ideal and non-ideal boost converters was derived using state space averaging technique and was compared with that of synchronous boost converters. The behavior in terms of low frequency gain, resonant frequency, and crossover frequency though the modeling approach is studied in this paper. Increased low frequency gain is one of the important features of using a non-ideal synchronous boost converter. This feature, in turn, provides an improved steady state response compared to the non-ideal boost converter.
In Sections 2 and 3, mathematical models for the non-ideal converters assuming CCM operation are derived using volt-sec and amp-sec balance equations and modeled using MATLAB/Simulink software. Section 4 shows the derivation of G id using the SSA technique for the converters. The specifications of the converters are shown in Section 5. Results and discussions of the analyses of G id for the mentioned converters are provided in Section 6. Figure 2 shows a schematic of an ideal boost converter operating in CCM. The various drops across the switch S (MOSFET), diode D, and various ESRs are ignored. When the switch S is closed, the inductor is charged as it is connected in series with the supply voltage. The diode becomes reverse-biased and the capacitor becomes charged due to the load current.

Mathematical Model for Boost Converter
converter considering the response time. The ideal flyback converter showed lesser (a) duty ratio and (b) filter inductance and, hence, the conduction losses were reduced.
Modeling of DC-DC converters is extremely important to understand the dynamics of the converter and design inductor and capacitor. The steady-state modeling of DC-DC converters was simulated using MATLAB/Simulink. Three different approaches for modeling buck, boost and buck-boost converters were considered. In practice, the DC-DC converters possess various parameters such as diode drop (Vd), MOSFET drop (Rsw), and ESRs of inductor and capacitor (RL and Rc, respectively), which in turn cause a decrease in the output voltage. The behavior of converters changes when modeled considering non-idealities. Mathematical modeling considering the non-ideality (inductor ESR) for these converters was investigated. The DC transfer functions for the converters were also derived using the state space averaging approach [11].
In [12], the transfer functions for the constant voltage operation (Gvd) for ideal buck, boost, and buck-boost converters operating in CCM are derived using various methods, namely SSM, SSA, and circuit averaging techniques. It was shown that the ideal boost and buck-boost converters were unstable in open-loop mode due to the presence of right-halfplane (RHP) zeroes. In achieving closed-loop control in DC-DC converters, the design of controllers plays an extremely critical role, especially during phase reversal. The various steps to be taken while designing a controller are shown in [13].
The primary aim of this paper w to identify the optimal choice of DC-DC converters between boost and synchronous boost for ACC in open loop. Since the converters designed are for similar output voltage and current ratings, their performances were compared. The Gid for ideal and non-ideal boost converters was derived using state space averaging technique and was compared with that of synchronous boost converters. The behavior in terms of low frequency gain, resonant frequency, and crossover frequency though the modeling approach is studied in this paper. Increased low frequency gain is one of the important features of using a non-ideal synchronous boost converter. This feature, in turn, provides an improved steady state response compared to the non-ideal boost converter.
In Sections 2 and 3, mathematical models for the non-ideal converters assuming CCM operation are derived using volt-sec and amp-sec balance equations and modeled using MATLAB/Simulink software. Section 4 shows the derivation of Gid using the SSA technique for the converters. The specifications of the converters are shown in Section 5. Results and discussions of the analyses of Gid for the mentioned converters are provided in Section 6. Figure 2 shows a schematic of an ideal boost converter operating in CCM. The various drops across the switch S (MOSFET), diode D, and various ESRs are ignored. When the switch S is closed, the inductor is charged as it is connected in series with the supply voltage. The diode becomes reverse-biased and the capacitor becomes charged due to the load current. When the switch S is opened, the charged inductor changes its polarity resulting in the diode becoming forward-biased. Similarly, the previous charged capacitor becomes discharged through the load resistor R.

Mathematical Model for Boost Converter
The mathematical model for the converter is shown in [9].
The working of the non-ideal boost converter is similar to that of the ideal converter. However, the drops associated with the switch, diode and the ESRs of inductor and capacitor are considered in the non-ideal condition. Figure 3 shows a schematic of a non-ideal boost converter operating in CCM.
the diode becoming forward-biased. Similarly, the previous charged capacitor beco discharged through the load resistor R. The mathematical model for the converter is shown in [9].
The working of the non-ideal boost converter is similar to that of the ideal conve However, the drops associated with the switch, diode and the ESRs of inductor an pacitor are considered in the non-ideal condition. Figure 3 shows a schematic of a non-ideal boost converter operating in CCM. The operation of the converter involves two stages of the switch: (a) switch OFF (b) switch ON When the switch MOSFET1 is closed, where VL is the voltage drop across the inductor (V), Vg is the supply voltage (V), iL i current in the inductor (A), RL is the equivalent series resistance (ESR) of the inductor Rsw is the switch resistance (Ω), ic is the capacitor current (A), Vc is the voltage acros capacitor (V), R is the load resistance (Ω), Rc is the capacitor ESR (Ω), and V0 is the ou voltage (V).
When the switch MOSFET1 is opened and MOSFET2 is closed, Where Vd is the diode drop (V) and Rd is dynamic resistance of the diode (Ω).
The mathematical model for the converter can be obtained by combining (3) an with (4) and (6).
where s is the instantaneous duty cycle. When the switch MOSFET1 is closed, where V L is the voltage drop across the inductor (V), V g is the supply voltage (V), i L is the current in the inductor (A), R L is the equivalent series resistance (ESR) of the inductor (Ω), R sw is the switch resistance (Ω), i c is the capacitor current (A), V c is the voltage across the capacitor (V), R is the load resistance (Ω), R c is the capacitor ESR (Ω), and V 0 is the output voltage (V). When the switch MOSFET1 is opened and MOSFET2 is closed, where V d is the diode drop (V) and R d is dynamic resistance of the diode (Ω). The mathematical model for the converter can be obtained by combining (3) and (5) with (4) and (6).
where s is the instantaneous duty cycle.
Equations (7) and (8) were modeled using MATLAB/Simulink and the dynamics of i L and V c were captured. Figure 4 shows an ideal synchronous boost converter operating in CCM. By comparing Figures 1 and 3, it is noted that in Figure 3, diode D is replaced by the MOSFET S2. The drop across MOSFET would be lesser than that of the diode. This provides a lower duty ratio to achieve the specified output voltage. Such converters are referred to as point-of-load (POL) converters and are used as power supplies for micro-controllers and processors.  Figure 4 shows an ideal synchronous boost converter operating in CCM. By comparing Figures 1 and 3, it is noted that in Figure 3, diode D is replaced by the MOSFET S2. The drop across MOSFET would be lesser than that of the diode. This provides a lower duty ratio to achieve the specified output voltage. Such converters are referred to as pointof-load (POL) converters and are used as power supplies for micro-controllers and processors. Initially, the switch S1 is closed and S2 is open. The inductor L is charged due to the supply current. Similarly, the capacitor is also charged due to the load current. At this point of time, switch S1 is opened and S2 is closed.

Mathematical Model for Synchronous Boost Converter
The charged inductor changes the polarity and the current iL flows in switch S2. The charged capacitor is discharged to the resistive load R.
The mathematical model for the converter is shown below.
It can be observed that the equations are similar to that of ideal boost converter. However, in order to observe the difference between the converter, non-idealities have to be considered, which is presented in this paper. Figure 5 shows a non-ideal synchronous boost converter operating in CCM. Initially, the switch S1 is closed and S2 is open. The inductor L is charged due to the supply current. Similarly, the capacitor is also charged due to the load current. At this point of time, switch S1 is opened and S2 is closed.
The charged inductor changes the polarity and the current i L flows in switch S2. The charged capacitor is discharged to the resistive load R.
The mathematical model for the converter is shown below.
It can be observed that the equations are similar to that of ideal boost converter. However, in order to observe the difference between the converter, non-idealities have to be considered, which is presented in this paper. Figure 5 shows a non-ideal synchronous boost converter operating in CCM.
ing Figures 1 and 3, it is noted that in Figure 3, diode D is replaced by the MOSFET S2. The drop across MOSFET would be lesser than that of the diode. This provides a lower duty ratio to achieve the specified output voltage. Such converters are referred to as pointof-load (POL) converters and are used as power supplies for micro-controllers and processors. Initially, the switch S1 is closed and S2 is open. The inductor L is charged due to the supply current. Similarly, the capacitor is also charged due to the load current. At this point of time, switch S1 is opened and S2 is closed.
The charged inductor changes the polarity and the current iL flows in switch S2. The charged capacitor is discharged to the resistive load R.
The mathematical model for the converter is shown below.
It can be observed that the equations are similar to that of ideal boost converter. However, in order to observe the difference between the converter, non-idealities have to be considered, which is presented in this paper. Figure 5 shows a non-ideal synchronous boost converter operating in CCM. When switch MOSFET 1 is closed, When switch MOSFET 1 is opened and MOSFET 2 is closed, The mathematical model for the converter can be obtained by combining (11) with (13) and (12) where R sw1 and R sw2 (Ω) are the resistances of MOSFET 1 and 2, respectively.

Average Current Modeling of Non-Ideal Boost Converter
As shown above, the operation of the converters can be described when the switch is closed and later opened. The state variables were selected as i L , V c , and the output as i L . With respect to Figure 3, the output voltage V 0 can be expressed as Substituting (11) in (12), Substituting (18) in (11), The state-space representation is defined as The state-space matrices were constructed and are shown below.
When the switch is closed, From the circuit, Substituting (18) in (19), Hence, Averaging the equations, where the input is where (1) is and (1) is The state matrix E = 0 as it has no coefficient related to matrix U.

Average Current Modeling of Non-Ideal Synchronous Boost Converter
As shown for a non-ideal boost converter, the state space matrices A, B, C, and E were derived and are shown below.
where (1) is where (2) is (s + (R sw D + R sw2 D + RR c D /(R + R c ))/L) * (s + 1/C(R + R c )) (41) Table 1 shows the specifications of the converters.  Switching Frequency, f s 500 kHz 7 show the variation in i L and V c for non-ideal boost and synchronous boost converters. As observed from Figure 6, the maximum values of V 0 and i L were around 16 V and 12.5 A, respectively. However, the steady-state values were 12 V and 2.6 A, respectively. Similar observations can be observed in Figure 7.

Figures 6 and 7 show the variation in iL and
Vc for non-ideal boost and synchronou boost converters. As observed from Figure 6, the maximum values of V0 and iL we around 16 V and 12.5 A, respectively. However, the steady-state values were 12 V and 2 A, respectively. Similar observations can be observed in Figure 7.   Figure 8 shows the frequency response of G id for ideal and non-ideal boost converters. The ideal converter shows higher resonance than the non-ideal converter. However, no major change in low frequency gain and the cut-off frequency is seen. Figure 9 shows frequency response of G id for ideal and non-ideal synchronous boost converters. Higher resonance is observed in the non-ideal synchronous boost converter. However, no change in the cut off frequency is observed. Figure 10 shows frequency response of G id for non-ideal boost and synchronous converters. The non-ideal synchronous boost converter shows higher resonance than the other converter. However, no change is seen in the crossover frequency. Figure 11 shows the open loop poles and zeros of G id for ideal and non-ideal boost converters. It can be observed that the poles in the non-ideal converter are separated from the right-hand side (RHS) of the s-plane due to which they possess more stability.    Figure 8 shows the frequency response of Gid for ideal and non-ideal boost conve The ideal converter shows higher resonance than the non-ideal converter. Howeve major change in low frequency gain and the cut-off frequency is seen.   Figure 9 shows frequency response of Gid for ideal and non-ideal synchro converters. Higher resonance is observed in the non-ideal synchronous boos However, no change in the cut off frequency is observed. In Figure 12, the root loci for the same converters were analyzed by making R C = 0. It was observed that the zeros of the converters superposed.
The root loci of the Ideal and non-ideal synchronous boost converters were analyzed. Figure 13 shows the placement of the poles and zeros of G id . It was observed that the non-ideal converter was more stable than the ideal converter. A similar observation was made on the synchronous boost converters shown in Figure 14. Changes in R c had a negligible effect on the position of poles and zeros.  Figure 9 shows frequency response of Gid for ideal and non-ideal synchronous boos converters. Higher resonance is observed in the non-ideal synchronous boost converte However, no change in the cut off frequency is observed.  Figure 10 shows frequency response of Gid for non-ideal boost and synchronous con verters. The non-ideal synchronous boost converter shows higher resonance than th other converter. However, no change is seen in the crossover frequency.  Figure 11 shows the open loop poles and zeros of Gid for ideal and non-ideal b converters. It can be observed that the poles in the non-ideal converter are separated the right-hand side (RHS) of the s-plane due to which they possess more stability. Figure 10. Frequency response of G id for non-ideal boost and synchronous converters. Table 2 shows the features of the converters in terms of Gain Margin (GM), Phase Margin (PM) and Cross Over frequency (f c )  Figure 10. Frequency response of Gid. Figure 11 shows the open loop poles and zeros of Gid for ideal and non-ideal boost converters. It can be observed that the poles in the non-ideal converter are separated from the right-hand side (RHS) of the s-plane due to which they possess more stability. Figure 11. Root loci of the Gid.
In Figure 12, the root loci for the same converters were analyzed by making RC = 0. It was observed that the zeros of the converters superposed. The root loci of the Ideal and non-ideal synchronous boost converters were analyzed. Figure 13 shows the placement of the poles and zeros of Gid. It was observed that the nonideal converter was more stable than the ideal converter. A similar observation was made on the synchronous boost converters shown in Figure 14. Changes in Rc had a negligible effect on the position of poles and zeros.  The root loci of the Ideal and non-ideal synchronous boost converters were analyzed. Figure 13 shows the placement of the poles and zeros of Gid. It was observed that the nonideal converter was more stable than the ideal converter. A similar observation was made on the synchronous boost converters shown in Figure 14. Changes in Rc had a negligible effect on the position of poles and zeros.

Validation
The derived transfer function was validated using the switch models provided in the LTSpice software tool. Figure 15 shows the switch model used for non-ideal boost and synchronous boost converters.

Validation
The derived transfer function was validated using the switch models provided in the LTSpice software tool. Figure 15 shows the switch model used for non-ideal boost and synchronous boost converters. Figure 16 shows the G id obtained from the switch model. It is noted that Figures 15 and 16 show a perfect match in terms of the low frequency gain, phase margin (PM), and crossover frequency. The low frequency gain was 22 dB, PM was 424 kHz, and resonant frequency was 9 kHz. non-ideal Synchronous Boost Infinity 90.3 425

Validation
The derived transfer function was validated using the switch models provided in the LTSpice software tool. Figure 15 shows the switch model used for non-ideal boost and synchronous boost converters.   In Figure 17, R varies from 12 to 36 Ω and the Gid can be observed for a non-ideal boost converter. It is noted that the highest load resistance provided the lowest frequency gain and the highest resonant frequency.  In Figure 17, R varies from 12 to 36 Ω and the G id can be observed for a non-ideal boost converter. It is noted that the highest load resistance provided the lowest frequency gain and the highest resonant frequency. Figures 18 and 19 show the effect of G id on varying L and C values. It is inferred that as the value of L increases, the resonant frequency shifts toward the lower frequency range and the resonant frequency gradually decreases. The lowest L provided the highest cut-off frequency. However, when C increased, the cut-off frequency remained the same. Figure 20 shows the G id for a synchronous boost converter. By comparing Figures 10 and 20, the low frequency gain, PM and the cut-off frequency perfectly match. The low frequency gain was 22.1 dB, PM was 90.3 • , cut-off frequency was 415 kHz, and resonant frequency was 9.38 kHz.
In Figures 21 and 22, R and L vary and the effect on G id was studied on a non-ideal synchronous boost converter. Similar observations to that of the non-ideal boost converter were made. Figure 23 shows the G id for an ideal boost converter. The G id shown in Figure 23 perfectly matches that of Figure 8 in terms of the low frequency gain, PM, crossover frequency, and resonant frequency. The low frequency gain was 22.9 dB, PM was 90.3 • , crossover frequency was 424 kHz, and resonant frequency was 9.12 kHz. In Figure 17, R varies from 12 to 36 Ω and the Gid can be observed for a non-ideal boost converter. It is noted that the highest load resistance provided the lowest frequency gain and the highest resonant frequency.  Figures 18 and 19 show the effect of Gid on varying L and C values. It is inferred that as the value of L increases, the resonant frequency shifts toward the lower frequency range and the resonant frequency gradually decreases. The lowest L provided the highest cutoff frequency. However, when C increased, the cut-off frequency remained the same. boost converter. It is noted that the highest load resistance provided the lowest frequency gain and the highest resonant frequency.  Figures 18 and 19 show the effect of Gid on varying L and C values. It is inferred that as the value of L increases, the resonant frequency shifts toward the lower frequency range and the resonant frequency gradually decreases. The lowest L provided the highest cutoff frequency. However, when C increased, the cut-off frequency remained the same.   Figure 20 shows the Gid for a synchronous boost converter. By comparing Figures 10  and 20, the low frequency gain, PM and the cut-off frequency perfectly match. The low frequency gain was 22.1 dB, PM was 90.3°, cut-off frequency was 415 kHz, and resonant frequency was 9.38 kHz.   Figure 20 shows the Gid for a synchronous boost converter. By comparing Figures 10  and 20, the low frequency gain, PM and the cut-off frequency perfectly match. The low frequency gain was 22.1 dB, PM was 90.3°, cut-off frequency was 415 kHz, and resonant frequency was 9.38 kHz. In Figures 21 and 22, R and L vary and the effect on Gid was studied on a non-ideal synchronous boost converter. Similar observations to that of the non-ideal boost converter were made.   Figure 23 shows the Gid for an ideal boost converter. The Gid shown in Figure 23 perfectly matches that of Figure 8 in terms of the low frequency gain, PM, crossover frequency, and resonant frequency. The low frequency gain was 22.9 dB, PM was 90.3°, cross-   Figure 23 shows the Gid for an ideal boost converter. The Gid shown in Figure 23 perfectly matches that of Figure 8 in terms of the low frequency gain, PM, crossover frequency, and resonant frequency. The low frequency gain was 22.9 dB, PM was 90.3°, cross-   Figure 23 shows the Gid for an ideal boost converter. The Gid shown in Figure 23 perfectly matches that of Figure 8 in terms of the low frequency gain, PM, crossover frequency, and resonant frequency. The low frequency gain was 22.9 dB, PM was 90.3°, crossover frequency was 424 kHz, and resonant frequency was 9.12 kHz.

Conclusions
The main aim of this work was to compare the differences between non-ideal boost and non-ideal synchronous boost converters for ACC. In this regard, a study on non-ideal boost and non-ideal synchronous boost converters operating in CCM was carried out. These converters were modeled using volt-sec and amp-sec balance equations. A simulation was performed using MATLAB/Simulink to observe the transients in the currents and voltages. Using a 'Mux' and a 'fcn' block, simulation was performed using a fixed-type solver. Using the SSA approach, G id was derived for the converters. The dynamics of these converters under various conditions were studied. It was found that the converters were highly stable in open loop. The G id for the non-ideal synchronous boost converter showed higher resonance than that for the non-ideal boost converter. However, the crossover frequency remained the same. The G id of the ideal boost and synchronous boost converters remained the same. With R c = 0, the zeros of the ideal and non-ideal boost converters overlapped. However, this effect was not observed in synchronous converters.