Control Strategy of 1 kV Hybrid Active Power Filter for Mining Applications

: The paper presents a shunt hybrid active power ﬁlter for 1 kV mining applications in conﬁguration with a single-tuned passive ﬁlter. The focus is on the method of controlling the ﬁlter, with particular emphasis on the inﬂuence of network voltage distortion and time delays in control on the effectiveness of harmonic reduction, which is one of the most important aspect of power quality. The low-power loss conﬁguration of a hybrid ﬁlter with SiC transistors is shown, as well as the control algorithm which limits the inﬂuence of voltage distortion. Theoretical considerations are veriﬁed by results obtained from simulations and tests of the hybrid active power ﬁlter prototype.


Introduction
Problems related to the power quality (PQ) in distribution grids have been known for many years. However, recently they have become increasingly important. The reason for this is, on the one hand, the dependence of modern society on electricity, and on the other, the increase in the number of loads affecting power quality. The consequence of continuous technological progress in the field of electronics is the increase in the number of power electronic converter-based appliances connected to the grid. Converters in drive systems with AC motors, switching power supplies, drives with brushless DC motors, battery chargers or energy-saving lighting, despite their advantages, deteriorate the power quality. Moreover, the number of low-power appliances using power electronic systems in households is constantly growing, and the number of the power electronic-based drive systems in the industry is increasing. For example, according to [1], the size of the global market of variable frequency drives was valued at 22.5 billion USD in 2019 and is expected to grow at a compound annual growth rate of 6.5% from 2020 to 2027. The use of modern solutions is associated with the deterioration of the PQ. It causes greater variability of disturbances in the distribution grid and limits the possibility of reducing these disturbances at the source side. In industry, an increasing number of technological processes are sensitive to changes in power supply parameters and even slight deviations can cause large economic losses. From the economical point of view, effects of low power quality can be divided into four categories [2,3]: • partial or total loss of one or more processes (e.g., loss of control due to a voltage dip); • poor long-term performance or poor product quality (e.g., employee fatigue due to flicker); • cost increase due to reduction of equipment life leading to premature failure (e.g., overheating of transformers due to harmonics); • increased power losses resulting from distorted voltages and currents.

Analyzed Hybrid Active Power Filter
The main application of the analyzed hybrid active power filter HAPF is the mining industry. The need for operation at a voltage level of 1000 V and limited heat transfer from the explosion-proof housing are the main factors in the selection of the HAPF topology. This solution operates with lower dc link voltage (which allows to reduce power losses) in comparison to active power filters and guarantees better performance compared to passive filters. Most of the currently proposed hybrid active power filter designs adopt a series connection of passive filters and a power electronic converter-based active power filter. The proposed solution is the variant with a single-tuned passive harmonic filter. Although the 5th harmonic is dominant in the electrical grids, a passive filter tuned to the 7th harmonic was used, making this filter smaller and lighter. It has to be noted that by using appropriate control of the power electronic converter in HAPF, it is also possible to ensure high harmonic attenuation rate also for 5th and 11th current harmonics, which will be thoroughly described in Section 3. The connection of the active and passive parts in HAPF enables reducing the rated power of the converter in the active power part. Moreover, the dc link voltage and the voltage class requirements of the inverter transistors and capacitors are also reduced. In the case of use of the APF for the 1 kV electrical grid, the converter dc link voltage should be higher than 1600 V. In case of use of the HAPF solution, the dc link voltage being equal to 400 V is sufficient. Figure 1 shows the connection of the proposed HAPF to the grid and idea of its operation where the i G , i L and i F are the grid current, the load current and the filter current, respectively. Figure 2 shows the detailed topology of the HAPF. There are four functional blocks in it. The first block is a security switchgear with contactors having two features. They connect the converter to the grid through start-up resistors and then connect the converter to the grid directly.
The next block in Figure 2 is the passive filter tuned to the 7th harmonic. It consists of a three-phase choke with an inductance of 4.6 mH and three capacitors with a capacitance of 45 µF. The parameters of the filter have been chosen in such a way as to reduce the fundamental reactive current of passive filter on the one hand and not to increase the size and weight of the inductor on the other. The next block in Figure 2 is the passive filter tuned to the 7th harmonic. It consists of a three-phase choke with an inductance of 4.6 mH and three capacitors with a capacitance of 45 μF. The parameters of the filter have been chosen in such a way as to reduce the fundamental reactive current of passive filter on the one hand and not to increase the size and weight of the inductor on the other. The last blocks inside the HAPF are the power electronic converter with its control system. The power electronic converter is based on three-phase two-level topology. Moreover, thanks to the use of the hybrid structure of the filter, the dc link voltage is relatively low, which is selected as 400 V. This enables the use of transistors with 600 V or 1200 V The next block in Figure 2 is the passive filter tuned to the 7th harmonic. It consists of a three-phase choke with an inductance of 4.6 mH and three capacitors with a capacitance of 45 μF. The parameters of the filter have been chosen in such a way as to reduce the fundamental reactive current of passive filter on the one hand and not to increase the size and weight of the inductor on the other. The last blocks inside the HAPF are the power electronic converter with its control system. The power electronic converter is based on three-phase two-level topology. Moreover, thanks to the use of the hybrid structure of the filter, the dc link voltage is relatively low, which is selected as 400 V. This enables the use of transistors with 600 V or 1200 V The last blocks inside the HAPF are the power electronic converter with its control system. The power electronic converter is based on three-phase two-level topology. Moreover, thanks to the use of the hybrid structure of the filter, the dc link voltage is relatively low, which is selected as 400 V. This enables the use of transistors with 600 V or 1200 V voltage class. This significantly reduces costs and allows for reducing power losses. Since the reduction of generated heat is an important aspect in such applications, SiC transistors with low on-state resistance have been chosen. Detailed information about the converter prototype are provided in Section 6.

Control Algorithm of the Hybrid Active Power Filters (HAPF)
The idea of the operation of the power electronic converter in a hybrid active power filter is based on increasing harmonic attenuation rate γ(jω) defined as [9,10]: where: I Gh (jω) represents the grid current harmonics and I Lh (jω) represents the load current harmonics.
For the parallel passive filter PF, the harmonic attenuation rate γ 1 (jω) is defined as: where: Z PF (jω), Z G (jω)-are impedances of passive filter and the grid respectively. The basic scheme representing the idea of the control of a HAPF is presented in Figure 3a where the power electronic converter is presented as an controlled voltage source v REF . The control system is based on the synchronous reference frame method with feedback and feedforward control, where two control loops are used [40,61]. The first (feedback) control loop CL1 is based on the measurement of the grid currents. In CL1, higher harmonic components are filtered from the grid currents i G and the power electronic converter generates voltage that is proportional to the aforementioned current higher harmonics with gain K (expressed in ohms). For the hybrid active filter with CL1 control loop and gain K, the harmonic attenuation rate γ 2 (jω) is defined as: It can be observed from Figure 3b that using of CL1 control loop with gain K increases the harmonic attenuation rate of the hybrid active power filter in comparison to the passive filter.
The second (feedforward) control loop, which is referred to as CL2, is based on the measurement of load current i L and generation of voltage harmonics which force selected current harmonics to flow through the passive filter PF. Using the CL2 control loop increases the harmonic attenuation rate for selected harmonics γ 3 (jω) as depicted in (4).
where: K h (jω)-represents the bandpass filtering transfer function of the CL2 control loop for a selected harmonic order h [62]. The results of the use of the CL2 control loop are presented in Figure 3b as characteristic of the harmonic attenuation rate γ 3 (where 5th and 11th harmonics are taken into account).
The structure of the control system with both control loops is presented in Figure 4. For synchronization with the grid voltage v G the SOGI-FLL (second-order generalized integrator-frequency locked loop), algorithm [63] has been used. For the CL1 control loop, the transformation of the grid current i G to a coordinate system d,q that rotates with fundamental frequency ω 1 is used. At the next stage, the high pass filters (HPF) are used for rejecting the fundamental frequency signals. For better filtering effect, the transformation to a negative sequence rotating coordinate system can be used, as is presented with dotted line in Figure 4. After that, the required signals are gained with K factor and transformed to stationary coordinate systems α, β. It should be mentioned that this part of control algorithm operates as a closed loop control with the feedback and the value of the gain K is limited because of the possibility of control instability, which is presented in the next section.  (a) (b) Figure 3. Idea of operation of hybrid active power filter HAPF: (a) basic scheme of HAFP; (b) harmonic attenuation rate for: passive filter PF tuned for 7th harmonic (γ1); hybrid active power filter HAPF with control loop CL1, K = 20 (γ2) and hybrid active power filter HAPF with control loops CL1 and CL2, K = 20, CL2 for 5th and 11th harmonics (γ3).
For better filtering effect, the transformation to a negative sequence rotating coordinate system can be used, as is presented with dotted line in Figure 4. After that, the required signals are gained with K factor and transformed to stationary coordinate systems α, β. It should be mentioned that this part of control algorithm operates as a closed loop control with the feedback and the value of the gain K is limited because of the possibility of control instability, which is presented in the next section.   For better filtering effect, the transformation to a negative sequence rotating coordinate system can be used, as is presented with dotted line in Figure 4. After that, the required signals are gained with K factor and transformed to stationary coordinate systems α, β. It should be mentioned that this part of control algorithm operates as a closed loop control with the feedback and the value of the gain K is limited because of the possibility of control instability, which is presented in the next section. Typically, three-phase non-linear loads generate 5th, 7th, 11th, 13th etc. harmonics and for one of them the passive filter PF is tuned. In the CL2 control loop, which is feedforward, the load currents are transformed to the number of coordinate systems that rotate with the selected frequencies related to the harmonic order required to be reduced. The selection of such a harmonic order is done with the omission of the harmonic which the passive filter is tuned to. In the presented hybrid filter, the passive part is tuned to the 7th harmonic.
In the coordinate transformation, the sequence (positive or negative) for selected harmonic should be taken into account. Figure 4 presents CL2 for the 5th, 11th and 13th harmonics where the 5th and 11th harmonics are taken with the negative sequence and 13th is taken with the positive sequence. Additional harmonics can be added by increasing the number of blocks connected in parallel in Figure 4. For each harmonic, low pass filters (LPF) are used to filter current components for the selected frequency. After that, the impedance matrices Z Fh are used for generation a voltage drops on passive filter impedance for the selected harmonic. This will cause the increase of the harmonic attenuation rate for the selected harmonic. After that, the output signals are transformed back to the stationary coordinate system. The CL2 control loop is feedforward open loop control where the time delay is not a critical issue, because this will not lead to operation instability. However, as will be mentioned later, these delays could cause inefficient operation of the CL2 control loop.
For the proper operation of the hybrid active power filter, two more issues are very important. The first is dc link voltage control and the second is reduction of the grid voltage harmonics influence. Due to the fact that for the fundamental harmonic the passive filter operates with the reactive power and the power electronic converter operates as a voltage source, the dc link voltage control is based on generation of fundamental q component of the converter voltage (PI controller in Figure 4). This ensures proper control of the dc link voltage. The level of dc link voltage is lower than the required voltage level in grid-tied converters connected via L or LCL filters (for example the shunt active power filters or active front end converters). This is a result of a series connection of the passive filter and the power electronic converter which forms a hybrid active power filter. The lower level of voltage on the one hand ensures the reduction of power losses in power electronic converter due to the decrease of switching power losses, but on the other hand, a higher level of dc link voltage ensures the operation of HAPF with a higher level of current harmonics and higher K gains.
The second issue is related to the existence of harmonics in the grid voltage that could cause additional current harmonics in the passive part of the hybrid filter. This could be a problem when the passive part of a filter is tuned to the 5th or 7th harmonic because these harmonics are often viewable in distribution power systems. This could result in undesirable current flow between the grid and the hybrid active power filter, caused by series resonance for the selected harmonic. To prevent this, the control system of the converter, which measures the grid voltages, can ensure damping of undesirable currents by direct generation the higher harmonic of the grid voltage in power electronic part of HAPF-v Dα,β . These signals are filtered from the grid voltages v G after the transformation to the synchronous rotating coordinate system and by using HPF filters.

Analysis of Time Delay Influence on Operation of Control System
One of the most important issues in the practical realization of active power filters and hybrid active power filters is the reduction of the time delay in the control system [64][65][66]. The time delay results from digital implementation of the control system and the usage of analogue filters in measurements. The CL1 control loop in HAPF is the closed control loop in which the time delay can cause operational instability. In Figure 5a the harmonic attenuation rates for HAPF with zero time delay and gains K = 20 and K = 40 are presented. As a reference, the harmonic attenuation rate for only the passive filter is shown. The results presented were obtained in Matlab, using a simplified model based on transfer functions. It can be observed that in the frequency range of 0 to 2500 Hz, the harmonic attenuation rate is always lower than zero and higher values of gain K ensure better operation of the HAPF.
Typically, in a microprocessor-based control system, the ADC (analog-to-digital converter) operation is synchronised with PWM (pulse width modulation) signals to prevent the influence of power electronic devices switching on the measurements. The time interval between the analog signals acquisition and setting new values of PWM is intended to perform the required computations (control loops, filtering, protection, communication). If the control algorithm is complex, the code needs to be optimized. It can be mainly assumed that the time for one cycle of computation is equal to the switching period. Additionally, the required PWM signals are generated in the next switching period, so the average time delay for the switching frequency fsw can be defined as: The results presented were obtained in Matlab, using a simplified model based on transfer functions. It can be observed that in the frequency range of 0 to 2500 Hz, the harmonic attenuation rate is always lower than zero and higher values of gain K ensure better operation of the HAPF.
Typically, in a microprocessor-based control system, the ADC (analog-to-digital converter) operation is synchronised with PWM (pulse width modulation) signals to prevent the influence of power electronic devices switching on the measurements. The time interval between the analog signals acquisition and setting new values of PWM is intended to perform the required computations (control loops, filtering, protection, communication). If the control algorithm is complex, the code needs to be optimized. It can be mainly assumed that the time for one cycle of computation is equal to the switching period. Additionally, the required PWM signals are generated in the next switching period, so the average time delay for the switching frequency f sw can be defined as: When this time delay is taken into account, it can cause undesirable operation of the HAPF (Figure 5b). The time delay unexpectedly amplifies the harmonic attenuation rate of the HAPF in the analysed frequency range. This amplification of harmonics depends on the gain K and the time delay T D . The Figure 5b presents the harmonic attenuation rate of the HAPF when the CL1 control loop is applied for K = 40 with different time delays T D . The harmonic attenuation rate is presented for D1: T D = 0 µs, D2: T D = 75 µs (f sw = 20 kHz), D3: T D = 150 µs (f sw = 10 kHz) and D4: T D = 300 µs (f sw = 5 kHz). One can see that harmonic attenuation rates D3 and D4 can gain the value of current harmonics. The maximum value of harmonic attenuation rate increases with the time delay T D and the range of frequencies with positive attenuation rates is shifted towards the passive filter resonant frequency. For the switching frequency of 20 kHz, the HAPF can slightly amplify the harmonics of a frequency range above 1500 Hz.
The operation of the HAPF for time delay T D = 0 µs and T D = 300 µs is shown by current waveforms in Figure 6a,b, respectively. To present these results, the simplified model of the HAPF based on controlled voltage sources has been prepared in Matlab-Simulink. The blue waveform is the grid current i G and the red waveform is the load current i L . When zero time delay is assumed, the HAPF operates accurately. When nonzero time delay is assumed, the amplification of the selected harmonic in the grid current can be observed. Generally, the gain K in the CL1 control loop is limited by the time delay T D in a microprocessor-based control system. When this time delay is taken into account, it can cause undesirable operation of the HAPF (Figure 5b). The time delay unexpectedly amplifies the harmonic attenuation rate of the HAPF in the analysed frequency range. This amplification of harmonics depends on the gain K and the time delay TD. The Figure 5b presents the harmonic attenuation rate of the HAPF when the CL1 control loop is applied for K = 40 with different time delays TD. The harmonic attenuation rate is presented for D1: TD = 0 μs, D2: TD = 75 μs (fsw = 20 kHz), D3: TD = 150 μs (fsw = 10 kHz) and D4: TD = 300 μs (fsw = 5 kHz). One can see that harmonic attenuation rates D3 and D4 can gain the value of current harmonics. The maximum value of harmonic attenuation rate increases with the time delay TD and the range of frequencies with positive attenuation rates is shifted towards the passive filter resonant frequency. For the switching frequency of 20 kHz, the HAPF can slightly amplify the harmonics of a frequency range above 1500 Hz.
The operation of the HAPF for time delay TD = 0 μs and TD = 300 μs is shown by current waveforms in Figure 6a,b, respectively. To present these results, the simplified model of the HAPF based on controlled voltage sources has been prepared in Matlab-Simulink. The blue waveform is the grid current iG and the red waveform is the load current iL. When zero time delay is assumed, the HAPF operates accurately. When non-zero time delay is assumed, the amplification of the selected harmonic in the grid current can be observed. Generally, the gain K in the CL1 control loop is limited by the time delay TD in a microprocessor-based control system. To ensure the small time delay, the execution of the control algorithm is divided into two parts, as shown in Figure 7. Typically, the control algorithm in the microprocessor is executed within one iteration of the interruption connected with PWM signal generation. During this iteration, the following sequence of operation is executed: (1) the acquisition of analog signals, (2) the execution of CL1 algorithm and CL2 algorithm, (3) the execution of additional computations (e.g., protection functions), (4) the setting of required PWM signals. This algorithm is referred to as Alg. 1 in Figure 7. For algorithm Alg.1 the time delay is given in (5). For the reduction of the time delay, another sequence has been proposed, which is referred as Alg. 2 and is shown in Figure 7. The start of the algorithm is at the maximum value of the counter in the PWM subcircuit. Firstly, the measurements of analog signals and CL1 algorithm are executed and then, based on the previous results of the CL2 control loop, the required PWM signals are computed. This procedure reduces the time delay for CL1 to To ensure the small time delay, the execution of the control algorithm is divided into two parts, as shown in Figure 7. Typically, the control algorithm in the microprocessor is executed within one iteration of the interruption connected with PWM signal generation. During this iteration, the following sequence of operation is executed: (1) the acquisition of analog signals, (2) the execution of CL1 algorithm and CL2 algorithm, (3) the execution of additional computations (e.g., protection functions), (4) the setting of required PWM signals. This algorithm is referred to as Alg. 1 in Figure 7. For algorithm Alg.1 the time delay is given in (5). For the reduction of the time delay, another sequence has been proposed, which is referred as Alg. 2 and is shown in Figure 7. The start of the algorithm is at the maximum value of the counter in the PWM subcircuit. Firstly, the measurements of analog signals and CL1 algorithm are executed and then, based on the previous results of the CL2 control loop, the required PWM signals are computed. This procedure reduces the time delay for CL1 to T D = 1 f sw ( 1 2 f sw for CL1 execution and 1 2 f sw for PMW signal generation) and allows to increase the gain K in CL1. After that, the CL2 control algorithm is realized in the next interrupt procedure together with additional computations which are used in the computation of the forthcoming PWM signals. As previously mentioned, the time delay in the CL2 control loop execution is not a critical issue. This is because the CL2 control loop constitutes a feedforward open loop control. Additionally, the time delay for CL2 can be compensated.  The CL2 control loop is based on the measurement of the load currents and its function is the generation of selected voltage harmonics which force current harmonics to flow through the passive filter (PF, Figure 4). By applying this approach, the selected grid current harmonics are reduced. Due to the fact that CL2 control loop is an open loop control, the time delay will not cause operation instability. However, the time delay will cause imperfect compensation.
The block diagram presenting the CL2 control for harmonic h is depicted in Figure 8. Assuming that the time delay for CL2 realization is τ, after the transformation to the rotating coordinate system and filtering with the use of the low pass filter LPF, the d,q components will be phase shifted with the shift angle proportional to the time delay and the harmonic order h. For example, for the time delay τ = 100 μs, phase shift angle of the 5th harmonic will be equal to 9 degrees, but for the 17th harmonic the phase shift angle will be equal to 30 degrees, which shows that it could cause improper operation of CL2 for higher order harmonics. To avoid such a phase shift, the additional compensation block CO has been added into the CL2 control loop. This block represents the operation of rotation for the phase shift but with an opposite direction. It has to be noted that CO block takes into account the sequence of the harmonic in the three-phase system (positive or negative sequence). It can be seen that the operation of rotation CO is similar to the transformation from the stationary to the rotating coordinate system, but with constant coefficients for h harmonic. Assume that impedance matrices ZFh are defined as: where Re is a real part of impedance of passive filter for h harmonic and Im is an imaginary part of impedance of passive filter for h harmonic, the CO can be described for a particular harmonic as: where h is positive for positive sequence harmonic and negative for negative sequence harmonic. Based on both (6) and (7), the operation of compensation and multiplication by the impedance matrix, can be replaced by a single matrix operation with the modified impedance matrix ZFh K . The elements of the modified matrix ZFh K can be computed offline and the execution of CL2 with compensation CO will not take more time than the execution of the CL2 control loop without the compensation.  The CL2 control loop is based on the measurement of the load currents and its function is the generation of selected voltage harmonics which force current harmonics to flow through the passive filter (PF, Figure 4). By applying this approach, the selected grid current harmonics are reduced. Due to the fact that CL2 control loop is an open loop control, the time delay will not cause operation instability. However, the time delay will cause imperfect compensation.
The block diagram presenting the CL2 control for harmonic h is depicted in Figure 8. Assuming that the time delay for CL2 realization is τ, after the transformation to the rotating coordinate system and filtering with the use of the low pass filter LPF, the d,q components will be phase shifted with the shift angle proportional to the time delay and the harmonic order h. For example, for the time delay τ = 100 µs, phase shift angle of the 5th harmonic will be equal to 9 degrees, but for the 17th harmonic the phase shift angle will be equal to 30 degrees, which shows that it could cause improper operation of CL2 for higher order harmonics. To avoid such a phase shift, the additional compensation block CO has been added into the CL2 control loop. This block represents the operation of rotation for the phase shift but with an opposite direction. It has to be noted that CO block takes into account the sequence of the harmonic in the three-phase system (positive or negative sequence). It can be seen that the operation of rotation CO is similar to the transformation from the stationary to the rotating coordinate system, but with constant coefficients for h harmonic. Assume that impedance matrices Z Fh are defined as: where Re is a real part of impedance of passive filter for h harmonic and Im is an imaginary part of impedance of passive filter for h harmonic, the CO can be described for a particular harmonic as: where h is positive for positive sequence harmonic and negative for negative sequence harmonic. Based on both (6) and (7), the operation of compensation and multiplication by the impedance matrix, can be replaced by a single matrix operation with the modified impedance matrix Z Fh K . The elements of the modified matrix Z Fh K can be computed offline and the execution of CL2 with compensation CO will not take more time than the execution of the CL2 control loop without the compensation. The effect of the compensation is verified in a simulation model where only CL2 control loop is used (without the CL1). The time delay τ is 100 μs. The simulation results are presented in Table 1 and in Figure 9. Table 1 presents THD of the currents and levels of selected harmonics of load current and the grid currents. The table presents results with and without the compensation of time delay.     Table 1 and in Figure 9. Table 1 presents THD of the currents and levels of selected harmonics of load current and the grid currents. The table presents results with and without the compensation of time delay.  The effect of the compensation is verified in a simulation model where only CL2 control loop is used (without the CL1). The time delay τ is 100 μs. The simulation results are presented in Table 1 and in Figure 9. Table 1 presents THD of the currents and levels of selected harmonics of load current and the grid currents. The table presents results with and without the compensation of time delay.    It can be seen that for the operation of CL2 with and without the time delay compensation for the 7th harmonic (which is the harmonic for PF tuning), the same reduction level is achieved. For other harmonics, reduction is lower than in the case of operation without time delay compensation. It is caused by the phase shift in the transformation to d,q coordinate system. The THD of the grid current for operation without time delay compensation is 17.1%, while with the time delay compensation the THD can be reduced to 5.3%. It has to be mentioned that when the HAPF operates with both the CL1 control loop (K = 40) and CL2 with the time delay compensation, the grid current THD is further reduced to 3.7%. Figure 9 presents the load currents and the grid current for an operation of HAPF with CL2 control loop for conditions presented in Table 1. It can be seen that the time delay compensation ensures better results.

Parameter Selection for the Control Algorithm
The important aspect during the design stage of the HAPF is the parameter selection of the control algorithm. As presented in this section, the control algorithm parameters have a significant impact on the effectiveness and stability of the HAPF operation.

Parameter Selection for dc Link Voltage Controller
In the analyzed control system, the dc link voltage controller plays only a secondary role. Its main task of this controller is to keep the dc link voltage at the reference value V DCREQ . However, too fast a dynamic response of the dc voltage controller may result in distortion of the generated currents. In the control algorithm, the classical PI controller has been proposed ( Figure 4). By taking into account the HAPF with its control algorithm it is possible to derive the simple dynamic model with the dc link voltage controller ( Figure 10). It can be seen that for the operation of CL2 with and without the time delay compensation for the 7th harmonic (which is the harmonic for PF tuning), the same reduction level is achieved. For other harmonics, reduction is lower than in the case of operation without time delay compensation. It is caused by the phase shift in the transformation to d,q coordinate system. The THD of the grid current for operation without time delay compensation is 17.1%, while with the time delay compensation the THD can be reduced to 5.3%. It has to be mentioned that when the HAPF operates with both the CL1 control loop (K = 40) and CL2 with the time delay compensation, the grid current THD is further reduced to 3.7%. Figure 9 presents the load currents and the grid current for an operation of HAPF with CL2 control loop for conditions presented in Table 1. It can be seen that the time delay compensation ensures better results.

Parameter Selection for the Control Algorithm
The important aspect during the design stage of the HAPF is the parameter selection of the control algorithm. As presented in this section, the control algorithm parameters have a significant impact on the effectiveness and stability of the HAPF operation.

Parameter Selection for dc Link Voltage Controller
In the analyzed control system, the dc link voltage controller plays only a secondary role. Its main task of this controller is to keep the dc link voltage at the reference value VDCREQ. However, too fast a dynamic response of the dc voltage controller may result in distortion of the generated currents. In the control algorithm, the classical PI controller has been proposed ( Figure 4). By taking into account the HAPF with its control algorithm it is possible to derive the simple dynamic model with the dc link voltage controller (Figure 10). The transfer function of the presented model can be expressed as follows: where: KP-proportional gain, TI-integrating time of PI controller, IF1(RMS)-root mean square value (RMS) of the fundamental component of the passive filter current, CDC-dc link capacitance, VDCN-dc link rated voltage. From (8) and (9) one can derive the damping factor ξ and the condition, for which the step response of the PI controller is critically damped: The step responses of the simple dynamic model with the dc link voltage controller are shown in Figure 11 for different parameters of the PI controller but for the damping factor ξ = 1. It is assumed that the integrating time TI is at the level of the fundamental period i.e., from 20 ms to 50 ms. The transfer function of the presented model can be expressed as follows: where: K P -proportional gain, T I -integrating time of PI controller, I F1(RMS) -root mean square value (RMS) of the fundamental component of the passive filter current, C DC -dc link capacitance, V DCN -dc link rated voltage. From (8) and (9) one can derive the damping factor ξ and the condition, for which the step response of the PI controller is critically damped: The step responses of the simple dynamic model with the dc link voltage controller are shown in Figure 11 for different parameters of the PI controller but for the damping factor ξ = 1. It is assumed that the integrating time T I is at the level of the fundamental period i.e., from 20 ms to 50 ms. The integrating time of T I = 40 ms is chosen for the control in the experimental prototype. For such T I the controller proportional gain is equal to K P = 3.5. During the experiments due to the observed noise in measured signals the value of the proportional gain K P has been reduced to K P = 1.

Figure 11.
Step responses of the dc link voltage for different integrating times TI and the damping factor ξ = 1

Parameter Selection for Signal Filters in Current Control Loops
In both current control loops the signal low-pass filter (LPF) and the high-pass filter (HPF) are applied. Their role is to attenuate time-varying or dc components of the signal dq components. These signal filters are mainly responsible for the dynamic response to the load current changes. It is important to select filters with a fast step response, therefore the filter order should not be too high. Both signal filters have to have appropriate attenuation rate in the chosen bandwidth.
Both low-pass and high-pass filters are selected as 2nd order Butterworth filters with the following transfer functions: where Q factor is equal √2/2 and ωC is the cut-off angular frequency, ωC = 2πfC. The selection of the cut-off frequency fC is done as a trade-off between a relatively high attenuation rate of unwanted harmonics and a fast step response of both filters. Therefore, the selected cut-off frequency is fc = 25 Hz. Figure 12 shows the step responses together with the Bode magnitude plots of the low-pass filter for different values of the cut-off frequency fc. It is clear that for the higher cut-off frequency its step response is faster but the LPF gain obtained from the frequency response plot (Figure 12b) is higher in the required bandwidth. The analysis for the high-pass filter is similar. Step response Figure 11.
Step responses of the dc link voltage for different integrating times T I and the damping factor ξ = 1.

Parameter Selection for Signal Filters in Current Control Loops
In both current control loops the signal low-pass filter (LPF) and the high-pass filter (HPF) are applied. Their role is to attenuate time-varying or dc components of the signal dq components. These signal filters are mainly responsible for the dynamic response to the load current changes. It is important to select filters with a fast step response, therefore the filter order should not be too high. Both signal filters have to have appropriate attenuation rate in the chosen bandwidth.
Both low-pass and high-pass filters are selected as 2nd order Butterworth filters with the following transfer functions: where Q factor is equal √ 2/2 and ω c is the cut-off angular frequency, ω c = 2πf c . The selection of the cut-off frequency f c is done as a trade-off between a relatively high attenuation rate of unwanted harmonics and a fast step response of both filters. Therefore, the selected cut-off frequency is f c = 25 Hz. Figure 12 shows the step responses together with the Bode magnitude plots of the low-pass filter for different values of the cut-off frequency f c . It is clear that for the higher cut-off frequency its step response is faster but the LPF gain obtained from the frequency response plot (Figure 12b) is higher in the required bandwidth. The analysis for the high-pass filter is similar.  Step (a) and frequency (b) responses of low pass filter for different cut-off frequencies fc

Selection of the Gain K for the Hybrid Active Power Filter
As mentioned earlier, the gain K, which is applied in the current control loop CL1, has an impact on the attenuation rate for current harmonic reduction (as in Figure 5a). The gain K also influences on the stability of the control loop. In Figure 13 one can see the simplified dynamic model of control loop CL1, which allows stability analysis to be performed. The transfer function of the feedback loop, shown in Figure 13, is given as: where: TD-the time delay of the control loop CL1, which is equal to 50 μs, G(jω), a transfer function similar to the harmonic attenuation rate given by (3) but taking into account the transfer function HPF−dq (j ) which represents a part of the CL1 loop responsible for detecting the higher order harmonics.
The transfer function HPF−dq (j ) represents both the high-pass filter (HPF) and dq transformation [62]. The transfer function HPF−dq (j ) depends on the sequence of symmetrical components. For the sake of simplification of the analysis only the transfer function for positive sequence components is shown as: where Q and c are the parameters of the HPF mentioned in the Section 5.2.
Based on the frequency model of the control loop CL1 (Figure 13) it is possible to perform the stability analysis by using the Nyquist stability criterion. The stability analysis is performed for different values of the gain K and examples of the results are shown in Figure 14. As is seen in Figure 14b  Step (a) and frequency (b) responses of low pass filter for different cut-off frequencies f c .

Selection of the Gain K for the Hybrid Active Power Filter
As mentioned earlier, the gain K, which is applied in the current control loop CL1, has an impact on the attenuation rate for current harmonic reduction (as in Figure 5a). The gain K also influences on the stability of the control loop. In Figure 13 one can see the simplified dynamic model of control loop CL1, which allows stability analysis to be performed.  Step (a) and frequency (b) responses of low pass filter for different cut-off frequencies fc

Selection of the Gain K for the Hybrid Active Power Filter
As mentioned earlier, the gain K, which is applied in the current control loop CL1, has an impact on the attenuation rate for current harmonic reduction (as in Figure 5a). The gain K also influences on the stability of the control loop. In Figure 13 one can see the simplified dynamic model of control loop CL1, which allows stability analysis to be performed. The transfer function of the feedback loop, shown in Figure 13, is given as: where: TD-the time delay of the control loop CL1, which is equal to 50 μs, G(jω), a transfer function similar to the harmonic attenuation rate given by (3) but taking into account the transfer function (j ) which represents a part of the CL1 loop responsible for detecting the higher order harmonics.
The transfer function (j ) represents both the high-pass filter (HPF) and dq transformation [62]. The transfer function (j ) depends on the sequence of symmetrical components. For the sake of simplification of the analysis only the transfer function for positive sequence components is shown as: where Q and are the parameters of the HPF mentioned in the Section 5.2. Based on the frequency model of the control loop CL1 (Figure 13) it is possible to perform the stability analysis by using the Nyquist stability criterion. The stability analysis is performed for different values of the gain K and examples of the results are shown in Figure 14. As is seen in Figure 14b for the gain K = 70 the analyzed model is unstable, The transfer function of the feedback loop, shown in Figure 13, is given as: where: T D -the time delay of the control loop CL1, which is equal to 50 µs, G(jω), a transfer function similar to the harmonic attenuation rate given by (3) but taking into account the transfer function G HPF−dq (jω) which represents a part of the CL1 loop responsible for detecting the higher order harmonics.
The transfer function G HPF−dq (jω) represents both the high-pass filter (HPF) and dq transformation [62]. The transfer function G HPF−dq (jω) depends on the sequence of symmetrical components. For the sake of simplification of the analysis only the transfer function for positive sequence components is shown as: where Q and ω c are the parameters of the HPF mentioned in the Section 5.2.
Based on the frequency model of the control loop CL1 (Figure 13) it is possible to perform the stability analysis by using the Nyquist stability criterion. The stability analysis is performed for different values of the gain K and examples of the results are shown in Figure 14. As is seen in Figure 14b for the gain K = 70 the analyzed model is unstable, therefore in this paper lower values of the gain K are chosen. For the gain K = 35 the system is stable (Figure 14a) and guarantees satisfactory effectiveness of the fifth harmonic reduction (Figure 5a).
Energies 2021, 14, 4994 15 of 24 therefore in this paper lower values of the gain K are chosen. For the gain K = 35 the system is stable (Figure 14a) and guarantees satisfactory effectiveness of the fifth harmonic reduction (Figure 5a).

Experimental Results
The experimental tests have been carried out on the prototype system of the hybrid active power filter presented in Figure 15. The prototype has been placed inside the explosion-proof housing for the mining applications. Figure 15 presents a 3D model of the HAPF and its prototype photograph.

Experimental Results
The experimental tests have been carried out on the prototype system of the hybrid active power filter presented in Figure 15. The prototype has been placed inside the explosion-proof housing for the mining applications. Figure 15 presents a 3D model of the HAPF and its prototype photograph.
Energies 2021, 14, 4994 15 of 24 therefore in this paper lower values of the gain K are chosen. For the gain K = 35 the system is stable (Figure 14a) and guarantees satisfactory effectiveness of the fifth harmonic reduction (Figure 5a).

Experimental Results
The experimental tests have been carried out on the prototype system of the hybrid active power filter presented in Figure 15. The prototype has been placed inside the explosion-proof housing for the mining applications. Figure 15 presents a 3D model of the HAPF and its prototype photograph.  The prototype consists of the passive part (filter chokes and capacitors) and the power electronic converter with its control system. The power electronic converter is placed on the left side. The converter consists of three SiC CREE 1200 V half-bridge modules CAS300M12BM2 with nominal R DS(on) = 4.2 mΩ. These modules are used for ensuring low power losses due to the limitation on power dissipation of the explosion proof housing.
The dc circuit consists of specially matched PCBs with auxiliary capacitors and two main capacitors. To take full advantage of their capabilities, a dc link with minimized inductance has been designed. It uses low inductance polypropylene capacitors mounted on PCBs matched to the leads of transistor modules. As the main dc link capacitance, two 600 µF capacitors are used.
Subsequent PCBs serve as transistor drivers and are also attached directly to the SiC power modules as an interface to the control system.
The microprocessor-based controller is placed on the separate PCB board. This controller utilizes a 32-bit floating point microcontroller TMS320F28335. The control system ensures the measurement of all required analog signals, generation of PWM signals, protection and MODBUS RTU communication. The control system operates with 20 kHz switching frequency which was set at this value as a trade-off between the fast operation of the HAPF and its low switching losses.
The passive filter consisting of a choke and three AC capacitors is placed on the right side. The passive filter is tuned to 7th order harmonic, which ensures the reduction of the passive filter size and its weight. On the far right side, there are contactors (the main and start-up contactor) and protection devices (fuses). Parameters of the prototype of HAPF are given in Table 2.

Verification of Appropriateness of the Control Algorithm Modifications
As previously mentioned, in case of distortion of the grid voltage, the passive part of the hybrid active power filter can increase the grid current harmonics. Figure 16a shows the results of operation of the passive filter with the power electronic converter generating zero voltage (which corresponds to the short circuit of converter terminals). The grid voltage THD is 2.8%. This voltage is distorted mainly by the 5th and 7th harmonics. One can see that the passive filter generates a grid current containing mainly the 7th harmonic with THD = 43.4%. By adding additional signals v Dα,β (which correspond to measured grid voltage) to the control system, the THD of the grid currents is reduced to 7.1%. Applying the CL1 control loop with the gain K = 25 further reduces the THD to 3.5%. The results of this compensation are presented in Figure 16b. From the waveforms of the current and voltage in Figure 16b one can see that only reactive power exists. This is caused by capacitors of the passive filter PF, and reveals the inherent feature of the hybrid active power filter. The reactive power cannot be fully compensated due to the limited level of converter dc link voltage V dc . Such a reactive power can be used for the load reactive power compensation. The effect of the time delay compensation in the CL2 control loop is shown in Figure 17. The waveforms are presented for the HAPF operation with the non-linear load with the current THD equal to 27.0%. In Figure 17a, the grid and load currents together with its harmonic spectra are shown for the HAPF operation without the time delay compensation. The harmonic reduction is presented for the HAPF operation with both CL1 and CL2 control loops. The gain K = 35 is set for control loop CL1 and the CL2 control loop operates with the elimination of 5th, 11th, 13th, 17th harmonics. It can be seen that for the 5th and 11th harmonics, the CL2 control loop operates quite well, but for 13th and 19th harmonics the results are not satisfactory. Figure 17b presents the waveforms for the operation of HAPF with the same gain K in CL1 control loop and the time delay compensation in CL2 control loop. Thanks to the time delay, compensation harmonics in the grid current are at lower levels (this is particularly true for the 13th and 17th harmonics). The shape of the grid current is better and its THD is reduced to 4.6% instead of 7.7 % for operation without the time delay compensation from Figure 17a.
in Figure 16b one can see that only reactive power exists. This is caused by capacitors of the passive filter PF, and reveals the inherent feature of the hybrid active power filter. The reactive power cannot be fully compensated due to the limited level of converter dc link voltage Vdc. Such a reactive power can be used for the load reactive power compensation. The effect of the time delay compensation in the CL2 control loop is shown in Figure 17. The waveforms are presented for the HAPF operation with the non-linear load with the current THD equal to 27.0%. In Figure 17a, the grid and load currents together with its harmonic spectra are shown for the HAPF operation without the time delay compensation. The harmonic reduction is presented for the HAPF operation with both CL1 and CL2 control loops. The gain K = 35 is set for control loop CL1 and the CL2 control loop operates with the elimination of 5th, 11th, 13th, 17th harmonics. It can be seen that for the 5th and 11th harmonics, the CL2 control loop operates quite well, but for 13th and 19th harmonics the results are not satisfactory. Figure 17b presents the waveforms for the operation of HAPF with the same gain K in CL1 control loop and the time delay compensation in CL2 control loop. Thanks to the time delay, compensation harmonics in the grid current are at lower levels (this is particularly true for the 13th and 17th harmonics). The shape of the grid current is better and its THD is reduced to 4.6% instead of 7.7 % for operation without the time delay compensation from Figure 17a.  in Figure 16b one can see that only reactive power exists. This is caused by capacitors of the passive filter PF, and reveals the inherent feature of the hybrid active power filter. The reactive power cannot be fully compensated due to the limited level of converter dc link voltage Vdc. Such a reactive power can be used for the load reactive power compensation. The effect of the time delay compensation in the CL2 control loop is shown in Figure 17. The waveforms are presented for the HAPF operation with the non-linear load with the current THD equal to 27.0%. In Figure 17a, the grid and load currents together with its harmonic spectra are shown for the HAPF operation without the time delay compensation. The harmonic reduction is presented for the HAPF operation with both CL1 and CL2 control loops. The gain K = 35 is set for control loop CL1 and the CL2 control loop operates with the elimination of 5th, 11th, 13th, 17th harmonics. It can be seen that for the 5th and 11th harmonics, the CL2 control loop operates quite well, but for 13th and 19th harmonics the results are not satisfactory. Figure 17b presents the waveforms for the operation of HAPF with the same gain K in CL1 control loop and the time delay compensation in CL2 control loop. Thanks to the time delay, compensation harmonics in the grid current are at lower levels (this is particularly true for the 13th and 17th harmonics). The shape of the grid current is better and its THD is reduced to 4.6% instead of 7.7 % for operation without the time delay compensation from Figure 17a.

Harmonics Reduction Performance for Different Loads
The operation of HAPF with different loads is presented in Figures 18-20. Figures  18a, 19a and 20a present waveforms of the grid current iG, the load current iL and filtered (by using a low pass filtering of PWM modulation) power electronic converter voltage vPC.

Harmonics Reduction Performance for Different Loads
The operation of HAPF with different loads is presented in Figures 18-20.  Figures 18a, 19a and 20a present waveforms of the grid current i G , the load current i L and filtered (by using a low pass filtering of PWM modulation) power electronic converter voltage v PC . Figures 18b, 19b and 20b present harmonic spectra of the grid and the load currents. Figure 18 depicts the operation of the HAPF with the load Ld1 characterized by high current distortions (THD = 85.5%, P = 59 kW) with a high content of 5th, 7th and 11th harmonics. The load Ld1 represents typical AC drives or diode rectifiers with parallel RC connection in the dc link (relatively high dc link capacitance with a small input inductance). The HAPF operates with both control loops as presented in Figure 17b. One can see that the HAPF is able to reduce the THD from 85.5% to 3.8%. In this case, the voltage generated in the power electronic converter includes mainly harmonics with orders h < 11. The harmonic amplitudes are listed in Table 3. The RMS value of the grid current i G is reduced in comparison to the load current i L but the grid current consists of both active and reactive components.

Harmonics Reduction Performance for Different Loads
The operation of HAPF with different loads is presented in Figures 18-20. Figures  18a, 19a and 20a present waveforms of the grid current iG, the load current iL and filtered (by using a low pass filtering of PWM modulation) power electronic converter voltage vPC. Figures 18b, 19b and 20b present harmonic spectra of the grid and the load currents. Figure 18 depicts the operation of the HAPF with the load Ld1 characterized by high current distortions (THD = 85.5%, P = 59 kW) with a high content of 5th, 7th and 11th harmonics. The load Ld1 represents typical AC drives or diode rectifiers with parallel RC connection in the dc link (relatively high dc link capacitance with a small input inductance). The HAPF operates with both control loops as presented in Figure 17b. One can see that the HAPF is able to reduce the THD from 85.5% to 3.8%. In this case, the voltage generated in the power electronic converter includes mainly harmonics with orders h < 11. The harmonic amplitudes are listed in Table 3. The RMS value of the grid current iG is reduced in comparison to the load current iL but the grid current consists of both active and reactive components.    The operation of HAPF with a diode rectifier with R load in the dc link with line reactors is presented in Figure 19. The load Ld2 (P = 44 kW) is characterized by lower level of THD (26.6%), the levels of harmonics are lower in comparison to the Ld1 load, but the spectrum of harmonics is significantly wider. For such conditions, the HAPF reduces the THD of the grid current to 4.0%. The values of selected current harmonics are listed in Table 4. For the load Ld2, the voltage generated by the power electronic converter includes more higher order harmonics than for the load Ld1.
The operation of HAPF with a diode rectifier with R load in the dc link with line reactors is presented in Figure 19. The load Ld2 (P = 44 kW) is characterized by lower level of THD (26.6%), the levels of harmonics are lower in comparison to the Ld1 load, but the spectrum of harmonics is significantly wider. For such conditions, the HAPF reduces the THD of the grid current to 4.0%. The values of selected current harmonics are listed in Table 4. For the load Ld2, the voltage generated by the power electronic converter includes more higher order harmonics than for the load Ld1.  The operation of the HAPF with the diode rectifier with RC load having smaller capacitance than in the case of the load Ld1 and with the line reactors similar to case Ld2 is depicted in Figure 20. The load Ld3 (P = 46 kW) currents are characterized by THD = 39.4% and for such a type of the load the HAPF reduces the grid current THD to 4.2%. The values of selected harmonics are presented in Table 5.  The operation of the HAPF with the diode rectifier with RC load having smaller capacitance than in the case of the load Ld1 and with the line reactors similar to case Ld2 is depicted in Figure 20. The load Ld3 (P = 46 kW) currents are characterized by THD = 39.4% and for such a type of the load the HAPF reduces the grid current THD to 4.2%. The values of selected harmonics are presented in Table 5.    It can be seen that the HAPF successfully reduces all harmonics included in the control system. The presented results verified the correct operation of the HAPF for different loads and the effectiveness of control improvements described in Section 4. Figure 21 shows the waveforms during transient at the load. It is clearly visible that after less than 20 ms, the HAPF correctly reduces harmonics. This directly results from the cut-off frequency of the signal filters (LPF and HPF). A longer regulation time of about 80 ms is observed at the dc link voltage. As expected, the dc link voltage variations generates a fundamental harmonic frequency component in the output voltage (vPC). The changes in vDC in this case are not more than 5% of the dc link rated voltage.  It can be seen that the HAPF successfully reduces all harmonics included in the control system. The presented results verified the correct operation of the HAPF for different loads and the effectiveness of control improvements described in Section 4. Figure 21 shows the waveforms during transient at the load. It is clearly visible that after less than 20 ms, the HAPF correctly reduces harmonics. This directly results from the cut-off frequency of the signal filters (LPF and HPF). A longer regulation time of about 80 ms is observed at the dc link voltage. As expected, the dc link voltage variations generates a fundamental harmonic frequency component in the output voltage (vPC). The changes in vDC in this case are not more than 5% of the dc link rated voltage.

Power Losses
As previously mentioned, the converter power losses play a crucial role, particularly in applications where utilization of the cooling system is limited. Therefore, it is required to identify the contribution of the HAPF components on total power losses. This contribution has been inspected by measuring power losses generated inside the converter and inside the passive filter. During the power loss measurements, HAPF has been operated with a load Ld2 with varied resistance in the dc-link. The results of power losses, which are measured by using the precise power analyzer WT5000E, are presented in Figure 22.
in applications where utilization of the cooling system is limited. Therefore, it is required to identify the contribution of the HAPF components on total power losses. This contribution has been inspected by measuring power losses generated inside the converter and inside the passive filter. During the power loss measurements, HAPF has been operated with a load Ld2 with varied resistance in the dc-link. The results of power losses, which are measured by using the precise power analyzer WT5000E, are presented in Figure 22.