In-Situ Measurement of Power Loss for Crystalline Silicon Modules Undergoing Thermal Cycling and Mechanical Loading Stress Testing

: An in-situ method is proposed for monitoring and estimating the power degradation of mc-Si photovoltaic (PV) modules undergoing thermo-mechanical degradation tests that primarily manifest through cell cracking, such as mechanical load tests, thermal cycling and humidity freeze tests. The method is based on in-situ measurement of the module’s dark current-voltage (I-V) characteristic curve during the stress test, as well as initial and ﬁnal module ﬂash testing on a Sun simulator. The method uses superposition of the dark I-V curve with ﬁnal ﬂash test module short-circuit current to account for shunt and junction recombination losses, as well as series resistance estimation from the in-situ measured dark I-Vs and ﬁnal ﬂash test measurements. The method is developed based on mc-Si standard modules undergoing several stages of thermo-mechanical stress testing and degradation, for which we investigate the impact of the degradation on the modules light I-V curve parameters, and equivalent solar cell model parameters. Experimental validation of the method on the modules tested shows good agreement between the in-situ estimated power degradation and the ﬂash test measured power loss of the modules, of up to 4.31 % error (RMSE), as the modules experience primarily junction defect recombination and increased series resistance losses. However, the application of the method will be limited for modules experiencing extensive photo-current degradation or delamination, which are not well reﬂected in the dark I-V characteristic of the PV module.


Introduction
Monitoring the degradation of photovoltaic (PV) modules during accelerated stress testing is crucial for understanding the degradation kinetics of the PV modules. Moreover, accurate module power loss data with high temporal resolution is necessary for developing accelerated PV degradation models for predicting PV module lifetime in the field. However, often times, the accelerated tests have to be interrupted, for the PV modules to be characterized on Sun simulators and their power loss measured [1]. This limits the number of intermediate module power degradation measurements that can be acquired in practice, and is a time-consuming process in itself. Therefore, in-situ (semi) continuous module degradation monitoring methods are necessary.
In-situ module monitoring methods have been developed for different types of accelerated stress tests, stress factors and degradation parameters. Module moisture monitoring during accelerated aging tests for PV module encapsulants, was proposed by Carlsson et al. [2], by integrating a moisture sensor inside thin-film modules. Tanahashi et al. [3] proposed in-situ monitoring of AC impedance parameters of PV modules undergoing rapid thermal cycling stress tests, for detecting solder bond failures after prolonged test cycles. A method for monitoring module degradation during dynamic mechanical load testing, was proposed by Bosco et al. [4], by forward biasing the PV module with a small sinusoidal voltage signal and measuring the differential conductance, and was used to determine the occurrence of ribbon failure and the cycle/time-to-failure. More advanced PV characterization methods, such as electroluminescence (EL) imaging were also implemented for in-situ monitoring of PV module degradation during mechanical load stress testing [5], as well as integrated into the environmental test chamber, for monitoring of modules undergoing combined accelerated stress testing [6].
Monitoring the module's maximum power (P max ) at Standard Test Conditions (STC: 1000 W/m 2 , 25°C, AM 1.5) during stress testing, is especially important for accelerated stress testing, as it is the reference condition for reporting PV module efficiency and performance parameters. Such a method was previously developed by Hacke et al. [7], for in-situ monitoring the STC P max degradation of crystalline silicon (c-Si) PV modules undergoing voltage stress testing and experiencing shunting type potential-induced degradation (PID-s). The method is based on translating dark current-voltage (I-V) curves acquired insitu, at 25°C, from the first to the fourth I-V quadrant. This was achieved by superposition of the dark I-Vs with the module's short circuit current (I sc ), determined at the beginning of the test. Later, a method was developed for estimating STC P max degradation, due to PID-s, from the dark I-V curves measured in-situ at the stress temperature (typically 60°C or 85°C), without the need to ramp down the test chamber temperature to 25°C [8,9].
Estimation of the PV module's STC P max degradation from dark I-V measurements was possible because the PID-s mechanism in c-Si modules largely manifests by fill-factor loss due to increasing junction recombination (2nd diode pre-exponential, J o2 ) and decreasing shunt resistance (R sh ) [7], which impact both the dark I-V and light I-V characteristics in similar proportions. However, STC P max estimation by dark I-V superposition is limited [10] if delamination, increased series resistance (R s ) or photo-current degradation occurs, which affect the light I-V characteristic primarily. Other degradation mechanisms impact the dark and light I-V characteristics of the PV module differently, therefore the dark I-V based STC power estimation method, needs to be to account for degradation of the other solar cell parameters associated with the degradation mode.
Modules undergoing thermo-mechanical stress and cell breakage may undergo J o1 increases due to increased unpassivated surface area at fracture surfaces, R s losses due to metallization breaks and solder bond failure [11,12], J o2 and junction ideality factor increases, and shunt resistance decreases due to increased physical defects penetrating the junction [13]. Additionally, some fraction of the cell circuit may be removed when the cell and its metallization become electrically disconnected [14].
To study these compound degradation modes and develop an in-situ power loss estimation method, modules underwent mechanical loading, thermal cycling and humidityfreeze cycles to impart mechanical damage, during which dark I-V curves and STC flash tests were obtained, and used in equivalent solar cell diode model analysis of the degradation. Thereafter a method is developed for estimating STC power loss in three steps: (i) estimate the effects of shunting and J o2 recombination losses by superposition of the dark I-V curves with the initial STC I sc to the first quadrant, and rough estimation of the STC P max (ii) estimate R s and J o1 losses from the dark I-V slope at high current, and correct the rough STC P max estimation ; and (iii), correct the STC power estimates obtained during the course of degradation, based on module flash testing at the end of the stress test -to include effects of additional series resistance losses observed with illumination, J o1 recombination losses, and current mismatch losses. This is achieved by matching the final dark I-V curve-determined P max to the final flash-test-determined STC P max , and adjusting the intermediate power loss estimates accordingly.

Experiment and Module Degradation Analysis
Four new conventional 60-cell multi-crystalline silicon (mc-Si) PV modules of the same design were subjected to five rounds of stress consisting of 2400 Pa static mechanical loading, −40°C to 85°C thermal cycling (TC), and −40°C to 85°C at 85% RH humidity freeze (HF) cycling stress to various extents. The initial (new) state of the modules, along with the five subsequent stages of stress applied to the modules are designated with roman numerals (I-VI) and further detailed in Table 1. The number of stress cycles were determined primarily through trial and error and repeatedly stressing and characterization of the modules, with the goal of inducing a progressive degradation of the modules, as well as noticeable power loss. The degradation of module #1 can be observed in the EL images of the module shown in Figure 1, where the new state of the module is shown in Figure 1a, whereas the subsequent mechanical degradation of the module's cells is shown in Figure 1b Table 1. Brighter image areas correspond to cell regions with higher luminescence, whereas darker areas correspond to low or no luminescence emissions.
After each stress-test stage, the modules were flash tested under STC and low irradiance conditions (LIC, 200 W/m 2 , 25°C). The STC and low light P max degradation is summarized in Figure 2. Here we observe a final STC power degradation between 8% and 10.4 %, and between 5.5 % to 7 % LIC power loss.  The corresponding light I-V curves for module #1 are shown in Figure 3a, where we can observe fill factor and short-circuit current losses to a lower extent. Whereas, the dark I-V characteristics of module #1, shown in Figure 3b, show changes in both the high and low current regions of the dark I-V curve, associated with increased series resistance [15] and shunt and recombination losses [16], respectively. The electrical characteristics and power loss of modules #2-#4 are shown in Appendix A.2, Figures A4-A6 respectively. I) P max_STC =100.0%, P max_LIC =100.0% II) P max_STC =100.4%, P max_LIC =99.9% III) P max_STC =98.6%, P max_LIC =99.0% IV) P max_STC =99.0%, P max_LIC =98.9% V) P max_STC =94.5%, P max_LIC =92.4% VI) P max_STC =91.1%, P max_LIC =93.0%  By examining the STC I-V curve parameters, we observe that the STC I mp , summarized in Figure 4 for all four modules, contributes the most to the module performance degradation, which can be attributed primarily to the partial solar cell cracks, that increase the cells series resistance. Whereas a small decrease in I sc can be observed for module #1, and to a lesser extent in modules #2 and #3, which can be attributed to a reduced photo-current generating cell area, due to fully disconnected cell cracks.  Figure 4. Relative change in the STC short-circuit and maximum power point currents of the four modules during the six stages of the experiment-described in Table 1.
In addition, the modules show V mp voltage losses in the later stages of the experiment (V and VI), shown in Figure 5, whereas the V oc does not change significantly. Considering that the V mp /V oc ratio decreases in these stages as well, we can deduce that these losses are caused (at least in part) by an increase in series resistance [17].  Table 1.
To further understand the modes of degradation associated with this type of stress, we analyze the equivalent solar cell parameters of the modules during degradation [18]. To achieve this we fit the dark I-V curves (I dark − V dark ) of the modules taken after each experiment stage to the two-diode solar cell model (1), often used for dark I-V based solar cell diagnostics [15]: where J is the current density; V is the terminal voltage; n 1 and n 2 are the diode ideality factors; R s and R sh are area-specific series and shunt resistance parameters, respectively, of the solar cell; T is the cell temperature; k is the Boltzmann constant; and q is the elementary charge.
The effect of the module degradation on the equivalent solar cell model parameters is summarized in Figure 6. From these results, we can confirm a substantial increase in module series resistance R s , previously observed in the I-V parameters and caused by partial solar cell cracks and metallization breaks [14]. Moreover, from Figure 6 we can observe a significant increase in the n 2 and J o2 diode model parameters, suggesting solar cell junction degradation and recombination losses occurring in the junction. Lastly, the n 1 and J o1 diode model parameters increase to a lesser extent. This increase can be attributed here to increasing defects and unpassivated surfaces at the cell cracks, causing increased surface and bulk recombination losses.  Concluding on the analysis of the diode model parameters, we can group the power loss mechanisms into three categories: (i) shunting and J o2 recombination losses, (ii) series resistance losses, (iii) other losses including J o1 recombination losses, current mismatch losses, and a decrease in photo-current generation due to cell fracturing. In the next section we aim to estimate these failure modes' effect on the module STC power loss separately.

Step 1-In-Situ during Stress Testing-Estimate the Effects of Recombination and Shunting Losses
The first step, estimating the power loss due to shunting and J o2 recombination losses, has been previously studied for crystalline silicon modules undergoing PID-s [7,19]. In this case, module STC P max degradation can be estimated with high accuracy in-situ, by superposition of the dark I-V curve with measured I sc [7]. Some limitations of the method include modules that are severely shunted, for which the I sc current starts to decrease significantly [20] and superposition using the initial I sc is no longer valid.
We assume that module dark I-V characteristics are measured at 25°C during the test. This is a feasible assumption for mechanical loading tests that are carried out at room temperature, as well as for thermal cycling and humidity freeze type tests, where the 25°C dark I-V characteristic can be measured at the beginning/end of the cycle, when the chamber and module temperatures are ramped up/down.
Based on the 25°C dark I-V curve we can estimate the module STC P max that accounts for the effects of shunting and J o2 losses, by superposition of the dark I-V curve with I sc , and calculating the maximum power point P max_SUP (t) from the resulting I-curve, as expressed in (2): where I dark (t) − V dark (t) is the dark I-V characteristic of the module measured measured at 25°C and at a time point t during the stress test, and I sc (t 0 ) is the initial STC I sc current of the module measured on a Sun simulator.

Step 2-In-Situ during Stress Testing-Estimate (Partial) Series Resistance Losses from Dark I-V Measurements
In the next step we need to estimate the increase in series resistance due to cell cracks, from the dark I-V measurements acquired in-situ, and use it to correct the superposition estimated power loss P max_SUP accordingly. This could be achieved by curve fitting the diode model parameters (R s ) in (1), which requires careful parametrization of the initial conditions and does not lend itself to automatic analysis during the stress test.
Alternatively, increases in the module's dark series resistance can be estimated from the slope of the dark I-V curve at high current (R s_DIV ), as in (3), which is linearly related to the module's R s , not including diode-internal voltage drops [21].
Next, to estimate the power loss due to the increased series resistance, we start from the empirical equations for calculating the effect of increased series resistance on the fill factor of solar cells [22], defined in (4): where r s is the normalized PV module series resistance, FF 0 is the fill factor without the effect of series resistance, and FF s is the corrected PV module fill factor, including series resistance losses. If we consider r s to only represent the increase in the module's series resistance since the test has started (t 0 ), we can define as a function of R s_DIV (t), determined in-situ, and the initial STC parameters of the module: I mp (t 0 ) and V mp (t 0 ), as in (5): Finally, we can consider FF 0 to represent the fill factor corresponding to the maximum power estimation without the effect of increased series resistance P max_SUP . By rewriting (4) in terms of maximum power, we calculated the R s corrected power loss estimation P max_DIV , as in (6)

Step 3-Adjustment with Final Light I-V Curve-Estimate the Total Series Resistance and Other Losses from a Final STC Flash Test
There are two limiting factors for estimating series resistance from the dark I-V characteristic of the PV module that must be considered. First, when measuring the dark I-V characteristic, the current paths through the module are more limited in area compared to when the module is illuminated [23]. This situation leads to two different module R s values, dark and light measured, where generally the dark-measured R s is be smaller than the light-determined resistance. Consequently, use of the dark I-V curve-determined series resistance, such as R s_DIV , will underestimate the STC P max losses due to increases in R s . Second, R s_DIV does not explicitly include the effect of decreased current generation and mismatch due to cell fracturing or the increase in J o1 recombination losses that can appear around max(I dark ) in the dark I-V curve and can lead to additional errors in estimating the STC P max .
To compensate for the limitation of the dark estimated series resistance, in the final step R s_DIV is adjusted such that the final P max degradation, which is estimated from dark I-V measurements, matches the final STC P max degradation that is measured by a Sun simulator. This problem can be formulated for solution as in (7), where t 0 and t f are the initial and final 25°C dark I-V curve and STC power (P max_STC ) measurements points: By numerically solving (7) for R sx , we can determine a R sx = R s_Match (t f ) value, which will account for both the increase in module (light) R s , as well as other losses, such J o1 recombination and current mismatch losses due to cell fracturing, occurring in the module after the previous experiment stage. The R s_Match is then used to adjust each intermediate R s_DIV (t) with (8): Finally R s_DIV_Scaled (t) is replaced in (5) and (6) to calculate P max_DIV_Scaled (t), which will match the final STC P max degradation value and estimate the module degradation throughout the stress test more accurately.

Results and Discussion
We experimentally evaluate the accuracy and limits of the in-situ power loss estimation procedure, by comparing the PV module power losses determined in the three steps of the proposed method, with measured module power loss.
First we determine the extent of power loss due to shunting and J o2 losses, by calculating P max_SUP from (2), using the I sc measured at at 1000, 600, and 200 W/m 2 irradiance, and 25°C. The relative change in P max_SUP of module #1 is shown in Figure 7, versus the Sun simulator measured power of the module, denoted as P max_LIV , under the same irradiance conditions. We can observe that the dark I-V superposition-based power loss estimation is poor, especially under high irradiance conditions and extensive degradation (up to 6% difference in relative power loss). This can be explained by the increased series losses that are not captured by the superposition method.
Similar trends can be observed by comparing STC P max_SUP of the other module samples with their measured P max_LIV shown in Figure 8. As the modules degrade more by cell cracking, the estimation error increases. We can surmise that the shunting and J o2 losses amount to up to 2% of the absolute power loss, explaining up to 30% of the power loss exhibited.  Next, to evaluate the extent of increased series resistance losses, we determine the increase in R s_DIV from 25°C dark I-V measurements and use it to estimate the relative module power loss (P max_DIV ), according to (5) and (7). Figure 9 shows the estimated power loss P max_DIV for module #1. It can be observed that the estimation has improved only slightly, however at 5% STC P max degradation (stage V), P max_DIV underestimates the module #1 degradation by 3% (absolute error), whereas at 10% module degradation (stage VI), the difference between the dark vs. light measured module power degradation can be as much as 5% (absolute error). This is explained by the limited capability of R s_DIV to characterize the light series resistance, as well as the impact of I sc losses on the module STC power.
Similar estimation errors are observed for the other modules shown in Figure 10, with the exception of module #3, which is closest to the ideal estimation line. One possible explanation is that module #3 had the least I sc losses among the four modules tested, as can be observed from Figure 4. The module power loss estimation must be improved by the final STC P max adjustment, as in (7) and (8), which will compensate for most of the current mismatch, decrease in I sc and photocurrent-generation, and other losses such as J o1 recombination losses, which are difficult to characterize from the dark I-V curve alone. These findings are consistent with previous research on methods for estimating PV module series resistance [24], that have concluded that dark series resistance underestimated the light determined series resistance by more than 50%, in most cases [24].
To exemplify the adjustment procedure, we used the initial and final STC flash test P max to calculate the correction factor R s_Match from (7), and use it to adjust the dark I-V-determined series resistance (R s_DIV ) as in (8). The resulting R s_DIV_scaled as well as R s_DIV are compared in Figure 11, with the STC flash test determined resistance of module #1, calculated after each stress stage. As can be observed, stages V and VI show a significant increase in the module's series resistance that is not captured by R s_DIV , but can be compensated for, by the final STC flash test, and thus included in R s_DIV_Scaled .  Figure 11. Comparison of the three PV module series resistance procedures, exemplified for PV module #1: R s_DIV -series resistance estimated from the dark I-V as in (3); R s_Match -series resistance estimated by matching the final STC P max I-V as in (6) and (7); R s_DIV S caled -series resistance estimated by scaling R s_DIV with the final R s_Match as in (8).
Finally, P max_DIV_Scaled is calculated by substituting R s_DIV_Scaled in (6), and is compared with the STC measured P max in Figure 12. As can be observed, this approach leads to a more successful estimation of the module degradation, especially in the later stages of the experiment.  The errors between the P max_DIV_Scaled and STC P max in the early stages of degradation result from the approximation that R s_DIV scales linearly with the light series resistance, assumed in (8). Second, flash test and dark I-V measurement errors are compounded, such that individual points in Figure 12 may be affected. Despite these limitations, if we compare the root-mean-square error (RMSE) between the STC measured P max , and the dark I-V estimated P max , as in Table 2 we can observe the final adjustments of the series resistance based on flash testing, and reduce the total estimation error by 3-6 times. Table 2. Comparison of root-mean-square error (RMSE) between the STC measured P max , and the dark I-V estimated P max (P max_SUP -only shunting and J o2 losses are estimated; P max_DIV -series losses are estimated as well; P max_DIV_Scaled -other losses are estimated with a final STC power match).

Conclusions
Tools and methods for monitoring PV module degradation, in-situ, during accelerated stress testing, are important for understanding the degradation kinetics and developing reliability and accelerated degradation modules, as well as for reducing the cost, duration and effort of accelerated stress tests.
In this regard, in-situ acquired dark I-V curves have previously been used to successfully monitor PID-s during voltage stress testing of c-Si PV modules, and were the basis of the in-situ monitoring method proposed in this work. However monitoring thermo-mechanical induced degradation of PV modules by dark I-V measurements is more challenging, due to the complex nature of the induced degradation modes. Namely, thermo-mechanical stress can compound several failure modes: micro-cracking, partial or complete cell cracking and disconnection, cell interconnect failure, and even delamination. These will affect cells in the modules to different extents, and are sometimes difficult to deconvolute from module level I-V characteristics or by equivalent solar cell model parameters, as the basic assumption of identical cells in the module is broken.
Part of the power loss caused by cell cracking-corresponding to shunting and junction recombination, can be estimated by superposition of the dark I-V with initial module short-circuit current, similar to the in-situ PID power loss estimation method. However, the majority of power loss caused by cell cracking is caused by an increase in the module's distributed series resistance, which is not well captured by the dark I-V curve superposition method.