# Efficiency Optimization for All-Silicon Carbide (SiC) PWM Rectifier Considering the Impact of Gate-Source Voltage Interference

^{1}

^{2}

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## Abstract

**:**

## 1. Introduction

## 2. The Impact of Gate-Source Voltage Interference on Loss of All-SiC PWM Rectifier

#### 2.1. All-SiC PWM Rectifier for EV charging

_{a}, V

_{b}, V

_{c}to direct current (DC) load V

_{dc}by filter inductors and power semiconductor devices. It adopts a three-phase six-switch structure, and each phase is composed of a filter inductor and a phase-leg circuit, composed of SiC MOSFETs. On the AC side, the PWM rectifier possesses the function of power factor correction. On the DC side, the PWM rectifier would hold the V

_{dc}constant to supply the second-stage, which is an LLC resonant converter, functioned for further EV charging control with isolation for safety.

#### 2.2. The Impact of Gate-Source Voltage Interference on Loss and Its Suppression Method

_{H}and Q

_{L}.

_{gs}, C

_{gd}, C

_{ds}and gate drive resistance R

_{g}, which are determined by the physical characteristics of the device; 2) parasitic inductance of SiC MOSFETs pins and board L

_{g}, L

_{d}, L

_{s}, which is determined by the device pins and the design of hardware circuit.

_{a}, which is used to suppress the gate-source voltage spike during the switching process.

_{gs}is the internal driving voltage on C

_{gs}, V

_{GS}is the external driving voltage, i

_{g}is the gate current, and i

_{d}is the drain current of the device. V

_{D}is the driver IC output voltage. C

_{dc}is the DC side capacitance. D is the equivalent inverse parallel diode of MOSFETs.

_{s}affects both the main power circuit and the driving circuit. For the source parasitic inductor of 3-pin SiC MOSFETs, the induced electromotive force caused by the rapid change of the main power current (di/dt) is opposite to the driving voltage, suppresses the gate-source voltage change, and increases the switching loss.

_{ds}and power source inductance L

_{ps}. The 4-pin package with Kelvin source delivers a less-disturbed signal to the gate of SiC MOSFET, eliminating the effect of the voltage drops over the source parasitic inductance during fast current change. Hence, it has the potential to improve the efficiency of the overall power conversion system, such as the fast EV charging system given in Figure 1. The system efficiency improvement would be explained with the system dynamic theory and then demonstrated with experimental results, in the following sections.

## 3. The Mechanism of 4-pin SiC MOSFETs to Improve System Efficiency

#### 3.1. Analysis of Switching Process of 3-pin SiC MOSFETs

_{gs}of SiC MOSFETs is charged, and V

_{gs}increases at the turn-on process. C

_{gs}is discharged, and V

_{gs}decreases at the turn-off process. Figure 5 shows the waveforms changes during SiC MOSFET switching, and the turn-on process can be divided into four stages (stage 1 ~ stage 4) as follows [27].

_{0}~t

_{1}): turn-on delays, drive voltage V

_{D}increases from low-level V

_{dn}to high-level V

_{dp}, and the current i

_{g}mainly charges C

_{gs}, and a part of current flows through C

_{gd}, while the gate-source voltage V

_{gs}increases. However, the gate-source voltage is less than the threshold voltage V

_{gsth}, and power devices are in the off-state. When V

_{gs}reaches V

_{gsth}, the stage will be finished. I

_{on}is the sustained current when the power device is on-state. V

_{DS}is the extern voltage on the device Q and the parasitic parameter L

_{d}and L

_{s}.

_{gs_3p}and V

_{GS}exists in Equation (1).

_{g}, the main loop current i

_{d}, the charge current i

_{ca}of the capacitor C

_{a}, drive voltage V

_{D}, and the extern gate-source voltage V

_{GS}satisfy the relationships in Equation (2). C

_{iss}is the equivalent input capacitance of the SiC MOSFET. V

_{gs_3P}can be solved from Equations (1) and (2).

_{1}~t

_{2}): SiC MOSFET is in on-state, and inductor current converts from negative device to positive device, driving voltage at a high level. Channel current i

_{ch}is similar to drain current i

_{d}. The V

_{gs}increases to the Miller voltage, and the current charges to C

_{gs}and C

_{gd}. Equation (3) can be derived.

_{d}increases approximately linearly and is proportional to the growth rate of V

_{gs}, and g

_{fs}is the transconductance of i

_{ds}and V

_{gs}.

_{gs_3p}and drive voltage V

_{D}can be derived as Equation (4).

_{gs_3p}denominator is small enough to be omitted. The high-order (first-order and second-order) components of the V

_{gs_3p}numerator are far smaller than V

_{D}. Hence, V

_{gs_3p}can be simplified as Equation (5).

_{1}and resonance frequency ω

_{n}

_{1}are shown in Equation (6).

_{rgsβ_3p}is the time of stage 2 of the turn-on process, and under this overdamped condition, t

_{rgsβ_3p}is expressed by Equation (7).

_{2}~t

_{3}): Conversion of the inductor current is finished, and the negative device begins block voltage. The V

_{gs}is on the miller voltage platform and becomes stable, the current i

_{g}and the main power current i

_{d}are unchanged, V

_{ds}decreases linearly, and the current i

_{g}charges to C

_{gd}.

_{ds}of active device Q decreases, the complementary device begins to form blocking voltages V

_{DA}by the difference of i

_{d}and I

_{L}. The theoretical analysis can establish Equation (8), and V

_{gs_3p}can be solved.

_{3}~t

_{4}): The V

_{gs}increases from the miller voltage to drive high-level voltage, and the current charges to C

_{gs}and C

_{gd}. The relationship between variables satisfies the Equations (1) and (2). When V

_{gs}equals to V

_{D}, the turn-on process is finished.

_{a}are the same.

#### 3.2. Analysis of Switching Process of 4-pin Kelvin Package SiC MOSFETs

_{gs_4p}and V

_{GS}in Equation (9).

_{g}, the main loop current i

_{d}, and the extern gate voltage V

_{GS}still satisfy the relationships in Equation (2).

_{gs_4p}and V

_{D}can be obtained as Equation (10). Moreover, the high order (third-order) component is small enough to be omitted as Equation (11).

_{ds}replaces L

_{s}in Equation (5), which are both the driver circuit stray inductance. Compared to the gate-source voltage of 3-pin SiC MOSFET, the difference lies in variates g

_{fs}and L

_{s}, see Equation (5) and Equation (11). The drive circuit of SiC MOSFETs can also be approximately equivalent to a second-order system, where the damping coefficient ξ

_{2}and resonance frequency ω

_{n}

_{2}are shown in Equation (12).

_{rgs_4pβ}is the time of stage 2 of the turn-on process for 4-pin SiC MOSFETs. When the system is under the overdamped conditions, the rise time t

_{rgsβ_4p}is derived as Equation (13).

#### 3.3. Efficiency Improvement Analysis

_{n}

_{2}(4-pin package) is larger than ω

_{n}

_{1}(3-pin package), while the damping coefficient ξ

_{2}(4-pin package) is less than ξ

_{1}(3-pin package). This dynamic system feature is shown in Equations (14) and (15).

_{1}~t

_{2}) in Figure 5, compared to the 3-pin counterparts. Thus, we can get:

## 4. Loss Model Considering the Impact of Gate-Source Voltage Interference

_{tot}of all-SiC MOSFET PWM rectifiers, in Equation (19), mainly consists of SiC MOSFET loss E

_{Q}, magnetic component loss E

_{L}, and other loss E

_{others}. E

_{others}mainly include the loss of cooling fans, microprogrammed control unit (MCU), driver circuits, and auxiliary power supply (APS). It is easy to make the value of line resistance and stray inductance on the circuit board minimal by design, and the loss is much smaller than that of SiC MOSFET and magnetic components, which is generally ignored.

#### 4.1. General Loss Model of 3-pin SiC MOSFETs

_{Q}of SiC MOSFETs mainly includes the on-state loss E

_{CQ}, its anti-parallel diode conduction loss, and the switching loss E

_{SWQ}.

_{CQ}of the PWM rectifier is Equation (2), the average loss is calculated with one power frequency period, R

_{ds(on)}is the on-state resistance, f is the Space Vector Pulse Width Modulation (SVPWM) frequency, and T is the SVPWM period. V

_{F}(t) and i

_{F}(t) are, respectively, the voltage drop and current when diode D is on-state. DC

_{Q}(t) and DC

_{D}(t) are, respectively, the conduction duty cycle of MOSFET Q and its anti-parallel diode D.

_{SWQ}of the PWM rectifier is Equation (22), considering the conversion of the turn-off voltage, turn-on current, and driving resistance of the device.

_{sw}is the switching frequency, and E

_{on}and E

_{off}are the energy loss of the SiC MOSFET turn-on and turn-off once. E

_{rr}is the reverse recovery loss of the antiparallel diode. V

_{dc}and i(t) are the turn-off voltage and the turn-on current of the SiC MOSFET, respectively. R

_{g}is the driving resistance, and V

_{dc}

^{*}, I

_{dc}

^{*}, and R

_{g}

^{*}are the test conditions for the E

_{on}and E

_{off}values, which can be acquired from the device datasheet. N is the ratio of carrier frequency f

_{z}and SVPWM frequency f, and η is the switching loss ratio, applying the five-segment SVPWM, whose switching loss could be reduced about 1/3 [28]. E

_{rr}is the reverse recovery loss of anti-parallel diode D in one switching cycle.

#### 4.2. General Loss Model of Magnetic Components

_{L}of the AC power side filter inductor, which is divided into copper loss E

_{CuL}and iron loss E

_{FeL}. As is seen in Equation (4), copper loss refers to the loss caused by the equivalent resistance of the inductor, and iron loss refers to the core loss of the inductor.

_{L}is the equivalent resistance of the inductor.

_{hL}, eddy current loss E

_{cL}, and residual loss E

_{rL}. At low frequencies, core loss is mainly caused by hysteresis loss, but at high frequencies, not less than 30kHz, the eddy current loss and residual loss are much more notable than the hysteresis loss. Therefore, the core loss can be estimated as Equation (25).

_{SW}is a switching frequency, B

_{m}is magnetic induction strength of the core, and V is the volume of the core. α and β are frequencies and magnetic induction loss coefficients more significant than 1, respectively. The values of η, α, and β can be found in the technical manual of the core manufacturer.

#### 4.3. Loss Model of 4-pin Kelvin Package SiC MOSFETs

_{on}and turn-off energy E

_{off}of datasheet test condition usually consists of the impact of gate-source voltage interference.

_{on_xp}and E

_{off_xp}are turn-on energy and turn-off energy. t

_{rgs_xp}and t

_{fgs_xp}are the turn-on process and turn-off process for x-pin SiC MOSFETs, and the value of x is 3 or 4.

## 5. Experiments

_{GS}is the gate-source voltage of one of the SiC MOSFETs in the rectifier. Moreover, I

_{L}is the current of its filter inductance, which is also the input AC current. The prototype adopted the optimized SVPWM method, with a 120 ° no-switch-action zone shown on the V

_{GS}waveform. Figure 8a shows the waveforms from the 3-pin version of the PWM rectifier, and Figure 8b shows the waveforms from the 4-pin version.

_{GS}. After the falling edge, the V

_{GS}waveform showed a positive spike interference; Before the rising edge, the V

_{GS}waveform showed a negative spike interference. In Figure 8b, we took the negative spike as an example to further zoom-in and compared it with the 3-pin version’s V

_{GS}waveform. The waveform showed about 3 V decreased spike, at this time point, by using 4-pin packaged SiC MOSFETs.

_{tot}is the total loss of PWM rectifier, and P is the operation power. At half-load, the total loss shared 2.2% of the operation power. At full-load, the total loss shared 2.6% of the operation power. The share of switching loss was 42% at half-load and 36% at full-load.

- The switching loss was more than 1/3 of total loss at half-load and full-load conditions for all-SiC PWM rectifiers, and it had become the crucial factor for the efficiency.
- The PWM rectifier using the 4-pin SiC MOSFETs had a reduced total loss under 15 kW and 30 kW conditions than 3-pin SiC MOSFETs. The loss was reduced by about 0.2% at 15 kW and about 0.1% at 30 kW.
- The switching loss proportion of 4-pin SiC MOSFETs PWM rectifier was less than 3-pin SiC MOSFETs (6% less at 15 kW and 2% less at 30 kW).

## 6. Conclusions

- The rapid change of the main power current (di/dt) induced an electromotive force on the source parasitic inductance of the 3-pin SiC MOSFET, which was opposite to the driving voltage, suppressing the gate-source voltage change and increasing the switching loss.
- The mechanism of improving system efficiency by using the 4-pin Kelvin packaged SiC MOSFETs was theoretically investigated. The drive circuit of SiC MOSFETs could be approximately equivalent to a second-order system, and the switching time could be derived. Moreover, the switching time of 4-pin SiC MOSFETs was theoretically less than that of general 3-pin SiC MOSFETs.
- The loss model of all-SiC PWM rectifier was established by considering the impact of gate-source voltage interference. The switching loss of 4-pin SiC MOSFETs was smaller than 3-pin SiC MOSFETs, so the total loss of the PWM rectifier was decreased, and the system efficiency was improved.
- Based on the industrial product case study, two 30 kW all-SiC PWM rectifier versions were investigated, using 3-pin SiC MOSFETs and 4-pin SiC MOSFETs, respectively. The switching loss was more than 1/3 of the total loss for both of the rectifiers. However, the switching loss proportion of 4-pin SiC MOSFETs PWM rectifier was less than 3-pin SiC MOSFETs (6% less at 15 kW and 2% less at 30 kW).
- 4-pin Kelvin package SiC MOSFETs improved the efficiency of the PWM rectifier. Experiment results showed that the efficiency was increased by about 0.5% (20 W) maximally at 4 kW, and about 0.1% (30 W) at 30 kW full-load. The peak efficiency of the PWM rectifier, using 4-pin SiC MOSFETs, was as high as 97.93%, which was 0.16% higher than the peak efficiency of the 3-pin SiC MOSFETs-based PWM rectifier.

## Author Contributions

## Funding

## Conflicts of Interest

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**Figure 1.**The outlook of the electric vehicle (EV) charging pile and the topological diagram of its all-SiC (silicon carbide) power module with the Pulse Width Modulation (PWM) rectifier.

**Figure 3.**The parasitic parameters of the bridge circuit and its driving circuit: (

**a**) 3-pin SiC Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET), (

**b**) 4-pin SiC MOSFET.

**Figure 4.**The current flow of general 3-pin SiC MOSFET during switching: (

**a**) Turn-on process, (

**b**) Turn-off process.

**Figure 5.**The simplified waveforms change during SiC MOSFET switching: (

**a**) Turn-on process, (

**b**) Turn-off process.

**Figure 6.**The current flow of general 4-pin SiC MOSFET during switching: (

**a**) Turn-on process, (

**b**) Turn-off process.

**Figure 9.**Loss distribution diagram of 3-pin all-SiC MOSFET PWM rectifier: (

**a**) Half-load 15 kW (E

_{tot}/P≈2.2%), (

**b**) Full-load 30 kW (E

_{tot}/P≈2.6%).

**Figure 10.**Loss distribution diagram of 4-pin all-SiC MOSFET PWM rectifier: (

**a**) Half-load 15 kW (E

_{tot}/P≈2.0%), (

**b**) Full-load 30 kW (E

_{tot}/P≈2.5%).

Terms | Content | Terms | Content |
---|---|---|---|

Basic Index | Output Characteristic | ||

Size | 133 mm (H) × 242 mm (W) × 395 mm (D) | Rated voltage | 750 VDC |

Weight | ≤ 15.5 kg | Rated current | 40 A |

Operation temperature | −25 °C ~ + 75 °C −25 °C ~+ 65 °C fully output +65 °C ~ + 75 °C limited output | Max. current | 50 A |

Storage temperature | −40 °C ~ + 75 °C | Voltage range | 300 V ~ 750 V |

Relative humidity | 5% RH ~ 95% RH (no condensation) | Max. power | 30 kW |

Altitude | ≤2000 m (limited function over 2000 m) | Voltage accuracy | ≤ ± 0.5% |

Cooling mode | Intelligent air cooling | Current accuracy | ≤ ± 1% |

Communication bus protocol | CAN | Current error | ≤ ± 0.5% |

Max. NO. for parallel | 32 | Voltage error | ≤ ± 1% |

Input Characteristic | Output ripple | Peak coefficient < 1% Root Mean Square (RMS) coefficient < 0.5% | |

Operation voltage | 270 VAC ~ 450 VAC 270 VAC ~ 320 VAC limited output; 320 VAC ~ 450 VAC fully output | Starting impulse current | ≤ 110% |

Frequency | 45 Hz ~ 65 Hz, 50 Hz/60 Hz rated | Peak efficiency | ≥ 97% |

Input current | ≤ 60 A | Boot time | 3 s ~ 8 s |

Power factor | ≥ 0.98 (loaded rate 50% ~ 100%) | Noise | < 65 dB (measurement distance 1 m) |

Current THD | ≤ 5% (loaded rate 50% ~ 100%) | Stand-by loss | ≤ 25 W (380 VAC input) |

Component | Manufacturer | Model | Parameters |
---|---|---|---|

3-pin SiC MOSFET | Global Power Technology | GIM040120B | 1200 V 40 mΩ |

4-pin SiC MOSFET | Global Power Technology | GIM040120E | 1200 V 40 mΩ |

AC side inductance | — | — | 225 μH |

Parameter | Value | Unit | Note |
---|---|---|---|

Rated power | 30 | kW | — |

AC voltage | 380 | V | Three-phase |

DC voltage | 750 | V | — |

Switching Frequency | 30 | kHz | — |

AC side inductance | 225 | μH | 225 μH |

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## Share and Cite

**MDPI and ACS Style**

Li, Z.; Wang, Z.; Zheng, T.; Li, H.; Huang, B.; Shao, T. Efficiency Optimization for All-Silicon Carbide (SiC) PWM Rectifier Considering the Impact of Gate-Source Voltage Interference. *Energies* **2020**, *13*, 1421.
https://doi.org/10.3390/en13061421

**AMA Style**

Li Z, Wang Z, Zheng T, Li H, Huang B, Shao T. Efficiency Optimization for All-Silicon Carbide (SiC) PWM Rectifier Considering the Impact of Gate-Source Voltage Interference. *Energies*. 2020; 13(6):1421.
https://doi.org/10.3390/en13061421

**Chicago/Turabian Style**

Li, Zhijun, Zuoxing Wang, Trillion Zheng, Hong Li, Bo Huang, and Tiancong Shao. 2020. "Efficiency Optimization for All-Silicon Carbide (SiC) PWM Rectifier Considering the Impact of Gate-Source Voltage Interference" *Energies* 13, no. 6: 1421.
https://doi.org/10.3390/en13061421