Impact of Phase Locked Loop with Di ﬀ erent Types and Control Dynamics on Resonance of DFIG System

: In recent years, the doubly fed induction generator (DFIG) operates in a weak grid, rather than a strong grid due to the high proportion of wind energy into the power grid. The impedance interaction between the DFIG system and series and parallel compensated weak grid might cause the subsynchronous resonance (SSR) and high frequency resonance (HFR) in the DFIG system, respectively. Phase locked loop (PLL) is a popular grid synchronization technique, and the high bandwidth PLL can cause resonance at middle frequencies in the DFIG system. However, the impact of PLL types and their controller dynamics on the resonance in the DFIG system are not adequately researched. The impact of the PLL controller with di ﬀ erent types, such as synchronous reference frame (SRF) and Lead / Lag PLL, is studied in this paper to ﬁll this gap. Additionally, an improved PLL is proposed, which can guarantee the high phase margin and decrease the likelihood of the resonance at middle frequencies in the DFIG system under a weak grid. Moreover, the phase margin of the DFIG system impedance with an improved PLL is less sensitive to its controller parameters. Simulation and experimental results verify the e ﬀ ectiveness of the proposed method.


Introduction
The cost-effective variable speed operations and partial size power converter make the doubly fed induction generator (DFIG) prevalent in a modern wind power plant [1]. In recent years, the increasing growth of the DFIG system into a weak power system with large impedance might be seen [2][3][4], where the stable and secure operation of the DFIG system is contestable.
Vector control (VC) is the most widely used technique for a grid-connected DFIG system, and it can be divided into a stator voltage oriented VC and stator flux oriented VC. The most crucial factor for the stator voltage oriented VC is the phase locked loop (PLL) phase angle. While using the PLL Phase angle information, the d-axis and q-axis values of stator and rotor current and grid voltage are accurately computed through the park and inverse park transformation. Additionally, the rotor side converter (RSC) and grid side converter (GSC) controller can be resolute by the phase angle information provided by the PLL [17].
used, which will be discussed in the subsequent section of the paper. The PLL output angle θPLL is used to control the rotor and grid current employing the RSC and GSC, respectively.
The outer power and inner current control loop constitute the RSC control system with proportional and integral (PI) controllers. The deduction of PLL angle (θPLL) and the rotor position angle (θρ) are the most critical information required for the park and inverse park transformation, which are required in the control of the rotor current and voltage. The outer power control loop is ignored due to its large time constant.
Likewise, the RSC, the GSC outer dc-link voltage control loop, requires the phase angle information θPLL for the park and inverse park transformation in computing the reference for the converter-side filter current. Similarly, the outer dc-link control loop is ignored, due to the larger time constant. Consequently, the rotor/filter current and control voltage transformation results might be influenced, which can degrade the accuracy of current tracking.  Figure 2 shows the schematic diagram of SRF-PLL. To synchronize the grid voltage with DFIG, the phase angle for transformation is necessary, as can be seen in Figure 2. The abc to αβ transformation does not require phase angle information, so it will not be included in the subsequent calculation. However, phase angle information plays an important role in abc to dq transformation.

Synchronous reference frame-PLL (SRF-PLL): Small Signal Impedance Modeling
The transformation from Vabc to Vαβ frame of reference is given by    used, which will be discussed in the subsequent section of the paper. The PLL output angle θPLL is used to control the rotor and grid current employing the RSC and GSC, respectively. The outer power and inner current control loop constitute the RSC control system with proportional and integral (PI) controllers. The deduction of PLL angle (θPLL) and the rotor position angle (θρ) are the most critical information required for the park and inverse park transformation, which are required in the control of the rotor current and voltage. The outer power control loop is ignored due to its large time constant.
Likewise, the RSC, the GSC outer dc-link voltage control loop, requires the phase angle information θPLL for the park and inverse park transformation in computing the reference for the converter-side filter current. Similarly, the outer dc-link control loop is ignored, due to the larger time constant. Consequently, the rotor/filter current and control voltage transformation results might be influenced, which can degrade the accuracy of current tracking.  Figure 2 shows the schematic diagram of SRF-PLL. To synchronize the grid voltage with DFIG, the phase angle for transformation is necessary, as can be seen in Figure 2. The abc to αβ transformation does not require phase angle information, so it will not be included in the subsequent calculation. However, phase angle information plays an important role in abc to dq transformation.

Synchronous reference frame-PLL (SRF-PLL): Small Signal Impedance Modeling
The transformation from Vabc to Vαβ frame of reference is given by Similarly, the transformation from Vαβ to Vdq is given by The abc to αβ transformation does not require phase angle information, so it will not be included in the subsequent calculation. However, phase angle information plays an important role in abc to dq transformation.
The transformation from V abc to V αβ frame of reference is given by Similarly, the transformation from V αβ to V dq is given by Based on (2), it can be seen that this transformation is nonlinear, and its transfer function cannot be directly obtained. The small-signal modeling method [22] is adopted to deduce its transfer function. The PLL is supposed to be ideal in the steady state, such that the error in phase angle is zero. With this approximation, we have where the superscript "(1)" and "(2)" represent the components of PLL control output and PCC voltage, respectively. Considering a small perturbation to disrupt the steady state can be utilized to derive the transfer function of the PLL, and then we have dq represent the steady state dq voltage component of PLL and PCC, respectively. v and v (2) dq represent the small-signal perturbation dq voltage components of PLL and PCC, respectively. ∆ θ represents the small-signal perturbation of the PLL phase angle.
While taking the trigonometric function small-angle approximation into consideration, we have Ignoring the steady-state parameters in (5), we have The output phase angle of PLL is given by where G PLL (s) = K pPLL + K iPLL /s represents the PLL unit PI controller. Combining (6) and (7), we have The transfer function from the phase angle of PLL to the PCC voltage q-component is given by While substituting (9b) into (5), the closed loop transfer function matrix including the transformation from V αβ to V dq , the PLL unit, and an integral block can be obtained and is given by The transfer function matrix in its final form (αβ to dq) is given by Equations that are similar to (2) can be obtained for the transformation from V dq to V αβ and it is given by Energies 2020, 13, 1039 6 of 26 The closed loop transfer function matrix, including the transformation from V dq to V αβ , by repeating the similar steps, as given above, the PLL unit and an integral block can be obtained, and is given by The transfer function matrix in its final form (dq to αβ) is given by 2.3. Small Signal Modeling of Lead/Lag PLL Figure 3 shows the schematic diagram of Lead/Lag PLL. The Lead/Lag Lag/lead controller in the PLL structure is preferred due to the enhanced filtering features. More details regarding Lead/Lag PLL can be found in [30].
Energies 2020, 13, 1039 6 of 24 Figure 3 shows the schematic diagram of Lead/Lag PLL. The Lead/Lag Lag/lead controller in the PLL structure is preferred due to the enhanced filtering features. More details regarding Lead/Lag PLL can be found in [30].  Based on Figure 3, the open and closed loop transfer function of the Lead/Lag PLL can be obtained and it is expressed as

Small Signal Modeling of Lead/Lag PLL
The detailed deduction of the small signal impedance model of the Lead/Lag will not be discussed here, as the derivations process is similar to the SRF-PLL. The final equation that is similar to (11) and (14) can be obtained and is given as  Based on Figure 3, the open and closed loop transfer function of the Lead/Lag PLL can be obtained and it is expressed as

Small Signal Modeling of Improved PLL
The detailed deduction of the small signal impedance model of the Lead/Lag will not be discussed here, as the derivations process is similar to the SRF-PLL. The final equation that is similar to (11) and (14) can be obtained and is given as  The open and closed loop transfer function of the improved PLL that is based on Figure 4 can be expressed as

Small Signal Modeling of Improved PLL
The detailed deduction of the small signal impedance model of the improved will not be discussed here, as the derivations process is similar to the SRF-PLL. The final equation similar to (11) and (14) can be obtained and is given as The open and closed loop transfer function of the improved PLL that is based on Figure 4 can be expressed as The detailed deduction of the small signal impedance model of the improved will not be discussed here, as the derivations process is similar to the SRF-PLL. The final equation similar to (11) and (14) can be obtained and is given as

Impedance Modeling: DFIG System with PLL Inclusions
The impedance modeling of the DFIG system can be established based on the modeling of different PLL types. In this paper, for simplifying the DFIG system impedance modeling, the transformation from abc to αβ is ignored in the impedance modeling, as it does not interact with the PLL and controller of the DFIG system. Furthermore, the dc-link voltage controller dynamics is ignored (because of the lower bandwidth (10 Hz or less) of the dc-link voltage controller) to more clearly show the PLL impact on the impedance modeling. It should be noted that the PLLs of the DFIG system causes resonances at the middle frequency range from 200 Hz to 800 Hz.
3.1. Impedance Modeling with SRF-PLL Figure 5 depicts the rotor current controller of the RSC. The different control units used in Figure 5 are discussed, as follows. The PI controller of the rotor current can be expressed as where K p1 and K i1 are the RSC current controller proportional and integral parameters, respectively. The PWM digital delay can be expressed as where T D is the digital control delay.

Impedance Modeling: DFIG System with PLL Inclusions
The impedance modeling of the DFIG system can be established based on the modeling of different PLL types. In this paper, for simplifying the DFIG system impedance modeling, the transformation from abc to αβ is ignored in the impedance modeling, as it does not interact with the PLL and controller of the DFIG system. Furthermore, the dc-link voltage controller dynamics is ignored (because of the lower bandwidth (10 Hz or less) of the dc-link voltage controller) to more clearly show the PLL impact on the impedance modeling. It should be noted that the PLLs of the DFIG system causes resonances at the middle frequency range from 200 Hz to 800 Hz. Figure 5 depicts the rotor current controller of the RSC. The different control units used in Figure 5 are discussed, as follows. The PI controller of the rotor current can be expressed as

Impedance Modeling with SRF-PLL
where Kp1 and Ki1 are the RSC current controller proportional and integral parameters, respectively. The PWM digital delay can be expressed as where TD is the digital control delay.  Figure 6a shows the equivalent circuit of the DFIG machine. Rs and Rr are the stator and rotor resistance, respectively. Lls, Llr, and LM are the stator leakage inductance, rotor leakage inductance, and magnetizing inductance, respectively. The magnetizing inductance branch can be ignored due to the high value of stator and rotor leakage inductance. Subsequently, the simplified equivalent circuit of the DFIG machine can be drawn, as shown in Figure 6b.
The impedance of the DFIG machine, which is based on Figure 5, is given by Based on Figure 5, as seen from the PCC, the rotor part DFIG impedance is given by where K1=VPCC/V1  Figure 6a shows the equivalent circuit of the DFIG machine. R s and R r are the stator and rotor resistance, respectively. L ls , L lr , and L M are the stator leakage inductance, rotor leakage inductance, and magnetizing inductance, respectively. The magnetizing inductance branch can be ignored due to the high value of stator and rotor leakage inductance. Subsequently, the simplified equivalent circuit of the DFIG machine can be drawn, as shown in Figure 6b.
The impedance of the DFIG machine, which is based on Figure 5, is given by Based on Figure 5, as seen from the PCC, the rotor part DFIG impedance is given by where Equation (24) contains both α and β components. It can be separated into α and β components, as follows: Figure 7 shows the DFIG machine and RSC impedance modeling, the simplified diagram of the grid current controller of the LCL filter, and GSC impedance.  Figure 8a shows the equivalent circuit of the LCL filter and GSC. The filter reactance Cf can be ignored due to the high reactance contrary to L1 and L2. Subsequently, the current Ifαβ and Igαβ are the same, and the simplified equivalent circuit is redrawn, as shown in Figure 8b.
Based on Figure 8b, the Gc2(s) and Gf(s) can be expressed as where Kp2 and Ki2 are the GSC current controller proportional and integral parameters, respectively.
Based on Figure 8, the grid part DFIG impedance, as seen from the PCC, is given by where K2=VPCC/V2 Equation (24) contains both α and β components. It can be separated into α and β components, as follows: Likewise, Figure 7 shows the DFIG machine and RSC impedance modeling, the simplified diagram of the grid current controller of the LCL filter, and GSC impedance. Equation (24) contains both α and β components. It can be separated into α and β components, as follows: Figure 7 shows the DFIG machine and RSC impedance modeling, the simplified diagram of the grid current controller of the LCL filter, and GSC impedance.  Figure 8a shows the equivalent circuit of the LCL filter and GSC. The filter reactance Cf can be ignored due to the high reactance contrary to L1 and L2. Subsequently, the current Ifαβ and Igαβ are the same, and the simplified equivalent circuit is redrawn, as shown in Figure 8b.
Based on Figure 8b, the Gc2(s) and Gf(s) can be expressed as where Kp2 and Ki2 are the GSC current controller proportional and integral parameters, respectively.
Based on Figure 8, the grid part DFIG impedance, as seen from the PCC, is given by where K2=VPCC/V2  Figure 8a shows the equivalent circuit of the LCL filter and GSC. The filter reactance C f can be ignored due to the high reactance contrary to L 1 and L 2 . Subsequently, the current I fαβ and I gαβ are the same, and the simplified equivalent circuit is redrawn, as shown in Figure 8b.
Based on Figure 8b, the G c2 (s) and G f (s) can be expressed as where K p2 and K i2 are the GSC current controller proportional and integral parameters, respectively.
Based on Figure 8, the grid part DFIG impedance, as seen from the PCC, is given by where Likewise (24), (28) contain both α and β components. It can be separated into α and β components, as follows: The overall DFIG impedance can be seen as the parallel combination of rotor part DFIG impedance and grid part DFIG impedance. The overall DFIG system impedance in α and β axis can be expressed as The parallel compensated weak grid impedance is given by where Rg2, Lg2, and Cg2 are resistance, inductance, and capacitance of parallel compensated weak grid, respectively. Table 1 gives the parameters of the weak grid.

Impedance Modeling with Lead/Lag PLL
The impedance model of the DFIG system with Lead/Lag PLL can be deduced in a similar way as with the SRF-PLL. The α and β components of the DFIG system rotor part impedance and grid part impedance with the Lead/Lag PLL can be expressed as The overall DFIG system impedance while considering Lead/Lag PLL can be expressed as Likewise (24), (28) contain both α and β components. It can be separated into α and β components, as follows: The overall DFIG impedance can be seen as the parallel combination of rotor part DFIG impedance and grid part DFIG impedance. The overall DFIG system impedance in α and β axis can be expressed as The parallel compensated weak grid impedance is given by where R g2 , L g2 , and C g2 are resistance, inductance, and capacitance of parallel compensated weak grid, respectively. Table 1 gives the parameters of the weak grid.

Impedance Modeling with Lead/Lag PLL
The impedance model of the DFIG system with Lead/Lag PLL can be deduced in a similar way as with the SRF-PLL. The α and β components of the DFIG system rotor part impedance and grid part impedance with the Lead/Lag PLL can be expressed as The overall DFIG system impedance while considering Lead/Lag PLL can be expressed as

Impedance Modeling with Improved PLL
The impedance model of the DFIG system with an improved PLL can be deduced in a similar way to the SRF-PLL. The α and β component of the DFIG system rotor part impedance and grid part impedance with an improved PLL can be expressed as The overall DFIG system impedance considering improved PLL is given by Figure 9 shows the Bode plot of the closed loop transfer function of PLL with the parameters given in Table 1. It can be seen in Figure 9 that the PLL bandwidth with different parameters varies in direct proportion with the proportional and integral gains of PLL, resulting in low, medium, and high bandwidth PLL. Figure 9 shows the Bode plot of the closed loop transfer function of PLL with the parameters given in Table 1. It can be seen in Figure 9 that the PLL bandwidth with different parameters varies in direct proportion with the proportional and integral gains of PLL, resulting in low, medium, and high bandwidth PLL. The Bode plot of parallel compensated weak grid impedance in (31) with (Cg2 = 0.0032 F and 0.0062 constituting Zgp1 and Zgp2), and the DFIG system impedance in (30) is shown in Figure 10. The Bode plot of parallel compensated weak grid impedance in (31) with (C g2 = 0.0032 F and 0.0062 constituting Z gp1 and Z gp2 ), and the DFIG system impedance in (30) is shown in Figure 10. It can be seen in Figure 10 that α component of DFIG impedance in pink has the magnitude intersection point with weak grid impedance at point A1 and A2. The corresponding phase difference at point A1 and A2 is less than 180°. Accordingly, the resonance at the middle frequency is not likely to occur. The reason is that there is no PLL involved in the α component of DFIG impedance. The β components of DFIG impedance while taking the low bandwidth PLL into consideration have the magnitude intersection points C1 and C2 with weak grid impedance. The phase differences at the corresponding points are less than 180°. The resonance at the middle frequencies is not likely to occur due to the low bandwidth of PLL. However, if the medium and high bandwidth PLL is taken into consideration, the β component of DFIG impedance has two magnitude intersection points with weak grid impedance, namely B1 and B2. Additionally, the corresponding phase difference at the point B1 and B2 are higher than 180° at frequencies 210 Hz and 290 Hz, respectively. This shows that the high bandwidth of PLL can cause resonance to occur at the middle frequencies, i.e., from 200 Hz to 800 Hz. The aforementioned analysis and simulation results show that PLL parameters have a significant impact on the resonance. Figure 11 shows the Bode diagram with different SRF-PLL control parameters. It can be seen in Figure 10 that α component of DFIG impedance in pink has the magnitude intersection point with weak grid impedance at point A 1 and A 2 . The corresponding phase difference at point A 1 and A 2 is less than 180 • . Accordingly, the resonance at the middle frequency is not likely to occur. The reason is that there is no PLL involved in the α component of DFIG impedance. The β components of DFIG impedance while taking the low bandwidth PLL into consideration have the magnitude intersection points C 1 and C 2 with weak grid impedance. The phase differences at the corresponding points are less than 180 • . The resonance at the middle frequencies is not likely to occur due to the low bandwidth of PLL. However, if the medium and high bandwidth PLL is taken into consideration, the β component of DFIG impedance has two magnitude intersection points with weak grid impedance, namely B 1 and B 2 . Additionally, the corresponding phase difference at the point B 1 and B 2 are higher than 180 • at frequencies 210 Hz and 290 Hz, respectively. This shows that the high bandwidth of PLL can cause resonance to occur at the middle frequencies, i.e., from 200 Hz to 800 Hz. The aforementioned analysis and simulation results show that PLL parameters have a significant impact on the resonance. Figure 11 shows the Bode diagram with different SRF-PLL control parameters.

Simulation Results with SRF-PLL
magnitude intersection points C1 and C2 with weak grid impedance. The phase differences at the corresponding points are less than 180°. The resonance at the middle frequencies is not likely to occur due to the low bandwidth of PLL. However, if the medium and high bandwidth PLL is taken into consideration, the β component of DFIG impedance has two magnitude intersection points with weak grid impedance, namely B1 and B2. Additionally, the corresponding phase difference at the point B1 and B2 are higher than 180° at frequencies 210 Hz and 290 Hz, respectively. This shows that the high bandwidth of PLL can cause resonance to occur at the middle frequencies, i.e., from 200 Hz to 800 Hz. The aforementioned analysis and simulation results show that PLL parameters have a significant impact on the resonance. Figure 11 shows the Bode diagram with different SRF-PLL control parameters.  Choosing the small K pPLL and K iPLL for PLL, the high phase margin can be guaranteed, and the resonance is not likely to occur, as can be seen in Figure 11. However, when the PLL parameters are increased, i.e., the high bandwidth PLL can cause less phase margin, as shown in Figure 11. It is noteworthy that the DFIG system impedance does not rely on PLL impedance. Other parameters, like the digital delay of PWM and the parameters of the current controller, can also affect the impedance modeling of the DFIG system.

Simulation Results with Lead/Lag PLL
Selecting three different Lead/Lag PLL with the same bandwidth (low, medium, and high) as SRF-PLL and Lead/Lag PLL is shown in Figure 12. Table 1 provides the Lead/Lag PLL parameters.
Energies 2020, 13, 1039 12 of 24 Choosing the small KpPLL and KiPLL for PLL, the high phase margin can be guaranteed, and the resonance is not likely to occur, as can be seen in Figure 11. However, when the PLL parameters are increased, i.e., the high bandwidth PLL can cause less phase margin, as shown in Figure 11. It is noteworthy that the DFIG system impedance does not rely on PLL impedance. Other parameters, like the digital delay of PWM and the parameters of the current controller, can also affect the impedance modeling of the DFIG system.

Simulation Results with Lead/Lag PLL
Selecting three different Lead/Lag PLL with the same bandwidth (low, medium, and high) as SRF-PLL and Lead/Lag PLL is shown in Figure 12. Table 1 provides the Lead/Lag PLL parameters. The Bode plot of parallel compensated weak grid impedance in (31) (Cg2 = 0.0032 F and 0.0062 constituting Zgp1 and Zgp2), and the DFIG system impedance in (34) for three Lead/Lag PLL with different parameters is shown in Figure 13.  The Bode plot of parallel compensated weak grid impedance in (31) (C g2 = 0.0032 F and 0.0062 constituting Z gp1 and Z gp2 ), and the DFIG system impedance in (34) for three Lead/Lag PLL with different parameters is shown in Figure 13. The Bode plot of parallel compensated weak grid impedance in (31) (Cg2 = 0.0032 F and 0.0062 constituting Zgp1 and Zgp2), and the DFIG system impedance in (34) for three Lead/Lag PLL with different parameters is shown in Figure 13. It can be seen in Figure 13 that α component of DFIG impedance in pink has the magnitude intersection point with weak grid impedance at point C1 and C2. The corresponding phase difference at point C1 and C2 is less than 180°. Accordingly, the resonance at the middle frequency is not likely to occur. The reason is that there is no PLL involved in the α component of DFIG impedance. The β It can be seen in Figure 13 that α component of DFIG impedance in pink has the magnitude intersection point with weak grid impedance at point C 1 and C 2 . The corresponding phase difference at point C 1 and C 2 is less than 180 • . Accordingly, the resonance at the middle frequency is not likely to occur. The reason is that there is no PLL involved in the α component of DFIG impedance. The β component of DFIG impedance taking the low and high bandwidth Lead/Lag PLL into consideration have the magnitude intersection points A, A 1 , and A 2 for grid impedance Z gp2 and B, B 1 , and B 2 for grid impedance Z gp1 . The phase differences at the corresponding points are less than 180 • . The resonance at the middle frequencies is not likely to occur due to the low bandwidth of PLL. However, if the medium and high bandwidth PLL is taken into consideration, then the β component of DFIG impedance might cause resonance at middle frequencies. The aforementioned analysis and simulation results show that Lead/Lag PLL parameters have little impact on the impedance modeling of the DFIG system as compared to SRF-PLL. Figure 14 depicts the Bode diagram with different Lead/Lag PLL control parameters to give a more clear insight into the resonance. It can be seen in Figure 14 that selecting the low bandwidth Lead/Lag PLL, the high phase margin can be guaranteed, and the resonance is not likely to occur. However, the high bandwidth Lead/Lag PLL can cause less phase margin, as shown in Figure 14. It is noteworthy, that phase margin taking high bandwidth Lead/Lag PLL is high when compared to SRF-PLL with high bandwidth. Figure 14 depicts the Bode diagram with different Lead/Lag PLL control parameters to give a more clear insight into the resonance. It can be seen in Figure 14 that selecting the low bandwidth Lead/Lag PLL, the high phase margin can be guaranteed, and the resonance is not likely to occur. However, the high bandwidth Lead/Lag PLL can cause less phase margin, as shown in Figure 14. It is noteworthy, that phase margin taking high bandwidth Lead/Lag PLL is high when compared to SRF-PLL with high bandwidth.  Figure 15 shows three different improved PLL with the same bandwidth (low, medium, and high) as SRF-PLL, and Lead/Lag PLL, with the parameters being given in Table I.   Figure 15 shows three different improved PLL with the same bandwidth (low, medium, and high) as SRF-PLL, and Lead/Lag PLL, with the parameters being given in Table 1. modeling of the DFIG system as compared to SRF-PLL. Figure 14 depicts the Bode diagram with different Lead/Lag PLL control parameters to give a more clear insight into the resonance. It can be seen in Figure 14 that selecting the low bandwidth Lead/Lag PLL, the high phase margin can be guaranteed, and the resonance is not likely to occur. However, the high bandwidth Lead/Lag PLL can cause less phase margin, as shown in Figure 14. It is noteworthy, that phase margin taking high bandwidth Lead/Lag PLL is high when compared to SRF-PLL with high bandwidth.  Figure 15 shows three different improved PLL with the same bandwidth (low, medium, and high) as SRF-PLL, and Lead/Lag PLL, with the parameters being given in Table I.      Figure 16 shows that the α component of DFIG impedance in pink and the β component with low and high bandwidth improved PLL have approximately the same impedance shape. There exist two magnitude intersection points with weak grid impedance at points A and B. The corresponding phase difference at points A and B is less than 180°. Hence, the resonance at the middle frequency is not likely to occur, even with the high bandwidth improved PLL. The aforementioned analysis and simulation results show that improved PLL parameters have an insignificant impact on the DFIG system impedance modeling when compared to SRF-PLL and Lead/Lag PLL.

Simulation Results with Improved PLL
The Bode plot of parallel compensated weak grid, and the DFIG system with improved PLL of different control parameters is shown in Figure 17 to give a more clear insight into the resonance. Contrary to SRF-PLL and Lead/Lag PLL, the high phase margin can be guaranteed in the case of improved PLL. Additionally, it can be seen in Figure 17 that the control parameters of improved PLL have a minimal effect on the phase margin. Accordingly, the improved PLL can be used as an alternative to SRF-PLL and Lead/Lag PLL for the DFIG system under the weak grid to guarantee the improved dynamic performance and stability enhancement.   Figure 16 shows that the α component of DFIG impedance in pink and the β component with low and high bandwidth improved PLL have approximately the same impedance shape. There exist two magnitude intersection points with weak grid impedance at points a and B. The corresponding phase difference at points A and B is less than 180 • . Hence, the resonance at the middle frequency is not likely to occur, even with the high bandwidth improved PLL. The aforementioned analysis and simulation results show that improved PLL parameters have an insignificant impact on the DFIG system impedance modeling when compared to SRF-PLL and Lead/Lag PLL.
The Bode plot of parallel compensated weak grid, and the DFIG system with improved PLL of different control parameters is shown in Figure 17 to give a more clear insight into the resonance. Contrary to SRF-PLL and Lead/Lag PLL, the high phase margin can be guaranteed in the case of improved PLL. Additionally, it can be seen in Figure 17 that the control parameters of improved PLL have a minimal effect on the phase margin. Accordingly, the improved PLL can be used as an alternative to SRF-PLL and Lead/Lag PLL for the DFIG system under the weak grid to guarantee the improved dynamic performance and stability enhancement.   Figure 16 shows that the α component of DFIG impedance in pink and the β component with low and high bandwidth improved PLL have approximately the same impedance shape. There exist two magnitude intersection points with weak grid impedance at points A and B. The corresponding phase difference at points A and B is less than 180°. Hence, the resonance at the middle frequency is not likely to occur, even with the high bandwidth improved PLL. The aforementioned analysis and simulation results show that improved PLL parameters have an insignificant impact on the DFIG system impedance modeling when compared to SRF-PLL and Lead/Lag PLL.
The Bode plot of parallel compensated weak grid, and the DFIG system with improved PLL of different control parameters is shown in Figure 17 to give a more clear insight into the resonance. Contrary to SRF-PLL and Lead/Lag PLL, the high phase margin can be guaranteed in the case of improved PLL. Additionally, it can be seen in Figure 17 that the control parameters of improved PLL have a minimal effect on the phase margin. Accordingly, the improved PLL can be used as an alternative to SRF-PLL and Lead/Lag PLL for the DFIG system under the weak grid to guarantee the improved dynamic performance and stability enhancement.

Time Domain Simulations
This section validates impedance modeling through time domain simulations.

Simulation Results with SRF-PLL
Two cases of low and high bandwidth SRF-PLL are validated through time-domain simulations. Figure 18a,b depict the stator voltage, stator and rotor current, active and reactive power, and torque for the DFIG system operated under weak grid employing the low bandwidth PLL (K pPL = 5, K iPLL = 50) and high bandwidth PLL (K pPLL = 500, K iPLL = 5000), respectively. With the low bandwidth PLL, the resonance at middle frequency will not exist, as can be seen in Figure 18a. Contrary to Figure 18a, the resonance is likely to exist, as can be seen in Figure 18b. The resonance frequency in the stator and rotor current induce resonance in the active and reactive power and electromagnetic torque.

Time Domain Simulations
This section validates impedance modeling through time domain simulations.

Simulation Results with SRF-PLL
Two cases of low and high bandwidth SRF-PLL are validated through time-domain simulations. Figure 18a and Figure 18b depict the stator voltage, stator and rotor current, active and reactive power, and torque for the DFIG system operated under weak grid employing the low bandwidth PLL (KpPL = 5, KiPLL = 50) and high bandwidth PLL (KpPLL = 500, KiPLL = 5000), respectively. With the low bandwidth PLL, the resonance at middle frequency will not exist, as can be seen in Figure 18a. Contrary to Figure 18a, the resonance is likely to exist, as can be seen in Figure 18b. The resonance frequency in the stator and rotor current induce resonance in the active and reactive power and electromagnetic torque.   Figures 19a,b show the FFT analysis of the DFIG stator voltage with low and high bandwidth PLL, respectively. There is no resonance at the middle frequencies, as can be seen in Figure 19a However, the resonance at 295 Hz and 3955 Hz exists if the high bandwidth SRF-PLL is considered, as reflected in Figure 19b.
Energies 2020, 13, 1039 16 of 24 Figure 19a and Figure 19b show the FFT analysis of the DFIG stator voltage with low and high bandwidth PLL, respectively. There is no resonance at the middle frequencies, as can be seen in Figure 19a However, the resonance at 295 Hz and 3955 Hz exists if the high bandwidth SRF-PLL is considered, as reflected in Figure 19b.

Simulation Results with Lead/Lag PLL
Likewise, the SRF-PLL, Figure 20a, and Figure 20b depict the stator voltage, stator, and rotor current, active and reactive power, and torque employing the low bandwidth (K = 13, T1 = 0.0092, T2 = 0.0003) and high bandwidth (K = 493, T1 = 0.0012, T2 = 0.0003) Lead/Lag PLL, respectively. If the low bandwidth Lead/Lag PLL is chosen for the DFIG system, the resonance at middle frequency will not exist, as indicated in Figure 20a. Contrary to Figure 20a, the resonance is likely to exist in the aforementioned quantities, as demonstrated in Figure 20b. Figure 21a and Figure 21b portray the FFT analysis of the DFIG stator voltage with low and high bandwidth Lead/Lag PLL, respectively. It can be seen in Figure 21a that there is no resonance at the middle frequencies. However, the resonance at 305 Hz and 405 Hz occurs if the high bandwidth Lead/Lag PLL is considered, as evident in Figure 21b.

Simulation Results with Lead/Lag PLL
Likewise, the SRF-PLL, Figure 20a, and Figure 20b depict the stator voltage, stator, and rotor current, active and reactive power, and torque employing the low bandwidth (K = 13, T 1 = 0.0092, T 2 = 0.0003) and high bandwidth (K = 493, T 1 = 0.0012, T 2 = 0.0003) Lead/Lag PLL, respectively. If the low bandwidth Lead/Lag PLL is chosen for the DFIG system, the resonance at middle frequency will not exist, as indicated in Figure 20a. Contrary to Figure 20a, the resonance is likely to exist in the aforementioned quantities, as demonstrated in Figure 20b. Figure 21a,b portray the FFT analysis of the DFIG stator voltage with low and high bandwidth Lead/Lag PLL, respectively. It can be seen in Figure 21a that there is no resonance at the middle frequencies. However, the resonance at 305 Hz and 405 Hz occurs if the high bandwidth Lead/Lag PLL is considered, as evident in Figure 21b.  Figure 19a and Figure 19b show the FFT analysis of the DFIG stator voltage with low and high bandwidth PLL, respectively. There is no resonance at the middle frequencies, as can be seen in Figure 19a However, the resonance at 295 Hz and 3955 Hz exists if the high bandwidth SRF-PLL is considered, as reflected in Figure 19b.

Simulation Results with Lead/Lag PLL
Likewise, the SRF-PLL, Figure 20a, and Figure 20b depict the stator voltage, stator, and rotor current, active and reactive power, and torque employing the low bandwidth (K = 13, T1 = 0.0092, T2 = 0.0003) and high bandwidth (K = 493, T1 = 0.0012, T2 = 0.0003) Lead/Lag PLL, respectively. If the low bandwidth Lead/Lag PLL is chosen for the DFIG system, the resonance at middle frequency will not exist, as indicated in Figure 20a. Contrary to Figure 20a, the resonance is likely to exist in the aforementioned quantities, as demonstrated in Figure 20b. Figure 21a and Figure 21b portray the FFT analysis of the DFIG stator voltage with low and high bandwidth Lead/Lag PLL, respectively. It can be seen in Figure 21a that there is no resonance at the middle frequencies. However, the resonance at 305 Hz and 405 Hz occurs if the high bandwidth Lead/Lag PLL is considered, as evident in Figure 21b.

Simulation Results with Improved PLL
Two cases of low and high bandwidth improved PLL is validated through time domain simulations. Figure 22a, and Figure 22b show the stator voltage, stator and rotor current, active and reactive power, and torque for the DFIG system operated under weak grid employing the low bandwidth (KpPLL = 50, KiPLL = 5, KdPLL = 10) and high bandwidth PLL (KpPLL = 5000, KiPLL = 500, KdPLL = 1000) improved PLL, respectively. It can be seen in Figure 22a if the low bandwidth improved PLL is chosen for the DFIG system, the resonance at middle frequency will not exist. Contrary to the case of SRF-PLL and Lead/Lag PLL with high bandwidth, the resonance will not be likely to exist in stator voltage and current, rotor current, active and reactive power, and electromagnetic torque, as can be seen in Figure 22b. Figure 23a and Figure 23b demonstrate the FFT analysis of the DFIG stator voltage with low and high bandwidth improved PLL, respectively. The resonance does not exist at the middle

Simulation Results with Improved PLL
Two cases of low and high bandwidth improved PLL is validated through time domain simulations. Figure 22a, and Figure 22b show the stator voltage, stator and rotor current, active and reactive power, and torque for the DFIG system operated under weak grid employing the low bandwidth (KpPLL = 50, KiPLL = 5, KdPLL = 10) and high bandwidth PLL (KpPLL = 5000, KiPLL = 500, KdPLL = 1000) improved PLL, respectively. It can be seen in Figure 22a if the low bandwidth improved PLL is chosen for the DFIG system, the resonance at middle frequency will not exist. Contrary to the case of SRF-PLL and Lead/Lag PLL with high bandwidth, the resonance will not be likely to exist in stator voltage and current, rotor current, active and reactive power, and electromagnetic torque, as can be seen in Figure 22b. Figure 23a and Figure 23b demonstrate the FFT analysis of the DFIG stator voltage with low and high bandwidth improved PLL, respectively. The resonance does not exist at the middle

Simulation Results with Improved PLL
Two cases of low and high bandwidth improved PLL is validated through time domain simulations. Figure 22a, and Figure 22b show the stator voltage, stator and rotor current, active and reactive power, and torque for the DFIG system operated under weak grid employing the low bandwidth (K pPLL = 50, K iPLL = 5, K dPLL = 10) and high bandwidth PLL (K pPLL = 5000, K iPLL = 500, K dPLL = 1000) improved PLL, respectively. It can be seen in Figure 22a if the low bandwidth improved PLL is chosen for the DFIG system, the resonance at middle frequency will not exist. Contrary to the case of SRF-PLL and Lead/Lag PLL with high bandwidth, the resonance will not be likely to exist in stator voltage and current, rotor current, active and reactive power, and electromagnetic torque, as can be seen in Figure 22b. Figure 23a,b demonstrate the FFT analysis of the DFIG stator voltage with low and high bandwidth improved PLL, respectively. The resonance does not exist at the middle frequencies, as reflected in Figure 23a. Similarly, the resonance at middle frequencies in the stator and rotor current, active and reactive power, and electromagnetic torque will not exist if the high bandwidth improved PLL is considered, as reflected in Figure 23b. frequencies, as reflected in Figure 23a. Similarly, the resonance at middle frequencies in the stator and rotor current, active and reactive power, and electromagnetic torque will not exist if the high bandwidth improved PLL is considered, as reflected in Figure 23b.

Experimental Results
The impact of PLL on the resonance in the DFIG system is validated while using the experimental setup, as shown in Figure 24. The proportional and integral gain of three types PLL is the same as in Table 1. The experiments are conducted to show the stator voltage and stator current with low and high bandwidth SRF-PLL, Lead/Lag PLL, and an improved PLL. Similar results can be deduced for electromagnetic torque and active and reactive power, but it will not be discussed here in this paper. Figure 25 and Figure 26 show the stator voltage and stator current of the DFIG system operated under a weak grid employing the low bandwidth PLL (KpPLL = 5, KiPLL = 50) and high bandwidth PLL (KpPLL = 500, KiPLL = 5000), respectively. With the low bandwidth PLL, the resonance at middle frequency will not exist in the DFIG stator voltage and stator current, as can be seen in Figure 25a and

Experimental Results
The impact of PLL on the resonance in the DFIG system is validated while using the experimental setup, as shown in Figure 24.

Experimental Results
The impact of PLL on the resonance in the DFIG system is validated while using the experimental setup, as shown in Figure 24. The proportional and integral gain of three types PLL is the same as in Table 1. The experiments are conducted to show the stator voltage and stator current with low and high bandwidth SRF-PLL, Lead/Lag PLL, and an improved PLL. Similar results can be deduced for electromagnetic torque and active and reactive power, but it will not be discussed here in this paper. Figure 25 and Figure 26 show the stator voltage and stator current of the DFIG system operated under a weak grid employing the low bandwidth PLL (KpPLL = 5, KiPLL = 50) and high bandwidth PLL (KpPLL = 500, KiPLL = 5000), respectively. With the low bandwidth PLL, the resonance at middle frequency will not exist in the DFIG stator voltage and stator current, as can be seen in Figure 25a and  The proportional and integral gain of three types PLL is the same as in Table 1. The experiments are conducted to show the stator voltage and stator current with low and high bandwidth SRF-PLL, Lead/Lag PLL, and an improved PLL. Similar results can be deduced for electromagnetic torque and active and reactive power, but it will not be discussed here in this paper. Figures 25 and 26 show the stator voltage and stator current of the DFIG system operated under a weak grid employing the low bandwidth PLL (K pPLL = 5, K iPLL = 50) and high bandwidth PLL (K pPLL = 500, K iPLL = 5000), respectively. With the low bandwidth PLL, the resonance at middle frequency will not exist in the DFIG stator voltage and stator current, as can be seen in Figure 25a,b. The resonance in the DFIG stator voltage and current is likely to exist, contrary to Figure 25a,b, as can be seen in Figure 26a,b, respectively.  Likewise, Figure 27 and Figure 28 show the stator voltage and stator current of the DFIG system operated under a weak grid employing the low bandwidth (K = 13, T1 = 0.0092, T2 = 0.0003) and high bandwidth (K = 493, T1 = 0.0012, T2 = 0.0003) Lead/Lag PLL, respectively. If the low bandwidth Lead/Lag PLL is chosen for the DFIG system, the resonance at middle frequency will not exist in the stator voltage and stator current, as can be seen in Figure 27a and   Likewise, Figure 27 and Figure 28 show the stator voltage and stator current of the DFIG system operated under a weak grid employing the low bandwidth (K = 13, T1 = 0.0092, T2 = 0.0003) and high bandwidth (K = 493, T1 = 0.0012, T2 = 0.0003) Lead/Lag PLL, respectively. If the low bandwidth Lead/Lag PLL is chosen for the DFIG system, the resonance at middle frequency will not exist in the stator voltage and stator current, as can be seen in Figure 27a and  Likewise, Figures 27 and 28 show the stator voltage and stator current of the DFIG system operated under a weak grid employing the low bandwidth (K = 13, T 1 = 0.0092, T 2 = 0.0003) and high bandwidth (K = 493, T 1 = 0.0012, T 2 = 0.0003) Lead/Lag PLL, respectively. If the low bandwidth Lead/Lag PLL is chosen for the DFIG system, the resonance at middle frequency will not exist in the stator voltage and stator current, as can be seen in Figure 27a,b, respectively. The resonance in the DFIG stator voltage and stator current is likely to exist, contrary to Figure 27a,b, as can be seen in Figure 28a,b, respectively.  Similar to SRF and Lead/Lag PLL, the stator voltage and stator current with low bandwidth (KpPLL = 50, KiPLL = 5, KdPLL = 10) and high bandwidth (KpPLL = 5000, KiPLL = 500, KdPLL = 1000) are shown in Figure 29 and Figure 30b, respectively. It can be seen in Figure 29a and Figure 29b that the resonance at middle frequency does not exist in the DFIG stator voltage and stator current with low bandwidth improved PLL. Contrary to the case of SRF-PLL and Lead/Lag PLL with high bandwidth, the resonance will not be likely to exist in stator voltage and stator current of the DFIG system, as can be seen in Figure 30a and Figure 30a, when an improved PLL is taken into consideration.
The aforementioned experimental results validate the time domain simulations for the DFIG system operated in a weak grid with the inclusion of PLL. The experimental results have good agreement with time domain simulations.  Similar to SRF and Lead/Lag PLL, the stator voltage and stator current with low bandwidth (KpPLL = 50, KiPLL = 5, KdPLL = 10) and high bandwidth (KpPLL = 5000, KiPLL = 500, KdPLL = 1000) are shown in Figure 29 and Figure 30b, respectively. It can be seen in Figure 29a and Figure 29b that the resonance at middle frequency does not exist in the DFIG stator voltage and stator current with low bandwidth improved PLL. Contrary to the case of SRF-PLL and Lead/Lag PLL with high bandwidth, the resonance will not be likely to exist in stator voltage and stator current of the DFIG system, as can be seen in Figure 30a and Figure 30a, when an improved PLL is taken into consideration.
The aforementioned experimental results validate the time domain simulations for the DFIG system operated in a weak grid with the inclusion of PLL. The experimental results have good agreement with time domain simulations. Similar to SRF and Lead/Lag PLL, the stator voltage and stator current with low bandwidth (K pPLL = 50, K iPLL = 5, K dPLL = 10) and high bandwidth (K pPLL = 5000, K iPLL = 500, K dPLL = 1000) are shown in Figures 29 and 30b, respectively. It can be seen in Figure 29a,b that the resonance at middle frequency does not exist in the DFIG stator voltage and stator current with low bandwidth improved PLL. Contrary to the case of SRF-PLL and Lead/Lag PLL with high bandwidth, the resonance will not be likely to exist in stator voltage and stator current of the DFIG system, as can be seen in Figure 30a,b, when an improved PLL is taken into consideration.

Conclusions
This paper has studied the impact of PLL on resonance at the middle frequencies in the DFIG system under a weak grid. Firstly, the small signal model of two types of traditional PLL and an improved PLL is established. Secondly, the impedance model of the DFIG system, while considering the impact of the small signal model of PLLs, is established. Subsequently, based on the impedance modeling, the resonance at middle frequencies with different controller parameters and different types of PLL has been investigated. The conclusions could be drawn, as follows:

Conclusions
This paper has studied the impact of PLL on resonance at the middle frequencies in the DFIG system under a weak grid. Firstly, the small signal model of two types of traditional PLL and an improved PLL is established. Secondly, the impedance model of the DFIG system, while considering the impact of the small signal model of PLLs, is established. Subsequently, based on the impedance modeling, the resonance at middle frequencies with different controller parameters and different types of PLL has been investigated. The conclusions could be drawn, as follows:

Conclusions
This paper has studied the impact of PLL on resonance at the middle frequencies in the DFIG system under a weak grid. Firstly, the small signal model of two types of traditional PLL and an improved PLL is established. Secondly, the impedance model of the DFIG system, while considering the impact of the small signal model of PLLs, is established. Subsequently, based on the impedance modeling, the resonance at middle frequencies with different controller parameters and different types of PLL has been investigated. The conclusions could be drawn, as follows:

1.
The low bandwidth of any PLL (SRF, Lead/Lag, and improved) has no effect on the resonance at middle frequencies due to an acceptable phase margin.

2.
Resonance at middle frequencies exists in the DFIG system with high bandwidth SRF, and Lead/Lag PLL. However, there is no resonance at middle frequencies with the employment of improved PLL, even with the high bandwidth. 3.
The performance of the Lead/Lag PLL is superior to the same high bandwidth SRF-PLL due to the higher phase margin of the Lead/Lag PLL. 4.
The phase margin with the Lead/Lag PLL is less dependent on the PLL controller parameters as compared to SRF-PLL. 5.
The improved PLL controller parameters have an insignificant effect on the impedance modeling, as the phase margin is approximately the same for different bandwidth improved PLL. 6.
The α and β component DFIG system impedance with improved PLL has approximately the same impedance shape. Additionally, a high phase margin with improved PLL guaranteed better dynamic performance than the SRF-PLL and Lead/Lag PLL. 7.
The experimental results are in good agreement with the time domain simulations.