A High-Efficiency and Wide-Input Range RF Energy Harvester Using Multiple Rectenna and Adaptive Matching

In this paper, a Radio Frequency (RF) energy harvester (EH) system for Internet of Things (IoT)-related applications is presented. The proposed EH architecture operates at 5.2 GHz band and utilizes multiple rectenna. This approach enhances the efficiency of the whole system over a wide dynamic RF input range. In the presented circuit, configuration of the rectenna is controlled by Field-Programmable Gate Array (FPGA) with respect to the input power level of the received RF input signal. In addition, an automatic adaptive matching based on the configuration of the rectenna, level of the received signal, and load current adjusts the matching network. The rectenna is realized through the Radio Frequency-Direct Current (RF-DC) converter composed of two Schottky diodes and generates the output DC voltage. Finally, a buck-boost converter provides the flattened and fixed voltage for the IoT and wearable devices. The 5.2 GHz band reconfigurable system demonstrates 67% high efficiency and 6.1 V output DC voltage where the power level of RF input is +20 dBm. The main application of the proposed structure is for charging wearable smart devices such as a smart watch and bracelet.


Introduction
Nowadays, the Internet-of-Things (IoT) and Bluetooth low-energy (BLE) devices have made a smart environment by using wireless sensors and communication protocols. These technologies transmit data for making decisions related human issues, health cares, and automation of the facilities. Communication without any interruptions and long battery life are the most challenging requirements for these aims. Wireless sensors need continuous power, which, with the conventional methods, suffer from the short lifetime of the batteries. In addition, an energy harvester (EH) and low-power devices may not be installed under normal conditions, and their batteries cannot be changed easily [1,2]. Longer battery life and a system with no need to recharge demands a low-power and high-efficiency power management-integrated circuit (PMIC). In addition, chip area and external passive components such as inductors and capacitors are other design challenges. Generally, parasitic elements, printed circuit boards (PCBs), and line losses are the targets of improvements, while recent trends have focused on the integration of an energy harvester power management system, especially an Radio Frequency (RF) EH system with an IoT/wearable or RF transceiver system [3,4].
Due to problems associated with the replacement or recharging of batteries, self-powering based on an energy harvesting communication network is a critical demand for these wireless devices. The main focus of recent work is remote charging via an EH from a renewable source and optimizing the processing methods [1][2][3][4][5][6][7][8]. Besides thermal, solar, and wind energy sources for EH, recently, the presence of ambient radio frequency (RF) signals is becoming an appealing source for EH in portable devices. The capability of the RF signals in carrying information in wireless devices introduces the concept of simultaneous wireless information and power transfer (SWIPT). SWIPT offers a noticeable concept in the field of communication systems, which provides efficient energy and information transfer in addition to powering an RF EH system. Figure 1 shows the top block diagram of an RF EH system for IoT/wearable applications. The antenna, rectifier, DC-DC converter, and load are the main building blocks of an RF EH system. The overall efficiency of the whole system is determined by the RF-to-DC and DC-DC converter efficiency. Based on the received power and converted DC voltage level, buck or boost modes would be selected. Providing a higher output DC voltage and using a simple highly efficient buck converter are preferable in comparison to a buck-boost converter. In contrast, enhancing the RF EH system overall efficiency requires the design of a high-output DC voltage rectifier with high power conversion efficiency (PCE). This paper is organized as follows: The top system architecture and detailed building blocks of the proposed RF EH system are described in Section 2. Section 3 focuses on the implementation and experimental result. Section 4 concludes the paper.  Figure 2 indicates the system budget and path loss measurement vs. the distance of the RF EH system. The maximum available power at the Receiver (Rx) antenna is given by

Architecture
where, in the Tx module, PT and GT are the respective output power and antenna gain, and in the Rx module, GR and PR are the respective antenna gain and received power. Path loss is the air loss of the measured environment. Table 1 demonstrates the system budget considering an ideal system structure, the distance between Tx and Rx modules, and the free space path loss (FSPL) equation. To maximize the RF power level for RF-DC conversion and eliminate the air here, a 6-array antenna is designed. An automatically adapted and reconfigurable multiple rectenna architecture depending on the RF input signal level is presented.  Figure 3 illustrates a block diagram of the proposed RF EH system [8]. It comprises a 2 × 3 array patch antenna, 6-parallel RF-DC converter in the front side, DC-DC converter, BLE module, and Universal Serial Bus (USB) connector on the back side of the Rx module PCB board. The front view of the PCB has a rectenna composed of five RF-DC converters and five patch antennas; one RF-DC converter and one patch antenna are configured for the pilot signal only. The proposed RF-DC converter of each rectenna is fabricated based on a Dickson charge pump structure. A six-array rectenna with two Schottky diodes was adopted to produce high efficiency and high-output DC voltage. It has an optimized third harmonic source termination for an improved conversion efficiency, and the implemented RF-DC converter includes series transmission lines and open-stubs for the third harmonic inductive termination and fundamental impedance matching. The simulated third harmonic contour using the harmonic source-pull simulation shows an optimum region near jX75 Ω with a maximum efficiency of 69.45%. The optimum third harmonic impedance is inductive due to the junction capacitance of the Schottky diodes, and the input capacitance and inductive source impedance produce parallel resonance for an appropriate Class-F third harmonic termination. Compared to the efficiency of the rectifier without harmonic control, the proposed rectifier with harmonic control exhibits a 5.2% higher efficiency at an input power of about +20 dBm. Using the optimum third harmonic termination, the voltage waveforms across the Schottky diodes of RF-DC converters become closer to the square waves of an ideal RF-DC converter. The rectenna is the first block at the input of the Rx module to rectify the RF signal. A combining capacitor at the output of the rectenna is also used as a low-pass filter to remove ripples at the output. The output of the rectenna is fed to the buck-boost converter. In order to eliminate voltage variation, a buck-boost converter is used to produce constant output voltage. When the input voltage level reduces due to the weak RF signals, the boosting operation of the buck-boost converter is performed to maintain the output voltage level and vice-versa. A low drop-out (LDO) regulator can be used to maintain a constant output voltage. A super capacitor is connected at the output of the buck-boost converter to store energy and provides power for IoT/wearable devices and charging the battery.  The front and back sides of the EH system are implemented using RF-35 and FR4 with four layers through the commercial components to maximize the board efficiency. The multiple rectenna configuration is automatically selected with respect to the input power level. The sensitivity and input range of the RF EH system are from 0 dBm to +30 dBm, while the peak power efficiency is 67% when the received RF input power level considering the air loss is +20 dBm at 5.2 GHz. The RF EH system charges the IoT/wearable devices at a distance of 78 cm with a single 5.2 GHz Tx antenna charging station with a 1 W transmit power and a distance of 5.5 m with a 48-array antenna charging station with 3.6 W transmit power [9].

Reconfigurable Rectenna
The nonlinear behavior of the antenna and transistor in both the on and saturation regions determines the saturation effects, while the efficiency of the SWIPT decreases when the RF input signal level exceeds a certain value. The reconfigurable parallel rectenna eliminates the saturation nonlinearity. This reconfigurable approach using rectenna to split the RF input power of the RF-DC converter among parallel rectennas (antennas, and RF-DC converters) ensures its reliable operation beyond the saturation region [10].
The proposed NEH (Number of rectenna circuits) multiple rectenna basic structure is depicted in Figure 4. The RF-DC circuits can be implemented in parallel and series to maximize the efficiency of the system. The RF-DC circuits in this work are implemented in parallel and are followed by a DC combiner capacitor to limit the complexity of the system. The nonlinear EH is reconfigured adaptively based on the received signal power and is controlled by FPGA. An identical nonlinear EH model for each rectenna, especially the RF-DC circuit, is assumed [11][12][13]. Hence, the harvested power of the ith rectenna circuit, denoted by PEH,i, is expressed as where PEH,i is the RF EH power and Psat is the maximum RF EH power due to device saturation. α is the receive mode indicator variable being set to 1 to obtain the maximum power, and PR is the receive power. Here, c0 and c1 are the constants related to the specifications and shape of the input signal in the energy harvesting circuit.

RF Energy Harvester
Rectenna #1  All the received signals from antennas are fed to the EH when α = 1 and then split evenly among NEH (#of RF-DC circuits) multiple rectenna circuits. We assume an ideal EH with no energy loss in energy conversion from parallel rectenna circuits to the DC combining capacitor and during power splitting. With the assumption of an ideal EH, the harvested power at the DC combining capacitor is linearly increased to , ,

DC
where is the power-splitting ratio for the ith rectenna circuit. As each rectenna circuit is modeled by the identical nonlinear function with = 1/NEH and PEH,i = PEH,1 for ∀i, the total harvested power becomes , , For understanding the effect of the power-splitting ratio = [ , , ..., ], consider an example with two rectennas in the simplest energy harvester system. In this case, drop the circuit index of the power-splitting ratio and simplify the total harvested power to , , , where ∈ [0, 1]. PEH,total varies as the received power PR or the power-splitting ratio changes. With fixed PR, PEH,total can be maximized by optimizing .
The optimal ratio * changes with the received signal power PR. When PR is low, only a single rectenna circuit is activated by controlling = 0 or 1. For high PR, we would better activate both rectenna circuits by splitting the received power evenly ( = 0.5). This is the direct consequence of the nonlinear behavior of the rectenna circuit. The EH efficiency becomes very low for low PR, and thus, it is more appropriate to use a single rectenna circuit instead of both. For high PR, using a single rectenna circuit causes saturation, and it is desired to activate both rectenna circuits. Splitting the received power evenly reduces the excess power due to the saturation. Based on these observations, the total harvested power can be expressed as , max , , 2 , 2 With the increase in the number of rectenna circuits, the energy harvester can reconfigure in a similar way according to the received power with an even split. The total harvested power is PEH,total = NEH* PEH,1 (PR/NEH*), where NEH* is the number of activated rectenna circuits based on the received power. NEH* can be determined by NEH* = arg maxNEH {PEH,1 (PR), ..., NEH PEH,1 (PR/NEH)}, yielding the optimal power-splitting ratio * = 1/NEH*, i ∈ {1, ...,NEH*}.
The reconfigurable EH with multiple rectenna circuits implemented in parallel at a high input power level always perform better than the EH with fixed multiple rectenna circuits.

Find the maximum power conversion efficiency (PCE) of the reconfigurable rectenna:
The reconfigurable EH is proposed, where multiple rectenna circuits are implemented in parallel at a high input power level while being implemented in series at a low input power level. The reconfigurable EH certainly brings higher PCE than the EH with fixed multiple rectenna circuits.
Case I: High input signal power level ( , . ) In this case, we have to divide the high input power among multiple rectenna circuits in parallel such that , .
where NEH is the number of rectenna circuits depending on the received signal power. In this case, the rectenna design in parallel structure is preferred. Case II: Low input signal power level ( ≪ , . ) In this case, we have to power-up the low input signal power level or use low Vth devices such that , .
The rectenna design in series structure can be a good candidate. In this paper, to prevent PCE degradation, the proposed structure can be made reconfigurable, which can be controlled by FPGA both in parallel and series. For example, in the parallel structure, to find the optimal value of NEH based on the measurement performance of single rectenna circuit as shown in Figure 5, , . should be first determined. Then, based on the two conditions below, the optimum NEH can be determined as follows: , .
Therefore, the PCE can be written as follows: where is the coupling loss factor proportional to the number of rectenna circuits (NEH). can slightly change the slope of the PCE curve and . As a result, the simplified optimization problem for maximum PCE over the two factors and can be formulated as follows: Based on the peak PCE of a single-stage rectenna and the above equation, we can determine the To obtain the optimal PCE, we first determine f(x) that is proportional to , . and NEH. NEH can be determined by (9). Moreover, to find the coupling loss factor value, which is proportional to NEH, the peak PCE of the single-stage rectenna in the measured point of view is needed. Similarly, the series structure can be described with the necessary changes.

Tx and Rx Antenna Design
The antenna takes the RF signal (5.2 GHz) from the Tx power amplifier and feeds it to the EH system and memory cell. A Koch fractal patch antenna with high reflection co-efficiency and gain and an inter-element spacing equal to 0.5λ (at the design frequency of 5.2 GHz, λ is the wavelength in free space) as a compact size for the Rx module side is implemented as shown in Figure 6. Figures 7a, b illustrate a 5.2 GHz Quasi-Yagi antenna configuration on the substrate of Taconic RF-35 (0.76 mm) to transmit a total power of 3 W, being used as a wireless power transmitter and its specification.
An Rx module designed by a 2 × 3 array antenna is located at a distance up to around 1 m (the distance can vary to harvest more RF input power) from the transmitter to harvest the transmitted power as shown in Figure 8a. The broadside gain of each port Rx antenna is shown in Figure 8b.

Implementation and Experimental Results
The module of the proposed RF EH including reconfigurable scheme and third harmonic control with the information of the PCB layers is shown in Figure 9a,b. The 6-parallel rectenna shows 67 % conversion efficiency and higher than 6.1 V output DC voltage at the input power level of +20 dBm. 4% improvement in efficiency is achieved in compared with the case without the third harmonic control circuit and efficiency.
The presented RF-DC converter simultaneously provides both higher output DC voltage and conversion efficiency, and this results in a higher overall conversion efficiency and simpler system configuration of the whole RF EH system. Figures 10a, b, and c show measurement environments of RF EH systems. During the measurement in two setups, a 5.2 GHz RF signal via the power amplifier and Tx antenna is transmitted, which charges the wearable device, chip Light Emitting Diode (LED), mobile phone, and LG products at respective distances of 65 cm, 80 cm, 90 cm, and 25 cm, with a transmission power of 34.77 dBm for the wearable device, chip LED, and mobile phone and 30 dBm for LG products. Figures 11a,b show the measured reflection coefficient (S11) of Tx antenna and Rx antennas, respectively. The −10 dB reflection bandwidth of the designed Tx antenna is 7.4% (5.08-5.32 GHz). The measurement results for power conversion efficiency of the RF EH system are illustrated in Figure 12. The rectenna provides a maximum 6.1 V output DC voltage in the frequency band of over 5 GHz, and high conversion efficiency is also observed. By increasing the number of involved parallel stages, efficiency at higher input power levels is high (diode operation in the breakdown area at high power is dominant in decreasing the efficiency). The maximum achieved efficiency at the +20 dBm input power level is 67% when a single rectenna is used. The test-bench has been configured for a 12 V input and 5 V output at 1 A load.
The simulation result of the buck-boost converter is illustrated in Figure 13. The maximum efficiency of the buck-boost converter reaches 93% at 2 MHz switching frequency. The measured functional performance of the RF EH harvester system is illustrated in Figure 14. Table 2 lists the important metrics of the RF RH system including key features, elements used in the Rx module, and PCB boards. Table 3 summaries the whole performance of the RF EH. During the measurement, the USB connector is connected to IoT/wearable devices such as a G watch, LED, and cell phone.

Conclusions
In this paper, an RF energy harvester based on a reconfigurable and multiple parallel rectenna with third harmonic control at the frequency band of 5.2 GHz was presented. In the proposed scheme, RF-DC conversion using a 6-parallel rectenna is realized. This approach provided high efficiency and output DC voltage level, which allowed the use of a simple buck DC-DC converter after the RF-DC converter. Finally, the buck DC-DC converter fixed the output voltage and supplied the IoT device or BLE chip. The presented architecture achieved maximum 67% power conversion efficiency and 6.1 V DC voltage at the input power level of +20 dBm. Using the proposed architecture, higher and different values of DC output voltage and power conversion efficiency can be obtained. Therefore, it can be used to power-up various IoT/wearable devices.  Funding: This research received no external funding.