One Cycle Control of A PWM Rectiﬁer a new approach

: In this work, it is analyzed a Digital Signal Processor, DSP, based One Cycle Control, OCC, strategy for a Power Factor Corrector, PFC, rectiﬁer, which presents Common-mode Voltage, CMV, immunity. The proposed strategy utilizes an emulated-resistance-controller in closed-loop conﬁguration to set up dc-link voltage and achieve unity power factor, UPF. It is shown that if PFC can achieve UPF condition and if phase voltage is only affected by CMV, then phase current is free from CMV, as well as a lead-lag compensator, LLC, to average phase current. Another possible condition is also analyzed. The proposal is veriﬁed by simulation and experiments.


INTRODUCTION
One-Cycle Control theory was proposed in [1]. OCC is a nonlinear control theory utilized to control switching converters with only one switching cycle. The controller achieves instantaneous dynamic control of an average value of one of the switching variables from the converter after a transient. The most important feature of OCC is the control of the carrier amplitude, in contrast to the Pulse Width Modulation, which controls the variable. One-Cycle control provides low complexity and low-cost implementation, disturbance rejection, robustness, good stability, and fast dynamic response. OCC has been mostly utilized in the literature to control power factor correction, and it has been applied in modular multilevel converters [2], a grid-tied single-stage buck-boost DC-AC micro-inverter [3] and Vienna Rectifiers [4], a novel multi-converter-based unified power quality conditioner (MCB-UPQC) [5]. The study and analysis of harmonics, energy consumption, and power quality of light-emitting diode (LED) lamps equipped in building lighting systems [6]. A novel, two-stage and hybrid approach based on variational mode decomposition (VMD) and the deep stochastic configuration network (DSCN) for power quality (PQ) disturbances detection and classification in power systems [7]. In power quality, two of the most significant concerns are harmonic currents and power factor, PF, caused by nonlinear loads. While the former may cause false triggering of protection devices and malfunctioning of motors and transformers, the later reduces available active power at the utility grid. The past few decades have witnessed extensive studies on power quality, mainly to satisfy specific standards, i.e., IEEE 519 − 1992 [8], that recommend limiting harmonics distortion. To solve these issues for end-consumer, a PWM rectifier is used to substitute each nonlinear load by an active resistance seen from the utility grid [9]. In that sense, this rectifier always tries to achieve unity power factor, UPF. If the grid voltage is sinusoidal, then the current drawn by the rectifier must be sinusoidal and in phase with the voltage, avoiding any current harmonics. Several methods have been proposed to achieve UPF in PWM rectifiers based on the enhanced control-loops concept [10], i.e., an inner current, an instantaneous power loop, and an outer voltage loop. To force the phase-current to follow voltage loop reference, it is necessary to sense three-phase voltages, a dc-link voltage, and three-phase currents [11] and eventually, use a phase-locked loop, PLL, to guarantee voltage and current synchronization [12]. The control techniques based on this concept use space vector modulation, SVM, Park/Clarke transformations and control coupled terms, like voltage oriented control, VOC, [14], direct power control, DPC, [13], model predictive control (MPC) [15], deadbeat control [16], fuzzy control [17] and neural networks [18]. Nevertheless, these methods are time-consuming, as they rely on system parameters, requiring complicated online calculation. Resistance-emulation is another technique employed in PWM rectifiers, generally using average value and PWM modulators. In this technique is always assumed that UPF is already achieved. There are two main methods based on open-loop, and closed-loop controls [9]. Open-loop controls estimate emulated-resistance, assuming a fixed value [19], while closed-loop methods adjust the emulated-resistance value by feedback [20]. Although these techniques were proposed for single-phase boost converters with diode rectifiers, they are complicated to implement as they employ the four arithmetical operations. Among open-loop methods, One Cycle Control, OCC, originally a hardware technique [21], Figure 1(a), has implemented by a few commercials ICs, or a single chip, constituting a kind of cost-effective solution. It uses a variable sawtooth-carrier-amplitude, Figure 1(b), and only adding and subtracting operations, contributing to its arithmetic simplicity and performing its control tasks in the only one switching cycle, therein the name OCC, despite this technique was also proposed for three-phase, six power-switches boost-converter. Besides enhanced control-loops technique, OCC has not utilized phase-locked loop (PLL), Park/Clarke transformations, or online parameter calculations, but achieves a high dynamic response and satisfies UPF condition. Moreover, it eliminates the need for three grid-voltage sensors, which adds control and hardware simplicity. Although this technique was applied several times, i.e., inactive power filters (APF) [22], [23], flexible ac transmission systems (FACTs), [28] and photo-voltaic grid-connected inverters (GCI) [24], [32], [27], OCC has presented such serious instability problems [21], [29], [30], which to solve them, it was necessary to add extra circuitry, sacrificing control and hardware simplicity.
Hence, in order to preserve control and hardware simplicity, OCC was emulated in a DSP system. So a DSP-based software-OCC was proposed in [31], see Figure 1(c) and Figure 1(d). This version enhances OCC with DSP calculation capability and uses closed-loop resistance emulation. Then, the software offers more possibilities to apply OCC to the most complex control issues than those of hardware [33], [34], [35]. Besides, unlike enhanced-loops methods mentioned above [11], [12], [14], [13], [15], [16], [17], [18], software-OCC does not need PLL, nor Park/Clarke transformations, nor online parameter calculations, achieving some control simplicity. However, it was not reported any further analysis, in spite DSPs have already applicated to OCC as a control core, i.e., for motor drivers [36], [37], and photovoltaics [32], while OCC runs as a sort of auxiliary circuit. Previous treatments to solve stability problems at no-load have sacrificed OCC simplicity once they use an additional bulky resistor at dc-link [21], [30]. Instead, in [38], [39], [26] to decrease current distortion, an artificial phase-current was created. However, despite the efforts, instability remains when load current falls below a certain limit [43], [28], [42]. On the other side, due to a lack of PLL synchronization, OCC has experienced PF derating at high-load [21], [39], [30], [42], [26]. To avoid this, OCC has sacrificed its simplicity again as they use input voltage multiplexers, and other additional analog and logic circuits [43], [23], [28], [42], [25], requiring the knowledge of 600 angular sectors and to select positive and negative peak voltages as reference current vectors. In [29], [41] was also necessary to sacrifice OCC simplicity by adding a few analog multipliers and heavy and bulky inductors (10mH), but sacrificing the cost-effectiveness of OCC solution. Hence, despite all the efforts, it is apparent that, to date, OCC has been not able, whatsoever, to solve its own problems fully. Above all, even though a few hardware methods have solve partially OCC stability issues at no-load [21], [38], [39], [26], [41], and at high-load [43], [29], [42], [25], they were never reported working together over a wide load range. Thus, one of the paper's major contributions is to present a simple and stable OCC system working at no-load and high-load.
In this paper, analysis, simulation, and experimental results prove, based on the resistance-emulated controller [31], that software-OCC does not possess instability issues and preserves OCC simplicity and dynamical response, also satisfying UPF condition. The paper is organized as follows: Section 1 presents a review of software-OCC fundamentals. Section 2 . shows OCC issues and discusses software-OCC solving method. Section 3 depicts DSP implementation and discusses the cost-effectiveness of software-OCC. Simulation and experimental results are shown in Section 4. Conclusions are shown in Section 5 .

FUNDAMENTALS Of SOFTWARE-OCC
Software-OCC is a PWM, where an average phase-current compares to carrier and control system is integrated into the modulator, similar to hardware-OCC of Figure 1(c) [21]. Nevertheless, unlike hardware-OCC, this version is not a circuit, but a software. Hence, software-OCC implements OCC features by programming embedded DSP devices and using just a few equations. However, a high-performance OCC system is obtained, as using a high-frequency DSP, the one switching-cycle control can be guaranteed. Figure 2(a) displays a three-phase, IGBT PWM rectifier. As in hardware-OCC, it is assumed that, • The switching frequency f C is much higher than line frequency f , hence the switching period T C is much lower than the line period T, so f C >> f and T C << T. • The switches in each leg operate in a complementary fashion, i.e., the duty cycle for the upper and bottom switch is d g and d gn = (1 − d g ), respectively (g = a, b, c), 0 < d g < 1.
• Input impedance seen from the grid is a resistance, similar to the resistance emulation concept in [9]. Besides, software-OCC, Figure 1(c), present the following differences from hardware-OCC, • i)Multipliers and dividers presence, as they are not much DSP time-consuming [44].
• ii) The average method, i.e., a Lead-Lag compensator, LLC, Figure 1(c), decreases delay response caused by the lagging part, using a leading constant. • iii) Carrier generation uses a triangular waveshape, Figure 1(d), instead of a sawtooth carrier in the hardware OCC. • iv) Fixed amplitude carrier because of a software DSP limitation.
• vi) Use of limiters at resistance control output.
where r is inductor resistance, L is inductor inductance; v Sg and i g are grid voltage and phase current, respectively; v GN is pole voltage (G = A, B, C), O is the middle point of dc-link capacitors C 1 and C 2 , v NO is the voltage between neutral of the utility grid and middle point N of dc-link voltage, and V 0 and I 0 are dc-link voltage and current respectively.

Analysis of voltage v NO
Examining the former equation, it is apparent that to obtain an exact expression for phase-current, it is necessary to find an analytical expression for voltage v NO . However, although some previous works indicate that this voltage does not depend on grid frequency [14], [40], the mathematical proof is missing. It is always possible to bypass the problem by assuming some control strategy, as it allows additional simplifications, [45], [46]. Hence, considering a balanced system, Grid voltages are given by, where V p is voltage amplitude, V p > 0. Although OCC does not use references [21], [43], for mathematical purposes, it could be useful to admit grid voltage, (3), as a virtual phase-current reference, as phase-current has the same waveshape and in phase with of the grid voltages. In addition, considering a balanced system, (2), and manipulating (1) gives: The former equation says that voltage V NO is related to pole voltage. Thus, to find an analytical expression for V NO could be long and tedious as in a PWM modulator, pole voltage depends on Bessel functions and Fourier series [47]. The average of V NO is: from the last equation, To find average pole voltage, Figure 2(a), it should be noted that, Since average value of pole voltage v GM over switching period is given by (see Figure3(b)), where t gn = d gn T C . Hence, combining (6) and (7), Moreover, as duty cycle in a PWM modulator is proportional to its reference (3), provided that f C >> f [47]: Then, combining (5), (8) and (9) yields, 6 A common assumption in hardware OCC is that the current ripple is small and that inductor current works in current continuous mode, CCM [21], so phase-current is proportional to its average value. Thereby, using this assumption in software-OCC, phase-current can be written as, where K is proportionality constant. Then, for any time t > 0, Differentiating former equation, Combining (1) and (13), As input impedance seen from the utility grid is assumed a resistance (condition c), where R 0 in is assumed input resistance seen from the grid. This resistance is based on loss-free resistor concept [48], since it transfers all energy from the input to the output port and does not dissipate active power. Denoting r = (K − 1) L t , where K is a constant (K > 1), and combining (14) and (15), Likewise, resistance R in is input resistance seen from the grid. Nonetheless, this is the final resistance which is controlled by software-OCC, (21) [31], [34]. Averaging (16), it leads to, Combining equations (8), (10) and (18), where i gs is average phase-current. The right term of the former equation is the variable amplitude of the hardware-OCC carrier. Minus (−) signal means that carrier comes from −V 0 , when duty cycle d gn = 0, to 0 when d gn = 1.
Preprints (www.preprints.org) | NOT PEER-REVIEWED | Posted: 2 September 2020 doi:10.20944/preprints202009.0036.v1  The former equation is coherent to emulated resistance concept, as that resistance was assumed since operation beginning [9]. Furthermore, this constitutes a classical OCC equation as it achieves the same level of OCC simplicity, i.e., it uses a sawtooth carrier and does not employ coupled terms, nor Park/Clarke transformations [21] [43]. In addition, emulated resistance R in satisfies, To ensure that resistance is seen from the grid, satisfying condition c, R in can become a V 0 voltage controller. Because if R in is a V 0 controller, it also controls active power P as it depends on V 0 , since P = V 0 I 0 , where I 0 is dc link current, Figure 2. Resistance R in also controls power factor indirectly, since active power P, reactive power Q and apparent power S are related by the expression S = P 2 + Q 2 . In this sense, as S is fixed, if power P is set to a relatively high value (close to S), reactive power Q should be close to zero. So, where V * 0 is dc link voltage reference, K p , K I is proportional and integrative PI constants, respectively. PI constants are positive K p > 0, K I > 0, to guarantee that R in > 0, when V * 0 > V 0 . R in controller, named here emulated resistance control, leads to a resistive impedance seen from the grid. Moreover, in frequency domain, R in controller can be expressed as a function of dc-link voltage error According to equation (19), the average current multiplied by R in is compared to variable amplitude carrier, V 0 A tri (t), where carrier A tri (t) = −(1 − d g ). This could be the essence of the OCC method when implemented by hardware since a variable carrier amplitude is characteristical of hardware-OCC [21], [38]. However, as the goal of the system is a software implementation, DSP characteristics must be included. In this order, it would be useful to modify classical software-OCC modulator, (19), as, where q gn is the logical state at the gate of lower switch of power converter shown in Figure 1(a). Yet, as dc-link voltage is positive, V 0 > 0, former relation can be modified as, Former and latter relations are equivalent, as they generate the same firing pulses. The later represents OCC variable-amplitude carrier, Figure 4(a), while the former is adequate for DSP manipulation, Figure 4(b), as will see later in section IV. Besides, it resembles a PWM modulator with zero-sequence injection producing Space Vector PWM, SVPWM [49], or phase-clamping [50], but without phase-current distortion.

OCC STABILITY ANALYSIS
There is no simple method to analyze hardware-OCC stability by conventional control theory, as this technique is all except conventional, once control and hardware are integrated, while in software-OCC control and hardware are implemented and integrated by software. There are two main stability issues reported in hardware-OCC i.e., at no-load [21], [38], [30], and high-load [29]. However, control theory was not used to study them, but hardware analysis. This might be because OCC instability is provoked by over modulation [21] and hardware limitations [29] and not by poles or zeroes misplacement. Stability issues in hardware-OCC can be solved by using an emulated-resistance controller R in of software-OCC [31], and it is max. and min. limiters, Figure 5. The next sub-section presents a model based on emulated-resistance control, which explains hardware-OCC instability and software-OCC solutions to the problem.

Hardware-OCC Theoretical Background.
In hardware-OCC, voltage V m is a PI controller of dc voltage, given by [21], where V m is carrier amplitude controller, Fig.5(a), in frequency domain, s = jω, V m is defined by [21], where K 1 is a parameter, [21]. In addition, as in hardware-OCC firing pulses can be defined as [21], [43], where q gnh is the logical state at the gate of lower switch of power converter, Figure 1(a), A trih is fixed carrier amplitude. The former equation represents hardware-OCC modulator since modulating wave is compared to a variable-amplitude carrier, controlled by V m > 0, (25). Note that this carrier leads to a multiplication operation, despite OCC arithmetic simplicity. Besides, as for a PWM rectifier, Figure 2, average dc voltage V 0 has a voltage ripple V 0r related to its peak value V 0p [51], see Figure 5, where V 0r = −I 0 8C , I 0 is dc-link current, R L is dc-link load, , T SW is switching time period, T SW = 2T 0 , T 0 is time period between peaks of voltage ripple. Although dc-link capacitor C is assumed so large that voltage ripple is neglected and hence average and peak dc-link values are the same, V 0 ≈ V 0p , [51]. Yet, for practical values of capacitance, only (28) is valid.

Hardware-OCC Issues
When this technique appeared at first offering a cost-effective and straightforward solution [21], [30], it arises two questions about what kind of simplicity and a solution to what. Answer to the later was hardware, control, and arithmetic simplicity [30]. Hardware and control simplicity was almost achieved, section I, but a lack of PLL synchronization could cause PF derating t V 0r V 0p V 0 Figure 6. DC-link voltage in a PWM rectifier due to a lack of grid synchronization mechanism, whatever a PLL or any other, and OCC had no one. Besides, arithmetic simplicity, i.e., arithmetic without multiplication and division, is most difficult to achieve. However, to avoid the later, the emblematic OCC variable-carrier was created, (27), but at the cost of instability at no-load [21]. As a result, through instability and PF derating, the offered OCC solution simplicity became no more than a nice try. Including the solution cost-effectiveness of the OCC. Above all, although the answer to the former question was power converters [43], [29], [1], [23], [28], [32], [27], it is still open, as it generates another question, (what if the OCC simplicity were true, what additional problems could solve).
1) Stability at no-load: In general, in a PWM rectifier, output power P 0 equals input power P T minus power losses, P L , P 0 = P T − P L . Then, admitting a proportionality between power losses and input power, where K 3 is proportional constant. In addition, assuming UPF, input power is given by, where V Sg and I g denotes grid voltage and phase current in frequency domain, respectively, while output power is, Then, combining (29), (30) and (31), it yields, where , I 0 is dc current. The former equation says that phase-current I g is proportional to I 0 . Yet, (32) has practical limits given by the sensitivity of the technique. As a small phase-current could exist when I 0 is null, or lower than a threshold value, I 0th , causing phase-current distortion when Ig is greater than amplitude Vm, as reported in [21], [43], [38], [28], [39], [30], [42], [26]. This is since V m becomes tiny at no-load when V 0 tends to its reference V * 0 , (25), which occurs when V * 0 = V 0p and I 0 = 0, (28). To explain this phenomenon from an emulated-resistance approach, (26) can be rewritten as, Which leads to a virtual input resistance R in1 , as a sort of V 0 controller. Besides, as in OCC, phase-current varies according to [? ], where R e denotes OCC input resistance in frequency domain. Hence, by making R e = R in1 and combining (25), (33) and (34), The equation (35) denotes modulation index m a , as I g is modulating and V m is carrier amplitude [21]. Applying final value theorem to (35), for a unit step response ( 1 s ) when t → +∞, When V * 0 = V 0p and I 0 = 0, V * 0 = V 0 , (28), so equation (36) yields, Preprints (www.preprints.org) | NOT PEER-REVIEWED | Posted: 2 September 2020 doi:10.20944/preprints202009.0036.v1 Overmodulation ocurrs when m a > 1, (37), as (37) can explain why previous works did not suppress fully overmodulation by growing or falling I g [43], [38], [28], [39], [42], [26], once K 1 cannot be controlled. [21]. Figure 7 illustrates this by ploting m a vs. K 1 , (37), for 0.67 > K 1 > 0.19, V p = 155.56V, V 0 = 467V, when I g grows 20%(A) and when I g falls 20% (C). Notice that when K 1 ≤ 0.25, the method does not work, as m a > 1.
2) Hardware-OCC PF derating at high-load: As was mentioned earlier, PF derating occurs [29], through a lack of grid synchronization. However, this cannot be predicted by an open-loop resistance-emulator value, i.e., r e [12], [21] as in frequency domain it leads to R e = r e s , which combined to (34), it gives I g = s V Sg (r e +s 2 L) , leading to an admittance angle φ v = arctan( I g V Sg ) = π 2 , which is not true. However, a better prediction can be obtained by combining (25) and (35), Then, combining former equation and (28), φ v is given by, where V 0p = V * 0 was assumed for simplicity. It can be noticed that the former equation predicts PF derating because admittance angle φ v is a decreasing function, confirming previous works [39], [30], [42], [26]. Figure 8 plots equation (39), for V p = 155.56V, V 0p = V * 0 = 467V, K 1 = 1. K p1 = 1, K I1 = 1. This figure confirms that φ v is decreasing when I 0 increases, i.e. from I 0 = 10A (P) to I 0 = 20A (N) and I 0 = 30A (M).

Software-OCC Solutions
Although subtle, the main difference between hardware-OCC and software-OCC is voltage controller location, which in the later is named V m and controls carrier, (25), (27), while in the former is named R in and controls modulating, (22), (24). However, only R in allows OCC to solve instability and PF derating issues. It is not just a matter of implementation, 1) Stability at no-load: As was mentioned earlier, phase-current is proportional to dc current, (32), but only under practical limits, through the sensitivity of OCC modulator. Since a small distorted phase-current could appear when dc current is less than the threshold current, I 0th . In order to avoid this in software-OCC, maximum controller limiter R in−max could be calibrated to set up minimum phase-current I gmin , since (20). Then, as voltage V Sg is fixed, minimum phase-current I gmin occurs when the resistance R inmax is reached, as I g R in = V Sg is a hyperbolic curve working at first quadrant, I g > 0, R in > 0. That is, Thereby, to avoid phase-current distortion at no-load, R inmax must be set up to achieve a minimum phase-current I gmin when dc current is less than I 0th . Thus, Preprints (www.preprints.org) | NOT PEER-REVIEWED | Posted: 2 September 2020 doi:10.20944/preprints202009.0036.v1 I g = I gmin , when I 0 < I 0th K 4 I 0 , when I 0 ≥ I 0th (42) Angle φ v (10/div) vs. angular frequency (rad/s) as a function of dc current I 0 , V * 0 = V 0p = 467V, T sw = 8.33ms, C = 1000µF, L=1mH, K p1 = K I1 = K I = 1. Figure 9 shows a plot of I g vs. I 0 , (32), when I gmin = 1.4A, I 0th = 0.5A, V Sg = 110V, R inmax = 78.01Ω. Unlike hardware-OCC, a tiny dc-controller value does not provoke overmodulation, so the current distortion becomes simpler to avoid.
2) Software-OCC PF derating at high-load: As at no-load, there is no current distortion, it would be necessary to check if at no-load PF derating could be generated. In this sense, the no-load and high-load case must be analyzed for PF derating. Thus, substituting R e = R in in (34), Note in the former equation that if denominator left term is very greater than the right one, R in >> sL, the equation becomes equivalent to (20). However, to achieve UPF, another expression can be found by combining equations (22) and (45), and relation R in >> sL, Preprints (www.preprints.org) | NOT PEER-REVIEWED | Posted: 2 September 2020 doi:10.20944/preprints202009.0036.v1 Relation R in >> sL can be forced by setting resistance lower limit R inmin = 10ωL, Figure 5, since in practice this relation implies R in ≥ 10ωL R in ≥ 10ωL. Besides, from expression (44), admittance angle φ = arctan( I g V Sg is given by, It can be noticed that this angle does not depend on dc current, nor dc voltage. Figure 10 shows a plot of admittance angle φ v vs.ω, for software-OCC, (45), when K P = 1, K I = 1. This plot independs on dc current.

DSP IMPLEMENTATION
Software-OCC controller, Figure 11(a), employs embedded DSP devices like PWM modulators, analog to digital, A/D, converters and the arithmetic-logic unit, ALU, blocks to perform all its tasks digitally, i.e., arithmetic and logic operations (including multiplication and division), digital comparators, digital inverters, PI controllers, output limiters and lead-lag compensators, LLCs. Yet, it is necessary a phase-current conditioner, Figure 11(b), consisting of a Hall-effect current-sensor [52], some operational amplifiers, OP-AMPs, and a few resistors [53] to change phase-current over dc voltage and then transforms it into digital, through A/D converter, see Appendix A. Hence, it is used a Hall-effect resistor R S (100Ω) to convert current into voltage and a resistor R t (1KΩ) to attenuate it. Then, a bunch of resistors and OP-AMPs (Att) amplifies this voltage and adds an offset to it to input it to A/D, as in DSP, A/D converter only works with positive voltages [53]. Hence, a proportionality between analog and digital is guaranteed for DSP to perform OCC control operations, once a scale factor K S (bits /A) is maintained for all currents. For hardware-OCC, something similar occurs, but now the scale factor is a resistance R S (V/A), since a current-sensor resistor is generally used in hardware systems. Anyway, for the sake of simplicity, to establish an equivalency between hardware and software-OCC, it is defined in the later, resistor R S as unity, R S = 1Ω, denoting that phase-current corresponds to the digital value adopted in DSP control operations. After the digitalizing process, phase-current pass through software implemented LLC, which averages phase-current according to, where F(s) = I gs (s) I g (s) , I gs (s), I g (s) in frequency domain corresponds to phase and average currents i g and i gs , respectively in time domain; G 0 is gain, τ 1 , τ 2 are lead and lag compensator constants. The main idea of former equation is to average phase-current i g without unwanted delay on phase angle, manipulating τ 1 and τ 2 values. A further analysis of LLC on software-OCC is performed in [34]. On the other hand, for DSP, carrier waveshape (a sawtooth or a symmetrical triangle) is a choice of DSP-PWM modulator. Thus, in software-OCC, a triangle carrier is chosen since, for a sinusoidal modulating wave, it produces less current harmonics than those in a sawtooth carrier [54]. Another DSP choice is produced when carrier slope (rising or falling) intercepts current, generating an inherent delay related to the inverse of the carrier frequency. This does not jeopardize the time control algorithm, as DSP operations are performed between the interceptions. Yet, in software-OCC, a variation in carrier amplitude also involves a variation in carrier frequency, Table.1 [53]. Then, there is no direct method to change carrier amplitude without vary carrier frequency also. However, in order to solve this issue, focusing on generating the same firing pulses, the OCC modulator equation (23) is modified as (24), which becomes the most suitable expression for DSP implementation as it considers a fixed carrier amplitude. In fact, the software-OCC controller is based on equations (21), (24), Figure 11(a).  Although first work on hardware-OCC rectifier might constitute a cost-effective solution [21], it presented such serious stability problems, that its use was not practical, i.e., for APF [55], or for photovoltaics applications [32]. Later instability solutions performed by hardware at no-load were reported, but there was always current distortion when dc current falls below a certain level Preprints (www.preprints.org) | NOT PEER-REVIEWED | Posted: 2 September 2020 doi:10.20944/preprints202009.0036.v1 [43], [38], [28], [39], [42], [26], except when a bulky resistor was placed at dc-link [21], [30]. And at high-load where complicated circuits [43], [23], [28], [42], [25], or costly systems were used [29], [41]. Thereby, despite these works represent a nice try to solve specific problems, they do not provide a definitive solution, even sacrificing hardware simplicity, or cost-effectiveness of OCC [21], [30]. Furthermore, any of the abovementioned reported works were capable of operating both at no-load and at high-load. Thus, to compare the fair cost-effectiveness of existing hardware-OCC works with present software-OCC, it would be necessary to compare reported works of the same performance, that is, OCC rectifiers operating at a wide range of load. Otherwise, it is like comparing a calculator with a computer. Above all, although the present work was implemented by using a TMS 320F28335 evaluation board in a laboratory prototype, a pretty cost-effective solution could be found acquiring a DSP chip and its accessories separately, or by using a simpler DSP, or a microcontroller chip, i.e., a PIC.
In any case, the present proposal results in a cost-effective solution on a full range of load, at least, for lack of another option.

SIMULATION AND EXPERIMENTAL RESULTS
The performance of software-OCC has been verified by simulation by using MATLAB and PSCAD/EMTDC and by experimental using DSP TMS320F28335, for PWM rectifier shown in Figure  12 Table. 2. In Figure 17 and Figure 24, Vgrms =110V and V * 0 = 390V, but in Figure18- Figure 23, due to technical problems, Vgrms =21V and V * 0 = 100V. Figure 14 presents a simulation result only with hardware-OCC evidencing its instability, while Figure 17    like overmodulation [21] (current distortion), nor present PF derating. This result verify equation (43) when K P1 >> K I1 . Experimental results in Figure 18- Figure 28 are dedicated to confirm former result, or enhance it. Figure 17 shows software-OCC behavior at start-up at no-load, verifying that there is no current distortion, unlike [21], nor even in smaller amount [38], [39], [26]. This is because to avoid current distortion, software-OCC can define minimum current when load current is null, by using R in−max , (45). Figure 18 illustrates dc-link voltage response to a current step, from no-load to high-load, showing a relatively fast-software-OCC dynamic-response considering dc-link capacitors size, thus complementing Figures 14, 15 and Figure 16. Figure 19 shows phase-current and R in controller response to a current step from no-load to high-load, presenting a high dynamic response, which is according to Figure 17. Figure 18. R in controller (x5Ω/V) (2V/div), dc-link current (1A/div), grid voltage (20V/div). and phase current (5A/div) for PWM rectifier transient from no -load to high -load. Hor. 40 ms/div. Figure 19. R in controller (x5Ω/V) (2V/div), dc-link current (1A/div), grid voltage (20V/div). and phase current (5A/div) for PWM rectifier transient from no -load to high -load. Hor. 40 ms/div. Figure 20 is a Figure 19 amplification for current-shape better illustration. It can be noticed in the former figure, that at no-load, when I 0 = 0, phase-current is small, but it does not exhibit current distortion, as it could be expected considering power balancing in equation (41), but instead, regarding a minimum phase-current, according to equation (42), see Figure 19, Figure 20 and Figure 22. Also, it can be observed that there is no power factor derating, as occurs in conventional hardware-OCC [21], see Figure 21, and Figure 23, and to preserve power factor, it is not necessary to use bulky inductors, unlike [29], [41], Table. 2. Thus, also confirming Figure 17.  From Figure 20 and Figure 22, it can be deduced that the present proposal satisfies IEEEStd519 − 1992 [8], as current distortion is small. Figure 21 shows the proposed controller start-up when the load is high. It illustrates a high dynamic response of software-OCC at high-load and that in such conditions, there is no PF derating. This result could substitute Figure 19 and Figure 26 results, once these figures do not achieve high-load results. On the other hand, Figure 23 shows PF derating vs. phase current at different load conditions. Figure 23 was built from Figure 19 at no-load and Figure 21 at high-load. Figure 23 demonstrates that there is a tiny variation when phase currents change. Figure  24- Figure 26. illustrate dc-link voltage response to a current step, from high-load to no-load, showing a relatively fast software-OCC dynamic-response due to dc-link capacitors size, thus complementing Figure 17.

Parameter
R (Ω) ω(r/s) L(mH) C 1 (µF) C 2 (µF) V Sg (V) τ 1 (ms) τ 2 (ms) f C (kHz)  Figure 27 illustrates the dynamic response of software PWM-OCC (switching frequency:24 kHz, R L : 100Ω) as well as the charging capacitor of the dc-link voltage. It spends approximately 0.55s, which is consistent with C=1100µF, Table. 2, and R L . Since the time constant τ = R L C and charging capacitor should last 3τ approx. Although OCC systems use to have a high dynamic response, for dc-link capacitor charging, this response depends on the capacitor value that, in the present case, was not possible to change due to the physical stability of Semikron board and laboratory facilities setup,

CONCLUSION
Despite the stability problems, the hardware-OCC contributions to power quality like hardware and control simplicity and high dynamic response are well known. Somehow, software-OCC raises as a solution to these problems and as a way to enhance and increase OCC contributions. According to the analysis performed in this work, the closed-loop emulated-resistance is, after all, with a dc-link voltage controller located in a different place than in hardware-OCC. It can manipulate active power and, at this moment, the power factor. Because of a DSP limitation, the DSP cannot emulate variable-carrier amplitude OCC in this software version, since carrier amplitude depends on the switching frequency. However, using a mathematical equivalency, gate pulses are fired in a similar way than that of hardware-OCC. This allows the resistance controller limiters to solve stability issues.
From the stability analysis of emulated-resistance controller for a PWM rectifier, it has stated that: Despite, several authors provide a solution to hardware-OCC instability at no-load, or at high-load separately. Any of these provide a full-load solution, i.e., at no-load and at high-load at the same time. Software-OCC does not present stability problems, even over a wide load range and presents a cost-effective solution, once DSP and its components were acquired separately, or a simpler DSP or a PIC was acquired. An easy way to improve stability and PF derating in hardware-OCC might be to emulate R in controller by hardware, using analog multipliers, dividers, and limiters but sacrificing OCC simplicity and cost-effectiveness. The theoretical analysis is validated by simulation and experiments.
Author Contributions: A. S. and A. L. conceived and designed the study; J. C. N., methodology ; R.T., G. P. and W. D. S. performed the simulations and experiments; J. C. N. and A. S. reviewed the manuscript and provided valuable suggestions; E.V. and A. L. wrote the paper; supervision, A. S.
Funding: This research was funded in part by the Coordenação de Aperfeiçoamento de Pessoal de Nível Superior-Brasil (CAPES)-Finance Code 001 and Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq).

Conflicts of Interest:
The authors declare no conflict of interest.

Abbreviations
The following abbreviations are used in this manuscript:

DSP
Digital Signal Processor OCC One Cycle Control CMV Common-mode Voltage LLC lead-lag compensator UPF unity power factor APF active power filters FACTs flexible ac transmission systems GCI photo-voltaic grid-connected inverters.