Soft-Switching Technology of Three-Phase Six-Switch PFC Rectifier

An active clamp, three-phase, six-switch power factor correction rectifier with a one-cycle controller is proposed, which can effectively suppress the reverse recovery of the reverse parallel diode of the bridge arm switch and reduce the reverse recovery loss. The main switches and auxiliary switch are both zero-voltage switches. It works in a fixed switching frequency and low power stress during the switching period. The specific working process and control circuit are analyzed in detail, and the model simulation is carried out. The experimental platform of a 2.5 KW prototype, with a complete test and verification of the soft switch technology proposed in this paper, was set up in the laboratory.


Introduction
The early three-phase power factor correction (PFC) (PFC) rectifier is derived from the single-phase PFC rectifier system and/or passive three-phase diode rectifier [1,2]. Since then, the research on a three-phase power correction circuit and its control have rapidly developed [3].
Three-phase current senseless control for a PFC bridge converter is proposed and implemented on the Digital Signal Processor (DSP) based platform in reference [4]. A bridgeless, four-switch, three-phase rectifier is proposed in reference [5], and it can operate with any pulse width modulation (PWM) method used in a standard three-phase, six-switch voltage source rectifier. Fewer semiconductors than any other topology of its kind have been used in the proposed converter. Azazi, H.Z presents a single-stage, three-phase power factor correction (PFC) rectifier using a single-switch boost regulator with less than 5% total harmonic distortion (THD) in the supply current [6]. A three-phase, single-stage AC-DC converter with topology utilizing SiC MOSFETs is proposed and analyzed by Zhang, Z [7]. Compared with DCM mode operating in other single-stage converters, continuous current mode (CCM) mode is working in the proposed converter, which reduces the current stress running through the semiconductor devices. However, its efficiency decreases rapidly with a further increase of power. Therefore, the proposed circuit is mostly suitable for low power applications.Wu, H investigated the topologies, operation principles, and modulation strategies of a three-port three-phase rectifier (TPTPR). The study improves the overall efficiency of the TPTPR-based AC-DC power conversion system [8]. Mallik, A proposed a three-phase boost power factor correction (PFC) using a single DC output voltage sensor is controlled by another methodology [9]. The current state of input voltage and input current is estimated by measuring the ripple information on the DC link voltage, and the from the add-on system significantly. However, the controller must be implemented by intelligent chips such as DSP. Also, the ZVSSVM control algorithm is proposed in current references which is complex and difficult to popularize.
A one-cycle control (OOC) soft-switching technology is proposed in this paper to alleviate the aforementioned issues of existing methods. The OOC controller is composed of a reset integrator, flip-flop, and other simple circuits, which simplifies the controller design, reduces the control cost, and makes it easy to maintain [22][23][24][25][26][27][28]. This paper proposes the control strategy, which needs a certain time interval ahead of the main six switches driving signal produced by the common one-cycle controller to drive the auxiliary switch in the circuit. The control strategy divides the phase voltage into six regions in a cycle, which is different from the ZVSSVM with 12 regions proposed in existing references. In addition, the controller proposed in this paper only needs ordinary circuit chips instead of intelligent ones. In this paper, the feasibility of the algorithm is verified by model simulation, and the accuracy of the system is verified by the actual 2.5-KW rectifier.
This paper is devoted to rectifiers with soft-switching technology for active clamp, three-phase, six-switch PFC rectifiers. The circuit of the proposed soft-switching PFC rectifier is reviewed in Section 2 and the proposed soft-switching PFC controller is described in detail in Section 3. Experimental verification is given for the rectifier in Section 4. Section 5 discusses the system in detail. Finally, a conclusion is provided in Section 6.

Circuit of the Proposed Soft-Switching PFC Rectifier
The compound active-clamping ZVS three-phase PFC rectifier is shown in Figure 1. Within the dotted wire frame is the auxiliary circuit of the main and auxiliary switches to realize soft switching.
Energies 2020, 13, x FOR PEER REVIEW 3 of 16 intelligent chips such as DSP. Also, the ZVSSVM control algorithm is proposed in current references which is complex and difficult to popularize. A one-cycle control (OOC) soft-switching technology is proposed in this paper to alleviate the aforementioned issues of existing methods. The OOC controller is composed of a reset integrator, flip-flop, and other simple circuits, which simplifies the controller design, reduces the control cost, and makes it easy to maintain [22][23][24][25][26][27][28]. This paper proposes the control strategy, which needs a certain time interval ahead of the main six switches driving signal produced by the common one-cycle controller to drive the auxiliary switch in the circuit. The control strategy divides the phase voltage into six regions in a cycle, which is different from the ZVSSVM with 12 regions proposed in existing references. In addition, the controller proposed in this paper only needs ordinary circuit chips instead of intelligent ones. In this paper, the feasibility of the algorithm is verified by model simulation, and the accuracy of the system is verified by the actual 2.5-KW rectifier.
This paper is devoted to rectifiers with soft-switching technology for active clamp, three-phase, six-switch PFC rectifiers. The circuit of the proposed soft-switching PFC rectifier is reviewed in Section 2 and the proposed soft-switching PFC controller is described in detail in Section 3. Experimental verification is given for the rectifier in Section 4. Section 5 discusses the system in detail. Finally, a conclusion is provided in Section 6.

Circuit of the Proposed Soft-Switching PFC Rectifier
The compound active-clamping ZVS three-phase PFC rectifier is shown in Figure 1. Within the dotted wire frame is the auxiliary circuit of the main and auxiliary switches to realize soft switching. The rectifier is a standard six-switch, three-phase boost PFC with an added auxiliary circuit, which includes an auxiliary switch Sr, a clamp capacitor Cc, and a resonant inductor Lr. The working frequency of the auxiliary switch is the same as that of the main switches. The switching frequency of the converter is fixed. With a one-cycle control strategy, all the main and auxiliary switches can be zero-voltage switched, and the switches have low voltage stress. The reverse recovery current of the switch reverse parallel diode is also suppressed.
The three-phase, six-switch rectifier controlled by conventional SPWM or SVM requires six current commutations in one operating cycle. If the bridge arm switch with the largest phase current is not operated, the four current commutations will occur in one switching cycle, two of which are the reverse parallel diode commutating to the opposite switch, and the other two are the switches commutating to the opposite reverse parallel diode. The former two are natural soft switches, while the latter two are hard switches, and the reverse recovery of the diode exists.
In a compound active clamp converter, the auxiliary switch operates only once during a period of the main switch's operation, resonates the DC bus to zero, and creates the condition of a zero voltage switch for the main switches. The switching of two main switches with reverse recovery must be completed in this zero voltage time. This paper presents an improved one-cycle control method which can realize this process. The rectifier is a standard six-switch, three-phase boost PFC with an added auxiliary circuit, which includes an auxiliary switch S r , a clamp capacitor C c , and a resonant inductor L r . The working frequency of the auxiliary switch is the same as that of the main switches. The switching frequency of the converter is fixed. With a one-cycle control strategy, all the main and auxiliary switches can be zero-voltage switched, and the switches have low voltage stress. The reverse recovery current of the switch reverse parallel diode is also suppressed.
The three-phase, six-switch rectifier controlled by conventional SPWM or SVM requires six current commutations in one operating cycle. If the bridge arm switch with the largest phase current is not operated, the four current commutations will occur in one switching cycle, two of which are the reverse parallel diode commutating to the opposite switch, and the other two are the switches commutating to the opposite reverse parallel diode. The former two are natural soft switches, while the latter two are hard switches, and the reverse recovery of the diode exists.
In a compound active clamp converter, the auxiliary switch operates only once during a period of the main switch's operation, resonates the DC bus to zero, and creates the condition of a zero voltage switch for the main switches. The switching of two main switches with reverse recovery must be Energies 2020, 13, 5130 4 of 15 completed in this zero voltage time. This paper presents an improved one-cycle control method which can realize this process.

One Cycle Controller
In this part, the traditional one-cycle control [21] is briefly introduced, and the process of the main bridge arm switch is analyzed. On this basis, an improved one-cycle control method is proposed, and the detailed process of realizing the soft-switching action of the active clamp ZVS three-phase rectifier circuit in Figure 1 is analyzed.

One Cycle Controller for Three-Phase PFC Rectifier
The three-phase voltage is divided into six regions in a cycle, each of which is 60 • as shown in Figure 2. The polarity of the phase with the largest voltage is always opposite to that of the other two phases. Therefore, only two phase currents with the same polarity need to be controlled in each region. Due to the fact that sum of three phase currents without the middle line equals zero, the third phase will be controlled after controlling two phases.

One Cycle Controller
In this part, the traditional one-cycle control [21] is briefly introduced, and the process of the main bridge arm switch is analyzed. On this basis, an improved one-cycle control method is proposed, and the detailed process of realizing the soft-switching action of the active clamp ZVS three-phase rectifier circuit in Figure 1 is analyzed.

One Cycle Controller for Three-Phase PFC Rectifier
The three-phase voltage is divided into six regions in a cycle, each of which is 60°as shown in Figure 2. The polarity of the phase with the largest voltage is always opposite to that of the other two phases. Therefore, only two phase currents with the same polarity need to be controlled in each region. Due to the fact that sum of three phase currents without the middle line equals zero, the third phase will be controlled after controlling two phases.
where dxx denotes the duty cycle of Sxx.
According to reference [21], the parameter Vm is defined as where Rs is the equivalent resistance of current detection and Re is the equivalent input resistance of rectifier. So the one-cycle control equation can be obtained as follows According to Formula (3), the core control circuit of the one-cycle controller can be obtained as shown in Figure 3. In the first region [0 • , 60 • ], the three-phase control can be realized by controlling the switches S an and S cn in Figure 1. The equivalent duty cycles are given by where d xx denotes the duty cycle of S xx .
According to reference [21], the parameter V m is defined as where R s is the equivalent resistance of current detection and R e is the equivalent input resistance of rectifier. So the one-cycle control equation can be obtained as follows According to Formula (3), the core control circuit of the one-cycle controller can be obtained as shown in Figure 3. For different control regions, ip and in are different, which can be any two of the currents ia, ib and ic. Similarly, the switches corresponding to Sp and Sn have different choices in different control regions.
According to Figure 2, the partition circuit is as shown in Figure 4 below. The purpose of a one-cycle control can be achieved by selecting the input and output signals of the control circuit in Figure 3 from the output region signals of the partition circuit in Figure 4. The input selection circuit and output driving signal of the controller is shown in Figure 5.  For different control regions, i p and i n are different, which can be any two of the currents i a , i b and i c . Similarly, the switches corresponding to S p and S n have different choices in different control regions.
According to Figure 2, the partition circuit is as shown in Figure 4 below.  For different control regions, ip and in are different, which can be any two of the currents ia, ib and ic. Similarly, the switches corresponding to Sp and Sn have different choices in different control regions.
According to Figure 2, the partition circuit is as shown in Figure 4 below. The purpose of a one-cycle control can be achieved by selecting the input and output signals of the control circuit in Figure 3 from the output region signals of the partition circuit in Figure 4. The input selection circuit and output driving signal of the controller is shown in Figure 5.  The purpose of a one-cycle control can be achieved by selecting the input and output signals of the control circuit in Figure 3 from the output region signals of the partition circuit in Figure 4. The input selection circuit and output driving signal of the controller is shown in Figure 5. For different control regions, ip and in are different, which can be any two of the currents ia, ib and ic. Similarly, the switches corresponding to Sp and Sn have different choices in different control regions.
According to Figure 2, the partition circuit is as shown in Figure 4 below. The purpose of a one-cycle control can be achieved by selecting the input and output signals of the control circuit in Figure 3 from the output region signals of the partition circuit in Figure 4. The input selection circuit and output driving signal of the controller is shown in Figure 5.  Combining Figure 3, Figure 4, and Figure 5, a three-phase six-switch PFC rectifier one-cycle controller is formed. In each control cycle, only two of the six switches have switching operations while the other four switches are in no-operation and are acted by a reverse parallel diode. The two switches that participate in the action of the switch are always turned on at the same time at first. After a period of time, the two switches are closed successively, as shown in Figure 6.
Energies 2020, 13, x FOR PEER REVIEW 6 of 16 Combining Figures 3-5, a three-phase six-switch PFC rectifier one-cycle controller is formed. In each control cycle, only two of the six switches have switching operations while the other four switches are in no-operation and are acted by a reverse parallel diode. The two switches that participate in the action of the switch are always turned on at the same time at first. After a period of time, the two switches are closed successively, as shown in Figure 6. The sequence of closing two action switches is determined by the working region, and the two switches involved in operation are either both upper arm or lower arm at the same time, so there will not be a case where one is in upper arm and the other is in lower arm. In each working region, the operation mode of the switches participating in the switching action is the same. In a switch cycle, each bridge arm has one current commutation. When the switch is turned off, it is a soft switch, and when the switch is reset and turned on, it is a hard switch. For soft switching when the switch is reset and turned on, it is necessary to make amends to the one-cycle control, as illustrated above.

The Proposed One Cycle Controller
The one-cycle controlled ZVS three-phase compound active clamp rectifier requires the main switches and the auxiliary switch to work at the same frequency. The auxiliary switch is always turned off before the main switches turn on in all situations. At this time, the auxiliary resonant inductance current discharges the parallel capacitors of the main switches to make the arm's volt resonate to zero and then turn on the main switches. The purpose of this is to realize zero-voltage turn-on. In addition, due to the existence of auxiliary resonant inductance, the reverse recovery characteristics of the switch diode in parallel are suppressed. The driving waveform of the auxiliary switch Sr is characterized by turning off before the two control switches Sn and Sp turn on, and turning on before the two control switches Sn and Sp turn off. The improved one-cycle control does not need to change the original control circuit, but only needs to process the clock reset signal of the one-cycle control to obtain the driving signal of the auxiliary switch, as shown in Figure 7. The sequence of closing two action switches is determined by the working region, and the two switches involved in operation are either both upper arm or lower arm at the same time, so there will not be a case where one is in upper arm and the other is in lower arm. In each working region, the operation mode of the switches participating in the switching action is the same. In a switch cycle, each bridge arm has one current commutation. When the switch is turned off, it is a soft switch, and when the switch is reset and turned on, it is a hard switch. For soft switching when the switch is reset and turned on, it is necessary to make amends to the one-cycle control, as illustrated above.

The Proposed One Cycle Controller
The one-cycle controlled ZVS three-phase compound active clamp rectifier requires the main switches and the auxiliary switch to work at the same frequency. The auxiliary switch is always turned off before the main switches turn on in all situations. At this time, the auxiliary resonant inductance current discharges the parallel capacitors of the main switches to make the arm's volt resonate to zero and then turn on the main switches. The purpose of this is to realize zero-voltage turn-on. In addition, due to the existence of auxiliary resonant inductance, the reverse recovery characteristics of the switch diode in parallel are suppressed. The driving waveform of the auxiliary switch S r is characterized by turning off before the two control switches S n and S p turn on, and turning on before the two control switches S n and S p turn off. The improved one-cycle control does not need to change the original control circuit, but only needs to process the clock reset signal of the one-cycle control to obtain the driving signal of the auxiliary switch, as shown in Figure 7.
The method of processing is to get two delays t ds for clock signal, and obtain the signals clk1 and clk2 respectively. Then, the two signals of clk1 and clk2 are processed to obtain the driving signal of the auxiliary switch S r . Finally, the driving signal of S r is anti-compressed to obtain the clk_set signal, which is used as the reset clock signal of the one-cycle core control circuit. The selection choice for the clock circuit is flexible, and can include circuits such as the crystal oscillator circuit or a clock pulse generator composed of 555 timers. For the delay circuit, the simplest method is to use an RC charging and discharging circuit and shape the waveform through a logic gate circuit. For the compression process of fetching S r , the driving signal, a simple delay circuit adds an AND gate can be used. The process described above can also be implemented by programmable logic devices.  Figure 7. Improved one-cycle control waveform processing.
The method of processing is to get two delays tds for clock signal, and obtain the signals clk1 and clk2 respectively. Then, the two signals of clk1 and clk2 are processed to obtain the driving signal of the auxiliary switch Sr. Finally, the driving signal of Sr is anti-compressed to obtain the clk_set signal, which is used as the reset clock signal of the one-cycle core control circuit. The selection choice for the clock circuit is flexible, and can include circuits such as the crystal oscillator circuit or a clock pulse generator composed of 555 timers. For the delay circuit, the simplest method is to use an RC charging and discharging circuit and shape the waveform through a logic gate circuit. For the compression process of fetching Sr, the driving signal, a simple delay circuit adds an AND gate can be used. The process described above can also be implemented by programmable logic devices.
The specific working waveform of the three-phase active clamp PFC rectifier soft switch is shown in Figure 8.  The specific working waveform of the three-phase active clamp PFC rectifier soft switch is shown in Figure 8. The method of processing is to get two delays tds for clock signal, and obtain the signals clk1 and clk2 respectively. Then, the two signals of clk1 and clk2 are processed to obtain the driving signal of the auxiliary switch Sr. Finally, the driving signal of Sr is anti-compressed to obtain the clk_set signal, which is used as the reset clock signal of the one-cycle core control circuit. The selection choice for the clock circuit is flexible, and can include circuits such as the crystal oscillator circuit or a clock pulse generator composed of 555 timers. For the delay circuit, the simplest method is to use an RC charging and discharging circuit and shape the waveform through a logic gate circuit. For the compression process of fetching Sr, the driving signal, a simple delay circuit adds an AND gate can be used. The process described above can also be implemented by programmable logic devices.
The specific working waveform of the three-phase active clamp PFC rectifier soft switch is shown in Figure 8. The saw-tooth wave is the current waveform iLr of the resonant inductance. The three dotted lines are voltages of the two main switches Vcn, Vcp and one auxiliary switch Vcr. From the waveform, it can be inferred that the three switches are all turned on when the voltage is zero, thus achieving The saw-tooth wave is the current waveform i Lr of the resonant inductance. The three dotted lines are voltages of the two main switches V cn , V cp and one auxiliary switch V cr . From the waveform, it can be inferred that the three switches are all turned on when the voltage is zero, thus achieving the goal of zero voltage conduction. Because each switch has a parallel capacitor, the zero voltage turning off of the switch is guaranteed. Therefore, all switches are zero voltage action, and the whole circuit achieves soft switching.

Operating Modes over a Switching Cycle
In any working region, the corresponding equivalent rectifier circuit is shown in Figure 9.
Energies 2020, 13, x FOR PEER REVIEW 8 of 16 the goal of zero voltage conduction. Because each switch has a parallel capacitor, the zero voltage turning off of the switch is guaranteed. Therefore, all switches are zero voltage action, and the whole circuit achieves soft switching.

Operating Modes Over a Switching Cycle
In any working region, the corresponding equivalent rectifier circuit is shown in Figure 9. From Figure 8, it can be seen that there are eight operating modes in the circuit of Figure 9 in one switching cycle. Taking the first working region as an example, eight working modes are analyzed one by one.

Mode1:(t0-t1)
All the main switches are turned off and the auxiliary switches Sr is turned on. In the first region, the currents of phases A and C are positive, and the phase B current is negative, so the reverse parallel diodes Dp, Dn, and Dt are turned on. In the resonant groove circuit consisting of auxiliary resonant inductor Lr, clamping capacitor Cc and auxiliary switch Sr, the voltage of auxiliary resonant inductor Lr is the clamping capacitor voltage VCc, and the current of resonant inductor increases linearly with the current change rate Cc Lr At t = t1, the auxiliary switch Sr turns off, and this mode ends.

Mode2:(t1-t2)
At t = t1, the auxiliary switch is turned off and the auxiliary inductance current begins to decrease. The auxiliary inductance Lr resonates with capacitors Cr, C3, Cn, and Cp. Lr causes C3, Cn, and Cp to discharge and charges Cr. Because of the existence of Cr, the auxiliary switch Sr reaches zero voltage and turns off. At t = t2, the voltage of the three main switches Sn, Sp, and Sbp and the parallel capacitors Cn, Cp, and C3 drops to zero and the resonance stops, and this mode ends. In the second half of the first region [30 • , 60 • ], the currents of phases a and c are positive and the current of phase b is negative. At this region, it is then known that Figure 9 corresponds to Figure 1. V p = V ab , V n = V cb , L p = L n = L t = L, D t is S bn 's parallel diode, S n and C n are S cn with its parallel capacitor, D n and C 5 equivalent to S cp 's parallel diode and capacitor, and S p and C p are San with its parallel capacitor, D p and C 1 equivalent to Sap parallel diode and capacitor.
From Figure 8, it can be seen that there are eight operating modes in the circuit of Figure 9 in one switching cycle. Taking the first working region as an example, eight working modes are analyzed one by one.

Mode 1: (t 0 -t 1 )
All the main switches are turned off and the auxiliary switches S r is turned on. In the first region, the currents of phases A and C are positive, and the phase B current is negative, so the reverse parallel diodes D p , D n , and D t are turned on. In the resonant groove circuit consisting of auxiliary resonant inductor L r , clamping capacitor C c and auxiliary switch S r , the voltage of auxiliary resonant inductor L r is the clamping capacitor voltage V Cc , and the current of resonant inductor increases linearly with the current change rate di Lr dt = V Cc L r (4) At t = t 1 , the auxiliary switch S r turns off, and this mode ends.

Mode 2: (t 1 -t 2 )
At t = t 1 , the auxiliary switch is turned off and the auxiliary inductance current begins to decrease. The auxiliary inductance L r resonates with capacitors C r , C 3 , C n , and C p . L r causes C 3 , C n , and C p to discharge and charges C r . Because of the existence of C r , the auxiliary switch S r reaches zero voltage and turns off. At t = t 2 , the voltage of the three main switches S n , S p , and S bp and the parallel capacitors C n , C p , and C 3 drops to zero and the resonance stops, and this mode ends.

Mode 3: (t 2 -t 3 )
At t = t 2 , S n and S p parallel diodes start to turn on. After that, D n and D p diodes begin to enter the reverse recovery stage. The auxiliary inductance current continues to decrease with the relation depicted below: Energies 2020, 13, 5130 9 of 15 The duration of this mode is very short, which is the reverse recovery time of D n and D p diodes on the bridge arm.

Mode 4: (t 3 -t 4 )
At t = t 3 , when the D n and D p diodes are completely turned off, the auxiliary resonant inductance current is zero. Thereafter, the auxiliary resonant inductor L r and capacitors C 1 , C 3 , C 5 , and C r begin to resonate again. The voltages of C 1 , C 3 , and C 5 begin to rise and the voltages of C r start to decrease. At t = t 4 , the voltage of C 1 , C 3 , and C 5 rises to V o + V Cc and auxiliary switch S r has a voltage of zero. S r is parallel to the diode clamp, causing resonance stop.

Mode 5: (t 4 -t 5 )
At t = t 4 , the current of the auxiliary inductor reaches the maximum negative polarity and begins increasing in polarity. The current of the auxiliary inductor rises linearly with the rate of change given by 3.3.6. Mode 6: (t 5 -t 6 ) At t = t 5 , the main switch S p is turned off, the input boost inductor charges C p and discharges C 1 . Because of the existence of capacitor C p , S p achieves zero-voltage turn-off.

Mode 7: (t 6 -t 7 )
At t = t 6 , when D p is turned on, the auxiliary resonant inductor L r voltage is clamped on capacitor voltage V Cc , and the auxiliary inductor current rate of change is as follows 3.3.8. Mode 8: (t 7 -t 8 ) At t = t 7 , the main switch S n is turned off, the input boost inductor charges C n and discharges C 5 . Because of the existence of the capacitor C n , S n achieves zero-voltage turn-off. At t = t 8 , D n is turned on and then the entire process repeats from Mode 1.

Experimental Verifications
In order to verify the validity of the above analysis of the soft switch working process, computer simulation and actual circuit platform experiments are conducted.

Computer Simulation Verification
Based on the design described, a simulation model was built. The phase voltage in the three-phase input was 110 V, the switching frequency was 10, kHz and the output load was 12.25 kW with an output of 350 V and a load of 10 Ω. Auxiliary circuit parameters include: resonant inductance L r = 50 uH, switch parallel capacitor C = 10 nF, and clamp capacitor C c = 480 uF. The simulation waveforms of ZVS on the main and auxiliary switches are shown in Figure 10. 50 uH, switch parallel capacitor C = 10 nF, and clamp capacitor Cc = 480 uF. The simulation waveforms of ZVS on the main and auxiliary switches are shown in Figure 10. As shown above in Figure 10, Sr is the auxiliary switch driving signal, Sn and Sp are the two main control switches on the bridge arm, Vdc link is the voltage on the bridge arm and Vsr is the voltage on the auxiliary switch. It can be seen from the figure that when the auxiliary switch is turned off, the voltage on the bridge arm drops rapidly to zero. Then, due to the reverse recovery of the diode, the voltage on the bridge arm remains zero. During the period, the main switches achieve zero-voltage turn-on. At the end of the diode reverse recovery commutation, the voltage on the bridge arm begins to rise and the voltage on the auxiliary switch begins to drop to zero. At this time, the auxiliary achieves zero-voltage turn-on. Finally, the zero-voltage turn-on of all switches is realized. Because the capacitors are connected in parallel with the switch, the purpose of zero-voltage turn-off of all switches is ensured, and finally all switches are in soft switch operation.
The operation of the auxiliary circuit is shown in Figure 11.  Figure 11 shows that VCc is the clamping capacitor voltage and iLr is the resonant inductance current. It can be seen that the resonant inductance current is a periodic saw-tooth wave, while the clamping capacitor voltage is almost unchanged in a period. The simulation is consistent with the results from the previous analysis, further illustrating the accuracy of the constructed analysis.
The input phase currents and phase voltages are shown in Figure 12. As shown above in Figure 10, S r is the auxiliary switch driving signal, S n and S p are the two main control switches on the bridge arm, V dc link is the voltage on the bridge arm and V sr is the voltage on the auxiliary switch. It can be seen from the figure that when the auxiliary switch is turned off, the voltage on the bridge arm drops rapidly to zero. Then, due to the reverse recovery of the diode, the voltage on the bridge arm remains zero. During the period, the main switches achieve zero-voltage turn-on. At the end of the diode reverse recovery commutation, the voltage on the bridge arm begins to rise and the voltage on the auxiliary switch begins to drop to zero. At this time, the auxiliary achieves zero-voltage turn-on. Finally, the zero-voltage turn-on of all switches is realized. Because the capacitors are connected in parallel with the switch, the purpose of zero-voltage turn-off of all switches is ensured, and finally all switches are in soft switch operation.
The operation of the auxiliary circuit is shown in Figure 11.
Energies 2020, 13, x FOR PEER REVIEW 10 of 16 50 uH, switch parallel capacitor C = 10 nF, and clamp capacitor Cc = 480 uF. The simulation waveforms of ZVS on the main and auxiliary switches are shown in Figure 10. As shown above in Figure 10, Sr is the auxiliary switch driving signal, Sn and Sp are the two main control switches on the bridge arm, Vdc link is the voltage on the bridge arm and Vsr is the voltage on the auxiliary switch. It can be seen from the figure that when the auxiliary switch is turned off, the voltage on the bridge arm drops rapidly to zero. Then, due to the reverse recovery of the diode, the voltage on the bridge arm remains zero. During the period, the main switches achieve zero-voltage turn-on. At the end of the diode reverse recovery commutation, the voltage on the bridge arm begins to rise and the voltage on the auxiliary switch begins to drop to zero. At this time, the auxiliary achieves zero-voltage turn-on. Finally, the zero-voltage turn-on of all switches is realized. Because the capacitors are connected in parallel with the switch, the purpose of zero-voltage turn-off of all switches is ensured, and finally all switches are in soft switch operation.
The operation of the auxiliary circuit is shown in Figure 11.  Figure 11 shows that VCc is the clamping capacitor voltage and iLr is the resonant inductance current. It can be seen that the resonant inductance current is a periodic saw-tooth wave, while the clamping capacitor voltage is almost unchanged in a period. The simulation is consistent with the results from the previous analysis, further illustrating the accuracy of the constructed analysis.
The input phase currents and phase voltages are shown in Figure 12.  Figure 11 shows that V Cc is the clamping capacitor voltage and i Lr is the resonant inductance current. It can be seen that the resonant inductance current is a periodic saw-tooth wave, while the clamping capacitor voltage is almost unchanged in a period. The simulation is consistent with the results from the previous analysis, further illustrating the accuracy of the constructed analysis.
The input phase currents and phase voltages are shown in Figure 12. From Figure 12 The input current follows the change of the input voltage, thus realizing the purpose of power factor correction. From Figure 12 The input current follows the change of the input voltage, thus realizing the purpose of power factor correction.

Verification of Experimental Platform
The experimental platform of 2.5 KW is shown in Figure 13.

Verification of Experimental Platform
The experimental platform of 2.5 KW is shown in Figure 13. From Figure 12 The input current follows the change of the input voltage, thus realizing the purpose of power factor correction.

Verification of Experimental Platform
The experimental platform of 2.5 KW is shown in Figure 13. The main circuit parameters are: input phase voltage Vi = 110 V, output DC voltage Vo = 350 V, input AC inductance L = 0.5 mH, switching frequency = 15 kHz, and load resistance R = 50 Ω. Auxiliary circuit parameters: resonant inductance Lr = 50 uH, switch parallel capacitor C = 10 nF, and clamp capacitor Cc = 480 uF.
Set the two important time parameters tsd to 2.5 us and ts to 10 us. The resonant inductance current and bridge arm voltage are shown in Figure 14, which are basically consistent with the simulation results. In order to further explain whether the main switch and auxiliary switch are turned on at zero voltage, the voltage waveforms on the bridge arm are expanded, and two time parameters are set, as shown in Figure 15. In order to further explain whether the main switch and auxiliary switch are turned on at zero voltage, the voltage waveforms on the bridge arm are expanded, and two time parameters are set, as shown in Figure 15. In order to further explain whether the main switch and auxiliary switch are turned on at zero voltage, the voltage waveforms on the bridge arm are expanded, and two time parameters are set, as shown in Figure 15. It can be seen that when the voltages are resonated to zero, the main switch and auxiliary switch are turned on to realize zero-voltage turn-on. Because of the existence of parallel capacitors, the switches can reach zero-voltage turn-off. Figure 16 shows the input one of three phase volt and current. The discontinuity of the current in Figure 16 is the transition point of the working region. Because of the limited channel of oscilloscope, only one phase voltage and current waveforms are given here. It can be seen that the input current follows the change of the input voltage, thus realizing the purpose of power factor correction. It can be seen that when the voltages are resonated to zero, the main switch and auxiliary switch are turned on to realize zero-voltage turn-on. Because of the existence of parallel capacitors, the switches can reach zero-voltage turn-off. Figure 16 shows the input one of three phase volt and current. In order to further explain whether the main switch and auxiliary switch are turned on at zero voltage, the voltage waveforms on the bridge arm are expanded, and two time parameters are set, as shown in Figure 15.  It can be seen that when the voltages are resonated to zero, the main switch and auxiliary switch are turned on to realize zero-voltage turn-on. Because of the existence of parallel capacitors, the switches can reach zero-voltage turn-off. Figure 16 shows the input one of three phase volt and current. The discontinuity of the current in Figure 16 is the transition point of the working region. Because of the limited channel of oscilloscope, only one phase voltage and current waveforms are given here. It can be seen that the input current follows the change of the input voltage, thus realizing the purpose of power factor correction. The discontinuity of the current in Figure 16 is the transition point of the working region. Because of the limited channel of oscilloscope, only one phase voltage and current waveforms are given here. It can be seen that the input current follows the change of the input voltage, thus realizing the purpose of power factor correction.
The efficiency curves of hard-switching and soft-switching three-phase PFC calculated from input and output power are shown in the Figure 17. It can be seen that the converter under soft-switching condition has higher efficiency.
Energies 2020, 13, x FOR PEER REVIEW 13 of 16 The efficiency curves of hard-switching and soft-switching three-phase PFC calculated from input and output power are shown in the Figure 17. It can be seen that the converter under softswitching condition has higher efficiency.

Discussion
The compound clamp ZVS three-phase VSR circuit mentioned in reference [19][20][21], achieves ZVS in all switches, including auxiliary switches. The auxiliary circuit is simple and the additional system

Discussion
The compound clamp ZVS three-phase VSR circuit mentioned in reference [19][20][21], achieves ZVS in all switches, including auxiliary switches. The auxiliary circuit is simple and the additional system has a low extra loss. However, the ZVSSVM controller must be implemented by intelligent chips such as DSP, which is complex and difficult to popularize. The governing equation of the one cycle controller, which is derived based on the input current following the change of input voltage, determines the ability of the system to control the power factor close to 1 [22][23][24][25][26][27][28]. This paper adjusts and improves the original one cycle control strategy, by adding the driving signal of an auxiliary switch, which can complete the ZVS control of the compound clamp ZVS three-phase VSR circuit. Although only two switches on the main bridge arm are controlled, the conducting form of the third switch is replaced by the diode conducting in parallel with that switch. The improved one cycle control proposed in this paper share many similarities with the ZVSSVM control strategy in reference [19][20][21]. The major difference between the two systems stems from the use of ordinary circuits in the proposed technique to avoid complex computation used by the intelligent chip in ZVSSVM control strategy which needs to sample the voltage and current sensor signals and carry out multiple multiplications nonlinear operations to obtain the driving switch signals. There is a certain delay time in the process of data sample and calculation. The nonlinear multiplication operation brings calculation errors, and its anti-interference ability is not good enough. Due to the avoidance of complex calculation of the intelligent chip, the proposed system has better performance on real-time applications and stability.
Formula (2) indicates that the input impedance has become a factor in the signal V m rather than an estimated parameter. When the load changes, the input impedance also changes at the same time, then quickly reflects the signal V m , and duty cycle adjustment is immediately started within the current control cycle. Therefore, different from traditional converter, the control system proposed in this paper has adaptive capability for input and output impedance. The proposed control algorithm is similar to the flat top SVM modulation method, so it can work at higher switching frequencies. In the denominator of the formula for calculating the pulse width of the flat-top SVM, there is a DC link voltage value factor, and the voltage pulsation of the dc link has a great disturbance to the PWM duty ratio, thus affecting the output voltage. Meanwhile, the duty cycle proposed in this paper is only related to the average input and output current after the equivalent transformation of Equation (3), which is also the reason why it is adaptive to the load.
This controller requires synchronous switching between the interval signal and the drive signal. Otherwise, the input currents will have a large current pulse overshoot, which may destroy the switches under high power output. In this paper, the drive signals (S n and S p ) are switched synchronously by the clock signal trigging, such that the input current waveform will not have large disturbance, as shown in Figure 16. In addition, the optimization design of relevant resonance parameters of this method can only be adjusted empirically, and there is no strict theoretical basis, which is the arrangement of the next research work.

Conclusions
An improved one-cycle control method combined with a compound active clamp ZVS three-phase rectifier circuit topology is proposed in this paper, which can achieve six main switches and one auxiliary switch working in zero-voltage. The validity of the theoretical analysis is verified by computer simulation and an actual 2.5 kW experimental platform. The one cycle controller with low cost is very simple, only needs an integrator with reset and other accompanying logic circuit, and is adaptive to the change of load with fast response and less overshoot. Compared with the traditional space vector modulation (SVPWM) control method, one-cycle control is simpler to construct, easier to debug, and the system is more stable and reliable with lower costs to implement.
Author Contributions: Q.Z. and Q.D. designed, debugged the system, built some parts of hardware, and performed the experiment; Q.Z. is also mainly responsible for the analysis, experiment, and preparing the paper; Q.D. supervised the design and analysis. All authors have read and agreed to the published version of the manuscript.