A Comparative Study of GaN HEMT and Si MOSFET-Based Active Clamp Forward Converters

Compared with conventional forward converters, active clamp forward (ACF) converters have many advantages, including lower voltage stress on the primary power devices, the ability to switch at zero voltage, reduced EMI and duty cycle operation above 50%. Thus, it has been the most popular solution for the low bus voltage applications, such as 48 V and 28 V. However, because of the poor performance of Si MOSFETs, the efficiency of active clamp forward converters is difficult to further improved. Focusing on the bus voltage of 28 V with 18~36 V voltage range application, the Gallium Nitride high electron-mobility transistors (GaN HEMT) with ultralow on-resistance, low parasitic capacitances, and no reverse recovery, is incorporated into active clamp forward converters for achieving higher efficiency and power density, in this paper. Meanwhile, the comparative analysis is performed for Si MOSFET and GaN HEMT. In order to demonstrate the feasibility and validity of the proposed solution and comparative analysis, two 18~36 V input, 120 W/12 V output, synchronous rectification prototype with different power devices are built and compared in the lab. The experimental results show the GaN version can achieve the efficiency of 95.45%, which is around 1% higher than its counterpart under the whole load condition and the same power density of 2.2 W/cm3.


Introduction
With the rapid development of information technology and industry, isolated DC-DC converters are widely used in computers, communications, aerospace, etc. Compared with flyback converters, the forward converter has been widely employed in the low-to-medium power applications for simplicity, higher power capacity, and low cost [1][2][3][4][5]. Due to tradeoffs between current/voltage stress on the power devices, transformer reset, circuit complexity, and the cost, different topologies of forward converters are presented for various applications [1]. In fact, the performance of the forward converter is strongly dependent on transformer-reset methods [6]. Generally, it has been established that the active-clamp reset approach offers better performance than the other reset approaches, including single-ended reset, two-transistor reset, and RCD clamp reset, because many advantages can be achieved by the additional auxiliary switch and clamp capacitor, including the lower voltage stress on the primary power devices, the ability to switch at zero voltage, reduced EMI, bidirectional magnetizing current, and duty cycle operation above 50 percent [7]. Depending on how the active clamp network is placed in the converter, two distinct types of clamping are derived, which are the low-side clamp with the p-channel transistor and the high-side clamp with n-channel transistor [8]. The low-side clamp with the p-channel transistor is preferred for low input voltage because it can be easily driven by the pulse-width-modulation (PWM) controller. Correspondingly, the n-channel clamp reduces the voltage Energies 2020, 13 stress on the clamp capacitor, but requires a floating gate drive. Thus, it is suitable for high input voltage applications. Similar to [9][10][11][12][13], the low and wide bus voltage case is discussed in this paper. For low bus power systems, there are two important requirements. First, the system should operate with a wide range of input voltage to cover the wide battery voltage. Second, the efficiency needs to be highest at the nominal input voltage where those power systems mostly operate. Furthermore, in low voltage high current output, the rectification loss of secondary side is the major contributor to poor efficiency. Thus, the synchronous rectifiers should be employed. Fortunately, active clamp forward (ACF) converters are easily implemented by a self-driven way to reduce the conduction losses. Therefore, in this paper, the bus voltage of 28 V, ranging from 18 V to 36 V, are investigated. On the other hand, since the silicon-based semiconductor devices approach their theoretical performance limit, the ability to improve the performance of the next generation of power supplies by optimization of topology, magnetic and power management technique is diminished [14]. The emerging wideband-gap device, such as enhancement-mode Gallium Nitride high electron-mobility transistors (GaN HEMTs) will certainly bring out significant incremental efficiency improvement. GaN HEMTs have a much lower gate charge and output capacitance. Therefore, it can operate at a considerably higher switching frequency than the Si MOSFET while maintaining high efficiency [15][16][17][18][19]. A review of the literature shows GaN HEMTs mainly is demonstrated for the active clamp flyback converter to achieve higher frequency and high efficiency operation, because of the big market of the ac-dc adapter/charger for consumer electronics [20][21][22][23][24][25]. However, little attention was directed towards ACF converters with GaN HEMT. In [26], Bulut et al. made a feasibility study for GaN HEMT applied in ACF converters. In [27], Zhang et al. studied the optimization of MHz multi-winding planar transformers for ACF converters. Different from [26,27], this paper focuses on the comparative analysis between GaN HEMT and Si MOSFET in ACF converters.
Hence, the GaN HEMT is attempted to incorporate into ACF converters for achieving higher efficiency and power density, in this paper. The operation principle and detailed design consideration of a GaN-based active clamp forward converter are illustrated. Moreover, the comparative analysis is performed for Si MOSFET and GaN HEMT. In order to demonstrate the strength of GaN HEMTs, and the validity of the proposed solution, two 18~36 V input, 120 W/12 V output, synchronous rectification prototypes are built and compared in the lab. The experimental results show the GaN version can achieve the efficiency of 95.45%, which is around 1% higher than its counterpart under the whole load condition and the same power density of 2.2 W/cm 3 .

Operation Principle for GaN-Based Active Clamp Forward Converter
The aforementioned forward converters with high side and low side reset circuit are shown in Figure 1. It is well-known that the drain-to-source voltage stress on the main switch, and the transformer reset voltage, are the same for both circuits. The difference one is the voltage V Cc across the clamp capacitor, which has a significant effect on the clamp capacitor selection and turns ration of the transformer. The voltage stress of the high-side clamp V Cc (HS) and the low-side clamp V Cc (LS) , which is a function of the duty cycle and input voltage, is calculated as Equations (1) and (2), respectively. According to the input voltage range from 18 V to 36 V, a comparison of the voltage stress across the clamp capacitor is shown in Figure 2. However, compared to the high-side counterpart, the low-side clamp with the p-channel transistor is preferred for low input voltage because it can be easily driven by the PWM controller. Thus, when the input voltage range is two to one or greater, the low-side clamp is a good candidate, since a higher duty cycle can be tolerated with less variation in clamp voltage.   Figure 3 shows the circuit diagram of an active clamp forward converter with GaN HEMT. To simplify the analysis, the following assumptions are made.
(1) All power devices, including Q1, Q2, QSR1 and QSR2, are ideal, except for the output capacitance of Q1. (2) The inductance L0 is large enough, so the current iL0 is roughly constant.
(3) The clamp capacitance Cc and output capacitance C0 is large enough so that their voltages can be considered as the constant during one switching period Ts. (4) The circuit is operated at steady-state.      Figure 3 shows the circuit diagram of an active clamp forward converter with GaN HEMT. To simplify the analysis, the following assumptions are made.
(1) All power devices, including Q1, Q2, QSR1 and QSR2, are ideal, except for the output capacitance of Q1. (2) The inductance L0 is large enough, so the current iL0 is roughly constant.
(3) The clamp capacitance Cc and output capacitance C0 is large enough so that their voltages can be considered as the constant during one switching period Ts. (4) The circuit is operated at steady-state. (5) The inductance Llk is large enough for achieving ZVS operation of the switch Q1.  Figure 3 shows the circuit diagram of an active clamp forward converter with GaN HEMT. To simplify the analysis, the following assumptions are made.
(1) All power devices, including Q 1 , Q 2 , Q SR1 and Q SR2 , are ideal, except for the output capacitance of Q 1 . (2) The inductance L 0 is large enough, so the current i L0 is roughly constant.
(3) The clamp capacitance C c and output capacitance C 0 is large enough so that their voltages can be considered as the constant during one switching period T s . (4) The circuit is operated at steady-state. (5) The inductance L lk is large enough for achieving ZVS operation of the switch Q 1 .   Figure 3 shows the circuit diagram of an active clamp forward converter with GaN HEMT. To simplify the analysis, the following assumptions are made.
(1) All power devices, including Q1, Q2, QSR1 and QSR2, are ideal, except for the output capacitance of Q1. (2) The inductance L0 is large enough, so the current iL0 is roughly constant.
(3) The clamp capacitance Cc and output capacitance C0 is large enough so that their voltages can be considered as the constant during one switching period Ts. (4) The circuit is operated at steady-state.   The equivalent circuits at different modes are shown in Figure 4. The key operation waveforms during a switching cycle are shown in Figure 5. The switch Q 1 and Q 2 is controlled by driving signal v gs_Q1 and −v gs_Q2 , respectively. The switch Q SR1, Q SR2 are the self-driven synchronous rectifier. It should be noted that when the level of −v gs_Q2 is positive, Q 2 is turned on. One switching cycle can be divided into five modes, and they could be described as follows.
Mode I [t 0 ≤ t < t 1 , Figure 4a]: Prior to t 0 , the voltage across the main switch Q 1 has become zero level, and the voltage across the magnetizing inductor L m is V in . Thus, the magnetizing current i Lm increases with a constant slope of V in /L m . The secondary side synchronous switch Q SR1 is turned on, and Q SR2 is OFF, the output current I 0 flows through synchronous rectifier Q SR1 . During this mode, the power is transferred from the primary side to the secondary side, the primary current i p is the sum of magnetizing current i Lm and I 0 /n, as shown in Figure 4a. This mode ends at time t 1 when the main switch Q 1 is turned off by the control command.
Mode II [t 1 ≤ t < t 2 , Figure 4b]: This mode is a resonant mode. During this mode, the energy stored in the leakage inductance L lk and the magnetizing inductance L m charges the junction capacitor C oss1 of the switch Q 1 and discharges the junction capacitor of the switch Q 2 . The secondary side current is freewheeling and the body diodes of secondary synchronous switches Q SR1 and Q SR2 conduct simultaneously. This mode ends at time t 2 when the voltage v Q1 is charged to V Cc .  The equivalent circuits at different modes are shown in Figure 4. The key operation waveforms during a switching cycle are shown in Figure 5. The switch Q1 and Q2 is controlled by driving signal vgs_Q1 and -vgs_Q2, respectively. The switch QSR1, QSR2 are the self-driven synchronous rectifier. It should be noted that when the level of -vgs_Q2 is positive, Q2 is turned on. One switching cycle can be divided into five modes, and they could be described as follows.
Mode I [t0 ≤ t < t1, Figure 4(a)]: Prior to t0, the voltage across the main switch Q1 has become zero level, and the voltage across the magnetizing inductor Lm is Vin. Thus, the magnetizing current iLm increases with a constant slope of Vin/Lm. The secondary side synchronous switch QSR1 is turned on, and QSR2 is OFF, the output current I0 flows through synchronous rectifier QSR1. During this mode, the power is transferred from the primary side to the secondary side, the primary current ip is the sum of magnetizing current iLm and I0/n, as shown in Figure 4(a). This mode ends at time t1 when the main switch Q1 is turned off by the control command.
Mode II [t1 ≤ t < t2, Figure 4(b)]: This mode is a resonant mode. During this mode, the energy stored in the leakage inductance Llk and the magnetizing inductance Lm charges the junction capacitor Coss1 of the switch Q1 and discharges the junction capacitor of the switch Q2. The secondary side current is freewheeling and the body diodes of secondary synchronous switches QSR1 and QSR2 conduct simultaneously. This mode ends at time t2 when the voltage vQ1 is charged to VCc.   Mode III [t2 ≤ t < t3, Figure 4(c)]: This mode is the active clamp mode, and transformer reset can be achieved in this mode. At t = t2, the voltage vQ1 is equal to Vin/(1-D), the drain-to-source voltage of the switch Q2 has decreased to zero level, and the body diode of switch Q2 is forward biased. This deadtime is set for switch Q2 being turned on under ZVS. When the current ip charges the clamp capacitance Cc to VCc, the current ip will equal to iLm. Ignoring the voltage across Lr, the voltage across Lm is clamped to (VCc-Vin), and ip remains equal to iLm, which will decrease linearly together. It is noted that although the equivalent circuits in Figure 4(c) shows the immediate reversal of the magnetizing current, the transition of primary current from positive to negative is actually smooth. The primary voltage vp is negative, and the secondary side voltage vs is negative too. Thus, the switch QSR2 is turned on, and QSR1 is turned off, the secondary load current conducting through the switch QSR2. This mode ends at t3 when p-channel MOSFET is turned OFF.
Mode IV [t3 ≤ t < t4, Figure 4(d)]: When the switch Q2 is turned OFF at time t3, the converter enters into mode IV. Same to mode II, this is a resonant mode. At t = t3, the primary voltage vp is equal to -DVin/(1-D), the secondary side voltage vs remains negative. Thus, the switch QSR2 continues conducting, and QSR1 remains OFF. In this mode, the Llk, Lm, and Coss1 resonant together. The junction capacitance Coss1 is discharged by the sum of the current iLlk and iLm, and the voltage vQ1 starts to decrease from VCc. This process is very important for achieving ZVS operation of the main switch Q1. Furthermore, since the primary voltage of transformer T1 decrease, the diode of the secondary side switch QSR2 will forward-biased simultaneously. This mode ends at t4 when the voltage vQ1 reaches to zero. Figure 4(e)]: At t = t4, the junction capacitor voltage vQ1 is equal to zero level. because the body diodes of QSR1 and QSR2 are still conducting, the secondary side voltage vs = 0. Correspondingly, the voltage across the leakage inductor Llk is input voltage Vin. Thus, the primary current increases with a constant slope from negative value through the two-dimensional electron gas(2DEG) of GaN HEMT. This condition is set for the switch Q1 to turn on under ZVS condition. This mode ends at t5 and initiate the next switching period.

Design Consideration
In order to prove the feasibility and validity of the proposed solution and comparative analysis, two 18~36V input, 120 W/12 V output prototypes with GaN HEMT and traditional Si MOSFET have been designed, built, and tested. The design specifications of the ACF converter with self-driven synchronous rectification are listed in Table 1. The design consideration of key circuit parameters will be discussed in this section. A review of the literature shows that the operating frequency of several reference designs from TI corporation [28][29][30] and the product from TDK-Lambda [31], are about 200 Mode III [t 2 ≤ t < t 3 , Figure 4c]: This mode is the active clamp mode, and transformer reset can be achieved in this mode. At t = t 2 , the voltage v Q1 is equal to V in /(1 − D), the drain-to-source voltage of the switch Q 2 has decreased to zero level, and the body diode of switch Q 2 is forward biased. This deadtime is set for switch Q 2 being turned on under ZVS. When the current i p charges the clamp capacitance C c to V Cc , the current i p will equal to i Lm . Ignoring the voltage across L r , the voltage across L m is clamped to (V Cc − V in ), and i p remains equal to i Lm , which will decrease linearly together. It is noted that although the equivalent circuits in Figure 4c shows the immediate reversal of the magnetizing current, the transition of primary current from positive to negative is actually smooth. The primary voltage v p is negative, and the secondary side voltage v s is negative too. Thus, the switch Q SR2 is turned on, and Q SR1 is turned off, the secondary load current conducting through the switch Q SR2 . This mode ends at t 3 when p-channel MOSFET is turned OFF.
Mode IV [t 3 ≤ t < t 4 , Figure 4d]: When the switch Q 2 is turned OFF at time t 3 , the converter enters into mode IV. Same to mode II, this is a resonant mode. At t = t 3 , the primary voltage v p is equal to − DV in /(1 − D), the secondary side voltage v s remains negative. Thus, the switch Q SR2 continues conducting, and Q SR1 remains OFF. In this mode, the L lk , L m , and C oss1 resonant together. The junction capacitance C oss1 is discharged by the sum of the current i Llk and i Lm , and the voltage v Q1 starts to decrease from V Cc . This process is very important for achieving ZVS operation of the main switch Q 1 . Furthermore, since the primary voltage of transformer T 1 decrease, the diode of the secondary side switch Q SR2 will forward-biased simultaneously. This mode ends at t 4 when the voltage v Q1 reaches to zero. Figure 4e]: At t = t 4 , the junction capacitor voltage v Q1 is equal to zero level. because the body diodes of Q SR1 and Q SR2 are still conducting, the secondary side voltage v s = 0. Correspondingly, the voltage across the leakage inductor L lk is input voltage V in . Thus, the primary current increases with a constant slope from negative value through the two-dimensional electron gas(2DEG) of GaN HEMT. This condition is set for the switch Q 1 to turn on under ZVS condition. This mode ends at t 5 and initiate the next switching period.

Design Consideration
In order to prove the feasibility and validity of the proposed solution and comparative analysis, two 18~36V input, 120 W/12 V output prototypes with GaN HEMT and traditional Si MOSFET have been designed, built, and tested. The design specifications of the ACF converter with self-driven synchronous rectification are listed in Table 1. The design consideration of key circuit parameters will be discussed in this section. A review of the literature shows that the operating frequency of several Energies 2020, 13, 4160 6 of 14 reference designs from TI corporation [28][29][30] and the product from TDK-Lambda [31], are about 200 kHz. Thus, the switching frequency of 200 kHz is an optimal operating frequency for Si MOSFET active clamp forward converters. In order to make a fair comparison between GaN HEMT and Si MOSFET, the switching frequency in our design is chosen as 200 kHz too. In order to achieve the high conversion efficiency, the maximum duty cycle D max is chosen as 0.7 for 18 V input voltage. Thus, the turns ratio of the transformer n can be calculated as In this design, the turn ratio n is set as 1. Accordingly, the D max and D min for 18 V and 36 V input voltage is 0.67 and 0.33, respectively.
Furthermore, the output inductance L 0 is derived based on the design criterion that the magnitude of the peak-to-peak current ripple is less than x% of the rated current by the inequality.
Assuming that an allowable peak-peak output current ripple of 30%, the inductance L 0 is not difficult to obtain based on the worst case of the maximum input voltage.
Thus, 14 µH inductance with EC20B3 core is employed as the output inductor L 0 .

Clamp Capacitance Cc Design
The clamp capacitance C c is one of the key elements in the ACF converter, since the clamp capacitor not only helps to reset the flux in the transformer T 1 , but also absorbs energy from the leakage inductance L lk . During the reset interval, the resonant time constant is much greater than the maximum conducting time of the switch Q 2 [7].
Thus, the clamp capacitance C c can be calculated by (7) In this design, 47 nF ceramic capacitor with 100 V voltage rating is employed.

Comparing GaN HEMT and Si MOSFET
According to the voltage stress for this ACF forward converter, the performances of the 80 V or 100 V state-of-the-art Si MOSFET and GaN FETs are compared in Table 2. In this comparison, three normalized figure of merits (FOMs) [32] is employed. The smaller the FOM, the better performance the device is. FOM1 represent the speed of the gate driving. The smaller the FOM1, the faster the gate drives. For FOM1, GaN HEMTs are much better than Si MOSFETs. Furthermore, the GaN HEMT EPC2021 is better than the GS-010-120-1-P from GaN systems. This is caused by the higher on-resistance in the GS-010-120-1-P. FOM2 represents the switching loss for both hard-switching and soft-switching. The smaller the FOM2, the less the switching loss. Obviously, the same conclusion can be achieved. Note that the FOM2 of two GaN HEMTs is very close. FOM3 represents the reverse recovery loss. The smaller the FOM3, the less the reverse recovery loss. The EPC2021 and GS-010-120-1-P from a different company have zero reverse recovery charge because there are no minority carriers involved in conduction in an eGaN HEMT [15]. Therefore, this is a significant advantage compared with Si MOSFET because there are zero reverse recovery losses in GaN HEMT.
From the FOM1, FOM2, and FOM3, it is not difficult to conclude that the GaN HEMT with part number EPC2021 is better than other GaN HEMTs and Si MOSFETs. Furthermore, it is worth noting that the GaN HEMT has non-avalanche voltage capability because there are no inherent PN junctions that are connected between the source and drain in GaN HEMTs [15,16,33]. Therefore, in the specifications of eGaN HEMTs from EPC Corporation, there is also a specification for a transient voltage capability above the maximum V DS . The transient voltage data from the EPC2021 datasheet is shown in Table 3 [34]. Considering the maximum input voltage in our design is 36 V, which is far away from the maximum ratings and will not affect the operation of GaN HEMT for ACF converter application. Therefore, in this design, the EPC2021 GaN HEMT is chosen as the primary switch. The final experimental comparison will be introduced in Section 4.

PCB Layout Consideration of GaN HEMT
In EPC application papers [15,16], the designer should pay attention to the PCB layout because the parasitic circuit inductances, especially the inductance of gate driver loop will affect the operating and performances of GaN HEMT. Furthermore, noise coupling from power to drive loop could lead to erroneous trigger, due to the relatively low turn-on voltage of GaN transistors. So, design consideration for the gate drive of the GaN HEMT should be the first priority. Figure 6 shows the PCB layout of the GaN HEMT in ACF converter. In our design, a Kelvin-like connection between source terminal is used to minimize the noise from power to drive loop. Furthermore, the direction of power current is perpendicular to the drive current flow direction, so that the generated magnetic fields are perpendicular as well, so the noise from power to drive loop is significantly reduced.
Energies 2020, 13, x FOR PEER REVIEW 8 of 14 source terminal is used to minimize the noise from power to drive loop. Furthermore, the direction of power current is perpendicular to the drive current flow direction, so that the generated magnetic fields are perpendicular as well, so the noise from power to drive loop is significantly reduced.

Experimental Verification
Two 18~36V input, 120 W laboratory prototype with GaN HEMT and Si MOSFET are built to verify the validity of the solution. The photograph of GaN-based prototype is shown in Figure 7. The size for the two prototypes is both 58.85 mm × 44.84 mm × 22.19 mm (L × W × H). The key components and parameters for two prototypes are listed in Table 4. Due to the measured waveform from Si MOSFET ACF converter is similar to GaN version, the only experimental waveforms are given in the next part.   Figure 8 and Figure 9 illustrate the experimental waveforms of the GaN-based prototype with the different input voltage. It is worth to note that although the main switch operates under hardswitching condition, the high efficiency can be achieved because of low circulation energy. However, the ZVS feature of the clamp P-MOSFET has been achieved.

Experimental Verification
Two 18~36V input, 120 W laboratory prototype with GaN HEMT and Si MOSFET are built to verify the validity of the solution. The photograph of GaN-based prototype is shown in Figure 7. The size for the two prototypes is both 58.85 mm × 44.84 mm × 22.19 mm (L × W × H). The key components and parameters for two prototypes are listed in Table 4. Due to the measured waveform from Si MOSFET ACF converter is similar to GaN version, the only experimental waveforms are given in the next part.
Energies 2020, 13, x FOR PEER REVIEW 8 of 14 of power current is perpendicular to the drive current flow direction, so that the generated magnetic fields are perpendicular as well, so the noise from power to drive loop is significantly reduced.

Experimental Verification
Two 18~36V input, 120 W laboratory prototype with GaN HEMT and Si MOSFET are built to verify the validity of the solution. The photograph of GaN-based prototype is shown in Figure 7. The size for the two prototypes is both 58.85 mm × 44.84 mm × 22.19 mm (L × W × H). The key components and parameters for two prototypes are listed in Table 4. Due to the measured waveform from Si MOSFET ACF converter is similar to GaN version, the only experimental waveforms are given in the next part.   Figures 8 and 9 illustrate the experimental waveforms of the GaN-based prototype with the different input voltage. It is worth to note that although the main switch operates under hard-  condition, the high efficiency can be achieved because of low circulation energy. However, the ZVS feature of the clamp P-MOSFET has been achieved.
Energies 2020, 13, x FOR PEER REVIEW 9 of 14 switching condition, the high efficiency can be achieved because of low circulation energy. However, the ZVS feature of the clamp P-MOSFET has been achieved. The experimental results of the self-driven synchronous rectifiers under normal input voltage and full load condition are shown in Figure 10. It is not difficult to know that not only the ZVS operation of synchronous MOSFET QSR1 and QSR2 can be achieved, but also the self-driven function is well operated.  Figure 11 shows the transient response of output voltage with the load step-changing between 0 A and 10 A waveform for different input voltage. The slop of the load current is 2.5 A/μs. It can be seen that the output voltage could quickly go back to the steady-state under each test conditions. The overshoot and undershoot voltage caused by the load change is less than 0.7 V at Vin = 28 V and Vin = 36 V. Therefore, the fast-dynamic response can be achieved. The experimental results of the self-driven synchronous rectifiers under normal input voltage and full load condition are shown in Figure 10. It is not difficult to know that not only the ZVS operation of synchronous MOSFET QSR1 and QSR2 can be achieved, but also the self-driven function is well operated.  Figure 11 shows the transient response of output voltage with the load step-changing between 0 A and 10 A waveform for different input voltage. The slop of the load current is 2.5 A/μs. It can be seen that the output voltage could quickly go back to the steady-state under each test conditions. The overshoot and undershoot voltage caused by the load change is less than 0.7 V at Vin = 28 V and Vin = 36 V. Therefore, the fast-dynamic response can be achieved. The experimental results of the self-driven synchronous rectifiers under normal input voltage and full load condition are shown in Figure 10. It is not difficult to know that not only the ZVS operation of synchronous MOSFET Q SR1 and Q SR2 can be achieved, but also the self-driven function is well operated.
Energies 2020, 13, x FOR PEER REVIEW 9 of 14 switching condition, the high efficiency can be achieved because of low circulation energy. However, the ZVS feature of the clamp P-MOSFET has been achieved. The experimental results of the self-driven synchronous rectifiers under normal input voltage and full load condition are shown in Figure 10. It is not difficult to know that not only the ZVS operation of synchronous MOSFET QSR1 and QSR2 can be achieved, but also the self-driven function is well operated.  Figure 11 shows the transient response of output voltage with the load step-changing between 0 A and 10 A waveform for different input voltage. The slop of the load current is 2.5 A/μs. It can be seen that the output voltage could quickly go back to the steady-state under each test conditions. The overshoot and undershoot voltage caused by the load change is less than 0.7 V at Vin = 28 V and Vin = 36 V. Therefore, the fast-dynamic response can be achieved.  Figure 11 shows the transient response of output voltage with the load step-changing between 0 A and 10 A waveform for different input voltage. The slop of the load current is 2.5 A/µs. It can be seen that the output voltage could quickly go back to the steady-state under each test conditions. The overshoot and undershoot voltage caused by the load change is less than 0.7 V at V in = 28 V and V in = 36 V. Therefore, the fast-dynamic response can be achieved. Figure 11 shows the transient response of output voltage with the load step-changing between 0 A and 10 A waveform for different input voltage. The slop of the load current is 2.5 A/μs. It can be seen that the output voltage could quickly go back to the steady-state under each test conditions. The overshoot and undershoot voltage caused by the load change is less than 0.7 V at Vin = 28 V and Vin = 36 V. Therefore, the fast-dynamic response can be achieved.   Figure 13 illustrates the power loss breakdown and comparison between GaN-based and Sibased prototype for different input voltage. From Figure 13, it can be concluded that all the switching loss, gate drive loss, conducting loss and reverse recovery loss in GaN-based prototype is lower than Si-based prototype due to the lower on-resistance Rds(on), Qoss, Ciss and zero Qrr. Because of the aforementioned benefits, the GaN-based prototype could achieve higher efficiency than Si-based prototype for the whole load range. The efficiency comparison between this work and reference designs from TI corporation and the product from TDK-Lambda corporation is listed in Table 4. From Table 5, it can be seen that the typical efficiency is around 93% and the highest efficiency is 94.7% under 24 V input voltage at full load. Therefore, the achieved efficiency of 95.45% is a high efficiency in our work.  Figure 13 illustrates the power loss breakdown and comparison between GaN-based and Si-based prototype for different input voltage. From Figure 13, it can be concluded that all the switching loss, gate drive loss, conducting loss and reverse recovery loss in GaN-based prototype is lower than Si-based prototype due to the lower on-resistance R ds(on) , Q oss , C iss and zero Q rr . Because of the aforementioned benefits, the GaN-based prototype could achieve higher efficiency than Si-based prototype for the whole load range.  Figure 12 depicts the measured efficiency for different loads with the input voltage of 18 V, 28 V, and 36 V. The efficiency of the experimental GaN-based prototype is 1% higher than the Si MOSFET-based prototype. For nominal input voltage of 28 V, the efficiency at full load increases from 94.38% to 95.45%. Moreover, the efficiency of the converter is higher than 95% under 7~10 A load condition. In addition, the efficiency of the proposed GaN-based prototype is near 95% at full load entire input voltage range.  Figure 13 illustrates the power loss breakdown and comparison between GaN-based and Sibased prototype for different input voltage. From Figure 13, it can be concluded that all the switching loss, gate drive loss, conducting loss and reverse recovery loss in GaN-based prototype is lower than Si-based prototype due to the lower on-resistance Rds(on), Qoss, Ciss and zero Qrr. Because of the aforementioned benefits, the GaN-based prototype could achieve higher efficiency than Si-based prototype for the whole load range. The efficiency comparison between this work and reference designs from TI corporation and the product from TDK-Lambda corporation is listed in Table 4. From Table 5, it can be seen that the typical efficiency is around 93% and the highest efficiency is 94.7% under 24 V input voltage at full load. Therefore, the achieved efficiency of 95.45% is a high efficiency in our work.  The efficiency comparison between this work and reference designs from TI corporation and the product from TDK-Lambda corporation is listed in Table 4. From Table 5, it can be seen that the typical efficiency is around 93% and the highest efficiency is 94.7% under 24 V input voltage at full load. Therefore, the achieved efficiency of 95.45% is a high efficiency in our work. From the above experimental results, it is not difficult to conclude that higher efficiency and power density have been achieved by utilizing GaN HEMT because GaN HEMTs have three advantages over their Si counterparts: (1) smaller reverse recovery current and reverse recovery time; (2) faster switching speed; and (3) higher operating frequency [35]. However, compared with Si MOSFET, the faster switching of GaN HEMT will lead to higher dv/dt and di/dt during switching transient. Therefore, from an EMI perspective, these characteristics will have a negative impact on EMI issue.
The CM noise path of the GaN-based ACF converter is shown in Figure 14. In Figure 14, C oss1 (C oss2 ) is the parasitic capacitance between the drain of Q 1 (Q 2 ) and Earth. C D12 , C SR1 and C SR2 represent the parasitic capacitance between the CM voltage pulsation nodes and Earth. As shown in Figure 14, the CM currents will couple to the Earth through parasitic capacitances of the power converter and back via the line impedance stabilization network (LISN) [36]. To simplify the CM noise analysis, the voltage pulsation nodes have been divided into three areas. In GaN-based and Si-based ACF converter, the Area 2 and Area 3 are same (the same power devices, same layout). Therefore, the CM noise generated by those areas is the same in two converters. Furthermore, in order to reduce the ringing voltage to minimize the CM noise in Area 3, the same resistor-capacitor (RC) snubber circuits are both adopted in two ACF converter. Thus, the major difference of CM noise for two ACF converters is the main switch Q 1 . In our design, the ZVS operation for GaN HEMT Q 1 has been achieved, and the switching frequency is 200 kHz, which is far away from megahertz. Therefore, from a high dv/dt and di/dt perspective, the EMI noise difference between the GaN HEMT version and Si version should be very small.
On the other hand, the different transformer structure will also produce large effects on the common-mode EMI noise. Generally speaking, when the operating frequency is beyond megahertz, the PCB wingdings planer transformer is extensively adopted, due to its low leakage inductance and high-power density than conventional wire-wound transformer [36]. However, planar transformers have a relatively larger interwinding capacitance that provides the dominant path for the CM noise current travelling from the primary side to the secondary side [37,38]. Fortunately, the transformers with 200 kHz frequency are both implemented by conventional wire-wound transformers in two ACF converters. Thus, the impact of transformer on CM noise can be neglected.
In summary, the EMI noise difference between GaN HEMT version and Si version should be very small. Energies 2020, 13, x FOR PEER REVIEW 12 of 14 Figure 14. CM noise paths of GaN-based active clamp forward (ACF) converter.

Conclusions
Compared with flyback converters, forward converters are dominant topology for the low-tomedium power applications for simplicity, higher power capacity, and low cost. Focusing on low voltage bus of 28 V, active clamp forward converters with self-driven synchronous rectifiers are proposed. Furthermore, the GaN HEMT is incorporated into active clamp forward converters for achieving higher efficiency and power density. In order to demonstrate the feasibility and validity of the proposed solution and comparative analysis, two 18~36 V input, 120 W/12 V output, prototypes with different power devices are built and compared in the lab. The experimental results show the GaN version can achieve the efficiency of 95.45%, which is around 1% higher than its counterpart under the whole load condition and the same power density of 2.2 W/cm 3 . On the other hand, from an EMI perspective, the EMI noise difference between GaN HEMT version and Si version should be very small in our design, because (1) the GaN HEMT is only used to replace the main power device Q1 and the ZVS operation for GaN HEMT Q1 have been achieved; (2) the switching frequency is 200 kHz, which is far away from megahertz; (3) the transformers are implemented by conventional wirewound transformers.
Furthermore, the all-GaN active clamp forward prototype with MHz switching frequency will be developed to higher efficiency and higher power density, and the EMI issue will be carefully considered in the MHz GaN-based ACF converter.
Author Contributions: X.L. and H.M. designed the technical scheme and the main circuits; X.L., J.Y. and S.L. designed the prototype and achieved the experiments; X.L. analyzed the data and wrote this manuscript; H.M. and J.X. reviewed the manuscript and supervised the research. All authors have read and agreed to the published version of the manuscript.