A Step Up/Down Power-Factor-Correction Converter with Modified Dual Loop Control

A step up/down AC/DC converter with modified dual loop control is proposed. The step up/down AC/DC converter features the bridgeless characteristic which can reduce bridge-diode conduction losses. Based on the step up/down AC/DC converter, a modified dual loop control scheme is proposed to achieve input current shaping and output voltage regulation. Fewer components are needed compared with the traditional bridge and bridgeless step up/down AC/DC converters. In addition, the intermediate capacitor voltage stress can be reduced. Furthermore, the top and bottom switches still have zero-voltage turn-on function during the negative and positive half-line cycle, respectively. Hence, the thermal stresses can also be reduced and balanced. Simulation and experimental results are provided to verify the validity of the proposed step up/down AC/DC converter and its control scheme.


Introduction
Power factor correction is very popular and necessary for modern power sources in the ac grid.It decreases line current harmonics, line losses, and increases system power capacity due to reducing system reactive power flow [1][2][3].Today, boost rectifiers are the most commonly-used circuit structures implemented for power factor correction.However, some consumer electronic devices, portable devices and server power applications [4,5] require lower dc voltage level than the main ac voltage source.The dc output voltage in boost rectifiers is always higher than the peak value of the main input ac voltage.Therefore, in low dc voltage level applications, another dc-dc step-down converter is necessary that follows the boost rectifier to form a two-stage structure as shown in Figure 1.Because of the two-stage structure, power efficiency may degrade and the total number of components in the system is increased.Thus, the efficiency, cost, and volume of the two-stage power conversion system are not a good choice and need to be improved.
Step-down PFC rectifiers, such as buck converters are therefore considered.However, the buck rectifier input current is discontinuous.A dead angle also exists when the line input voltage is lower than the output voltage so that the input current cannot be easily shaped [6][7][8].As a result, the step up/down AC-DC topologies are developed including buck-boost, Cuk, and Sepic type rectifiers [9][10][11].The buck-boost rectifier also has inherent discontinuous input current like the buck converter, and needs an additional filter to smooth the input current.Although the Sepic rectifier has continuous input current, the output current is still discontinuous and easily causes output voltage ripples.
Bridgeless rectifier topologies are explored in [12,13] to reduce the diode bridge conduction losses and increase the conversion efficiency.The bridgeless PFC boost rectifiers, such as the dual boost rectifier and the totem-pole boost rectifier, have been discussed [14].Due to the need for lower output voltage applications, the bridgeless Cuk/Sepic rectifiers [15,16] with two dc/dc Cuk/Sepic circuit structures were proposed.The bridgeless Cuk rectifier [16] is shown in Figure 2.However, Cuk [18] power-factor-correction rectifiers were also proposed with reduced number of components and conduction losses.These rectifiers were operated in discontinuous conduction mode without current loop control.A control method for bridgeless Cuk/Sepic power factor correction rectifier operated in continuous conduction mode was also proposed to achieve power decoupling [19].Although, the bulky electrolytic capacitor can be replaced with a small film capacitor, this control method requires an extra voltage sensor for the intermediate capacitor and the system cost is increased.
Pulsating power buffering technology [20][21][22] has recently expanded, which can reduce the number of components including passive and active ones.Although rectifiers using pulsating power buffering technology have high power density, high conversion efficiency and high reliability, high voltage stress is still present in the switches and diodes [23], which leads to high switching and conduction losses and reduces the rectifier life-span.
This paper proposes a bridgeless Cuk rectifier with modified dual loop control scheme.The voltage stresses in the switches and diodes can be adjusted to low voltage levels by the proposed control scheme, which may reduce the switching and conduction losses and increase the rectifier lifespan.The detailed operation principle and switching sequence of the bridgeless Cuk rectifier are explained.Simultaneously, a modified dual loop control scheme is also proposed to achieve input current shaping and output voltage regulation as well as voltage stress reduction.

Circuit Topology and Switching Sequence
The bridgeless Cuk converter [19] discussed in this paper is shown in Figure 3.The proposed control switching sequence and key waveforms in one switching period during the positive and negative half line cycle are shown in Figure 4.For convenience of discussion the active switches are assumed to be ideal active switches with anti-paralleling body diode.Both the input inductor Ls and output inductor Lo are assumed to be operated in continuous conduction mode.The circuit operation can be divided into three operation states in one switching period T for both positive and negative half-line cycles.The circuit operation principle of the bridgeless Cuk converter during the positive half-line cycle is discussed first, as follows: Energies 2020, 13, x FOR PEER REVIEW 2 of 16 Cuk [18] power-factor-correction rectifiers were also proposed with reduced number of components and conduction losses.These rectifiers were operated in discontinuous conduction mode without current loop control.A control method for bridgeless Cuk/Sepic power factor correction rectifier operated in continuous conduction mode was also proposed to achieve power decoupling [19].
Although, the bulky electrolytic capacitor can be replaced with a small film capacitor, this control method requires an extra voltage sensor for the intermediate capacitor and the system cost is increased.
Pulsating power buffering technology [20][21][22] has recently expanded, which can reduce the number of components including passive and active ones.Although rectifiers using pulsating power buffering technology have high power density, high conversion efficiency and high reliability, high voltage stress is still present in the switches and diodes [23], which leads to high switching and conduction losses and reduces the rectifier life-span.
This paper proposes a bridgeless Cuk rectifier with modified dual loop control scheme.The voltage stresses in the switches and diodes can be adjusted to low voltage levels by the proposed control scheme, which may reduce the switching and conduction losses and increase the rectifier lifespan.The detailed operation principle and switching sequence of the bridgeless Cuk rectifier are explained.Simultaneously, a modified dual loop control scheme is also proposed to achieve input current shaping and output voltage regulation as well as voltage stress reduction.

Circuit Topology and Switching Sequence
The bridgeless Cuk converter [19] discussed in this paper is shown in Figure 3.The proposed control switching sequence and key waveforms in one switching period during the positive and negative half line cycle are shown in Figure 4.For convenience of discussion the active switches are assumed to be ideal active switches with anti-paralleling body diode.Both the input inductor Ls and output inductor Lo are assumed to be operated in continuous conduction mode.The circuit operation can be divided into three operation states in one switching period T for both positive and negative half-line cycles.The circuit operation principle of the bridgeless Cuk converter during the positive half-line cycle is discussed first, as follows: Bridgeless Cuk rectifier [16].

Circuit Topology and Switching Sequence
The bridgeless Cuk converter [19] discussed in this paper is shown in Figure 3.The proposed control switching sequence and key waveforms in one switching period during the positive and negative half line cycle are shown in Figure 4.For convenience of discussion the active switches are assumed to be ideal active switches with anti-paralleling body diode.Both the input inductor L s and output inductor L o are assumed to be operated in continuous conduction mode.The circuit operation can be divided into three operation states in one switching period T for both positive and negative half-line cycles.The circuit operation principle of the bridgeless Cuk converter during the positive half-line cycle is discussed first, as follows:  (1) State 1 (t0 ≤ t <t1): In this state, as shown in Figure 5, both switches S1 and S2 are turned on.The zero-voltage switching of S2 is obtained due to body diode conducting in switch S2 in the prestate, i.e., State 3. The input inductor Ls is magnetized by the input voltage Vs so as to increase the inductor current iLs.The inductor current iLs flows through diode D1 and switch S1 and goes back to the main ac source.Simultaneously, the intermediate capacitor Cd releases energy to the output inductor Lo and load.The equivalent circuit equations are described as Equations ( 1)-( 4).(1) State 1 (t0 ≤ t <t1): In this state, as shown in Figure 5, both switches S1 and S2 are turned on.The zero-voltage switching of S2 is obtained due to body diode conducting in switch S2 in the prestate, i.e., State 3. The input inductor Ls is magnetized by the input voltage Vs so as to increase the inductor current iLs.The inductor current iLs flows through diode D1 and switch S1 and goes back to the main ac source.Simultaneously, the intermediate capacitor Cd releases energy to the output inductor Lo and load.The equivalent circuit equations are described as Equations ( 1)-( 4).(1) State 1 (t 0 ≤ t <t 1 ): In this state, as shown in Figure 5, both switches S 1 and S 2 are turned on.The zero-voltage switching of S 2 is obtained due to body diode conducting in switch S 2 in the pre-state, i.e., State 3. The input inductor L s is magnetized by the input voltage V s so as to increase the inductor current i Ls .The inductor current i Ls flows through diode D 1 and switch S 1 and goes back to the main ac source.Simultaneously, the intermediate capacitor C d releases energy to the output inductor L o and load.The equivalent circuit equations are described as Equations ( 1)-(4).
Energies 2020, 13  (2) State 2 (t1 ≤ t <t2): In this state, as shown in Figure 6, switch S1 is turned on and switch S2 is turned off.Switch current ids1 is increasing.Input inductor Ls is still magnetized by the input voltage Vs so as to increase the inductor current iLs which still flows through diode D1 and switch S1 and then goes back to the main ac source.The voltage of intermediate capacitor Cd remains constant.Simultaneously, the output inductor Lo is demagnetized and releases energy to the load through the diode Dd.The equivalent circuit equations are expressed as Equations ( 5)- (8).(3) State 3 (t2 ≤ t <t3): In this state, as shown in Figure 7, switch S1 is turned off and S2 is also turned off.Input inductor Ls is demagnetized by the voltage −(Vcd−Vs) so as to decrease the inductor current iLs which flows through diodes D1 and Dd, and the body diode of switch S2 and goes back to the main ac source.The intermediate capacitor Cd is charged by the input inductor current iLs.Simultaneously, the output inductor Lo still releases energy to the load through diode Dd.The equivalent circuit equations are given by Equations ( 9)- (12).(2) State 2 (t 1 ≤ t <t 2 ): In this state, as shown in Figure 6, switch S 1 is turned on and switch S 2 is turned off.Switch current i ds1 is increasing.Input inductor L s is still magnetized by the input voltage V s so as to increase the inductor current i Ls which still flows through diode D 1 and switch S 1 and then goes back to the main ac source.The voltage of intermediate capacitor C d remains constant.Simultaneously, the output inductor L o is demagnetized and releases energy to the load through the diode D d .The equivalent circuit equations are expressed as Equations ( 5)- (8).
Energies 2020, 13, x FOR PEER REVIEW 4 of 16 (2) State 2 (t1 ≤ t <t2): In this state, as shown in Figure 6, switch S1 is turned on and switch S2 is turned off.Switch current ids1 is increasing.Input inductor Ls is still magnetized by the input voltage Vs so as to increase the inductor current iLs which still flows through diode D1 and switch S1 and then goes back to the main ac source.The voltage of intermediate capacitor Cd remains constant.Simultaneously, the output inductor Lo is demagnetized and releases energy to the load through the diode Dd.The equivalent circuit equations are expressed as Equations ( 5)-( 8).(3) State 3 (t2 ≤ t <t3): In this state, as shown in Figure 7, switch S1 is turned off and S2 is also turned off.Input inductor Ls is demagnetized by the voltage −(Vcd−Vs) so as to decrease the inductor current iLs which flows through diodes D1 and Dd, and the body diode of switch S2 and goes back to the main ac source.The intermediate capacitor Cd is charged by the input inductor current iLs.Simultaneously, the output inductor Lo still releases energy to the load through diode Dd.The equivalent circuit equations are given by Equations ( 9)- (12).(3) State 3 (t 2 ≤ t <t 3 ): In this state, as shown in Figure 7, switch S 1 is turned off and S 2 is also turned off.Input inductor L s is demagnetized by the voltage −(V cd −V s ) so as to decrease the inductor current i Ls which flows through diodes D 1 and D d , and the body diode of switch S 2 and goes back to the main ac source.The intermediate capacitor C d is charged by the input inductor current i Ls .Simultaneously, the output inductor L o still releases energy to the load through diode D d .The equivalent circuit equations are given by Equations ( 9)- (12).

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Energies 2020, 13, x FOR PEER REVIEW 5 of 16 Referring the gate signals shown in Figure 4, while the bridgeless Cuk converter is operated during the negative half line cycle, the circuit operation principle in the proposed control switching sequence can be described as follows: (1) State 1 (t0 ≤ t <t1): In this state, as shown in Figure 8, both the switches S1 and S2 are turned on.The zero-voltage switching of S1 is obtained due to body diode conducting in switch S1 in the prestate, i.e., State 3. The input inductor Ls is magnetized by the input voltage Vs so as to increase the inductor current iLs in the inverse direction.The inductor current iLs flows through diode D2 and switch S2 and goes back to the main ac source.Simultaneously, the intermediate capacitor Cd releases energy to the output inductor Lo and load.The equivalent circuit equations are described as Equations ( 13)-( 16).(2) State 2 (t1 ≤ t <t2): In this state, as shown in Figure 9, switch S2 is turned on and switch S1 is turned off.The switch current ids2 is increasing.Input inductor Ls is still magnetized by the input voltage Vs so as to increase the inductor current iLs in the inverse direction which still flows through diode D2 and switch S2 and then goes back to the main ac source.The intermediate capacitor Cd voltage remains constant.Simultaneously, the output inductor Lo is demagnetized and releases energy to the load through diode Dd.The equivalent circuit equations are expressed as Equations ( 17)- (20).Referring the gate signals shown in Figure 4, while the bridgeless Cuk converter is operated during the negative half line cycle, the circuit operation principle in the proposed control switching sequence can be described as follows: (1) State 1 (t 0 ≤ t <t 1 ): In this state, as shown in Figure 8, both the switches S 1 and S 2 are turned on.The zero-voltage switching of S 1 is obtained due to body diode conducting in switch S 1 in the pre-state, i.e., State 3. The input inductor L s is magnetized by the input voltage V s so as to increase the inductor current i Ls in the inverse direction.The inductor current i Ls flows through diode D 2 and switch S 2 and goes back to the main ac source.Simultaneously, the intermediate capacitor C d releases energy to the output inductor L o and load.The equivalent circuit equations are described as Equations ( 13)- (16).Referring the gate signals shown in Figure 4, while the bridgeless Cuk converter is operated during the negative half line cycle, the circuit operation principle in the proposed control switching sequence can be described as follows: (1) State 1 (t0 ≤ t <t1): In this state, as shown in Figure 8, both the switches S1 and S2 are turned on.The zero-voltage switching of S1 is obtained due to body diode conducting in switch S1 in the prestate, i.e., State 3. The input inductor Ls is magnetized by the input voltage Vs so as to increase the inductor current iLs in the inverse direction.The inductor current iLs flows through diode D2 and switch S2 and goes back to the main ac source.Simultaneously, the intermediate capacitor Cd releases energy to the output inductor Lo and load.The equivalent circuit equations are described as Equations ( 13)-( 16).(2) State 2 (t1 ≤ t <t2): In this state, as shown in Figure 9, switch S2 is turned on and switch S1 is turned off.The switch current ids2 is increasing.Input inductor Ls is still magnetized by the input voltage Vs so as to increase the inductor current iLs in the inverse direction which still flows through diode D2 and switch S2 and then goes back to the main ac source.The intermediate capacitor Cd voltage remains constant.Simultaneously, the output inductor Lo is demagnetized and releases energy to the load through diode Dd.The equivalent circuit equations are expressed as Equations ( 17)- (20).(2) State 2 (t 1 ≤ t <t 2 ): In this state, as shown in Figure 9, switch S 2 is turned on and switch S 1 is turned off.The switch current i ds2 is increasing.Input inductor L s is still magnetized by the input voltage V s so as to increase the inductor current i Ls in the inverse direction which still flows through diode D 2 and switch S 2 and then goes back to the main ac source.The intermediate capacitor C d voltage remains constant.Simultaneously, the output inductor L o is demagnetized and releases energy to the load through diode D d .The equivalent circuit equations are expressed as Equations ( 17)- (20).
Energies 2020, 13, 199 (3) State 3 (t2 ≤ t <t3): In this state, as shown in Figure 10, switch S2 is turned off and S1 is also turned off.Input inductor Ls is demagnetized in the inverse direction by the voltage (Vcd + Vs) so as to decrease the inductor current iLs which flows through diodes D2, Dd and the body diode of switch S1 and goes back to the main ac source.The intermediate capacitor Cd is charged by the input inductor current iLs in the inverse direction.Simultaneously, the output inductor Lo still releases energy to the load through diode Dd.The equivalent circuit equations are given by Equations ( 21)-(24).
Ls To further reveal the potential merits of the proposed step up/down converter with modified dual loop control, Table 1 is provided to summarize comparisons for the bridge Cuk [11], bridgeless (3) State 3 (t 2 ≤ t <t 3 ): In this state, as shown in Figure 10, switch S 2 is turned off and S 1 is also turned off.Input inductor L s is demagnetized in the inverse direction by the voltage (V cd + V s ) so as to decrease the inductor current i Ls which flows through diodes D 2 , D d and the body diode of switch S 1 and goes back to the main ac source.The intermediate capacitor C d is charged by the input inductor current i Ls in the inverse direction.Simultaneously, the output inductor L o still releases energy to the load through diode D d .The equivalent circuit equations are given by Equations ( 21)-(24).(3) State 3 (t2 ≤ t <t3): In this state, as shown in Figure 10, switch S2 is turned off and S1 is also turned off.Input inductor Ls is demagnetized in the inverse direction by the voltage (Vcd + Vs) so as to decrease the inductor current iLs which flows through diodes D2, Dd and the body diode of switch S1 and goes back to the main ac source.The intermediate capacitor Cd is charged by the input inductor current iLs in the inverse direction.Simultaneously, the output inductor Lo still releases energy to the load through diode Dd.The equivalent circuit equations are given by Equations ( 21)-(24).To further reveal the potential merits of the proposed step up/down converter with modified dual loop control, Table 1 is provided to summarize comparisons for the bridge Cuk [11], bridgeless To further reveal the potential merits of the proposed step up/down converter with modified dual loop control, Table 1 is provided to summarize comparisons for the bridge Cuk [11], bridgeless Cuk [16], and the proposed step up/down converter with modified dual loop control.It is worth mentioning that the power levels of the three converters in Table 1 are all at small power levels like the fly-back converter.Although the control methods may be different, the harmonics of the three converters all meet the IEC61000-3-2 Class D standard.

Control Scheme
According to the circuit analysis in the previous section, assume the duty ratio D W = D 1 + D 2 and D 0 = D 1 .While the main ac voltage is operating in the positive half line cycle v s > 0, by utilizing state-space averaged technique and flux balance theory in the input inductor L s and output inductor L o , one can obtain the equations Similarly, while the main ac voltage is operating in the negative half line cycle v s < 0, the corresponding symmetrical equations can also be obtained as Merging Equations ( 25)-(28) in both the positive and negative half line cycles of the main ac voltage, the voltage gain of the bridgeless Cuk converter is obtained as As can be observed from Equation (29), the output voltage is related to the two parameters D o and D W .If the input and output voltages are given, infinite different kinds of solutions exist in the Equation (29).However, in the same operation condition for the conventional dual loop control scheme shown in Figure 11, only one solution is obtained, i.e., D o = D W .Therefore, in order to reduce the voltage stresses of all switches and diodes in the circuit, the conventional dual loop control scheme is not suitable.
Energies 2020, 13, x FOR PEER REVIEW 8 of 16 As can be observed from Equation (29), the output voltage is related to the two parameters Do and DW.If the input and output voltages are given, infinite different kinds of solutions exist in the Equation (29).However, in the same operation condition for the conventional dual loop control scheme shown in Figure 11, only one solution is obtained, i.e., Do = DW.Therefore, in order to reduce the voltage stresses of all switches and diodes in the circuit, the conventional dual loop control scheme is not suitable.A modified dual loop control scheme is proposed.The proposed control scheme for the bridgeless Cuk converter is shown in Figure 12.The actual input current iLs compared with the current command iLs* to generate the current error as the input of the current controller and then produce the control signal VDw.The actual output voltage Vo compared with the output voltage command Vo*  A modified dual loop control scheme is proposed.The proposed control scheme for the bridgeless Cuk converter is shown in Figure 12.The actual input current i Ls compared with the current command i Ls * to generate the current error as the input of the current controller and then produce the control signal V Dw .The actual output voltage V o compared with the output voltage command V o * generates the voltage error as the voltage controller input.The voltage controller generates the current command amplitude and also the control signal V Do .In the conventional dual loop control scheme, only one control signal is produced to achieve both input current shaping and output voltage regulation.In the proposed control scheme, two control signals V Dw and V Do are produced to control the input current shaping and output voltage regulation.Thus, the intermediate capacitor voltage is not fixed and can be adjusted to fit a better low voltage level.Hence, the intermediate capacitor voltage stress could be reduced and the adopted electrolytic capacitor life span could also be increased.According to the circuit analysis in Section 2, the voltage stresses of active switches S 1 and S 2 , diodes D 1 , D 2 , and D d are clamped and equal to the intermediate capacitor voltage.The average switching power loss P s in one switching period caused by transitions can be defined as where t c(on) and t c(o f f ) are the turn-on and turn-off crossover intervals, respectively.For simplification, the switches are operated in the same turn-on and turn-off crossover intervals and at the same switching frequency f s .The average switching power loss is then proportional to the voltage across the switch V DS and the entire current I DS which flows through the switch as According to the above equation, if the intermediate capacitor voltage is adjusted to fit a better low voltage level, the average switching power loss is also reduced.This is also true for the diodes.Therefore, the total losses in semiconductor devices can be reduced and the efficiency can be lifted.A modified dual loop control scheme is proposed.The proposed control scheme for the bridgeless Cuk converter is shown in Figure 12.The actual input current iLs compared with the current command iLs* to generate the current error as the input of the current controller and then produce the control signal VDw.The actual output voltage Vo compared with the output voltage command Vo* generates the voltage error as the voltage controller input.The voltage controller generates the current command amplitude and also the control signal VDo.In the conventional dual loop control scheme, only one control signal is produced to achieve both input current shaping and output voltage regulation.In the proposed control scheme, two control signals VDw and VDo are produced to control the input current shaping and output voltage regulation.Thus, the intermediate capacitor voltage is not fixed and can be adjusted to fit a better low voltage level.Hence, the intermediate capacitor voltage stress could be reduced and the adopted electrolytic capacitor life span could also be increased.According to the circuit analysis in Section 2, the voltage stresses of active switches S1 and S2, diodes D1, D2, and Dd are clamped and equal to the intermediate capacitor voltage.The average switching power loss Ps in one switching period caused by transitions can be defined as where c(on) t and c(off) t are the turn-on and turn-off crossover intervals, respectively.For simplification, the switches are operated in the same turn-on and turn-off crossover intervals and at the same switching frequency fs.The average switching power loss is then proportional to the voltage across the switch VDS and the entire current IDS which flows through the switch as According to the above equation, if the intermediate capacitor voltage is adjusted to fit a better low voltage level, the average switching power loss is also reduced.This is also true for the diodes.Therefore, the total losses in semiconductor devices can be reduced and the efficiency can be lifted.

Parameter Design
To verify the feasibility of the proposed step up/down AC/DC converter with modified dual loop control, a parameter design for inductor and capacitor is discussed.In order to find the boundary between the continuous and discontinuous modes for input inductor L s , one can find that the critical value of K 1 at boundary between modes, K crit (D w ), is function of duty cycle D w and can be expressed as The critical value K cirt (D w ) is plotted vs. duty cycle D w in Figure 13.Consider inductor L s is operated in CCM and the switching frequency is f s .The maximum input current ripple is less than 25% of the fundamental current.The minimum input inductor L s value can be derived by the equation Energies 2020, 13, 199 where ∆i Ls,BCM is the input current ripple while inductor L 1 is operated in BCM.Consider that inductor L o is operated in BCM and one can find that the critical value for K 2 at the boundary between modes, K crit (D o ), is function of the duty cycle D o and can be expressed as The critical value Kcirt (Dw) is plotted vs. duty cycle Dw in Figure 13.Consider inductor Ls is operated in CCM and the switching frequency is fs.The maximum input current ripple is less than 25% of the fundamental current.The minimum input inductor Ls value can be derived by the equation where is the input current ripple while inductor L1 is operated in BCM.Consider that inductor Lo is operated in BCM and one can find that the critical value for K2 at the boundary between modes, , is function of the duty cycle Do and can be expressed as The critical value Kcirt (Do) is plotted vs. duty cycle Do in Figure 14.Similarly, the minimum value of inductor Lo also can be derived as where is the output current ripple while inductor Lo is operated in BCM.
The critical value K cirt (D o ) is plotted vs. duty cycle D o in Figure 14.Similarly, the minimum value of inductor Lo also can be derived as where ∆i Lo,BCM is the output current ripple while inductor L o is operated in BCM.Consider the output capacitor and assume the switching ripple is neglected.The output capacitor must be large enough to minimize the output ripple because the output voltage ripple frequency is twice the input line frequency.The output filter capacitor can be determined by where o ΔV is the output voltage ripple and  is the input line angular frequency.

Simulation and Experimental Results
To verify the validity of the bridgeless step up/down AC/DC converter, some simulation results are executed and a prototype system is constructed to facilitate the theoretical results as verification.The simulation and experimental parameters are listed in Table 2.The input voltage is the AC grid Consider the output capacitor and assume the switching ripple is neglected.The output capacitor must be large enough to minimize the output ripple because the output voltage ripple frequency is twice the input line frequency.The output filter capacitor can be determined by where ∆V o is the output voltage ripple and ω is the input line angular frequency.

Simulation and Experimental Results
To verify the validity of the bridgeless step up/down AC/DC converter, some simulation results are executed and a prototype system is constructed to facilitate the theoretical results as verification.The simulation and experimental parameters are listed in Table 2.The input voltage is the AC grid with 110 V rms and 60 Hz fundamental frequency.The controlled output voltage is 48 V and the load is 48 Ω.The assigned output power rating is 48 W. The simulation results for the input voltage V s , input current i s and the corresponding intermediate capacitor voltage V cd are shown in Figure 15.It follows from Figure 15 that the input current shaping can be achieved.Figure 16 shows the switching control signals for switch S 1 and S 2 and the corresponding voltage and current of switch S 2 during the positive half-line cycle.As can be seen from Figure 16, the ZVS turn-on of switch S 2 is obtained during the positive half-line cycle.Similarly, Figure 17 shows the switching control signals for switch S 1 and S 2 and the corresponding voltage and current of switch S 1 during the negative half-line cycle.It also can be seen from Figure 17 that the ZVS turn-on of switch S 1 is obtained during the negative half-line cycle.
Consider that the load is a dynamic load and/or RL load such as a dc motor whose armature winding resistance is Ra = 0.5 Ω, armature winding inductance is La = 0.5 mH, back electromotive force is 47 V. Figure 18 shows the simulation results for the input voltage, input current and the corresponding intermediate capacitor voltage.As can be observed from Figure 18, the output power is about 120 W and the power factor correction is also achieved.Hence, the proposed converter can indeed be operated in the RL load.Consider the intermediate capacitor voltage which can be adjusted using the control signal V Do based on Equations ( 26) and (28).Figure 19 shows the simulation results for the input voltage and the corresponding input current, and the control signal V Do and the corresponding intermediate capacitor voltage V Cd under the low control signal V Do value.Figure 20 shows the same simulated condition under the high control signal V Do value.It can be seen from Figures 19 and that the lower the control signal V Do value, the higher the intermediate capacitor voltage V Cd .That the duty ratio Do affects the intermediate capacitor voltage level and also the voltage stresses of the switches and diodes in the circuit is very important information.This also implies that the duty ratio Do affects the converter power losses and efficiency.Finally, to facilitate understanding of the proposed step up/down converter with modified dual loop control and as verification, a prototype is constructed with a TMS320F28335 digital signal processor (DSP).The experimental hardware construction block diagram is shown in Figure 21.Figures 22 and 23 show the experimental results for the switching control signals and the corresponding voltage and current of switches S 2 and S 1 during positive and negative half-line cycles, respectively.As can be observed from Figures 22 and 23, the ZVS soft switching of switches S 2 and S 1 were indeed achieved and agreed with the simulation results.The measured harmonic distribution of the input current is shown in Figure 24.One can find that the measured harmonic currents meet the IEC 61000-3-2 Class D harmonic standards.
In order to understand the total harmonic distortion THD i of the input currents in the three converters listed in Table 1, the PSIM software is adopted to carry out the simulation.The input voltage is 110Vrms, the output voltage is controlled at 48 V and the load is 2 A. The corresponding parameters and simulated results are shown in Table 3.As can be seen from Table 3, the input current THD i of the bridge Cuk [11] is better than that of the bridgeless Cuk [16] and the proposed Cuk with modified dual loop control scheme.Nevertheless, the parameter value of the bridge Cuk input inductor [11] is larger than those for the other two.Although the bridge Cuk [11] has the smallest input current THD i , the input inductor may make it appear bulky.THDi of the bridge Cuk [11] is better than that of the bridgeless Cuk [16] and the proposed Cuk with modified dual loop control scheme.Nevertheless, the parameter value of the bridge Cuk input inductor [11] is larger than those for the other two.Although the bridge Cuk [11] has the smallest input current THDi, the input inductor may make it appear bulky.

Conclusions
This paper presented a bridgeless step up/down converter with modified dual loop control scheme.The proposed system has ZVS soft switching in switches S1 and S2 during the negative and positive half-line cycle operation, respectively.Thus, the switching losses can be reduced and the thermal stress can be balanced between switches S1 and S2.There are fewer components compared to the bridge Cuk and the bridgeless dual Cuk configuration.Therefore, the size and cost can be reduced.In addition, based on the proposed control scheme, the voltage stresses of the intermediate capacitor, active switches, and diodes can all be reduced.To verify the validity of the proposed step up/down converter, simulation, and experimental results are offered.From simulation and experimental results, the proposed bridgeless step up/down converter can indeed achieve input current shaping and output voltage regulation as well as reduce the switching and conduction losses.
Author Contributions: The author contributed to the theoretical analysis, modeling, simulation, experiment,

Conclusions
This paper presented a bridgeless step up/down converter with modified dual loop control scheme.The proposed system has ZVS soft switching in switches S 1 and S 2 during the negative and positive half-line cycle operation, respectively.Thus, the switching losses can be reduced and the thermal stress can be balanced between switches S 1 and S 2 .There are fewer components compared to the bridge Cuk and the bridgeless dual Cuk configuration.Therefore, the size and cost can be reduced.In addition, based on the proposed control scheme, the voltage stresses of the intermediate capacitor, active switches, and diodes can all be reduced.To verify the validity of the proposed step up/down converter, simulation, and experimental results are offered.From simulation and experimental results, the proposed bridgeless step up/down converter can indeed achieve input current shaping and output voltage regulation as well as reduce the switching and conduction losses.

Figure 4 .
Figure 4. Control switching sequence and key waveforms in one switching period.

Figure 4 .
Figure 4. Control switching sequence and key waveforms in one switching period.

Figure 4 .
Figure 4. Control switching sequence and key waveforms in one switching period.

Figure 5 .
Figure 5. Equivalent circuit of the bridgeless Cuk converter in State 1 during positive half line cycle.

1 Figure 6 .
Figure 6.Equivalent circuit of the bridgeless Cuk converter in State 2 during positive half line cycle.

Figure 5 .
Figure 5. Equivalent circuit of the bridgeless Cuk converter in State 1 during positive half line cycle.

Figure 5 .
Figure 5. Equivalent circuit of the bridgeless Cuk converter in State 1 during positive half line cycle.

1 Figure 6 .
Figure 6.Equivalent circuit of the bridgeless Cuk converter in State 2 during positive half line cycle.

Figure 6 .
Figure 6.Equivalent circuit of the bridgeless Cuk converter in State 2 during positive half line cycle.

1 Figure 7 .
Figure 7. Equivalent circuit of the bridgeless Cuk converter in State 3 during positive half line cycle.

Figure 8 .
Figure 8. Equivalent bridgeless Cuk converter circuit in State 1 during negative half line cycle.

Figure 7 .
Figure 7. Equivalent circuit of the bridgeless Cuk converter in State 3 during positive half line cycle.

1 Figure 7 .
Figure 7. Equivalent circuit of the bridgeless Cuk converter in State 3 during positive half line cycle.

Figure 8 .
Figure 8. Equivalent bridgeless Cuk converter circuit in State 1 during negative half line cycle.

Figure 8 .
Figure 8. Equivalent bridgeless Cuk converter circuit in State 1 during negative half line cycle.

Figure 9 .
Figure 9. Equivalent circuit of the bridgeless Cuk converter in State 2 during negative half line cycle.

Figure 10 .
Figure 10.Equivalent circuit of the bridgeless Cuk converter in State 3 during negative half line cycle.

Figure 9 .
Figure 9. Equivalent circuit of the bridgeless Cuk converter in State 2 during negative half line cycle.

Figure 9 .
Figure 9. Equivalent circuit of the bridgeless Cuk converter in State 2 during negative half line cycle.

Figure 10 .
Figure 10.Equivalent circuit of the bridgeless Cuk converter in State 3 during negative half line cycle.

Figure 10 .
Figure 10.Equivalent circuit of the bridgeless Cuk converter in State 3 during negative half line cycle.

Figure 12 .
Figure 12.Proposed modified dual loop control scheme.

Figure 13 .
Figure 13.Proposed step up/down AC/DC converter K cirt (D w ) vs. D w .

Figure 14 .
Figure 14.Proposed step up/down AC/DC converter K cirt (D o ) vs. D o .

Figure 15 .
Figure 15.Simulation results for (top) the input voltage Vs, current is, and (bottom) corresponding intermediate capacitor voltage.

Figure 17 .Figure 16 .Figure 17 .Figure 18 .
Figure 17.Simulation results for (top) switching control signals and (bottom) corresponding voltage and current of switch S 1 during negative half line cycle.

Figure 18 .Figure 19 .Figure 19 .
Figure 18.Simulation results for (top) the input voltage V s , current i s , and (bottom) corresponding intermediate capacitor voltage while the load is a dc motor.Energies 2020, 13, x FOR PEER REVIEW 13 of 16

Figure 19 .Figure 20 .
Figure 19.Simulation results for (top) the input voltage Vs, current is, (middle) the control signal VDo with low parameter value, and (bottom) corresponding intermediate capacitor voltage.

Figure 20 .
Figure 20.Simulation results for (top) the input voltage V s , current i s , (middle) the control signal V Do with high parameter value, and (bottom) corresponding intermediate capacitor voltage.

Figure 22 .Figure 22 .
Figure 22.Experimental results for (top) switching control signals S1, S2 and (bottom) corresponding voltage and current of switch S2 during positive half line cycle.

5us ZVSFigure 22 .Figure 23 .
Figure 22.Experimental results for (top) switching control signals S1, S2 and (bottom) corresponding voltage and current of switch S2 during positive half line cycle.

Figure 23 . 16 Figure 24 .
Figure 23.Experimental results for (top) switching control signals S 1 , S 2 and (bottom) corresponding voltage and current of switch S 1 during negative half line cycle.Energies 2020, 13, x FOR PEER REVIEW 15 of 16

Figure 24 .
Figure 24.The measured harmonic distribution of the input current compared with IEC61000-3-2 Class D standard.

Table 1 .
Comparisons of step up/down converters.

Table 2 .
Parameters of the bridgeless Cuk converter for simulation and experimentation.

Table 2 .
Parameters of the bridgeless Cuk converter for simulation and experimentation

Table 3 .
Comparisons of the total harmonic distortion of the step up/down converters

Table 3 .
Comparisons of the total harmonic distortion of the step up/down converters.