Five-Level T-type Cascade Converter for Rooftop Grid-Connected Photovoltaic Systems

Multilevel converters are widely considered to be the most suitable configurations for renewable energy sources. Their high-power quality, efficiency and performance make them interesting for PV applications. In low-power applications such as rooftop grid-connected PV systems, power converters with high efficiency and reliability are required. For this reason, multilevel converters based on parallel and cascaded configurations have been proposed and commercialized in the industry. Motivated by the features of multilevel converters based on cascaded configurations, this work presents the modulation and control of a rooftop single-phase grid-connected photovoltaic multilevel system. The configuration has a symmetrical cascade connection of two three-level T-type neutral point clamped power legs, which creates a five-level converter with two independent string connections. The proposed topology merges the benefits of multi-string PV and symmetrical cascade multilevel inverters. The switching operation principle, modulation technique and control scheme under an unbalanced power operation among the cell are addressed. Simulation and experimental validation results in a reduced-scale power single-phase converter prototype under variable conditions at different set points for both PV strings are presented. Finally, a comparative numerical analysis between other T-type configurations to highlight the advantages of the studied configuration is included.


Introduction
Rooftop photovoltaic (PV) energy conversion systems (less than 20 kW), have become a well-established technology in the industry. The most common configurations for single-phase grid-connected PV systems commercially found are the string, multistring and ac-module integrated topologies. Central and string inverters have been widely applied to manage and control PV energy systems [1]. Among the string topologies, the transformerless H5, H6, HERIC, neutral point clamped (NPC) and T-type NPC converters have been successfully commercialized [2]. In fact, multilevel inverters (MLI) are designed to produce a stepped voltage waveform by reducing the Total Harmonic Distortion (THD) and the voltage stress across semiconductor devices. Secondly, reduction of the output filter size and power footprint also permit an important improvement in terms of costs, weight and efficiency [3]. These technical features have led to the massive adoption of MLI over the last thirty years for high-power medium voltage (MV) motor drive applications. In the last years, three-level neutral point clamped (3L-NPC) converters have been used for interfacing PV systems into the grid, where a higher PV incorporation has brought substantial concerns on power efficiency, power quality and grid code compliance [1] as well as power grid services [4].
T-type neutral point clamped inverters (3L-TNPC), also known as neutral point piloted converters (3L-NPP), [5] have gained a wide presence in the industry sector due to several advantages as symmetrical loss distribution, higher overall efficiency, small footprints [6] and low harmonic injection in relation to the conventional 3L-NPC [7]. In fact, many manufactures such as Fuji, On Semiconductor, Mitsubishi and Semikron have commercial T-type legs used in central PV inverters and motor drive applications [8][9][10]. For the threelevel inverter, based on the T-type leg, was presented thirty-five years ago for motor drives, with the bidirectional medium switch being realized with thyristors and improved with GTO-thyristors [11]. After some years, many configurations based on the well-known three-level T-type NPC leg can be found in the literature [12]. In [13] a five-level TNPC (5L-TNPC) was introduced, which corresponds to the parallel connection of two 3L-TNPC legs [14,15]. Furthermore, a variation of this configuration with reduced switches, also known as fivelevel hybrid T-type NPC (5L-HTNPC), was presented in the recent literature [16]. This topological variation is built with a 3L-TNPC leg and a two-level leg inverter, forming a five-stepped voltage waveform in the AC terminals.
In the literature there are two main possibilities for increasing the number of levels in the power converter field, which is by increasing the internal DC capacitors connected to a single DC source or by connecting several converters in the series at the AC side, in which each converter has an independent DC source. Focusing on the second alternative, cascade MLI can be developed by using symmetrical or asymmetrical voltage levels and by using different type of topologies such as: Full H-Bridge, 3L-TNPC converters or by performing a hybrid configuration [17]. Note that symmetrical cascade configurations have had a more industrial presence as the case of Cascade H-Bridge (CHB) converters [3] due to modulation and control simplicity compared with asymmetrical configurations [18]. In fact, in [19] a symmetrical nine-level Ttype converter (9L-TNPC) is presented for motor drive applications, which is based on the cascade connection of two 5L-TNPC converters. The same number of levels can be generated with advanced hybrid topologies as presented in [6,12].
Considering the advantages and features previously presented regarding the 3L-TNPC and symmetrical cascaded configurations, this paper described and validated the 5L-CTNPC topology for rooftop PV applications by using a cascaded connection of two 3L-TNPC legs which was firstly introduced in [20] as a cascade 3L-TNPC converter. Thus, the advantages of symmetrical cascade configurations with multistring inputs are merged. Each 3L-TNPC converter can interface a dedicated DC bus, and consequently two separate maximum power point tracking (MPPT) algorithms are allowed to obtain the maximum power of each PV string. Note that the PV string of each module can be sized to handle half the entire PV string in the conventional 3L-TNPC converter, providing better MPPT efficiency since less modules are combined in a series per string. The main contribution of this paper is the experimental validation of a simplified control scheme to alleviate the power unbalancing mismatch between 3L-TNPC modules and to compensate capacitor voltage variations per each converter, which was presented earlier in [20]. Furthermore, a brief comparison between five-level voltage waveform converters based on the conventional 3L-TNPC is performed as a second contribution in terms of the main electrical features.
The rest of the document is organized as follows. In Section 2, a hardware description of the proposed converter, switching states and implemented modulation is presented. In Section 3, a simple stationary reference-frame voltage-oriented control and a voltage control loop to compensate a possible power unbalance operation are included. Then, in Section 4, simulation results and experimental verification of the proposed multilevel converter and its control system behavior are added. Furthermore, a brief comparison with the 5L-TNPC and 5L-HTNPC is performed to highlight the main advantages of the proposed configuration. Finally, in Section 5, the conclusions of the paper summarize the work done.

The 5L-CTNPC Converter Topology
The power topology of the analyzed cascade 5L-CTNPC for a rooftop grid-connected PV system is depicted in Figure 1. The configuration is composed of a series connection of two 3L-TNPC legs, where each of them is built with two conventional IGBTs and one bidirectional switch. This bidirectional switch could be formed either by two conventional IGBTs in common-emitter or by a common-collector and reverse blocking IGBT connection. Actually, a classical IGBT semiconductor structure could be replaced by a reverse blocking MOSFETs for a high-voltage [21] and high-switching frequency operation [22]. Although more than two cells in a series connection are conceptually feasible, for the sake of simplicity, two-cell 3L-TNPC converters have been introduced as a proof-of-concept applied to conventional string rooftop PV applications.  Each 3L-TNPC leg operates as a string inverter connected to a single potential-induced degradation converter which is fed by one PV string. This potential-induced degradation stage can be designed to boost the DC voltage and perform the MPPT. Furthermore, it could be isolated [23] to avoid leakage currents due to the PV aluminium metallic frame grounded [1]. To reduce leakage currents paths and avoid high-frequency transformers there are three successful options well-documented in the literature: Changing the modulation stage to avoid switched common mode [16], by reducing surface conductivity of PV modules to avoid potential-induced degradation (PID) and by including extra switches between the PV array and the inverter, also well-known as transformerless inverters [24]. Although, a potential-induced degradation stage is desired to provide an independent DC voltage control, in this work, the validation of the proposed configuration does not integrate a potential-induced degradation stage, giving place to the worst case scenario under study where the MPPT control is fulfilled directly from each 3L-TNPC power cell, instead of using a high frequency galvanic isolated converter with its appropriate MPPT control. Thus, the overall control loops are more challenging since the voltage fluctuations in the PV panel is directly presented in the DC-side of each 3L-TNPC module, i.e., vdck = vpvk, where k = {1, 2} is given by the number of cell.
Furthermore, in order to extract the maximum power from the PV panels, an integration of an external MPPT algorithm is required so as to define the appropriate DC voltage reference in each cell. Note that the proposed topology is modeled without affecting the basic control objectives.

Fundamental Principle of the 5L-CTNPC
The 3L-TNPC provides three-output voltage levels: vdck/2, 0 and −vdck/2, where k is the cell or module number. These voltage steps are generated by connecting the AC terminals to the positive, neutral and negative pole of the DC-link terminals. Although, the 3L-TNPC configuration gives rise to four switching states, in order to avoid a short-circuit to the DC side there are only three of them possible. The cascade connection of two 3L-TNPC cells permits the generation of five voltage steps, where the zero level is combined into just one at the AC converter output voltage vc. According to the switching states presented in Table 1, the output voltage in the 5L-CTNPC can be modeled as: where vc is the addition of the converter voltages of both modules, S1k and S2k are the switching states of the k-th 3L-TNPC unit and vdck/2 is the total DC-link voltage of each cell. Furthermore, the dynamic model of the AC current in terms of the output voltage is governed by the next expression: (2) dt with vs as the grid voltage measured at the point of common coupling (PCC), is as the grid current, Ls the grid filter inductance and Rs is the filter resistance included for modeling purposes. According to Table 1, the switching states are able to generate nine voltage levels in the output voltage vc where each state has an associated voltage level in function to the DC-link vdc1 and vdc2. Note that in this rooftop PV application both strings will be considered to work with similar DC-link voltages, i.e., vdc1 ≈ vdc2 = vdc. By doing this, the output voltage vc can be reduced just to ±vdc, ±vdc/2 and 0. This assumption leads to five switching states with similar output voltage steps between two consecutive levels [20]. The redundant switching states will be used to balance the voltage in the DC-link capacitors by adjusting the power mismatch between the converter cells.
The computed peak amplitude of the converter output voltage vˆc is equal to vpv1/2 + vpv2/2, i.e., each power cell has a DC-link equal to the maximum level of the converter voltage. Therefore, for a proper grid current regulation, each PV string must be designed to satisfy vpv1 ≈ vpv2 > vs. In fact, this aspect is a practical advantage of cascaded configurations, since the overall DC-link voltage of the central configuration is split among power cells, thus reducing the string size. Table 1. Switching states and output voltage in the AC terminals.

Proposed Hybrid LS-PWM and PS-PWM Modulation Scheme for 5L-CTNPC Converter
The proposed modulation scheme for the 5L-CTNPC is based on two well-known carriers based on the sinusoidal PWM methods. The first is the Sinusoidal Level-Shifted Pulse Width Modulator (LS-PWM), used in 3L-NPC three-phase converters [25] and the single 3L-TNPC legs [20]. This modulation strategy requires two carrier signals in phase, to generate the three voltage levels in the output terminals of each cell. One carrier signal has a positive polarity (0 to 1) and the other has a negative polarity (-1 to 0). Furthermore, the LS-PWM is merged with the Sinusoidal Phase-Shifted PWM (PS-PWM) conventionally used in cascaded H-bridge power converters [26]. In the PS-PWM modulation, a phase shift between the carrier signals of each series connected to a power cell is introduced to increase the number of voltage levels, giving rise to a five-level stepped voltage waveform. The operation principle of this hybrid modulation technique is illustrated in Figure 2, where m * ck and vck are the modulation signal and the output voltage in the k-th cell, respectively. Note that each cell uses two carrier signals defined as vcr1 and vcr2. Thus, the stacked connection of both cells creates the converter voltage vc, which is commanded by its reference v * c. The combination of both methods is simpler in respect to the space vector modulation (SVM) [27]. Finally, the implementation of this modulation technique is depicted in the block diagram of Figure 3, where simple comparators and two carrier signals are required to implement the proposed technique.

Overall Control Strategy
In this work three decoupled control stages are programmed to regulate the current injected into the grid, the power generated by each PV string and the power mismatch between cells. The first one is the MPPT, which set the DC-link voltage reference for both cells and is optionally included to extract the maximum power from the PV panels in case of direct connection to the 3L-TNPC modules. This control stage is complemented with the total DC-link control loop based on the energy interchange between the power cells. The second control stage is the single-phase voltage-oriented control loop, which has an embedded stationary current control loop implemented with Proportional Multi-Resonant (PMR) controllers. The last control loop is in charge of attenuating the DC-link voltage differences to compensate power mismatch issues among each cell of the converter. The overall control scheme is presented in Figure 4, where vpvk, ipvk, vdck and sok are the PV voltage, PV current, DC-link voltage measurement and gating pulses of each k-th module.

MPPT and Outer DC-Link Controller
The well-known Perturb and Observe (P&O) MPPT routine has been implemented for simplicity in this application. As the analyzed power configuration features two separate DC-links or PV string connections, two independent MPPT algorithms are required to obtain its full power operation. The MPPT routines compute the voltage reference for each DC-link v and v , as illustrated in Figure 4. Then, the DC-link control loop is designed to manage the total energy of the system through the difference between the voltage reference and the voltage measured, i.e., eT = e1 + e2. This total energy is governed by using a proportional-integral (PI) controller, which generates the amplitude of the injected grid current iˆs. Note that the DC-link voltage v − measurements are acquired and processed with a notch filter Gf to eliminate the second harmonic ripple 2ωs presented in the DC-link capacitors by the rectification of a single-phase grid voltage. In fact, not filtering this harmonic voltage component will generate an undesired third harmonic 3ωs component in the grid current reference. The MPPT parameters such as voltage step ∆vpv and time period Tk are designed according with conventional commercial values. In experimental results, the voltage step ∆vpv = 6 V and the time period Tk = 2 s, whereas in simulation results, ∆vpv = 6 V and the time period is ten times smaller than the experimental results. Furthermore, the DC-link compensator has been designed by using a DC-link control bandwidth of 14Hz. Major details about the outer control design can be found in [20].

PMR Current Control Scheme
The grid current reference is generated by multiplying the amplitude of the injected grid current iˆs with a unitary sinusoidal signal synchronized to the grid voltage. To avoid voltage measurement noise and low frequency harmonic components, a second order generalized integrator (SOGI) with a synchronous reference frame phase lock loop (SRF-PLL) is implemented to set the synchronous angle. Then, the grid current reference is * is compared with the current measured value is, giving rise to a current error which is regulated by using a PMR control scheme. The structure of the implemented controller is included in Figure 5 and expressed as following: where kp is the proportional gain and kih is the resonant gain at each selected h-th harmonic. Note that the above resonant controllers have been considered to achieve selective harmonic impedance enhancement at 3st and 5th components. The resonant frequency at ωs is equal to the grid frequency, hence the compensator Ci(s) has infinite gain at ωs, providing perfect sinusoidal tracking with zero steady-state error. The PMR compensator in Figure 5 has been designed by a simple pole placement with a crossover frequency of 270 Hz, which corresponds to a rate twenty times faster than the outer control loop. This control scheme is currently adopted for grid-connected PV systems where the grid voltage has important low-frequency harmonics [28].

Voltage Balancing Control and Power Balance Scheme
As mentioned, correct power distribution between both cells and a control strategy to avoid voltage unbalancing in the DC-link capacitors is required to provide full operation in the 5L-CTNPC. The compensation block shown in Figure 6 is separated into two parts. The first one is the DC-link balancing control between cells, whose purpose is to regulate the power mismatch by increasing or decreasing the general modulation index amplitude, also referred to as the normalized inverter voltage vc delivered from the current controller. In this control loop, the DC voltage error is regulated by using a PI controller and then the voltage compensator ∆mc is multiplied by the normalized inverter voltage reference vc [29]. Therefore, the cell with higher power will increase its modulation amplitude, as the cell with lower power reduces its modulation amplitude. The second part of the control loop is given by the voltage balancing between the internal capacitors in the DC-link, where the voltage error is controlled using another PI controller. The output signal of this compensator ∆md is added to the modulation index provided by the cell voltage control by moving in the vertical axis the modulation index for capacitor balancing purposes. Both PI controllers have been designed by a pole placement strategy, using a bandwidth of 5 Hz. This dynamic has been imposed to avoid fast disturbances into the modulation signal. Note that the proposed balancing control scheme does not need extra measurements, since they are previously accessible from the outer control stage.

Results
Simulation and experimental results of the proposed configuration are presented in this section. The simulation analysis has been performed through MatLab/Simulink for control purposes, while PLECS were used for modelling the modulation stage, power converter, grid voltage and PV strings. The analysis was completed by using the same scenarios of the experimental set-up just to improve the concept verification.
The key simulation and experimental parameters are identified in Table 2. It is important to highlight that simulation parameters have been selected according to the reduced power experimental prototype.

Simulation Results
The first simulation result presented the injected grid current is with reference is * and both capacitor voltages for each power cell under steady-state operation. In Figure 7, it is possible to appreciate the good regulation and synchronization in respect to the grid voltage vs performed by the grid current control and the synchronization control loop. Furthermore, in Figure 8   The second simulation results present a dynamic operation under two different scenarios. An irradiation step from 1 kW/m 2 to 0.8 kW/m 2 was applied to the lower cell, maintaining 1 kW/m 2 of irradiation in the PV string connected to the upper cell. After the irradiation step took place, a temperature step changes was performed from 25 • C to 18 • C to the upper cell, generating an increase in the power. The irradiation and temperature changes were introduced in a simplified PV model provided by PLECS. Figure 9 shows the dynamic operation of the DC-link voltage vdck and the power at DC-side Pck = vdck ·ipvk for each k-th cell. It is possible to appreciate how the irradiation step at t = 3.5 s only affected to the lower module, producing a voltage perturbation and a power reduction in Pc2. Since the reference voltage is provided by the P&O algorithm, the stepped voltage was required to maintain the maximum power operation. In the second scenario, the temperature decreased at t = 8 s and the DC voltage as well as the power in the upper module increased. The three-level voltage vck of each converter cell, and the overall five-level voltage vc are depicted in Figure 10 under unbalance operation. Additionally, it is possible to appreciate how the power reduction in the lower arm affects the modulation indexes mck, creating signals with different magnitudes.

Experimental Results
The experimental PV system comprises of two 3L-TNPC power cells without isolation and were fed directly by one PV string. Each string was composed by two PV modules emulated with the Agilent E4360 solar array simulator, which enabled a total control of the temperature and irradiation parameters. Each simulator has two output channels connected in series to emulate the PV string generator. The parameters such as maximum power Pm, current at maximum power imp, short-circuit current isc, voltage at maximum power vmp and open-circuit voltage voc are listed in Table 2. The simplified layout of the experimental small-scale setup is depicted in Figure 11. The control algorithm is fully programmed in C code by using a dSPACE 1103 digital control platform running at 15 µs. The modulation stage and dead-time generation is implemented by using a FPGA Spartan3. To experimentally validate the proposed control scheme, three different operation points are evaluated. A steady-state operation, and two dynamic operation under an irradiation and a temperature step.
The first experimental results shown in Figures 12 and 13 are analyzed during steady-state operation. The grid-side variables i.e., grid current and voltage waveforms are presented in Figure 12, where the unitary power factor operation is achieved. Furthermore, Figure 13 captures the output voltage of each cell and the total voltage composed by a five-level waveform. Similar to the simulation results, the steadystate performance of the capacitor voltage balancing in Figure 14 is included.   The second set of experimental results during dynamic operation is shown in Figures 15 and 16. Firstly, an irradiation step from 1 kW/m 2 to 0.8 kW/m 2 was applied to the second PV cell (lower cell operating at reduced power), while the first array irradiation level was retained. After this irradiance step variation, a temperature step change was tested from 25 • C to 18 • C and applied to the first PV cell (upper cell operating at increased power). Under the above conditions, the input voltages generate a three-level waveform signal due to the use of the conventional P&O MPPT method. Note that under both scenarios, the coupling effects from one cell to each other is fully avoided, ensuring a decoupled operation between power cells.

Brief Comparison with Other Five-Level T-type Converters
A comprehensive comparison between three different five-level T-type converters have been presented in Table 3. The studied topologies are the proposed 5L-CTNPC, the hybrid version 5L-HTNPC and the conventional 5L-TNPC. Each topology presents the same features of the one described in simulation and experimental results. To evaluate the power efficiency of each converter, switching and conduction losses is required in respect to the power operation point for each cell. Semiconductor device losses are included with a thermal model library developed in PLECS, based on the manufacturer datasheet [30]. The resulting efficiency evaluation is depicted in Figure 17, where the obtained efficiency of the proposed configuration 5L-CTNPC is equal to the conventional 5L-TNPC. Due to the fact that there is a reduced number of switches at the second parallel leg in the 5L-HTNPC a slightly higher efficiency was achieved. This analysis is corroborated by counting the number of semiconductor devices used for each evaluated topology, which is summarized in Table 3.
The symmetrical topology configuration and the multiple MPPT possibilities are the main advantages of the studied topology in respect to the rest power converters. Finally, in Figure 18 the current spectrum for each evaluated converter topology is computed. The current THD obtained with the proposed topology is similar to the conventional 5L-TNPC power topology, while the worst value (over 4.9%) was reached in the 5L-HTNPC configuration. In fact, the apparent switching frequency of this topology was equal to the carrier frequency, while in the proposed 5L-CTNPC and 5L-TNPC the apparent switching frequency was twice the switching frequency.

Conclusions
In this work a grid-tied PV system configuration based on a series connection of three-level T-type inverter cells was described and validated. The proposed power topology merged the benefits of multistring configurations with more than one independent MPPT capability and the benefits of cascade Hbridge converters, generating a five-level output voltage waveform in the AC terminals. The proposed topology, modulation and control scheme were validated experimentally in a reduced scale power prototype

Conflicts of Interest:
The authors declare no conflict of interest.

Abbreviations
The following abbreviations are used in this manuscript: