Voltage Support under Grid Faults with Inherent Current Limitation for Three-Phase Droop-Controlled Inverters

A novel nonlinear current-limiting controller for three-phase grid-tied droop-controlled inverters that is capable of offering voltage support during balanced and unbalanced grid voltage drops is proposed in this paper. The proposed controller introduces a unified structure under both normal and abnormal grid conditions operating as a droop controller or following the recent fault-ride-through requirement to provide voltage support. In the case of unbalanced faults, the inverter can further inject or absorb the required negative sequence real and reactive power to eliminate the negative sequence voltage at the point of common coupling (PCC) whilst ensuring at all times boundedness for the grid current. To accomplish this task, a novel and easily implementable method for dividing the available current into the two sequences (positive and negative) is proposed, suitably adapting the proposed controller parameters. Furthermore, nonlinear input-to-state stability theory is used to guarantee that the total grid current remains limited below its given maximum value under both normal and abnormal grid conditions. Asymptotic stability for any equilibrium point of the closed-loop system in the bounded operating range is also analytically proven for first time using interconnected-systems stability analysis irrespective of the system parameters. The proposed control concept is verified using an OPAL-RT real-time digital simulation system for a three-phase inverter connected to the grid.


Introduction
In the recent years, the smart inverter concept has attracted a lot of attention since its adaptability and plug and play properties enable the seamless integration of distributed energy resources (DERs) into the next generation smart grid [1].In order to implement these features whilst ensuring a stable and reliable power system, the design of advanced control techniques for the inverter-interfaced DERs is of major significance.
Among the various control approaches for the inverter-interfaced DERs connected to the main grid, "droop control" represents the most widely used method since it provides support of the grid voltage and frequency and can be also used to achieve power sharing between several DERs [2].However, the droop control approach introduces nonlinear dynamics due to the real and reactive power calculation and thus closed-loop system stability becomes a challenging task.To improve the stability of the system, a virtual impedance or resistance is usually considered in the control design [3,4] while small-signal modeling combined with root-locus analysis is usually employed to obtain theoretical stability results for the closed-loop system [5].Nevertheless, the closed-loop system stability analysis of droop-controlled inverters without assuming knowledge of the grid and inverter parameters still represents a challenging problem for control and power system researchers.Droop control and system stability are often analyzed in the literature under normal grid conditions.When sudden grid voltage drops occur, the raised overcurrents may harm the DERs or lead to instant tripping of the inverters.However, the tripping scenario is against the recent fault-ridethrough (FRT) requirement that demands from the DERs to support the faulty grids [5][6][7][8].Hence, current-limiting techniques should be embedded in the control design of every inverter-interfaced DER to allow maximum power injection and avoid undesired tripping [9][10][11].In voltage-controlled inverters, saturated integrators in the inner control loops are usually employed to accomplish the desired current limitation; however these units may suffer from integrator wind-up and eventually lead to instability [10,12].Other control techniques consider a switching to a different current-limiting controller under abnormal grid conditions.Nevertheless, such a switching operation can still result in integrator wind-up or force the controller to latch-up [13].Since the virtual impedance or resistance concept offers a promising solution to overcome these instability issues and achieve a current limitation property [12,14], in [15,16] a current-limiting droop controller has been presented for single-phase and three-phase inverters, respectively, where no switching actions or saturated integrators are used for the current limitation.
Under balanced fault conditions, the limitation of the total current and the maximum power injection for supporting the grid are the two main tasks of the inverter.However, when unbalanced faults appear at the grid, the selection of the appropriate strategy to optimally provide grid support is a complicated problem [17,18].Significant amount of research has addressed the inverter response through current controllers that inject both positive and negative sequence currents, in order to provide voltage support in terms of positive sequence voltage support and negative sequence voltage elimination [19,20].The voltage support concept is thoroughly presented in [20], where current-controlled inverters are reviewed to employ symmetric sequence components and reduce the voltage unbalance factor (VUF).The way current limitation is achieved under unbalanced grid conditions still represents a challenging task, especially when droop controlled inverters are considered, since their task is to regulate the grid voltage and frequency.The authors in [6,21] have implemented controllers that ensure a balanced current provision under voltage sags.As explained in [6], this enhances the fault-ride-through capability in terms of injecting only positive sequence powers/current that comply with the FRT requirement, while current limitation at the steady-state is achieved through the controller reference powers.However these approaches do not deal with negative sequence voltage mitigation.In [5], a negative sequence droop controller is presented which manages to mitigate the voltage unbalance at the point of common coupling (PCC) under voltage drops.Nevertheless, current limitation is not considered in this control design; instead, saturation units are used in the negative sequence reference power generation unit.A current-limiting scheme in both sequences for voltage controllers is presented in [22,23] for microgrid and grid-connected applications respectively, where the novel theory from [24] is introduced and employed.However, the current limitation is performed through saturation units that can lead to instability, while the droop control concept is not considered in the control design.
In this paper, a novel current-limiting controller for three-phase grid-tied droop-controlled inverters is proposed.The main novelty of this paper is that a unified control structure is proposed that achieves: (i) voltage and frequency support (droop control) under normal grid conditions and compliance with the "voltage support concept" for balanced and unbalanced faulty grid conditions, with an inherent current limitation; (ii) a non-dynamic function for dividing the total current into the two sequences according to the grid conditions, during unbalanced grid faults and (iii) a rigorous stability analysis for the closed-loop system, regardless of the system parameters.According to the authors knowledge, this is the first time that the above properties are guaranteed in a unified control structure without switching to a different control scheme under faults.Compared to the current controllers that limit the inverter current on both sequences by limiting their reference values [11,18], or to the methods employing saturation units which can lead to instability under faults or power step changes, as showcased in [10,12,13], here a droop controller is proposed and grid current boundedness is guaranteed from the input-to-state stability (ISS) property of the closed-loop system.Furthermore, instead of using root-locus analysis to test the closed-loop system stability [5], asymptotic stability of any equilibrium point of the closed-loop system in the bounded operating range is proven without assuming knowledge of the system parameters.Extended real-time simulation results are provided in order to validate the performance of the proposed control approach.

Power System under Consideration
The system under consideration consists of a three-phase inverter connected to the grid through an LCL filter and a line, as depicted in Figure 1.The capacitors of the filter are denoted as C, while the inductors are denoted as L and L g with their parasitic resistances being r and r g , respectively.The line-to-line inverter voltage between phases a and b is given as v iab , while v ia represents the phase voltage of the inverter.The capacitor voltage is denoted as v ca while the PCC voltage is v a with v a = √ 2V cos ω g t, where V is the RMS PCC voltage and ω g is the angular PCC frequency.The grid voltage is denoted as v ga and is considered as unknown in this paper.The inverter and grid side currents are i a and i ga , respectively.When considering a balanced system, the above voltage and current quantities match with the positive sequence components.However, in the presence of unbalanced grid conditions, both positive and negative sequence components appear, while zero sequence components can be neglected when considering a three-phase three-wire system.In order to obtain the dynamic model of the system in both sequences, the widely used synchronous reference framework (SRF) theory is considered together with the delay signal cancellation (DSC) sequence extraction method [25,26], as explained in the analysis that follows.

Dynamic Modeling in the SRF Using DSC Method
In this paper the clockwise SRF transformation is considered.In order to align phase a to the α axis, θ a can be selected as 0 • in the generic αβ transformation presented in [27] cosθ a cos(θ a − 120) cos(θ a + 120) sinθ a sin(θ a − 120) sin(θ a + 120) 0.5 0.5 0.5 Following to the T αβ transformation, the sequential transformation for the clockwise SRF takes the form: .
The matrix T +− occurs from the DSC method which is preferred in this paper because it is faster compared to the methods using low-pass filters [5].Note that this matrix is different when anti-clockwise SRF is employed while for details on obtaining this matrix and a comparison with the low pass filtering method, the reader is referred to [28].T +− is then followed by the rotating transformation where θ + g = ω g t for the positive sequence and θ − g = −ω g t for the negative sequence.
where T = 1 4 f and f = ω g 2π .By applying the above transformation to the three-phase current and voltage quantities of the system, the SRF-based dynamic equations of the three-phase grid-tied inverter are obtained as where v +− id and v +− iq are the positive and negative sequence dq-axis components of the inverter voltage and represent the control inputs of the system.For the ± and ∓ signs that appear in the coupling terms in Equations ( 2)- (7), the top operator corresponds to the positive sequence and the bottom one to the negative sequence.The instantaneous real and reactive power injected to the grid can be calculated from p = P + + P − + p, q = Q + + Q − + q, where since v + q is always zero from Equation (1) while p, q are oscillation terms with zero average value [5,6,9].The VUF can be defined now at the PCC as q while VUF grid is equivalently derived for the grid side [29,30].

Problem Formulation
The main goal in this paper is to design a controller that provides support to the grid, under both normal conditions (droop control concept) and faulty conditions (voltage support concept) while boundedness should be proven for the grid current at all times, even during transients.A novel control concept was recently proposed in [15], where droop control is considered in order to mimic the dynamic response of synchronous generators and support the grid voltage and frequency regulation.Furthermore, an inherent current limitation is achieved at all times without using any saturation units but based on the ISS property of the closed-loop system.However, apart from the desired current limitation, according to the voltage support concept, a grid-connected inverter should have support capability when faults occur at the grid in terms of positive sequence voltage increase and negative sequence voltage elimination, aiming to restore the voltage to its pre-fault conditions [18,20].Since controlling the negative sequence powers is inevitable to mitigate the negative sequence voltage at the PCC under unbalanced faults, a current limitation should be also applied at the negative sequence current while a more sophisticated algorithm is required to optimally allocate the maximum current of each sequence.To address the stated problem, a new droop control structure for three-phase inverters is proposed in the sequel to guarantee a limit for the total grid current and closed-loop asymptotic stability while maximizing the voltage support under both balanced and unbalanced faults.

The Proposed Controller
The proposed controller consists of two inner-loop controllers, i.e. current and voltage control, designed in the αβ frame and two novel outer-loop controllers in the SRF (in the positive and negative sequence), which include the droop control concept and inherently limit the grid current in both sequences.

Inner-Loop Controllers
The current controller of the inner control loop takes the form where PR controllers are applied to regulate i α to i re f α and i β to i re f β .Similarly, the voltage controller, from which i re f α and i re f β are obtained, is described through the equations where the reference values v (generated by the positive and negative sequence outer-loop controllers) transformed to αβ .Note that as in typical multi-loop controller applications, the PR controller gains can be suitably selected such that the current controller settles much faster than the voltage controller which settles much faster than the outer-loop controllers.Thus, for the outer-loop controllers design, which operate in a slower time scale, it is reasonable to assume that v cα and v cβ quickly track v re f cα and v re f cβ .This is a common assumption for the inner-loop controllers used in DERs applications and further analysis can be found in [26].

Positive Sequence Current-Limiting Droop Control
The positive sequence outer-loop controller consists of a droop-based power controller to support the grid.Since apart from the droop operation, a grid current limitation should be embedded through the power controller, inspired by [15], a virtual resistance should be introduced through the control design.Furthermore, to realize current limitation, the controller states should be bounded in a range set by the operator.In order to avoid the possible instability issues that may occur when using saturation units, for the boundedness of the controller states, the BIC structure from [31] is adopted here.Following the introduction of the inner-loop controller in the previous subsection, the power controller will be directly applied to the capacitor voltage of the LCL filter through controlling the reference capacitor voltage values v re f + cd and v re f + cq .The proposed controller is described by the following equations where r + v is a constant virtual resistance and E + d , E + q are virtual voltages applied to each axis which change according to the expressions where c pd , c pq , k we , E + max are positive constants and where E + rms is the RMS nominal voltage in the positive sequence, n, m are the droop coefficients, while the powers are being measured from P + = by using the steady-state current values (this will be further explained in Section 3.4).Hence, at the steady-state P + = P + and Q + = Q + , thus achieving the desired droop control operation, while the expressions of P + and Q + are used to facilitate the stability analysis, as explained in the sequel.The positive sequence reference real and reactive power are denoted as P + set and Q + set respectively.It should be highlighted that due to the virtual resistance r + v introduced by the proposed controller, the P ∼ V and Q ∼ −ω droop expressions are adopted here.Through the functions ( 18) and ( 19), the PQ-set and PQ-droop control modes are inherited in the control system.In these two control modes, the inverter either regulates the real and reactive power to their reference values P + set , Q + set , when the terms E + rms − V + and −ω * + ω g are removed from ( 18) and ( 19), respectively, or supports the grid voltage and frequency regulation through droop control.For the dynamics of the virtual voltages E + d and E + q in Equations ( 14) and ( 15), the bounded integral controller (BIC), proposed in [31], is adopted in order to guarantee the boundedness of E + d and E + q without using any saturated integrators that could drive the system to instability.It is noteworthy that in this paper the terms −k we 16) and ( 17) to guarantee attractiveness of the controller states to a desired ellipse on the phase plane.To further explain this, consider the lower bounded function for the system in Equation ( 16).The time derivative of W takes the form which by substituting Ė+ d and Ė+ dq from Equation ( 16), becomes Furthermore, one can easily show that Ẅ is bounded.Hence, according to the "Lyapunov-Like Lemma" (Lemma 4.3 in [32]), Ẇ → 0 as t → ∞.It is clear from (20) = 1 and at the origin.However, regarding the origin, where E + d = 0 and E + dq = 0, it can be easily proven that it is an unstable equilibrium point, from Theorem 4.4 in [32], by considering the continuously differentiable function W = (E + d ) 2 Thus, starting from any initial conditions E + d0 and E + dq0 inside or on the ellipse E, except from the origin, the states E + d and E + dq will be quickly attracted on E and remain on the curve thereafter ensuring that E , ∀t ≥ 0. Note that the positive parameter E + max represents the horizontal radius of the ellipse E and when it varies, it becomes clear from (20), that E + d and E + dq will quickly converge to a new ellipse.The larger the k we , the faster the convergence.This enables an adaptation of the upper and lower bounds of E + d .A similar analysis holds for E + q and E + qq guaranteeing that E + q ∈ [−E + max , E + max ] , ∀t ≥ 0.

Negative Sequence Current-Limiting Control
The proposed current-limiting controller in the negative sequence is designed in a similar form and aims at regulating the negative sequence grid current.Hence it can be obtained as follows where similarly to the positive sequence controller, r − v is a constant virtual resistance and E − d , E − q are virtual voltages applied to each axis which change according to the expressions Ė− qq = − are the current reference values which, can be realized by equating the P − and Q − formulas from Equations ( 8) and (9) with their reference values P − set and Q − set , while c nd , c nq , E − max are positive constants.As one can see, through the proposed controller, the expressions , which represent a good approximation of the steady-state negative sequence current values (see Section 3.4) can be regulated to the reference values i re f − gd and i re f − gq .Through this control structure, P − and Q − can track their reference values which can be computed to optimally eliminate the negative sequence voltage.Following a similar analysis to the positive sequence controller, it can be proven that E , ∀t ≥ 0, which facilitates the desired current limitation.The methodology for generating P − set and Q − set and the current-limiting property are explained in the sequel.

Current-Limiting Property
By substituting the proposed controller ( 14), ( 15), ( 21) and (22) into the system dynamics (4) and ( 5), the closed-loop system takes the form The Equations ( 25) and ( 26) are the derived dynamics of the grid current in both sequences.From ( 25) and ( 26) the steady-state value of the grid currents can be approximated from i , which can be achieved by appropriately selecting the virtual resistances r +− v , which represent controller parameters.This is why the previous expressions are used in Equations ( 18), ( 19), ( 23) and (24).Taking into account that for the system in Equation (25).
The time derivative of V becomes max , ∀t ≥ 0, then i +− gd will be bounded for all t ≥ 0.More precisely, it will hold that with the condition that initially i +− gd (0) ≤ This holds true because the set Since the same analysis and same result holds for the q axis current as well, it is concluded that The reason √ 2 is used in E + max and the way I max+ grms and I max− grms are selected online, are further explained in Section 4.2.

Fault-Ride-Through Operation
Fault-ride-through guidelines have been recently proposed in order to standardize the way DERs should provide support under grid faults.In particular, during grid voltage drops, DERs should provide voltage support through reactive power injection instead of getting disconnected due to tripping of the inverter.In a wider manner, the most common support technique is the "voltage support concept" where maximum available power is injected to the grid in order to increase the voltage level at the PCC [20].To understand this, consider the voltage difference between the PCC and the grid ∆V + = V + − V + g and assuming a resistive-inductive line with resistance r l and inductance L l , let us use the approximation of this voltage difference as it is commonly presented in the literature [33,34] Interested readers can obtain this approximation by using the equations that relate the magnitudes of the PCC and grid voltages according to the current real and reactive components, as shown in [18,35,36].
Since power lines are most of the times considered as predominantly inductive, it can be understood from Equation ( 27) that reactive power affects more drastically the PCC voltage and thus, by injecting reactive power we can increase the PCC voltage level compared to the faulty grid voltage.In case only resistive or only inductive impedance is considered between the PCC and the grid, the relations between the amplitudes are simplified as presented in [20], thus requiring the injection of only real or reactive power respectively to support PCC by increasing ∆V + .The most commonly used FRT guidelines are those from the German grid code [7] which take the form: where I + grmsQ is the reactive component of the positive sequence grid current and k is the FRT gain (k ≥ 2) with 1 − V + E + rms k ≤ 1.According to Equation (28), it is concluded that , where S + max represents the amount of apparent power assigned to the positive sequence controller during faults, in the case where 0.5E + rms < V + < 0.9E + rms .Regarding the negative sequence voltage (which is a crucial part of the voltage support concept as well), according to the literature, it can be eliminated by increasing the negative sequence reactive power and decreasing the negative sequence real power.This can be understood either from [18], where equations that involve the magnitude of the PCC voltage are shown to explain the negative sequence voltage elimination concept or from the phasor analysis in [5].For the calculation of the negative sequence reference powers during unbalanced grid faults, in this paper, a PI controller is applied to generate Q − set , i.e., where E − rms is a constant and k PVU , k IVU are the proportional and integral gains of the PI controller.Note that Equation (30) represents a decoupling solution based on the line impedance parameters [5,37].However, accurate knowledge of r l and L l is not essential since an estimation of the term r l L l is enough.Through Equations ( 29) and ( 30), the required negative sequence reference powers to eliminate the PCC negative sequence voltage are acquired.As it is obvious from ( 29) and ( 30), considering initially a balanced system, as long as there is no negative sequence voltage at the PCC (balanced system), Q − set = P − set = 0 and thus the inverter injects only positive sequence power.Note that a superiority of the proposed controller compared to existing approaches, is that when the capacity is not enough to track P − set and Q − set , priority is given to the current limitation property proven in Section 3.4, without switching to different control dynamics or suffering from integrator wind-up issues.
It should be highlighted that methodologies that take into account the line impedance have been also applied for positive sequence voltage support, see for example [18,36].In this case, decoupling based on the line impedance parameters is achieved in the positive sequence as well and thus, Equation (27) does not represent an assumption since it expresses accurately the voltage difference.However, since the FRT is an essential standard in most of the grid codes nowadays, it is adopted for the positive sequence voltage support in this paper, as in [5].Note though that if required, P + set and Q + set formulas can be easily modified and be determined according to r l and L l instead of the FRT guidelines.

Online Adaptation of I max+ grms and I max− grms
In this paper, the grid current limitation is inherently applied through the outer-loop controllers and not through saturated integrators in the inner loop.Thus, a proper selection of the maximum available current in each sequence needs to take place by proposing an algorithm that defines the values I max+ grms and I max− grms .To realize the current allocation, priority is given to the positive sequence voltage regulation by means of supporting the positive sequene capacitor voltage V + c so that when V + < 0.9E + rms , we can achieve 27) can be written as if the voltage difference is selected as V + c − V + .This methodology is employed since in contrary to [24], the aim here is to provide a non dynamic method of adjusting the positive and negative sequence maximum currents and furthermore, V + g is considered unknown.Otherwise the positive sequence voltage support could be applied at the PCC voltage.By recalling the P + set and Q + set formulas derived from (28), expression (31) results to Thus, we can select where ρ is the p.u. voltage drop of the RMS voltage at the PCC.Note that Equation ( 32) is valid only when 0.5 ≥ ρ ≥ 0.1 (from Equation ( 28)) and V − > E − rms since in the absence of negative sequence voltage, all the available current is assigned to the positive sequence.I max+ grms is then passed through a saturator that ensures that I max+ grms ∈ 0, I max grms .Opposed to conventional current-limiting control schemes that apply a saturator on the current dynamics, here the function being saturated is not dynamic and thus does not suffer from integrator wind-up.Then, according to the theory presented in [22,23], which shows that the total current of any phase has a maximum value I max grms ≤ I + grms + I − grms even if unbalanced current is injected to the grid, I max− grms can be set as When current allocation has taken place, the value S + max can be easily selected as 3V + I max+ grms and the positive sequence reference powers can be calculated according to the FRT guidelines in Equation ( 28), while when I max+ grms = I max grms from Equation (32) or due to the saturator, then S + max = S max and I max− grms = 0. Since the maximum current for each sequence is now defined according to the voltage drop, the proposed controller dynamics in ( 16), ( 17), ( 23) and ( 24) can be adapted online through the expressions Opposed to the work presented in [15,38], here the proposed design enables the adaptation of the controller parameters E + max and E − max , and the controller states are attracted on any ellipse E with varying horizontal radius (E + max or E − max ) as analytically proven in Section 3.2.The positive sequence maximum current is set as the amplitude and not the RMS value in order to allow P, Q ∈ [0, S + max ] for the FRT.However, since it holds that the maximum RMS current will never be violated at the steady-state, while during transients, through the input-to-state stability property of the closed-loop current dynamics, it is proven that it remains below the value √ 2I max grms = 1.4I max grms (worst-case scenario), which commercial inverters can handle [39].Finally, during normal grid conditions, I max+ grms can be simply selected as I max grms / √ 2 to ensure current limitation under the value I max grms at all times.The implementation of the proposed control approach is depicted in Figure 2, where the control part generating the positive and negative sequence reference powers and the maximum currents is denoted as the FRT block, which is shown in Figure 3.

Q~-ω droop
Implementation diagram of the proposed controller.

Stability Analysis
After applying the proposed controller into the three-phase inverter system, the closed-loop dynamics are given by ( 16), ( 17), ( 23)- (26).The state vector of the closed-loop system, for both sequences, takes the form , where x +− . Consider now any steady-state equilibrium point , where the voltage and frequency at the PCC are assumed constant (not necessarily equal to their rated values).By defining x+− 2e , then the closed-loop dynamics ( 16), ( 17), ( 23)-( 26) can be written in the following interconnected system form where the equilibrium has been shifted at the origin.According to Lemma 5.6 in [40], if the system (34) with the x+− 2 as input, is locally input-to-state stable and the origin of the system ( 35) is asymptotically stable, then the origin of the interconnected systems (34) and ( 35) is asymptotically stable.System (34) is linear and can be written from ( 25) and ( 26 Since the characteristic matrix of the grid current dynamics is diagonal with all elements being negative, then the system (34) is bounded-input bounded state stable with respect to the input , which means that (34) is ISS.Then, for the dynamics of the control systems ( 16), ( 17), (23) and (24), the Jacobian matrix of (35) becomes where Hence, the condition to guarantee asymptotic stability for any equilibrium point x +− e of the closed-loop system in the bounded operating range which is always true regardless of the voltage level.Opposed to the majority of the conventional approaches that use root locus analysis and guarantee stability of a given equilibrium point under the specific parameters of the inverter and the grid, here the proposed controller guarantees asymptotic stability of any equilibrium point x +− e in the bounded operating range.In addition, an inherent current-limiting property and an enhanced operation under grid faults is achieved in a unified control structure, which highlights the novelty of the proposed control scheme.

Validation through Real-Time Results
In order to validate the proposed control approach, a three-phase inverter connected to the grid, as shown in Figure 1, and equipped with the controller proposed in this paper, is tested using an OPAL-RT OP4500 real-time digital simulator.The parameters of the controller and the power system are given in Table 1.In the next subsections, the performance of the proposed controller will be showcased under various normal and abnormal grid conditions.

Balanced Operation
Firstly, the operation of the grid-connected inverter equipped with the proposed controller will be tested under balanced grid conditions.The switch between the LCL filter and the PCC is initially open, and then closes at t = 0.1 s, while at the same time the controller is enabled with the reference values P + set and Q + set having the values of 600 W and 0 Var, respectively.The controller operates initially in the PQ-set mode and regulates P + and Q + to their desired values, as shown in Figure 4.In the same figure, V + c and I + grms can be observed as well.At t = 1 s, Q + set is changed to 50 Var and the reactive power injection is accordingly modified while at t = 2 s, P + set is set as 800 W. Since the PQ-set operation is now verified, at t = 4 s and t = 5 s, the real and reactive power droop control modes are enabled respectively.One can see that both the real and the reactive power drop since at that time, the grid operates with a slightly higher value of RMS grid voltage compared to the nominal (110.4V) and a slightly lower than the nominal grid frequency (49.98 Hz).At t = 6 s, a balanced grid voltage drop of 0.4 p.u. is applied in order to test the operation under faulty grid conditions.At the initial transient, it can be observed in Figure 4, that I + grms reaches the value of 11 A while it never violates the ultimate bound of √ 2I max grms = 14 A.  Following to the transient, the RMS value of the grid current is regulated to its maximum value of 10 A, as it has been analytically proven in this paper, while P + and Q + are regulated according to the FRT, thus achieving grid support and inverter protection simultaneously.When the fault is self-cleared at t = 8 s, P + and Q + return smoothly to their original values according to the droop control.

Operation under Single-Phase Voltage Sag
In order to test the operation of the proposed controller under unbalanced faults, a single-phase voltage sag is applied on v ga , with its RMS value dropping by 0.65 p.u. which leads to V + g ≈ 0.78 p.u., while the inverter is operating with droop control.As it can be observed in Figure 5, the current allocation algorithm leads the RMS currents to the values I + grms = 6.75A and I − grms = 3.15 A. It should be noted that according to the proposed controller operation, the components I + grms and I − grms are tracking their maximum values from Equations ( 32) and ( 33) during voltage drops (unless the desired V − = E − rms regulation has been achieved with less than the maximum negative sequence current).Hence, the total current is regulated close to its maximum value I max grms but without exceeding it.The primary objective of the proposed controller is achieved since as it is depicted in Figure 5, V + c is regulated to 0.9E + rms .This verifies the proper selection of the value I max+ grms which further leads to the S + max calculation, while the rest of the available inverter capacity is assigned to negative sequence current controller so that V − , shown in Figure 5, is eliminated as much as possible.The real and reactive power components injected to the grid according to Equation (28) and Equations ( 29) and ( 30) are depicted in Figure 6 while, even if the proposed controller does not deal directly with the VUF but aims to increase the positive sequence voltage and eliminate the negative sequence voltage, in this certain scenario, it can be seen in Figure 7 that VUF at the PCC is eliminated by 7% when compared to VUF grid .At the steady-state, P − set and Q − set are not tracked since priority is given to the current-limiting property.However, if greater capacity was available, such that V − = E − rms , P − and Q − would be regulated to their reference values.After 1.5 s, the fault is self-cleared and the positive sequence components are driven to their initial values according to droop control while the negative sequence components are driven to 0.
Note that during the clearing transient, the value I + grms + I − grms reaches the value 12 A for 10 ms, however, it never exceeds its ultimate bound during transients set at 14 A, as proven in the theoretic analysis presented in this paper.

Operation under Two-Phase Voltage Sag
To further demonstrate the operation of the proposed controller under unbalanced faults, a two-phase voltage sag is now applied, with the RMS values of v ga and v gc dropping so that V ga = 0.73 p.u. and V gc = 0.65 p.u. leading to V + g ≈ 0.8 p.u., while the inverter is operated in the droop control mode.As mentioned before, the maximum current assigned to the positive sequence controller is tracked by the controller leading to I + grms = 6.1 A in order to optimize the support operation and thus, V + c is regulated to 0.9E + rms , as shown in Figure 8.The the rest of the available current, is assigned to the negative sequence current controller which leads to I − grms = 3.7 A thus, managing to eliminate the negative sequence voltage, shown in Figure 8.Hence, the total current never violates its maximum value I max grms = 10 A. The powers injected to the grid in both sequences can be observed in Figure 9 while the VUF is eliminated by 7% compared to the VUF grid , as depicted in Figure 10.After 1.5 s, the fault is self-cleared and the positive sequence components are driven to their initial values according to droop control while the negative sequence components are driven to 0. It is underlined that during the clearing transient, the addition I + grms + I − grms , reaches the value of 11.5 A for less than 10 ms without ever violating the ultimate bound for transient currents, set at 14 A.

Figure 1 .
Figure 1.Three-phase inverter connected to the grid through an LCL filter.
Hence, considering T(t) = Tdq T +− Tαβ with Tαβ =T αβ 0 3x3 0 3x3 T αβ and Tdq = T + be described for a cosinusoidal three-phase voltage variable v abc from the equation

Figure 4 .
Figure 4. Operation under balanced conditions with a 0.4 p.u. balanced voltage drop at 6 s.

Figure 5 .
Figure 5. Operation under single-phase voltage drop (V ga = 0.35 p.u.): Positive and negative sequence RMS voltages and currents.

Figure 8 .
Figure 8. Operation under two-phase voltage drop (V ga = 0.73 p.u. and V gc = 0.65 p.u.): Positive and negative sequence RMS voltages and currents.

Table 1 .
System and controller parameters.