Improved Frequency Locked Loop Based Synchronization Method for Three-Phase Grid-Connected Inverter under Unbalanced and Distorted Grid Conditions

To quickly and accurately estimate the parameters of the fundamental positiveand negative-sequence under the unbalanced and distorted grid voltage, a synchronization method is presented in this paper. The proposed method is based on both a harmonic decoupling network consisting of multiple dual second-order generalized integrators (MDSOGIs) and an improved frequency locked loop (IFLL), so it is called the MDSOGI-IFLL. Due to the IFLL, the system has the feature that the dynamic performance of estimating the fundamental frequency is independent of the variation of both the fundamental positiveand negative-sequence voltage. In this paper, a first-order linear frequency adaption model is established for the design of the IFLL. Finally, the good performance of the proposed MDSOGI-IFLL is validated by the simulation and experiment.


Introduction
The grid voltage parameters, such as frequency, phase angle, and amplitude, are important information for ensuring the stable operation of grid-connected inverters [1,2]. The most widely used synchronization technique is the synchronous rotating frame PLL (SRF-PLL) [3][4][5]. The SRF-PLL, designed with a high bandwidth, can detect information from the grid voltage quickly and accurately in ideal cases. Under the conditions that there are low order harmonics on the grid voltage, the bandwidth of the SRF-PLL needs to be reduced to maintain a high detection accuracy. Nevertheless, the reduction in the bandwidth will result in a reduction in its response speed. A method like this will not be an acceptable solution under the unbalanced grid. So some advanced methods have been proposed to solve this problem. A decoupled double synchronous reference-frame PLL (DDSRF-PLL) is proposed by Rodriguez et al. [6], which can estimate the fundamental positive-and negative-sequence accurately by means of the double synchronous rotation transformation. The main drawback of the DDSRF-PLL is that its transient response is highly influenced by the phase-angle jumps of the input signal [7]. In 2002, a positive sequence filter is designed by Yuan et al. to detect the fundamental positive sequence from the unbalanced and distorted grid voltage [8]. Several synchronization methods, such as the software PLL-based fast PLL [9], the inverse park transformation-based PLL [10,11], the second order generalized From Figure 1, the space-state equations of the SOGI-FLL are given bẏ where x in (1) is the state vector, and y in (2) is the output vector. In addition, the dynamic response of the FLL is described byω As it can be appreciated from (3), the dynamical response of the SOGI-FLL depends on four parameters, namely: the amplitude and frequency of the input signal and the values of k and Γ.
Considering the steady-state, there is Then (1) gives rise toẋ in which the steady-state variables are written with a bar over them. The eigenvalues of the matrix A in (5) have a null real part, so the steady-state outputs of the system response in a periodic orbit at the ω frequency. Therefore, for a given sinusoidal input signal v = V sin(ω 0 t + ϕ), the output vector will be given by When the resonant frequency ω of SOGI-FLL is set to a constant which is not equal to the input signal frequency, then the output vector would still keep in a stable orbit defined by where It is possible to appreciate from (7) that the SOGI states keep the following steady-state relationship when a sinusoidal input signal at the frequency ω 0 is applied to its input, even if ω = ω 0 Therefore, the error signal e v in Figure 1 can be obtained from (1) as According to (9) and (10), the steady-state frequency error signal e f in Figure 1 is given by When the system approaches steady-state, it can be assumed that ω ≈ ω 0 . In such a case, ω 2 − ω 0 2 can be approximated as Then the dynamics of the whole system can be described aṡ For an input signal v = V sin (ω 0 t + ϕ), the square of x 2 will be given by In steady-state, D(jω 0 ) is approximated to 1 in (14). Ignoring the AC component in x 2 , then (13) can be simplified toω

Dynamics Analysis of the DSOGI-FLL and Its Improved Design
The structure of the DSOGI-FLL discussed in [24] is shown in Figure 2, which is used for three-phase grid-connected inverter system.
In the system of Figure 2, two SOGIs working on the αβ stationary reference frame provide the input signals to a positive-/negative-sequence calculation block (PNSC), which is able to detect the positive-and negative-sequence components of a three-phase input vector at a certain frequency ω 0 . The two signals, v α + and v β + , are the fundamental positive-sequence in the αβ coordinate. According to the analysis in Section 2, the two steady-state signals in Figure 2, i.e., e α and e β , are given by Thus, the steady-state frequency error signal e f in DSOGI-FLL can be calculated by Then, according to the design of FLL shown in Figure 2, the dynamics of the DSOGI-FLL can be described asω Considering ω 2 − ω 0 2 can be approximated as 2 (ω − ω 0 ) ω in the steady-state, then (18) gives rise toω Under the unbalanced and distorted grid voltage conditions, the input signals, v α and v β , contain not only the fundamental positive-sequence voltage but also fundamental negative-sequence voltage and harmonic components. The harmonic components can be eliminated by the method described in the next section, so only the negative-sequence is considered in the following analysis in this section. Therefore, the input signals can be described as where V + and V − are the amplitude of the positive-and negative-sequence voltage, respectively, and ϕ − is the phase angle of the negative-sequence. From (20), the square of x 2α and x 2β in the steady-state will be given by (19) and (21), it can be concludeḋ According to the average theory introduced in [25,26], (22) can be simplified tȯ The value of V −/ V + in (23) is commonly defined as the voltage unbalance factor. From (23), it can be concluded that the design of FLL shown in Figure 2 cannot make the dynamics of the DSOGI-FLL independent of the voltage fluctuation under the unbalanced grid condition (V − 2 = 0). To address the issue, an improved FLL is proposed in this paper, as shown in Figure 3.  In this way, the dynamics of the DSOGI-IFLL gives rise tȯ From (24), it can be concluded that the dynamics of the DSOGI-IFLL is neither nondependent on the fundamental positive sequence nor the fundamental negative sequence. Then, the whole system can be described as the first-order linear system shown in Figure 4.
The transfer function of the system in Figure 4 is given by Therefore, the settle time is exclusively dependent on the parameter Γ and can be approximated by It should be pointed out that the establishment of (26) needs to consider the settle time relationship between the IFLL and the SOGI. When the gain k is set to √ 2, the settle time of SOGI, defined as t sogi , should meet the inequality that t s ≥ 2t sogi . According to Figure 1, the transfer functions of the SOGI are given by For a given input signal v = V sin ω 0 t, it can be concluded from (27) and (28) that then, the settle time t sogi can be estimated by

Synchronization Method Based on Multiple DSOGI-IFLL
The DSOGI-IFLL can perfectly reject the high-order harmonics due to its second-order filtering characteristics. However, the detection error will not be acceptable when the low-order grid voltage harmonics, such as the third and fifth harmonics, are relatively large. To address this issue, a cross-feedback network, proposed in [24], consisting of multiple DSOGIs, like the one shown in Figure 2, tuned at different frequencies, is presented as an effective solution to accurately detect the information of the fundamental sequence, even under the extremely distorted grid voltage. From now on, this new system will be referred as multiple DSOGI-IFLL (MDSOGI-IFLL). The main building block of the MDSOGI-IFLL consisted of n DSOGIs is shown in Figure 5.
From Figure 5, the transfer function of the fundamental sequence for the output is given by where i is the harmonic order for the DSOGI-i block, and D i (s) is the general expression for the output v i , which is given by As an example, Figure 6 shows the bode diagram of an MDSOGI-IFLL with three DSOGIs tuned at first, third, and fifth harmonics.
As shown in Figure 6, the designed cross-feedback network exhibits notch characteristics at third and fifth harmonics. Consequently, the synchronization method based on an MDSOGI-IFLL, tuned at the interesting harmonics, can accurately detect the information of the fundamental sequence, even under the extremely distorted grid voltage.

Harmonic Detection Simulation Test
Simulations have been carried out to demonstrate the good performance of the MDSOGI-IFLL. In the simulations, the gain for the fundamental sequence, i.e., DSOGI-1, was set to √ 2. To maintain the same bandwidth, the gain for the other DSOGIs was divided by the harmonic order (k 1 = √ 2). In addition, the gain for the IFLL was set to Γ = 100. Both the MDSOGI-FLL and the MDSOGI-IFLL consisted of four DSOGIs tuned at first, fifth, seventh, eleventh harmonics.
Initial parameters are as follows: the amplitude and frequency of the ideal grid voltage were set to 100 V and 50 Hz respectively. At 0.2 s, the values of the fundamental positive-sequence and negative-sequence were set to 0.6 and 0.5 p.u. As for harmonics, the fifth, seventh, and eleventh harmonics were set to 0.15, 0.2, and 0.1 p.u., respectively. Furthermore, the fundamental frequency was changed to 50.5 Hz. The grid voltage considered in the simulation is shown in Figure 7.
The simulation results are shown in Figures 8 and 9. It should be noticed that the plots in Figure 9, from top to bottom, are for the fundamental positive-and negative-sequence, fifth, seventh, and eleventh harmonics.
As shown in Figure 8, during the transient process, the two FLLs show almost the same time response in 0.2 s to 0.21 s. However, after that stage, the maximum dynamic frequency detection error for MDSOGI-FLL is 16.68 rad/s, and for MDSOGI-IFLL, that is 9.78 rad/s, almost half of the former. So it can be appreciated from Figure 8 that the MDSOGI-IFLL has better dynamic performance. It can be concluded from Figure 8 that both the MDSOGI-FLL and the MDSOGI-IFLL can accurately detect the fundamental grid frequency in the steady state. However, the estimated frequency of the MDSOGI-IFLL has a smaller ripple.   Figure 9 shows the excellent performance of the MDSOGI-IFLL of detecting the instantaneous components for the fundamental sequence and those harmonics even under the extremely unbalanced and distorted grid voltage. In view of the converging speed of the tracking error, the MDSOGI-IFLL behaves as good as the MDSOGI-FLL, even better.

Experimental Verification
Experiments have been carried out to further validate the effectiveness of the proposed synchronization method. An uninterruptible power supply device based on the floating-point 150 MHz TMS320F28335 DSP is used to generate the required grid voltage. In addition, the programs of the synchronization methods mentioned in this part, such as the DDSRF-PLL and the MDSOGI-FLL, were implemented in the same type DSP. All important data were stored in the DSP. In addition, the data used for graphing were derived through the XDS510 emulator. The input signals, i.e., the grid voltage, are obtained by sampling.
The second order integrator [27] is used for the digital implementation of the synchronization algorithms. In this way, the integrator is approximated by where T s is the sample period (100 µs in this paper).

Performance Comparison of Frequency Detection between MDSOGI-FLL and MDSOGI-IFLL
In this paper, the transient frequency detection performance comparison between the MDSOGI-FLL and the proposed MDSOGI-IFLL under unbalanced grid voltage is mainly concerned. So the inter-harmonics discussed in [24] were not in consideration. Three cases, shown in Table 1, were set to make an all-around comparison of the two synchronization methods. The nominal amplitude and frequency of the grid voltage were set to 100 V (1 p.u.) and 50 Hz respectively. During the grid fault, the fundamental frequency was changed to 55 Hz. The waveforms of grid voltage considered in the experiment and the fundamental frequency estimated by the MDSOGI-FLL and the MDSOGI-IFLL are shown in Figure 10.
From Figure 10, it's obvious that the overshoot of the MDSOGI-FLL is getting bigger and bigger as the increasing of the value of the fundamental negative sequence, which confirms the theoretical analysis in Section 3. However, the MDSOGI-IFLL can accurately detect the grid frequency nearly without overshooting in each case. Moreover, the MDSOGI-IFLL has a smaller ripple in the steady state. According to these experiment results, it can be concluded that the MDSOGI-IFLL has a better transient performance than the MDSOGI-FLL while having high detection accuracy.

Performance Comparison between MDSOGI-IFLL and Other Synchronization Methods
In this part, experiments are carried out for performance comparison between MDSOGI-IFLL and other synchronization methods, including the SRF-PLL, the DDSRF-PLL [6], and the MCCF-PLL, synchronization technique proposed in [25] for three-phase grid-interfaced converters under unbalanced and distorted grid voltage. For the three PLLs, the parameters in the control loop, k p and k i , are set to 2 and 3, respectively. In addition, for the DDSRF-PLL, the cut-off frequency of the low-pass filter in the decoupling network is set to ω f = 222 rad/s. As for the MCCF-PLL, the cutoff frequency of ω c is the same as that in [25], with the value of 222 rad/s.

A. Unbalanced Voltage
In this test, the amplitude of the fundamental positive sequence is changed from 100 V to 70 V, and that of the fundamental negative sequence is increased to 30 V. Figure 11 shows that the SRF-PLL is very sensitive to unbalance, and the estimated frequency has a ripple with the amplitude of 20 Hz in the steady state. All the others can precisely extract the phase and amplitude of the positive sequence with a settle time of 0.02 s. However, the frequency detection transient response of the MDSOGI-IFLL is superior to that of the DDSRF-PLL or the MCCF-PLL.

B. Distorted Voltage
The following test is carried out under the distorted grid voltage. At 0.3 s, the amplitude of the fundamental positive sequence is changed from 100 V (1 p.u.) to 70 V, and the fifth, seventh, and eleventh harmonic components are added on the grid voltage with the values of 0.15, 0.2, and 0.1 p.u., respectively.
From Figure 12, it can be seen that the performance of the SRF-PLL degrades further under the distorted voltage. In addition, the frequency estimated by DDSRF-PLL also has a larger ripple. Due to the use of the cross-feedback network, the MCCF-PLL and the MDSOGI-IFLL can still accurately extract the frequency and amplitude of the fundamental positive sequence.  C. Phase Jump Figure 13 shows the experimental results when a 60 • phase jump occurs at 0.3 s. It is obvious that each of three PLLs, i.e., the SRF-PLL, the DDSRF-PLL, and the MCCF-PLL, shows larger overshoot and longer settle time than MDSOGI-IFLL. As stated in [5], PLLs synchronize with the phase of the input signal, and hence, the accuracy and dynamical response of its estimation under transient conditions are highly influenced by phase angle jumps.

D. Brief Comparison
According to the experiments, Table 2 gives a brief comparison of the four synchronization methods to highlight their features.

SRF-PLL
The structure of SRF-PLL is simple. It is easy to design and it can effectively detect the amplitude, phase, and frequency of the grid voltage with perfect steady-state and dynamic response under the idea grid voltage.
It is sensitive to unbalance and harmonics.

DDSRF-PLL
It can accurately extract the positive and negative sequence components of the voltage with good dynamic performance and good frequency adaptability even when the grid voltage is unbalanced.
Its ability to attenuate low-order harmonics is insufficient. In addition, its transient response is highly influenced by the phase-angle jumps of the input signal.

MCCF-PLL
The structure of MCCF is flexible. Through the cross-feedback network, it can accurately detect the information of grid voltage in the steady state even under the unbalanced and distorted grid voltage.
To obtain good performance under the distorted grid voltage, its structure will be more complex, thereby, requiring more DSP resource compared to SRF-PLL or DDSRF-PLL. Since its frequency-adaptive depends on the cascaded PLL, its transient response is highly influenced by the phase-angle jumps of the input signal.

MDSOGI-IFLL
It shows perfect performance under the unbalanced and distorted grid voltage. Due to the FLL, the performance of frequency detection is the best. Hence, it is relatively insensitive to phase jump.
With the number of the DSOGI used in the cross-feedback network increasing, it requires more DSP resource compared to SRF-PLL or DDSRF-PLL.

Conclusions
To realize the fast and accurate acquisition of the information of the fundamental sequence under the unbalanced and distorted grid voltage, a synchronization method based on the MDSOGI-IFLL for the three-phase system is proposed in this paper. Through theoretical analysis, simulation, and experimental tests, several conclusions can be reached as follows: 1. According to the modeling analysis of the DSOGI-FLL, the drawback of the design method for the FLL unit proposed in [24] is pointed out. Based on the analysis, an improved design (referred as IFLL) that takes the fundamental negative sequence voltage into consideration in the design is proposed. The dynamic performance of the DSOGI-IFLL is independent of the variation of both the fundamental positive and the negative sequence voltage. 2. Under unbalanced grid voltage, the proposed MDSOGI-IFLL has a better transient performance than the MDSOGI-FLL in frequency detection when the grid frequency changes. 3. The MDSOGI-IFLL shows the outstanding performance of the estimation of the positive-and negative-sequence components even under the extremely unbalanced and distorted grid voltage.
In addition, the MDSOGI-IFLL also could be used for selective harmonic compensation, islanding detection, and so on.