Modeling and Control of Double-Sided LCC Compensation Topology with Semi-Bridgeless Active Rectifier for Inductive Power Transfer System

This paper proposes the modeling and design of a controller for an inductive power transfer (IPT) system with a semi-bridgeless active rectifier (S-BAR). This system consists of a double-sided Inductor-Capacitor-Capacitor (LCC) compensation network and an S-BAR, and maintains a constant output voltage under load variation through the operation of the rectifier switches. Accurate modeling is essential to design a controller with good performance. However, most of the researches on S-BAR have focused on the control scheme for the rectifier switches and steady-state analysis. Therefore, modeling based on the extended describing function is proposed for an accurate dynamic analysis of an IPT system with an S-BAR. Detailed mathematical analyses of the large-signal model, steady-state operating solution, and small-signal model are provided. Nonlinear large-signal equivalent circuit and linearized small-signal equivalent circuit are presented for intuitive understanding. In addition, worst case condition is selected under various load conditions and a controller design process is provided. To demonstrate the effectiveness of the proposed modeling, experimental results using a 100 W prototype are presented.


Introduction
In an inductive power transfer (IPT) system, where input power is physically separated from load, power is transferred by the magnetic coupling of the transmitter coil and receiver coil [1][2][3][4]. A large air gap between the transmitter coil and receiver coil reduces the flux linkage, which causes an IPT system to have significant leakage inductance. Because the leakage inductance results in a large reactive power and low efficiency, various compensation topologies have been proposed to overcome these problems [5][6][7][8][9].
Among the various compensation topologies, the double-sided Inductor-Capacitor-Capacitor (LCC) compensation topology has the advantage that the resonant frequency and transmitter coil current are independent of the coupling coefficient and load [10][11][12][13][14]. However, this compensation topology has a constant current output characteristic at the resonant frequency. Thus, the output voltage changes significantly depending on the load variation. Therefore, for applications requiring a constant voltage output, several researchers have investigated methods to control the output voltage of a double-sided LCC compensation topology.
Primary control [15][16][17] is the simplest method used for constant voltage output control. In [15,16], a constant current/constant voltage (CC/CV) control method was proposed for charging the batteries by using an IPT system. Based on an impedance analysis of a double-sided LCC compensation topology, the frequency that achieves a CC or CV output characteristics was selected, and the operating frequency was changed according to the mode. This method has the advantage of achieving a constant voltage output under zero phase angle (ZPA) conditions without additional switches. However, the process of selecting an operating frequency with constant voltage output characteristics is very complicated, and it is difficult to design a resonant network with the desired voltage gain. In another study [17], the phase-shift method of the primary side switch was proposed. This method has the advantage that the resonant network design is simple because the switching frequency is fixed at the resonant frequency, and no additional device is required. However, zero voltage switching (ZVS) is lost for some switches. In addition, it is vulnerable to parameter variations because the primary compensation inductor current is measured instead of the output voltage to eliminate communication.
To cope with the problems of the primary control methods, a multi-stage structure methods using a buck-boost converter were proposed [18,19]. These methods have the advantage of allowing the output characteristics to easily be changed to meet the load requirements. In addition, the primary inverter operates under ZPA conditions. Moreover, the load-independent primary control reduces the complexity of the system because it does not require data communication [18]. However, these methods have the disadvantage of reducing the power density and efficiency.
Various methods have been studied to control the output voltage through secondary side control by adding a switch or passive element to the IPT system. In [20], a dual topology combining a double-sided LCC and LCC-S was proposed. This method has the advantage of selectively implementing the desired output characteristics such as a CC or CV by changing the compensation structure of the resonant network through a switch operation. However, the design complexity of the resonant network is increased and the power density is decreased by additional passive components. In order to overcome these problems, a topology in which a pair of bidirectional switches are added to a receiver circuit has been proposed [21]. The output voltage is controlled using the duty ratio control of the bidirectional switch. However, because it is difficult to achieve ZVS for a bidirectional switch, the switching losses are increased.
Meanwhile, an IPT system with a semi-bridgeless active rectifier (S-BAR) for a constant voltage output has actively been studied. The pulse width modulation (PWM) method is the simplest S-BAR control method. It controls the output voltage by adjusting the conduction angle of the rectifier switches [22][23][24][25]. In addition, the PWM scheme proposed in [26] enables the rectifier switches to achieve ZVS. The pulse density modulation (PDM) method enables the rectifier switches to achieve ZVS and ZCS, improving the efficiency compared to the PWM method [27,28]. For these methods, because the frequency, duty ratio, and phase angle of the primary switch are fixed, the primary switch operates at the resonant frequency, and no data communication is required. In addition, the output voltage is controlled through the operation of the rectifier switches without increasing the number of devices or adding a back-end converter, making it possible to achieve a high power density and efficiency.
The accurate modeling of the S-BAR is essential to design a controller with good performance using the aforementioned methods. However, most of the researches on an IPT system with an S-BAR have focused on the control scheme of the rectifier switches [22][23][24][25][26][27][28][29] and steady-state analysis [29,30]. The authors of [31] discussed a small-signal modeling method for an IPT system with an S-BAR, but this method did not reflect the dynamics of a resonant network. This was because a secondary side resonant circuit was assumed to be an ideal AC current source to simplify the analysis. To solve these problems, the authors of [32] proposed a modeling method that reflected the dynamics of the secondary side resonant circuit. However, the S-BAR was replaced with a variable resistor using the correlation between the power of S-BAR and output power. In other words, this method did not reflect the dynamics of the S-BAR. Therefore, to design a voltage control with good performance, mathematical and analytical modeling reflecting the dynamics of a resonant network and an S-BAR is required. This paper proposes a small-signal modeling method for a double-sided LCC compensation topology using an S-BAR. In order to reflect the dynamics of the resonant network and S-BAR, a modeling method based on the extended describing function (EDF) that considers the duty ratio variation of the rectifier switch is described in detail, and large-signal and small-signal equivalent models are provided. In addition, a control-to-output voltage transfer function is obtained using the small-signal model, and a voltage controller design that considers the worst case conditions is discussed. To demonstrate the effectiveness of the proposed modeling and designed controller, various experimental results using a 100 W prototype are provided. Figure 1 shows a double-sided LCC compensation topology with an S-BAR. This topology includes a full-bridge inverter, a resonant network, and an S-BAR. The full-bridge inverter consists of a DC input source V in and main switches Q 1 -Q 4 . The resonance network has symmetrical primary and secondary circuits and consists of one compensation inductor and two compensation capacitors. The semi-bridgeless rectifier consists of upper diodes D 1 and D 2 and lower switches Q s1 and Q s2 . This topology has multiple resonant frequencies, which are defined as follows [10].

System Description
where L p and L s are the self-inductances of the transmitter and receiver coils, respectively, L fp and L fs are the primary and secondary series compensation inductors, respectively, C p and C s are the primary and secondary series compensation capacitors, respectively, C fp and C fs are the primary and secondary parallel compensation capacitors, respectively, and ω o denotes the resonant frequency. variation of the rectifier switch is described in detail, and large-signal and small-signal equivalent models are provided. In addition, a control-to-output voltage transfer function is obtained using the small-signal model, and a voltage controller design that considers the worst case conditions is discussed. To demonstrate the effectiveness of the proposed modeling and designed controller, various experimental results using a 100 W prototype are provided. Figure 1 shows a double-sided LCC compensation topology with an S-BAR. This topology includes a full-bridge inverter, a resonant network, and an S-BAR. The full-bridge inverter consists of a DC input source Vin and main switches Q1-Q4. The resonance network has symmetrical primary and secondary circuits and consists of one compensation inductor and two compensation capacitors. The semi-bridgeless rectifier consists of upper diodes D1 and D2 and lower switches Qs1 and Qs2. This topology has multiple resonant frequencies, which are defined as follows [10].

System Description
where Lp and Ls are the self-inductances of the transmitter and receiver coils, respectively, Lfp and Lfs are the primary and secondary series compensation inductors, respectively, Cp and Cs are the primary and secondary series compensation capacitors, respectively, Cfp and Cfs are the primary and secondary parallel compensation capacitors, respectively, and o ω denotes the resonant frequency. In this paper, to simplify the analysis, with the exception of the equivalent series resistance of the output capacitor, the parasitics are ignored, and all of the devices are assumed to be ideal. In addition, using fundamental harmonic approximation (FHA), all of the harmonics are ignored, and the operating frequency of all the switches is fixed at a resonant frequency. For the double-sided LCC compensation topology, the transmitter coil current iLp is independent of the load resistor RL and mutual inductance M at a resonant frequency. In addition, Lp and Cp do not affect the magnitude of iLp. Therefore, the secondary equivalent circuit, in which the primary circuit is replaced with the induced voltage vsec, can be represented as shown in Figure 2. By Faraday's law, vsec can be expressed as follows [28]. In this paper, to simplify the analysis, with the exception of the equivalent series resistance of the output capacitor, the parasitics are ignored, and all of the devices are assumed to be ideal. In addition, using fundamental harmonic approximation (FHA), all of the harmonics are ignored, and the operating frequency of all the switches is fixed at a resonant frequency. For the double-sided LCC compensation topology, the transmitter coil current i Lp is independent of the load resistor R L and mutual inductance M at a resonant frequency. In addition, L p and C p do not affect the magnitude of i Lp . Therefore, the secondary equivalent circuit, in which the primary circuit is replaced with the induced voltage v sec , can be represented as shown in Figure 2. By Faraday's law, v sec can be expressed as follows [28].
v sec = ω s MI Lp sin(ω s t) where ω s is the switching frequency and I Lp is the peak value of the transmitter coil current. where ωs is the switching frequency and ILp is the peak value of the transmitter coil current.

Operation Principle
Figures 3 and 4 show the key waveforms of the double-sided LCC compensation topology with the S-BAR and the equivalent circuit for each mode, respectively. The operating frequency of main switches Q1-Q4 and rectifier switches Qs1 and Qs2 are fixed at the resonant frequency. Qs1 and Qs2 operate with a phase difference of 180° from each other and modulate the amounts of current flowing to the load when ireci has positive and negative directions, respectively. In order for the S-BAR to operate normally, it is assumed that the duty ratio of Qs1 and Qs2 is always greater than 0.5. The operation of this topology can be divided into four modes. Mode 1 [t0 < t < t1]: At t0, the gate signal of Qs2 is applied, and ireci flowing in the positive direction no longer flows to D2. During this mode, ireci circulates through Qs1 and Qs2, and no energy is transferred to the load. Therefore, rectifier input voltage vrec and rectifier output current ireco are zero, and the energy charged in the output capacitor is supplied to the load.

Operation Principle
Figures 3 and 4 show the key waveforms of the double-sided LCC compensation topology with the S-BAR and the equivalent circuit for each mode, respectively. The operating frequency of main switches Q 1 -Q 4 and rectifier switches Q s1 and Q s2 are fixed at the resonant frequency. Q s1 and Q s2 operate with a phase difference of 180 • from each other and modulate the amounts of current flowing to the load when i reci has positive and negative directions, respectively. In order for the S-BAR to operate normally, it is assumed that the duty ratio of Q s1 and Q s2 is always greater than 0.5. The operation of this topology can be divided into four modes. where ωs is the switching frequency and ILp is the peak value of the transmitter coil current.

Operation Principle
Figures 3 and 4 show the key waveforms of the double-sided LCC compensation topology with the S-BAR and the equivalent circuit for each mode, respectively. The operating frequency of main switches Q1-Q4 and rectifier switches Qs1 and Qs2 are fixed at the resonant frequency. Qs1 and Qs2 operate with a phase difference of 180° from each other and modulate the amounts of current flowing to the load when ireci has positive and negative directions, respectively. In order for the S-BAR to operate normally, it is assumed that the duty ratio of Qs1 and Qs2 is always greater than 0.5. The operation of this topology can be divided into four modes. Mode 1 [t0 < t < t1]: At t0, the gate signal of Qs2 is applied, and ireci flowing in the positive direction no longer flows to D2. During this mode, ireci circulates through Qs1 and Qs2, and no energy is transferred to the load. Therefore, rectifier input voltage vrec and rectifier output current ireco are zero, and the energy charged in the output capacitor is supplied to the load. Mode 1 [t 0 < t < t 1 ]: At t 0 , the gate signal of Q s2 is applied, and i reci flowing in the positive direction no longer flows to D 2 . During this mode, i reci circulates through Q s1 and Q s2 , and no energy is transferred to the load. Therefore, rectifier input voltage v rec and rectifier output current i reco are zero, and the energy charged in the output capacitor is supplied to the load.
Mode 2 [t 1 < t < t 2 ]: At t 1 , Q s1 is turned OFF, and i reci flows to the load through D 1 and Q s2 . v rec is equal to the output voltage and i reco is equal to i reci . The energy is transferred to the load. This mode ends when the direction of i reci changes to the negative direction.
Because the operation principle of Mode 3 and Mode 4 is similar to that of Mode 1 and Mode 2, the detailed descriptions of these will be omitted. Mode 2 [t1 < t < t2]: At t1, Qs1 is turned OFF, and ireci flows to the load through D1 and Qs2. vrec is equal to the output voltage and ireco is equal to ireci. The energy is transferred to the load. This mode ends when the direction of ireci changes to the negative direction.
Because the operation principle of Mode 3 and Mode 4 is similar to that of Mode 1 and Mode 2, the detailed descriptions of these will be omitted.

Proposed Modeling
In this section, the modeling method for the IPT system with the S-BAR is discussed in detail. The EDF is obtained considering the duty ratio variation of the rectifier switches, and the large-signal and small-signal equivalent models are obtained using the proposed modeling.

Nonlinear State Equations
The nonlinear state equations are obtained by applying Kirchhoff's voltage and current laws to the secondary side equivalent circuit in Figure 2, as follows:

Proposed Modeling
In this section, the modeling method for the IPT system with the S-BAR is discussed in detail. The EDF is obtained considering the duty ratio variation of the rectifier switches, and the large-signal and small-signal equivalent models are obtained using the proposed modeling.

Nonlinear State Equations
The nonlinear state equations are obtained by applying Kirchhoff's voltage and current laws to the secondary side equivalent circuit in Figure 2, as follows: Equations (3)- (8) are nonlinear state equations that include both nonlinear and linear components.

Harmonic Approximation
Because it is assumed that all of the switches operate at a resonant frequency, the harmonics of compensation inductor currents and compensation capacitor voltages are greatly attenuated. Therefore, the resonant currents and voltages are quasi-sinusoidal. By applying harmonic approximation, these components can be approximated by the sum of the sine and cosine components as follows where the subscripts s and c represent the sine and cosine components, respectively. The derivatives of Equations (9) and (10) are calculated as follows: In Equations (9)- (12), the coefficients of the sine and cosine components change over time and their modulation frequency is much lower than the switching frequency. Thus, these parameters include the dynamics of the resonant network.

Extended Describing Functions
By applying a harmonic approximation, the quasi-sinusoidal components of Equations (3)- (8) are approximated as sinusoidal components. However, nonlinear components such as rectifier input voltage v rec and rectifier output current i reco still complicate the dynamic analysis. Using the EDF, the nonlinear components can be approximated to their fundamental harmonic and DC components.
As shown in Figure 5, when i reco flows, the magnitude of rectifier input voltage v rec is equal to output voltage v o and the direction of v rec is the same as that of i reci . Because v rec is nonlinear but periodic, it can be approximated using a Fourier series expansion. By ignoring the harmonic components, v rec can be expressed as where f 1 and f 2 are the EDFs of the sine and cosine components, respectively, and can be calculated as follows where i reci is given by As can be seen in Figure 5, i reco is a nonlinear and periodic function. Using a Fourier series expansion, i reco can be approximated as where f 3 is the average rectifier output current.
where ireci is given by As can be seen in Figure 5, ireco is a nonlinear and periodic function. Using a Fourier series expansion, ireco can be approximated as where f3 is the average rectifier output current.

Harmonic Balance
By harmonic approximation and the EDF, quasi-sinusoidal components are approximated as their fundamental components, and nonlinear components are approximated as their fundamental and DC components. Substituting Equations (9)- (13) and (17)

Harmonic Balance
By harmonic approximation and the EDF, quasi-sinusoidal components are approximated as their fundamental components, and nonlinear components are approximated as their fundamental and DC components. Substituting Equations (9)- (13) and (17) i Ls,s = C s dv Cs,s dt − C s ω s v Cs,c i Ls,c = C s dv Cs,c dt + C s ω s v Cs,s Assuming that the modulation frequency of the switching frequency and duty ratio is much lower than the switching frequency, Equations (18)- (27) can be defined by a nonlinear large-signal model, and Figure 6 shows the nonlinear large-signal equivalent circuit. dt ( ) ( ) Assuming that the modulation frequency of the switching frequency and duty ratio is much lower than the switching frequency, Equations (18)- (27) can be defined by a nonlinear large-signal model, and Figure 6 shows the nonlinear large-signal equivalent circuit.

Steady-State Solution
The large-signal model includes both steady-state and transient information. At steady-state quiescent points, the state variables do not change with time. Therefore, a steady-state solution can be obtained by substituting zero for the derivatives of Equations (18)

Steady-State Solution
The large-signal model includes both steady-state and transient information. At steady-state quiescent points, the state variables do not change with time. Therefore, a steady-state solution can be obtained by substituting zero for the derivatives of Equations (18)- (27), as follows A ss X ss = U ss (28) where ω sn is the normalized switching frequency, and K 1 -K 3 are given in Appendix A.

Perturbation and Linearization of Large-Signal Model
The average state variable and input variable near the steady-state quiescent point can be expressed as x = X +x (32) where the capital letter refers to the nominal value, and the hat "ˆ" indicates the small-signal variables. Substituting Equation (32) into Equations (18)- (27) and using the partial differentiation to linearize the nonlinear large-signal model, a linearized small-signal model is obtained [33]. The state-space representations of a linearized small-signal model can be derived as follows dx dt = Ax + Bû y = Cx + Dû x = î Ls,sîLs,cvCs,svCs,cîreci,sîreci,cvC f s,svC f s,cvCo T (38) where K 4 -K 25 are given in Appendix A. Figure 7 shows the linearized equivalent circuit of the double-sided LCC compensation topology with the S-BAR. The major control-to-output transfer functions are the switching frequency-to-output voltage transfer function G vf (s) and duty ratio-to-output voltage transfer function G vd (s). Because the switching frequency of all the switches is fixed at the resonance frequency by an assumption, a detailed description of G vf (s) is omitted. G vd (s) can be derived in two ways. One is to use a linearized equivalent circuit. In the linearized equivalent circuit of Figure 7, G vd (s) can be derived by setting ω sn to zero. The other method is to use a state-space model, where G vd (s) can be calculated as follows: equivalent circuit. In the linearized equivalent circuit of Figure 7, Gvd(s) can be derived by setting ωsn to zero. The other method is to use a state-space model, where Gvd(s) can be calculated as follows: Using MATLAB commands, sys = ss(A,B,C,D) and Gvd(s) = tf(sys), Equation (41) can be obtained.  Figure 8 shows a block diagram of the output voltage control, where Gc is the output voltage controller, Fm is the PWM gain, and Hvo is the voltage sensor gain. Figure 9 shows the duty ratio-tooutput voltage transfer function under various load conditions. The main parameters are presented in Table 1. For stable output voltage control under various load conditions, the worst case condition is selected. In general, a lower frequency for the dominant pole makes it more difficult to obtain a sufficient phase margin. At a 10% load condition, the duty ratio-to-output voltage transfer function has the lowest dominant pole. Therefore, a 10% load condition is selected as the worst case, and the controller is designed at this operating point.  Figure 8 shows a block diagram of the output voltage control, where G c is the output voltage controller, F m is the PWM gain, and H vo is the voltage sensor gain. Figure 9 shows the duty ratio-to-output voltage transfer function under various load conditions. The main parameters are presented in Table 1. For stable output voltage control under various load conditions, the worst case condition is selected. In general, a lower frequency for the dominant pole makes it more difficult to obtain a sufficient phase margin. At a 10% load condition, the duty ratio-to-output voltage transfer function has the lowest dominant pole. Therefore, a 10% load condition is selected as the worst case, and the controller is designed at this operating point.        Figure 10 shows the gain and phase plots of the loop gain with and without the controller under the worst case condition. The following PI controller is used for the voltage controller:

Controller Design
As can be seen in Figure 10, the crossover frequency is 1550 Hz, and the phase margin is 88.5 degree. the worst case condition. The following PI controller is used for the voltage controller: As can be seen in Figure 10, the crossover frequency is 1550 Hz, and the phase margin is 88.5 degree.

Test Setup
To verify the effectiveness of the proposed modeling method, a double-sided LCC compensation topology with an S-BAR was designed for 100 W, input voltage of 150 V, and output voltage rating of 25 V, as shown in Figure 11. The circuit of the test setup is shown in Figure 1, and the circuit parameters are provided in Table 1. The structures of the transmitter and receiver coils were the same, and each had a length and width of 200 mm and 220 mm, respectively. Each coil consisted of 11 turns of litz wire and 8 ferrite cores. The air gap between the transmitter and receiver coils was 100 mm, and the coupling coefficient was 0.175.

Test Setup
To verify the effectiveness of the proposed modeling method, a double-sided LCC compensation topology with an S-BAR was designed for 100 W, input voltage of 150 V, and output voltage rating of 25 V, as shown in Figure 11. The circuit of the test setup is shown in Figure 1, and the circuit parameters are provided in Table 1. The structures of the transmitter and receiver coils were the same, and each had a length and width of 200 mm and 220 mm, respectively. Each coil consisted of 11 turns of litz wire and 8 ferrite cores. The air gap between the transmitter and receiver coils was 100 mm, and the coupling coefficient was 0.175.  Figure 12 shows a comparison of the output voltage curves according to the duty ratio under various load conditions. In Figure 12, the dashed line indicates the calculated output voltage of the proposed model, and the solid line indicates the values measured in the experiments. When the duty ratio is 0.5, this topology has a constant current output characteristic. Thus, the output voltage  Figure 12 shows a comparison of the output voltage curves according to the duty ratio under various load conditions. In Figure 12, the dashed line indicates the calculated output voltage of the proposed model, and the solid line indicates the values measured in the experiments. When the duty ratio is 0.5, this topology has a constant current output characteristic. Thus, the output voltage increases as the load resistance increases. As the duty ratio of the rectifier switch increases, the rectifier output current decreases, and the output voltage decreases. As can be seen in Figure 12, when R L has values of 6.25 Ω and 12.5 Ω, the measured values fit well with the calculated output voltage of the steady-state model. However, when the load resistance is 62.5 Ω, the experimental values do not match well with the calculated values. This is because, when the output voltage is higher than the input voltage, an interval occurs in which the rectifier does not conduct [10]. Therefore, the harmonic components of rectifier input current i reci increase, which causes an error between the values calculated using the model based on the harmonic approximation and the experimental result.  Figure 12 shows a comparison of the output voltage curves according to the duty ratio under various load conditions. In Figure 12, the dashed line indicates the calculated output voltage of the proposed model, and the solid line indicates the values measured in the experiments. When the duty ratio is 0.5, this topology has a constant current output characteristic. Thus, the output voltage increases as the load resistance increases. As the duty ratio of the rectifier switch increases, the rectifier output current decreases, and the output voltage decreases. As can be seen in Figure 12, when RL has values of 6.25 Ω and 12.5 Ω, the measured values fit well with the calculated output voltage of the steady-state model. However, when the load resistance is 62.5 Ω, the experimental values do not match well with the calculated values. This is because, when the output voltage is higher than the input voltage, an interval occurs in which the rectifier does not conduct [10]. Therefore, the harmonic components of rectifier input current ireci increase, which causes an error between the values calculated using the model based on the harmonic approximation and the experimental result.

Transient Response Results
To demonstrate the performance of the controller designed in Section 4, the experimental results of the step response and load change response are provided. Figure 13 represents the experimental results of the step response when reference voltage v ref changes from 25 to 30 V under a 100% load condition. Output voltage v o follows its reference voltage without overshoot and the settling time of the step response is approximately 4 ms. Figure 14 shows the steady-state waveforms before and after the step response. As can be seen from these waveforms, the rectifier voltage is zero while the rectifier input current circulates, and the magnitude of v rec is equal to the output voltage when the rectifier output current flows into the load. Therefore, when the reference voltage is 30 V, the zero voltage interval of v rec is shorter to improve the output voltage. the step response is approximately 4 ms. Figure 14 shows the steady-state waveforms before and after the step response. As can be seen from these waveforms, the rectifier voltage is zero while the rectifier input current circulates, and the magnitude of vrec is equal to the output voltage when the rectifier output current flows into the load. Therefore, when the reference voltage is 30 V, the zero voltage interval of vrec is shorter to improve the output voltage.  Figure 15 shows the transient response under a load change. When the load varies from 100 W to 10 W, the output voltage follows its reference voltage. During the transient response, the overshoot of the output voltage is approximately 2.5 V, which is 10% of the reference voltage. Figure 16 shows the steady-state waveforms before and after the load change. As described in Section 5.2, the output voltage increases when the load resistance decreases. Therefore, the zero voltage interval of the rectifier voltage is longer to reduce the rectifier output current under the 10 W load condition. Step response when voltage reference is changed from 25 to 30 V at 100% load condition.
To demonstrate the performance of the controller designed in Section 4, the experimental results of the step response and load change response are provided. Figure 13 represents the experimental results of the step response when reference voltage vref changes from 25 to 30 V under a 100% load condition. Output voltage vo follows its reference voltage without overshoot and the settling time of the step response is approximately 4 ms. Figure 14 shows the steady-state waveforms before and after the step response. As can be seen from these waveforms, the rectifier voltage is zero while the rectifier input current circulates, and the magnitude of vrec is equal to the output voltage when the rectifier output current flows into the load. Therefore, when the reference voltage is 30 V, the zero voltage interval of vrec is shorter to improve the output voltage.  Figure 15 shows the transient response under a load change. When the load varies from 100 W to 10 W, the output voltage follows its reference voltage. During the transient response, the overshoot of the output voltage is approximately 2.5 V, which is 10% of the reference voltage. Figure 16 shows the steady-state waveforms before and after the load change. As described in Section 5.2, the output voltage increases when the load resistance decreases. Therefore, the zero voltage interval of the rectifier voltage is longer to reduce the rectifier output current under the 10 W load condition.  Figure 15 shows the transient response under a load change. When the load varies from 100 W to 10 W, the output voltage follows its reference voltage. During the transient response, the overshoot of the output voltage is approximately 2.5 V, which is 10% of the reference voltage. Figure 16 shows the steady-state waveforms before and after the load change. As described in Section 5.2, the output voltage increases when the load resistance decreases. Therefore, the zero voltage interval of the rectifier voltage is longer to reduce the rectifier output current under the 10 W load condition.

Conclusions
This paper proposed a modeling method for a double-sided LCC compensation topology with an S-BAR. Unlike the conventional modeling methods for S-BARs, the proposed modeling reflects the dynamics of the resonant network and S-BAR. It is possible to design a voltage controller with good performance. A detailed mathematical analysis of the proposed modeling method was provided, as well as a nonlinear large-signal model, steady-state solution, and linearized small-signal model. Nonlinear large-signal equivalent circuit and linearized small-signal equivalent circuit are presented for intuitive understanding. The duty ratio-to-output voltage transfer function was obtained from the linearized small-signal model and the controller design procedure considering the worst case condition was discussed. A 100 W prototype was used to demonstrate the effectiveness of the proposed modeling. The steady-state model was verified by the output voltage curves according to the duty ratio of the rectifier switches. At the rated load and medium load, the experimental results fit well with the steady-state model. However, under light load condition, the error between the experimental results and calculated results increased due to harmonic components not considered. The linearized small-signal model was verified using the experimental waveforms of the step response and load change response. The designed controller performance was verified by step response. Through load change response, the designed controller was verified to be robust against load variation.

Conclusions
This paper proposed a modeling method for a double-sided LCC compensation topology with an S-BAR. Unlike the conventional modeling methods for S-BARs, the proposed modeling reflects the dynamics of the resonant network and S-BAR. It is possible to design a voltage controller with good performance. A detailed mathematical analysis of the proposed modeling method was provided, as well as a nonlinear large-signal model, steady-state solution, and linearized small-signal model. Nonlinear large-signal equivalent circuit and linearized small-signal equivalent circuit are presented for intuitive understanding. The duty ratio-to-output voltage transfer function was obtained from the linearized small-signal model and the controller design procedure considering the worst case condition was discussed. A 100 W prototype was used to demonstrate the effectiveness of the proposed modeling. The steady-state model was verified by the output voltage curves according to the duty ratio of the rectifier switches. At the rated load and medium load, the experimental results fit well with the steady-state model. However, under light load condition, the error between the experimental results and calculated results increased due to harmonic components not considered. The linearized small-signal model was verified using the experimental waveforms of the step response and load change response. The designed controller performance was verified by step response. Through load change response, the designed controller was verified to be robust against load variation.

Conclusions
This paper proposed a modeling method for a double-sided LCC compensation topology with an S-BAR. Unlike the conventional modeling methods for S-BARs, the proposed modeling reflects the dynamics of the resonant network and S-BAR. It is possible to design a voltage controller with good performance. A detailed mathematical analysis of the proposed modeling method was provided, as well as a nonlinear large-signal model, steady-state solution, and linearized small-signal model. Nonlinear large-signal equivalent circuit and linearized small-signal equivalent circuit are presented for intuitive understanding. The duty ratio-to-output voltage transfer function was obtained from the linearized small-signal model and the controller design procedure considering the worst case condition was discussed. A 100 W prototype was used to demonstrate the effectiveness of the proposed modeling. The steady-state model was verified by the output voltage curves according to the duty ratio of the rectifier switches. At the rated load and medium load, the experimental results fit well with the steady-state model. However, under light load condition, the error between the experimental results and calculated results increased due to harmonic components not considered. The linearized small-signal model was verified using the experimental waveforms of the step response and load change response. The designed controller performance was verified by step response. Through load change response, the designed controller was verified to be robust against load variation.