Research on Theoretical Calculation Methods of Photovoltaic Power Short-Circuit Current and Influencing Factors of Its Fault Characteristics

With the substantial increase in the capacity of grid-connected photovoltaic (PV) power, the adverse effects of its complex fault characteristics on grid relay protection are increasingly highlighted. Based on the introduction of the topology and the control strategy on low-voltage ride through of PV power, a theoretical solution method for solving the fault current of PV power is proposed by taking account of the DC bus voltage fluctuation, and a theoretical calculation model of its transient and steady state is established. The correctness of the theoretical results is verified by the numerical simulation results and low-voltage ride through (LVRT) experiment results. Furthermore, to gain a better understanding of the factors influencing PV power fault characteristics, the effects of several factors including proportional integral (PI) controller parameters, fault voltage sag depth, and PV power load level on PV power fault characteristics are analyzed by using simple variable method. The obtained results can provide a theoretical reference for the control parameter design and protection research of PV power.


Introduction
In recent years, solar power has become an important field for global energy transformation with rapidly increased installed capacity, which is mainly attributed to its technology advancement and cost reduction [1].In order to prevent the danger of the grid-connected PV power to the safe and stable operation of the power grid during power grid fault, in the relevant regulations for grid-connected operation of PV power, it is clearly required that large and medium-sized PV power stations should possess LVRT capability [2].As the power generation mode, circuit topology, and LVRT control strategy of PV power is quite unique, its fault characteristics are very different from traditional synchronous motors.With large numbers of PV power sources adopting the LVRT control strategy, the complex short-circuit currents that they feed will have many adverse effects on the relay protection of power grid, which may lead to protection maloperation or refusing action, thus threatening the safe and stable operation of the power system.Therefore, in-depth analysis of the short-circuit current characteristics of PV power and the establishment of a theoretical analytical calculation model for short-circuit currents have important practical significance for accurately evaluating their impact on power grid relay protection and improving protection performance.
In [3][4][5][6][7], the characteristics and calculation methods of the steady-state fault current of PV power have been studied without considering its transient fault characteristics, therefore the conclusions are only applicable to the steady-state short-circuit analysis.In [8], the mathematical model for the fault analysis of inverter interfaced distributed generator (IIDG) has been first established by using single outer voltage loop control strategy, and then the fault analysis method of distribution network including IIDG has been proposed.However, at present, IIDG usually adopts the double loop control strategy with outer voltage loop and inner current loop [9,10], which cannot be directly simplified to single voltage outer loop control strategy for fault characteristic analysis.In the literature [11][12][13], the fault transient-state and steady-state characteristics of PV power have been studied by assuming that the DC bus voltage is constant during a fault.However, when a fault occurs, the output power of PV power will change substantially, and this change will result in the DC bus voltage fluctuation, which eventually affects the output fault current.Therefore, the above approximate analysis method needs further improvement.Meanwhile, since the factors affecting the transient fault characteristics of PV power are not analyzed in the literature [11][12][13], the relationship between these characteristics (such as transient duration, transient peak, transient component frequency, etc.) and the related variables (such as controller parameters, voltage sag depth, load level, etc.) cannot be visually seen.Therefore, it is difficult to apply directly to engineering.To prevent the overvoltage of DC bus caused by unbalanced active power during a fault, the DC bus of PV power is generally equipped with the unloading circuit [14].In [15,16], the fault transient characteristics of PV power considering the effect of the unloading circuit have been studied by using digital simulation.However, their study is limited to qualitative analysis, and lacks the support of necessary theory analysis.
Aiming to solve the above problems, in this paper, we propose a theoretical solution method and calculation model for analyzing PV power fault transient and steady current by taking account of the DC bus voltage fluctuation and the influence of unloading circuit during fault.The correctness of our model is verified by the digital simulation and LVRT experiment results.Furthermore, the main factors affecting the short-circuit current characteristics of PV power are analyzed based on this model in order to provide the references for relay protection research and controller design of power grids including PV power.

PV Power Topology and Its Inverter Control Strategy
In general, the inverter topology used in high-power PV power is generally can be either single-stage or double-stage [17].Among them, the double-stage inverter separates the maximum power point tracking (MPPT) unit [18][19][20] from the grid-connected control unit, which simplifies the design difficulty of the control system, and therefore is more popular in practical applications [17], and the topology of the double-stage inverter is shown in Figure 1.The photovoltaic array generates direct current which is boosted by the DC/DC circuit and then connected to the DC bus, and then connected to the power grid via the DC/AC converter and the filter circuit.In addition to boosting the voltage, the boost converter is used to control the port voltage of PV array tracking the instruction voltage value corresponding to the maximum power point, and physically isolate the port voltage of PV array from the DC bus voltage.
Energies 2018, 11, x FOR PEER REVIEW 2 of 21 analysis of inverter interfaced distributed generator (IIDG) has been first established by using single outer voltage loop control strategy, and then the fault analysis method of distribution network including IIDG has been proposed.However, at present, IIDG usually adopts the double loop control strategy with outer voltage loop and inner current loop [9,10], which cannot be directly simplified to single voltage outer loop control strategy for fault characteristic analysis.In the literature [11][12][13], the fault transient-state and steady-state characteristics of PV power have been studied by assuming that the DC bus voltage is constant during a fault.However, when a fault occurs, the output power of PV power will change substantially, and this change will result in the DC bus voltage fluctuation, which eventually affects the output fault current.Therefore, the above approximate analysis method needs further improvement.Meanwhile, since the factors affecting the transient fault characteristics of PV power are not analyzed in the literature [11][12][13], the relationship between these characteristics (such as transient duration, transient peak, transient component frequency, etc.) and the related variables (such as controller parameters, voltage sag depth, load level, etc.) cannot be visually seen.Therefore, it is difficult to apply directly to engineering.To prevent the overvoltage of DC bus caused by unbalanced active power during a fault, the DC bus of PV power is generally equipped with the unloading circuit [14].In [15,16], the fault transient characteristics of PV power considering the effect of the unloading circuit have been studied by using digital simulation.However, their study is limited to qualitative analysis, and lacks the support of necessary theory analysis.
Aiming to solve the above problems, in this paper, we propose a theoretical solution method and calculation model for analyzing PV power fault transient and steady current by taking account of the DC bus voltage fluctuation and the influence of unloading circuit during fault.The correctness of our model is verified by the digital simulation and LVRT experiment results.Furthermore, the main factors affecting the short-circuit current characteristics of PV power are analyzed based on this model in order to provide the references for relay protection research and controller design of power grids including PV power.

PV Power Topology and Its Inverter Control Strategy
In general, the inverter topology used in high-power PV power is generally can be either singlestage or double-stage [17].Among them, the double-stage inverter separates the maximum power point tracking (MPPT) unit [18][19][20] from the grid-connected control unit, which simplifies the design difficulty of the control system, and therefore is more popular in practical applications [17], and the topology of the double-stage inverter is shown in Figure 1.The photovoltaic array generates direct current which is boosted by the DC/DC circuit and then connected to the DC bus, and then connected to the power grid via the DC/AC converter and the filter circuit.In addition to boosting the voltage, the boost converter is used to control the port voltage of PV array tracking the instruction voltage value corresponding to the maximum power point, and physically isolate the port voltage of PV array from the DC bus voltage.To calculate the output power of photovoltaic power, the vector decoupling control method is usually adopted, which generally directs the grid positive sequence voltage to the d-axis, and the output power equation is Under normal circumstances, the photovoltaic power operates under unit power factor conditions and adopts the double loop control strategy with outer voltage loop and inner current loop.At this time, in the d and q axis two-phase rotating coordinate system, the inverter control equation is where superscript * represents the controller instruction value; k vP and k vI is the P and I parameters of outer voltage loop PI controller; k P and k I is the P and I parameters of inner current loop PI controller; i * d0 and i * q0 is the d and q axis instruction value of grid current under normal conditions.In the case of faults, the photovoltaic power should possess LVRT capability [2] in order to meet the reactive power support requirements of the system.At the same time, to ensure that the DC bus voltage still possess a certain degree of adjusting ability during the fault, the outer voltage control loop of photovoltaic power is not blocked during the fault.At this time, LVRT control equation of the photovoltaic power is where: U T is the positive sequence voltage amplitude on grid side after fault; i * gmax is the instruction value of the inverter maximum output current; i * gq1 and i * gd1 is the instruction value of d and q axis current after fault.
In addition, in the case of asymmetric faults, PV power generally adopts a balanced (no negative sequence component) output current control strategy based on positive sequence voltage measurement [21].First, the amplitude and phase of the positive sequence component in the fault voltage are measured by a phase-locked loop (PLL) [22], and the instruction values of the output positive sequence active and reactive current are obtained according to Equation (3).Then, the output current of the photovoltaic power quickly tracks the instruction value based on the inner current loop control link, so the photovoltaic power will not output negative sequence fault currents under the asymmetric fault.

DC Unloading Circuit Control Strategy
When the voltage sags deeply, the active output of the photovoltaic power is limited, and in a short time after the fault, the output power of the photovoltaic array remains nearly unchanged due to the voltage regulation of the DC/DC circuit.In order to prevent the DC bus voltage from overvoltage caused by the unbalanced active power, a commonly used approach is to add a DC unloading circuit on the DC bus side [14].The switching control is based on judging whether the DC bus voltage is off-limit or not, and the specific control principle as shown in Figure 2. The switching signal of the unloading circuit is obtained by the DC voltage difference through the PI link and pulse width modulation (PWM) link, which can effectively reduce the fluctuation of the DC side voltage.

Symmetrical Fault Condition
When a fault happens in the grid, the DC bus voltage fluctuates due to power imbalance, which will directly affect the short-circuit current characteristics.According to the characteristics of capacitor energy storage and the principle of energy conservation, the DC bus voltage equation is ( ) where: * dc u is the rated voltage of the DC bus; udc is the DC bus voltage; C is the DC bus capacitor; t0 is the fault occurrence time; p0 is the input active power of the PV array; pg is the output active power of the PV power; pcrow is the consumed power of the DC unloading circuit.
Assuming that dc u Δ is the fault component of the DC bus voltage during the fault, then To ensure the safe operation of both the DC bus and the inverter, it is generally specified that the maximum allowable voltage on the DC bus side should not exceed 1.1 p.u [23,24].At this time, squaring Equation (5), then According to the simultaneous equation of Equations ( 4) and ( 6), the DC bus fault component voltage equation is

Symmetrical Fault Condition
When a fault happens in the grid, the DC bus voltage fluctuates due to power imbalance, which will directly affect the short-circuit current characteristics.According to the characteristics of capacitor energy storage and the principle of energy conservation, the DC bus voltage equation is where: u * dc is the rated voltage of the DC bus; u dc is the DC bus voltage; C is the DC bus capacitor; t 0 is the fault occurrence time; p 0 is the input active power of the PV array; p g is the output active power of the PV power; p crow is the consumed power of the DC unloading circuit.
Assuming that ∆u dc is the fault component of the DC bus voltage during the fault, then To ensure the safe operation of both the DC bus and the inverter, it is generally specified that the maximum allowable voltage on the DC bus side should not exceed 1.1 p.u [23,24].At this time, squaring Equation (5), then According to the simultaneous equation of Equations ( 4) and ( 6), the DC bus fault component voltage equation is Ignoring the power loss of the inverter and filter circuit, the control block diagram of the outer voltage loop of the inverter is shown in Figure 3.

Symmetrical Fault Condition
When a fault happens in the grid, the DC bus voltage fluctuates due to power imbalance, which will directly affect the short-circuit current characteristics.According to the characteristics of capacitor energy storage and the principle of energy conservation, the DC bus voltage equation is ( ) where: * dc u is the rated voltage of the DC bus; udc is the DC bus voltage; C is the DC bus capacitor; t0 is the fault occurrence time; p0 is the input active power of the PV array; pg is the output active power of the PV power; pcrow is the consumed power of the DC unloading circuit.
Assuming that dc u Δ is the fault component of the DC bus voltage during the fault, then To ensure the safe operation of both the DC bus and the inverter, it is generally specified that the maximum allowable voltage on the DC bus side should not exceed 1.1 p.u [23,24].At this time, squaring Equation (5), then According to the simultaneous equation of Equations ( 4) and ( 6), the DC bus fault component voltage equation is  In Figures 3 and 4, the current control inner loop is typically designed as a typical I-type system in order to achieve faster current follow-up characteristics.At the same time, the cutoff Energies 2019, 12, 316 5 of 21 frequency is generally less than 1/10 of the equivalent switching frequency [25].If the equivalent switching frequency is 15,000 Hz, the cutoff frequency is 1000 Hz.At this time, the decay time constant τ = 1/2π f c = 0.16 ms, meaning that the active current can track the active current command within a few milliseconds.The fast tracking of the reactive current can also be proved using the same approach.Therefore, it can be approximated that Energies 2018, 11, x FOR PEER REVIEW 5 of 21 In Figures 3 and 4, the current control inner loop is typically designed as a typical I-type system in order to achieve faster current follow-up characteristics.At the same time, the cutoff frequency is generally less than 1/10 of the equivalent switching frequency [25].If the equivalent switching frequency is 15,000 Hz, the cutoff frequency is 1000 Hz.At this time, the decay time constant 1/ 2 0.16 c f ms , meaning that the active current can track the active current command within a few milliseconds.The fast tracking of the reactive current can also be proved using the same approach.Therefore, it can be approximated that i i i i According to the simultaneous equation of Equations ( 1), ( 2), ( 7) and ( 8), the equation of DC bus fault component voltage can be rewritten as When a short-circuit fault occurs in the power grid, since the fault duration is generally short (depending on the protection action time at the fault location), the external conditions such as the insolation and temperature can be assumed to be constant, then the instruction voltage value corresponding to the maximum power point of the PV array also remains unchanged.When the DC bus voltage fluctuates during the fault period, the booster converter controls the switching by its voltage loop controller, which adjusts its transfer ratio to control the port voltage of the PV array being basically constant as its instruction value, therefore keeping the active output power of the PV array constant during the fault period.Therefore, if the PV array and the booster converter are taken as a whole, they can be equivalent to a constant active power source during the fault period.Doing second order derivative on time to Equation (9), then Where: D 2 is the second-order differential factor; D is the first-order differential factor; ugd is the d-axis voltage on the grid side after the fault, and its value is constant during the fault.
Because the output current is continuous at the moment of fault, namely Where: δ is the sag depth of the positive sequence voltage.Equation ( 10) is a typical second-order constant-coefficient homogeneous differential equation, and its characteristic equation is Theoretically, the characteristic roots of Equation (12) include two cases of two different real roots and two conjugate complex roots, which are analyzed separately below.
(1) Two different real roots of characteristic Equation (12) Based on Equations (10) and (11), the analytical expression of the fault component of the DC bus voltage is According to the simultaneous equation of Equations ( 1), ( 2), ( 7) and ( 8), the equation of DC bus fault component voltage can be rewritten as When a short-circuit fault occurs in the power grid, since the fault duration is generally short (depending on the protection action time at the fault location), the external conditions such as the insolation and temperature can be assumed to be constant, then the instruction voltage value corresponding to the maximum power point of the PV array also remains unchanged.When the DC bus voltage fluctuates during the fault period, the booster converter controls the switching by its voltage loop controller, which adjusts its transfer ratio to control the port voltage of the PV array being basically constant as its instruction value, therefore keeping the active output power of the PV array constant during the fault period.Therefore, if the PV array and the booster converter are taken as a whole, they can be equivalent to a constant active power source during the fault period.Doing second order derivative on time to Equation ( 9), then where: D 2 is the second-order differential factor; D is the first-order differential factor; u gd is the d-axis voltage on the grid side after the fault, and its value is constant during the fault.
Because the output current is continuous at the moment of fault, namely i gd (t 0− ) = i gd (t 0+ ), the definite conditions of Equation ( 10) are where: δ is the sag depth of the positive sequence voltage.Equation ( 10) is a typical second-order constant-coefficient homogeneous differential equation, and its characteristic equation is Theoretically, the characteristic roots of Equation ( 12) include two cases of two different real roots and two conjugate complex roots, which are analyzed separately below.
(1) Two different real roots of characteristic Equation ( 12) Energies 2019, 12, 316 6 of 21 Based on Equations ( 10) and ( 11), the analytical expression of the fault component of the DC bus voltage is where Substituting the above formula into Equation (3), the output currents of the photovoltaic power d and q-axis are i gd (t where: The equation is rewritten in the three-phase coordinate system as where: ϕ 1 is the initial phase of A phase current before the fault; It can be seen from Equations ( 14) and ( 15) that when the characteristic equation has two different real roots, the fault current of PV power does not contain the damping DC component, but contains one steady-state fundamental frequency component and two kinds of free fundamental frequency components, which is quite different comparing with the case in conventional synchronous motors.Among them, the initial values and the decay time constants of the two free frequency components are different, and their phases are opposite.The fundamental frequency component with large initial value decays faster, and its phase is opposite to the steady-state component, while the fundamental frequency component with small initial value decays slowly, and its phase is the same as the steady-state component.Based on these analyses, it can be deduced that the d-axis current and the phase current envelope of the PV power will first increase and then decrease during the fault, which will be verified in the subsequent digital simulation and LVRT experiment.
(2) Two conjugate complex roots of characteristic Equation (12).Based on Equations ( 10) and ( 11), the analytical expression of the fault component of the DC bus voltage can be obtained as where: where: The equation is rewritten in the three-phase coordinate system as where: It can be seen from Equations ( 17) and ( 18) that when the characteristic equation has two conjugate complex roots, the fault current of the PV power contains one steady-state fundamental frequency component and two kinds of free non-fundamental frequency AC components, without decaying DC component and free fundamental frequency components.Among them, the two free non-baseband AC components possess the same initial values and decay time constant, but with different frequency and phase.The superposition of the two AC components will be a decaying AC component at a fixed frequency.At this time, the d-axis current and the phase current envelope of PV power will first increase and then decay oscillatorily during the fault, which is significantly different from the fault characteristics of traditional synchronous motor.

Asymmetric Fault Condition
When the asymmetrical fault occurs, a balanced (no negative-sequence component) output current control strategy is generally used in the inverter of PV power [21], which causes that only the positive-sequence current is generated by PV power.The double-frequency power will be generated due to the existence of the positive-sequence current and the negative-sequence fault voltage.Their relational expression is where: All the parameters are expressed by the per-unit value.P g2 and Q g2 represent the double-frequency active and reactive power respectively; u + gd and u + gq represent the d-axis and q-axis components of the positive-sequence voltage respectively; u − gd and u − gq represent the d-axis and q-axis components of the negative-sequence voltage respectively; i + gd and i + gq represent the d-axis and q-axis components of the positive-sequence current respectively; i − gd and i − gq represent the d-axis and q-axis components of negative-sequence current respectively, whose value is actually 0 due to the control strategy of the negative-sequence fundamental-frequency current restraint.
Affected by the double-frequency active power, the double-frequency voltage fluctuation of the DC bus is generated, which leads to the double-frequency d-axis current through the PI controller link in the outer voltage loop, and it can be deduced from Equation (2).Meanwhile, the q-axis current is not affected by the above process, so the double-frequency q-axis current is still 0.Then, by changing the d,q-axis coordinate system to abc coordinate system, the double-frequency d,q-axis current are transformed into positive-sequence triple-frequency current and negative-sequence fundamental-frequency current in the three-phase current, but the negative-sequence fundamental-frequency current will be restrained [21].The whole generation mechanism is shown in Figure 5.It can be seen from Equations ( 17) and ( 18) that when the characteristic equation has two conjugate complex roots, the fault current of the PV power contains one steady-state fundamental frequency component and two kinds of free non-fundamental frequency AC components, without decaying DC component and free fundamental frequency components.Among them, the two free non-baseband AC components possess the same initial values and decay time constant, but with different frequency and phase.The superposition of the two AC components will be a decaying AC component at a fixed frequency.At this time, the d-axis current and the phase current envelope of PV power will first increase and then decay oscillatorily during the fault, which is significantly different from the fault characteristics of traditional synchronous motor.

Asymmetric Fault Condition
When the asymmetrical fault occurs, a balanced (no negative-sequence component) output current control strategy is generally used in the inverter of PV power [21], which causes that only the positive-sequence current is generated by PV power.The double-frequency power will be generated due to the existence of the positive-sequence current and the negative-sequence fault voltage.Their relational expression is where: All the parameters are expressed by the per-unit value.q-axis components of the negative-sequence voltage respectively; gd i + and gq i + represent the daxis and q-axis components of the positive-sequence current respectively; gd i − and gq i − represent the d-axis and q-axis components of negative-sequence current respectively, whose value is actually 0 due to the control strategy of the negative-sequence fundamental-frequency current restraint.
Affected by the double-frequency active power, the double-frequency voltage fluctuation of the DC bus is generated, which leads to the double-frequency d-axis current through the PI controller link in the outer voltage loop, and it can be deduced from Equation (2).Meanwhile, the q-axis current is not affected by the above process, so the double-frequency q-axis current is still 0.Then, by changing the d,q-axis coordinate system to abc coordinate system, the double-frequency d,q-axis current are transformed into positive-sequence triple-frequency current and negative-sequence fundamental-frequency current in the three-phase current, but the negative-sequence fundamentalfrequency current will be restrained [21].The whole generation mechanism is shown in Figure 5. * It can be seen from Figure 5 that the generated double-frequency power only affects the triple-frequency phase current, which has no effect on the positive-sequence fundamental-frequency phase current, so the method for solving the d,q-axis positive-sequence current is the same as the symmetrical fault's.It can be known from Equations ( 14) and ( 17) that the d-axis positive-sequence steady-state current is P 0 u + gd , q-axis positive-sequence steady-state current is i * gq , and the negative-sequence voltage can also directed to the negative sequence d-axis, which means u − gq =0.Then, based on Equation ( 19), the steady-state double-frequency active power can be solved as where: A 4 = ( Furthermore, based on Equation ( 4), the steady-state DC bus double frequency voltage ∆u dc2 can be solved as Then based on Equation ( 2), the steady-state d-axis double-frequency current can be solved as where: A 5 = ( Since the double-frequency q-axis current (i gq2 ) is 0, the triple-frequency current in abc coordinate system can be solved as

Influences Analysis of Unloading Circuit on Fault Current Characteristics
When the voltage on PV power parallel point is seriously sagged, the DC bus voltage will rise to the limit value within a short time after the fault, triggering the DC unloading circuit startup.However, the output active current of PV power may reach the limit value earlier than the DC unloading circuit startup.Because the time of the DC bus voltage off-limit depends on the speed at which the bus capacitor is charged, and the bus capacitor charging is a physical process with large bus capacitance, the process generally takes several hundred milliseconds or more.The output active current has a fast tracking of its instruction value in milliseconds, and its limit value becomes lower due to the reactive power support requirement of PV power, which can be even lower than the normal running current with the entire over-limit process taking less than tens of milliseconds.After the limit is exceeded, the output active current of PV power will remain at the limit value, namely, the steady state has been reached.Therefore, the startup of the DC unloading circuit actually has no effect on the fault transient characteristics of PV power.This will be verified by subsequent simulation.If a mis-trip of the inverter unloading circuit protection occurs, although the DC bus voltage will continue to rise during the fault period, the output current of the PV power will also reach the steady-state limit after the transient process, which can also be analyzed by the theoretical result developed in this paper.When the output current of PV power reaches the steady-state limit, its characteristics are independent of whether the unloading circuit protection operates or not.

Steady-State Fault Mathematical Model
Currently, the relay protection is mainly based on the fundamental frequency component of the short-circuit current, in which the steady-state fundamental frequency current dominates.The steady-state fundamental frequency current of PV power will be analyzed in the following two cases where the current does not reach the limit value (non-severe fault) and reaches the limit value (severe fault) respectively.
(1) The current does not reach the limit value Based on the Equations ( 14) and (18) in the fault current calculation model, and the control strategy that the output d-axis current of PV power is oriented to the voltage on the parallel point [7], namely, u gd = U T , the d-axis and q-axis steady-state value of the fault current and the phase current steady state value can be solved as u gd > 0.9 1.5(0.9− u gd ) 0.2 ≤ u gd ≤ 0.9 (2) The current reaches the limit value At this time, the d-axis value of the fault current will be affected by the limited amplitude.Based on Equation (3), the d-axis and q-axis steady-state value and the phase current steady-state value can be solved as 1.5(0.9− u gd ) 0.2 ≤ u gd ≤ 0.9 It can be seen from the above analytical expression that the amplitude and phase of the fundamental frequency steady-state current of PV power mainly depend on the depth of voltage sag and the load level before the fault.A shallower voltage sag and lighter load results in a smaller amplitude of fundamental frequency steady-state current, while a deeper voltage sag and heavier load leads to a larger amplitude of fundamental frequency steady-state current.The phase angle of the fundamental frequency steady-state current exhibits a large fluctuation range (0 • to 90 • variation).The lighter the load, the deeper the voltage sag after the fault, the larger the phase angle (up to 90 • ); the smaller the voltage sag, and the larger the active output before the fault, the lower the phase angle of the fundamental wave (the minimum value is 0 • ).The analytical expression also shows that in the short-circuit current calculation, when the current does not reach the limit value during the fault, PV power can be regarded as a voltage-controlled current source model with both amplitude and phase controlled.When the current reaches the limit value, it can be regarded as a voltage-controlled current source model with only phase-controlled in the short-circuit calculation.

Simulation and Experiment Verification of PV Power Fault Characteristics
In the third section, the main equations of the theoretical analysis results are Equations ( 13), ( 16), ( 21); ( 14), ( 17), (22); and (15), ( 18), (23), which respectively corresponds to the calculation expressions of the DC bus voltage fault component, d,q-axis current components in the d,q-axis coordinate system, and the three-phase short-circuit current in the abc coordinate system.In this section, to verify the correctness of the above theoretical research about PV power fault characteristics, a digital simulation and LVRT experiment of PV power are carried out, and then the simulation results, experimental results and theoretical calculation results corresponding to the electric variables solved by the above Equations ( 13)-( 18), ( 21)-( 23) are analyzed and compared.See below for details.

Digital Simulation Verification
In this paper, a system model with PV power is built based on the PSCAD/EMTDC simulation platform (4.5.0.0,Manitoba HVDC Research Centre, Manitoba, Canada) in order to verify the correctness of the above theoretical analysis, as shown in Figure 6.Among them, the rated power of PV array is 0.6 MW, the actual input power is 0.55 MW, the rated voltage on the AC side is 0.69 kV, the rated voltage of the DC bus is 1000 V, the output current limit is 1.2 p.u., and the DC bus voltage limit is 1.1 p.u., DC bus capacitance is 8 mF, unloading circuit resistance is 15 Ω [17], the filter resistance is 0.5 mΩ, and filter inductance is 0.011 mH.Lines AB and BC are 2 km and 1.6 km long respectively.The fault occurred at 2 seconds.
Energies 2018, 11, x FOR PEER REVIEW 10 of 21 In the third section, the main equations of the theoretical analysis results are Equations ( 13), ( 16), ( 21); ( 14), ( 17), (22); and ( 15), ( 18), (23), which respectively corresponds to the calculation expressions of the DC bus voltage fault component, d,q-axis current components in the d,q-axis coordinate system, and the three-phase short-circuit current in the abc coordinate system.In this section, to verify the correctness of the above theoretical research about PV power fault characteristics, a digital simulation and LVRT experiment of PV power are carried out, and then the simulation results, experimental results and theoretical calculation results corresponding to the electric variables solved by the above Equations ( 13)-( 18), ( 21)-( 23) are analyzed and compared.See below for details.

Digital Simulation Verification
In this paper, a system model with PV power is built based on the PSCAD/EMTDC simulation platform (4.5.0.0,Manitoba HVDC Research Centre, Manitoba, Canada) in order to verify the correctness of the above theoretical analysis, as shown in Figure 6.Among them, the rated power of PV array is 0.6 MW, the actual input power is 0.55 MW, the rated voltage on the AC side is 0.69 kV, the rated voltage of the DC bus is 1000 V, the output current limit is 1.2 p.u., and the DC bus voltage limit is 1.1 p.u., DC bus capacitance is 8 mF, unloading circuit resistance is 15 Ω [17], the filter resistance is 0.5 mΩ, and filter inductance is 0.011 mH.Lines AB and BC are 2 km and 1.6 km long respectively.The fault occurred at 2 seconds.It can be seen from Equation ( 12) that the analytical solution form of the fault current is related to the PI adjustment parameter, the DC capacitance value and so on.In the actual simulation, the two parameter sets which respectively are kp = 3, ki = 50 and kp = 3, ki = 200 are selected as PI controller parameters for the verification.Among them, the former set represents the case where two different real roots exist in the Formula (12), and the latter set represents the case where two conjugate complex roots exist in the Formula (12).At the same time, the fault characteristics of PV power under the two states where DC unloading circuit starts or not are simulated respectively.

DC Unloading Circuit Does Not Start
First, the simulation where the voltage on the grid parallel point sags to 85% under symmetrical fault is carried out as an example.The waveforms of the three-phase voltage and d,q-axis voltage on the PV power side are shown in Figure 7.In this condition, the unloading circuit does not start.When kp = 3, ki = 50, the theoretical analysis shows that there are two different real roots in Equation (12).The waveforms of DC bus voltage fault component and phase-A output current are shown in Figure 8. Figure 9 shows the waveforms of output d,q-axis current.Among them, the dotted line (subscript th) represents the theoretical calculation waveform, the solid line (subscript sim) represents the simulated waveform.It can be seen from Equation ( 12) that the analytical solution form of the fault current is related to the PI adjustment parameter, the DC capacitance value and so on.In the actual simulation, the two parameter sets which respectively are k p = 3, k i = 50 and k p = 3, k i = 200 are selected as PI controller parameters for the verification.Among them, the former set represents the case where two different real roots exist in the Formula (12), and the latter set represents the case where two conjugate complex roots exist in the Formula (12).At the same time, the fault characteristics of PV power under the two states where DC unloading circuit starts or not are simulated respectively.

DC Unloading Circuit Does Not Start
First, the simulation where the voltage on the grid parallel point sags to 85% under symmetrical fault is carried out as an example.The waveforms of the three-phase voltage and d,q-axis voltage on the PV power side are shown in Figure 7.In this condition, the unloading circuit does not start.When k p = 3, k i = 50, the theoretical analysis shows that there are two different real roots in Equation (12).The waveforms of DC bus voltage fault component and phase-A output current are shown in Figure 8. Figure 9 shows the waveforms of output d,q-axis current.Among them, the dotted line (subscript th) represents the theoretical calculation waveform, the solid line (subscript sim) represents the simulated waveform.It can be seen from Figure 9 that during the fault transient process, the output d-axis current rises first rapidly and then gradually decays to a steady state, and no oscillation occurs during the rise and decay.This indicates that the transient component only contains the attenuated DC component, which is consistent with the theoretical Expression (14).The output q-axis current quickly rises to the instruction value of 0.075 p.u. in a short time after the fault occurs, consistent with the foregoing analysis.It can be seen from Figure 8 that the DC bus voltage rises firstly in a short time because the input active power of the inverter is greater than the output active power.As the output d-axis active current of the inverter rises, the output power of the inverter becomes greater than the input power of the photovoltaic array, and the DC bus voltage gradually falls back to a stable value under the control of the voltage outer loop.The theoretical curve agrees well with simulation curve during the whole process, which verifies the correctness of the theoretical analytical model.
When kp = 3, ki = 200, there will be two conjugate complex roots in Equation ( 12).The waveforms of DC bus voltage fault component and phase-A output current are shown in Figure 10.It can be seen from Figure 9 that during the fault transient process, the output d-axis current rises first rapidly and then gradually decays to a steady state, and no oscillation occurs during the rise and decay.This indicates that the transient component only contains the attenuated DC component, which is consistent with the theoretical Expression (14).The output q-axis current quickly rises to the instruction value of 0.075 p.u. in a short time after the fault occurs, consistent with the foregoing analysis.It can be seen from Figure 8 that the DC bus voltage rises firstly in a short time because the input active power of the inverter is greater than the output active power.As the output d-axis active current of the inverter rises, the output power of the inverter becomes greater than the input power of the photovoltaic array, and the DC bus voltage gradually falls back to a stable value under the control of the voltage outer loop.The theoretical curve agrees well with simulation curve during the whole process, which verifies the correctness of the theoretical analytical model.
When kp = 3, ki = 200, there will be two conjugate complex roots in Equation ( 12).The waveforms of DC bus voltage fault component and phase-A output current are shown in Figure 10.Figures 11 shows  It can be seen from Figure 9 that during the fault transient process, the output d-axis current rises first rapidly and then gradually decays to a steady state, and no oscillation occurs during the rise and decay.This indicates that the transient component only contains the attenuated DC component, which is consistent with the theoretical Expression (14).The output q-axis current quickly rises to the instruction value of 0.075 p.u. in a short time after the fault occurs, consistent with the foregoing analysis.It can be seen from Figure 8 that the DC bus voltage rises firstly in a short time because the input active power of the inverter is greater than the output active power.As the output d-axis active current of the inverter rises, the output power of the inverter becomes greater than the input power of the photovoltaic array, and the DC bus voltage gradually falls back to a stable value under the control of the voltage outer loop.The theoretical curve agrees well with simulation curve during the whole process, which verifies the correctness of the theoretical analytical model.
When k p = 3, k i = 200, there will be two conjugate complex roots in Equation ( 12).The waveforms of DC bus voltage fault component and phase-A output current are shown in Figure 10. Figure 11 shows the waveform of d,q-axis output current.Among them, the dotted line (subscript th) represents the theoretical calculation waveform, the solid line (subscript sim) represents the simulated waveform.
It can be seen from Figure 10 that in this case, the output d-axis current oscillates during the decay process, indicating that the transient component contains the decaying AC component, which is consistent with the theoretical Equation (18).It can be seen from Figure 11 that during the process when the DC bus voltage falls back to the stable value, the oscillation condition also occurs due to the interaction of the DC bus voltage with the output current.The theoretical curve and simulation curve of the whole process are also basically consistent, which verifies the correctness of the theoretical analytical model.the waveform of d,q-axis output current.Among them, the dotted line (subscript th) represents the theoretical calculation waveform, the solid line (subscript sim) represents the simulated waveform.It can be seen from Figure 10 that in this case, the output d-axis current oscillates during the decay process, indicating that the transient component contains the decaying AC component, which is consistent with the theoretical Equation (18).It can be seen from Figure 11 that during the process when the DC bus voltage falls back to the stable value, the oscillation condition also occurs due to the interaction of the DC bus voltage with the output current.The theoretical curve and simulation curve of the whole process are also basically consistent, which verifies the correctness of the theoretical analytical model.

DC Unloading Circuit Starts
The simulation where the voltage on the grid parallel point sags to 70% under symmetrical fault is carried out as an example, and the unloading circuit starts after the fault.The waveforms of the three-phase voltage on the PV power side and the output A phase current are shown in Figure 12.When kp = 3, ki = 50, the waveform of the output d,q-axis current is shown in Figure 13.Among them, the dotted line (subscript th) represents the theoretical calculation waveform, the solid line (subscript sim) represents the simulated waveform.It can be seen from Figure 10 that in this case, the output d-axis current oscillates during the decay process, indicating that the transient component contains the decaying AC component, which is consistent with the theoretical Equation (18).It can be seen from Figure 11 that during the process when the DC bus voltage falls back to the stable value, the oscillation condition also occurs due to the interaction of the DC bus voltage with the output current.The theoretical curve and simulation curve of the whole process are also basically consistent, which verifies the correctness of the theoretical analytical model.

DC Unloading Circuit Starts
The simulation where the voltage on the grid parallel point sags to 70% under symmetrical fault is carried out as an example, and the unloading circuit starts after the fault.The waveforms of the three-phase voltage on the PV power side and the output A phase current are shown in Figure 12.When kp = 3, ki = 50, the waveform of the output d,q-axis current is shown in Figure 13.Among them, the dotted line (subscript th) represents the theoretical calculation waveform, the solid line (subscript sim) represents the simulated waveform.

DC Unloading Circuit Starts
The simulation where the voltage on the grid parallel point sags to 70% under symmetrical fault is carried out as an example, and the unloading circuit starts after the fault.The waveforms of the three-phase voltage on the PV power side and the output A phase current are shown in Figure 12.When k p = 3, k i = 50, the waveform of the output d,q-axis current is shown in Figure 13.Among them, the dotted line (subscript th) represents the theoretical calculation waveform, the solid line (subscript sim) represents the simulated waveform.It can be seen from Figure 10 that in this case, the output d-axis current oscillates during the decay process, indicating that the transient component contains the decaying AC component, which is consistent with the theoretical Equation ( 18).It can be seen from Figure 11 that during the process when the DC bus voltage falls back to the stable value, the oscillation condition also occurs due to the interaction of the DC bus voltage with the output current.The theoretical curve and simulation curve of the whole process are also basically consistent, which verifies the correctness of the theoretical analytical model.

DC Unloading Circuit Starts
The simulation where the voltage on the grid parallel point sags to 70% under symmetrical fault is carried out as an example, and the unloading circuit starts after the fault.The waveforms of the three-phase voltage on the PV power side and the output A phase current are shown in Figure 12.When kp = 3, ki = 50, the waveform of the output d,q-axis current is shown in Figure 13.Among them, the dotted line (subscript th) represents the theoretical calculation waveform, the solid line (subscript sim) represents the simulated waveform.It can be seen from Figure 13 that when the voltage on the parallel point sags deeply, the output d-axis current remains stable after rising to 1.16 p.u. (phase current rises to 1.2 p.u.) due to the output current limit (1.2 p.u.), and the theoretical curve is consistent with the simulation curve, indicating that the theoretical method is still suitable for the analysis of its fault process when the current limit is applied.The output q-axis current quickly rises to the instruction value of 0.28 p.u. in a short time after the fault occurs, which is the same as the theoretical calculation.It can be seen from Figure 12 that the output phase current of PV power rises to the limit value of 1.2 p.u. and then enters a steadystate, and the theoretical curve also agrees well with the simulation curve.

Asymmetric Fault
The simulation where the positive-sequence voltage on the parallel point sags to 85% and the negative-sequence voltage rises to 0.15 p.u. under AB phase-to-phase fault is carried out as an example without the start of the unloading circuit.Among them, the negative sequence voltage is also directed to the d-axis.The waveforms of the three-phase voltage and positive,negative sequence d,q-axis voltage on the PV power side are shown in Figure 14.When kp = 3, ki = 50, the waveforms of output d-axis current and the A-phase output current are shown in Figure 15.It can be seen from Figure 13 that when the voltage on the parallel point sags deeply, the output d-axis current remains stable after rising to 1.16 p.u. (phase current rises to 1.2 p.u.) due to the output current limit (1.2 p.u.), and the theoretical curve is consistent with the simulation curve, indicating that the theoretical method is still suitable for the analysis of its fault process when the current limit is applied.The output q-axis current quickly rises to the instruction value of 0.28 p.u. in a short time after the fault occurs, which is the same as the theoretical calculation.It can be seen from Figure 12 that the output phase current of PV power rises to the limit value of 1.2 p.u. and then enters a steady-state, and the theoretical curve also agrees well with the simulation curve.

Asymmetric Fault
The simulation where the positive-sequence voltage on the parallel point sags to 85% and the negative-sequence voltage rises to 0.15 p.u. under AB phase-to-phase fault is carried out as an example without the start of the unloading circuit.Among them, the negative sequence voltage is also directed to the d-axis.The waveforms of the three-phase voltage and positive, negative sequence d,q-axis voltage on the PV power side are shown in Figure 14.When k p = 3, k i = 50, the waveforms of output d-axis current and the A-phase output current are shown in Figure 15.
It can be seen from Figure 15a that the d-axis DC current rises to 1.07 p.u. after the fault, and the d-axis steady-state current contains the frequency-doubled AC component with an amplitude of about 0.04 p.u., which is much less than the DC component.In Figure 15b, due to the few triple frequency components in the phase steady current, the phase steady current is still basically a 50 Hz sine wave.In Figure 15, the theoretical curve agrees well with simulation curve during the steady-state period, which verifies the correctness of the theoretical analytical model under the asymmetric fault.It can be seen from Figure 13 that when the voltage on the parallel point sags deeply, the output d-axis current remains stable after rising to 1.16 p.u. (phase current rises to 1.2 p.u.) due to the output current limit (1.2 p.u.), and the theoretical curve is consistent with the simulation curve, indicating that the theoretical method is still suitable for the analysis of its fault process when the current limit is applied.The output q-axis current quickly rises to the instruction value of 0.28 p.u. in a short time after the fault occurs, which is the same as the theoretical calculation.It can be seen from Figure 12 that the output phase current of PV power rises to the limit value of 1.2 p.u. and then enters a steadystate, and the theoretical curve also agrees well with the simulation curve.

Asymmetric Fault
The simulation where the positive-sequence voltage on the parallel point sags to 85% and the negative-sequence voltage rises to 0.15 p.u. under AB phase-to-phase fault is carried out as an example without the start of the unloading circuit.Among them, the negative sequence voltage is also directed to the d-axis.The waveforms of the three-phase voltage and positive,negative sequence d,q-axis voltage on the PV power side are shown in Figure 14.When kp = 3, ki = 50, the waveforms of output d-axis current and the A-phase output current are shown in Figure 15.

LVRT Experiment Verification
In this section, the LVRT experiment using a Huawei SUN2000-(33KTL-40KTL) PV inverter is carried out in cooperation with Huawei Technologies Co., Ltd.(Shenzhen, China), and experimental data is analyzed and mapped by using CAAP2008X fault wave-recorder software.The internal structure of PV inverter is shown in Figure 16, and its basic electrical parameters are shown in Table 1.It can be seen from Figure 15a that the d-axis DC current rises to 1.07 p.u. after the fault, and the d-axis steady-state current contains the frequency-doubled AC component with an amplitude of about 0.04 p.u., which is much less than the DC component.In Figure 15b, due to the few triple frequency components in the phase steady current, the phase steady current is still basically a 50 Hz sine wave.In Figure 15, the theoretical curve agrees well with simulation curve during the steadystate period, which verifies the correctness of the theoretical analytical model under the asymmetric fault.

LVRT Experiment Verification
In this section, the LVRT experiment using a Huawei SUN2000-(33KTL-40KTL) PV inverter is carried out in cooperation with Huawei Technologies Co., Ltd.(Shenzhen, China), and experimental data is analyzed and mapped by using CAAP2008X fault wave-recorder software.The internal structure of PV inverter is shown in Figure 16, and its basic electrical parameters are shown in Table 1.

8895mH
In Table 1, the sampling frequency 3.2 kHz is the sampling frequency of the control system sampling the electrical signal.In the experiment system, the switching frequency is the same as the sampling frequency.
When a short circuit fault happens in the power system, the dynamic reactive current IT injected into the grid by the Huawei SUN2000 PV inverter should meet the following requirements: 0 0.9 1.5(0.9 ) 0.2 0.9 1.05 0.2 In the LVRT experiment of PV inverter, the inverter outlet voltage is the rated value under the normal circumstance.Assuming that the AC phases earth short circuit happens at 0.625 s  In Table 1, the sampling frequency 3.2 kHz is the sampling frequency of the control system sampling the electrical signal.In the experiment system, the switching frequency is the same as the sampling frequency.
When a short circuit fault happens in the power system, the dynamic reactive current I T injected into the grid by the Huawei SUN2000 PV inverter should meet the following requirements: In the LVRT experiment of PV inverter, the inverter outlet voltage is the rated value under the normal circumstance.Assuming that the AC phases earth short circuit happens at 0.625 s (corresponding to time 0 in the fault wave-recorder graph), the positive sequence voltage at the inverter outlet drops to 0.88 p.u., and the experimental wave-recorder graph is shown in Figure 17a.Among them, the N11M, N22M and N33M channels respectively represent the A phase, B phase and C phase voltage at the inverter outlet, whose units are kV.The CRT1M, CRT2M, and CRT3M channels respectively represent the inverter A phase, B phase and C phase current, whose units are kA.Pac7 channel represents the active output power of the inverter monitored through a delay link, whose unit is MW.The FREC channel represents the output frequency of the inverter, whose unit is Hz.Then, the ABC three-phase current is put into one channel in the wave-recorder software, and the waveform of the wave-recorder is shown in Figure 17b.It can be seen from Figure 17b that the three-phase output current generated by Huawei PV inverter in the case of the asymmetric fault is still symmetrical, indicating that its control strategy under the asymmetric fault is also balanced output current (no negative sequence current) control, which is consistent with the assumption of the aforementioned theoretical analysis.
In this paper, the relevant experimental data is obtained by using the .cfgprefix file and the .datadata file in the experimental wave-recorder file, and the data processing is performed on the MATLAB software platform, generating the waves of d-axis output current and q-axis output current which respectively represent output active power and reactive power.Meanwhile, a simulation model is built again on PSCAD/EMTDC software platform, referring to the parameters of Huawei SUN2000 inverter, and its fault time and fault condition are set the same as the experiment, so the relevant simulation waveforms are obtained.Then based on the theoretical analysis in the third section, the theoretical analytical solution and theoretical waveform of the fault current are calculated.Finally, the experimental waveforms, simulation waveforms and theoretical waveforms of the three kinds of current (d-axis current, q-axis current and phase A current) are shown in Figures 18 and 19.Among them, the dotted line (subscript th) represents the theoretical calculation waveform, the solid line (subscript sim) represents the simulated waveform, and the solid line (subscript exp) represents the experimental waveform.It can be seen from Figure 17b that the three-phase output current generated by Huawei PV inverter in the case of the asymmetric fault is still symmetrical, indicating that its control strategy under the asymmetric fault is also balanced output current (no negative sequence current) control, which is consistent with the assumption of the aforementioned theoretical analysis.
In this paper, the relevant experimental data is obtained by using the .cfgprefix file and the .datadata file in the experimental wave-recorder file, and the data processing is performed on the MATLAB software platform, generating the waves of d-axis output current and q-axis output current which respectively represent output active power and reactive power.Meanwhile, a simulation model is built again on PSCAD/EMTDC software platform, referring to the parameters of Huawei SUN2000 inverter, and its fault time and fault condition are set the same as the experiment, so the relevant simulation waveforms are obtained.Then based on the theoretical analysis in the third section, the theoretical analytical solution and theoretical waveform of the fault current are calculated.Finally, the experimental waveforms, simulation waveforms and theoretical waveforms of the three kinds of current (d-axis current, q-axis current and phase A current) are shown in Figures 18 and 19.Among them, the dotted line (subscript th) represents the theoretical calculation waveform, the solid line (subscript sim) represents the simulated waveform, and the solid line (subscript exp) represents the experimental waveform.
It can be seen from Figure 18 that the d-axis output current generated by Huawei SUN2000 PV inverter rises rapidly first, then gradually oscillates to a stable state in the case of an asymmetrical fault, and the q-axis output current rises to the instruction value quickly within a short time after the fault occurs.In Figure 19, the A-phase output current generated by Huawei PV inverter also shows a trend of increasing gradually and then decreasing, which is obviously different from the fault characteristics of the conventional synchronous motor.
During the whole fault process, the experimental waveforms of the three kinds of current (d-axis, q-axis, and A-phase output current) agree well with the simulation waveform and the theoretical calculation waveform, which further verifies the correctness of the theoretical analytical model.section, the theoretical analytical solution and theoretical waveform of the fault current are calculated.Finally, the experimental waveforms, simulation waveforms and theoretical waveforms of the three kinds of current (d-axis current, q-axis current and phase A current) are shown in Figures 18 and 19.Among them, the dotted line (subscript th) represents the theoretical calculation waveform, the solid line (subscript sim) represents the simulated waveform, and the solid line (subscript exp) represents the experimental waveform.It can be seen from Figure 18 that the d-axis output current generated by Huawei SUN2000 PV inverter rises rapidly first, then gradually oscillates to a stable state in the case of an asymmetrical fault, and the q-axis output current rises to the instruction value quickly within a short time after the fault occurs.In Figure 19, the A-phase output current generated by Huawei PV inverter also shows a trend of increasing gradually and then decreasing, which is obviously different from the fault characteristics of the conventional synchronous motor.
During the whole fault process, the experimental waveforms of the three kinds of current (d-axis, qaxis, and A-phase output current) agree well with the simulation waveform and the theoretical calculation waveform, which further verifies the correctness of the theoretical analytical model.

Analysis of Factors Affecting PV Power Characteristics
It can be seen from the above analysis that the fault characteristics of PV power are related to the PI controller parameters, the fault voltage sag depth, and the PV power load level under the given DC bus capacitance and rated voltage.The following part will analyze the impact of each parameter based on a single variable method.

PI Controller Parameters
The following selects ten fault conditions with 10 different PI controller parameters (Reference [5][6][7][8][9][10][11][12][13]), and with the remaining influencing factors unchanged.Among them, the root mean square (RMS) of the rated line voltage on the parallel point is 690 V, the RMS of the line voltage on the parallel point after the fault is 317 V (0.46 p.u.), the rated power of the PV array is 0.6 MW, the input power is 0.15 MW (0.25 p.u.), and the rated voltage of the DC bus is 1000 V, DC bus capacitance is 8000 uF.The calculation results of the fault characteristic index are shown in Table 2.

Analysis of Factors Affecting PV Power Characteristics
It can be seen from the above analysis that the fault characteristics of PV power are related to the PI controller parameters, the fault voltage sag depth, and the PV power load level under the given DC bus capacitance and rated voltage.The following part will analyze the impact of each parameter based on a single variable method.

PI Controller Parameters
The following selects ten fault conditions with 10 different PI controller parameters (Reference [5][6][7][8][9][10][11][12][13]), and with the remaining influencing factors unchanged.Among them, the root mean square (RMS) of the rated line voltage on the parallel point is 690 V, the RMS of the line voltage on the parallel point after the fault is 317 V (0.46 p.u.), the rated power of the PV array is 0.6 MW, the input power is 0.15 MW (0.25 p.u.), and the rated voltage of the DC bus is 1000 V, DC bus capacitance is 8000 uF.The calculation results of the fault characteristic index are shown in Table 2.
In the above table, the free component frequency respectively is the fundamental frequency and the non-fundamental frequencies under the two fault current state solutions (Section 3.1).The decay time constant is non-single and single under the two fault current state solutions, and the transient duration is mainly determined by the longer decay time constant.
It can be seen from Table 2 that as for the free component frequency, only when the proportional adjustment parameter k p takes a small value or the integral adjustment parameter Ki takes a large value, the free component frequency will be far from the fundamental frequency.When the k p and k i parameters are within a certain range, the free component frequency will be either the fundamental frequency or close to the fundamental frequency.As for the decay time constant, when the free component frequency is not the fundamental frequency, with the increase of the proportional adjustment parameter k p , the free component attenuation accelerates and the transient process shortens, and the integral adjustment parameter k i has little effect on the decay time constant.When the component is the fundamental frequency, considering that the transient duration is mainly determined by the free component of the slow decay rate, it can be found that as the proportional adjustment parameter k p increases, the transient duration becomes longer, and as the integral adjustment parameter k i increases, the transient duration becomes shorter.
As for the free component peak, when the free component frequency is the fundamental frequency, the free fundamental frequency component of PV power will increase, different from the free fundamental frequency component of the conventional synchronous motor which will decay in this case.This is because among the two free fundamental frequency components, the free component with larger amplitude possesses a phase opposite to the steady-state fundamental frequency component, and the free component with smaller amplitude has the same phase as the steady-state component.Furthermore, the free component peak gradually decreases with the increase of the proportional adjustment parameter k p , but steadily increases with the increase of the integral adjustment parameter k i .On the contrary, when the free component frequency is not the fundamental frequency, the free component peak gradually increases with the increase of the proportional adjustment parameter k p , but gradually decreases with the increase of the integral adjustment parameter k i .The PI regulation parameters show no effect on the steady state value of PV power fault current.

Fault Voltage Sag Depth
The following selects six fault conditions with six different fault voltage sag depths, and with the remaining influencing factors unchanged.Among them, PI controller parameters k p = 3, k i = 200, PV array rated power is 0.6 MW, input power is 0.15 MW (0.25 p.u.), DC bus rated voltage is 1000 V, Energies 2019, 12, 316 18 of 21 DC bus capacitance is 8000 uF.The calculation results of PV power fault characteristic index are shown in Table 3.It can be seen from Table 3 that when the free component frequency is not fundamental frequency, the deeper the voltage sags, the closer the free component frequency is to the fundamental frequency, and the greater the decay time constant.When the fault current does not reach the limit value, a larger decay time constant means a longer transient time.However, when the fault current reaches the limit value, the transient duration depends mainly on the speed at which the fault current rises to the limit value.The transient duration has little relationship with the decay time constant and is significantly shorter than that in the case where fault current does not reach the limit value.
As for the free component peak, as the fault voltage sags deeper, the greater the free component amplitude, and the greater the fault current steady state value until the limit value is reached.

Power Load Level
The following selects six fault conditions with six different input power of PV arrays, and with the remaining influencing factors unchanged.Among them, the RMS of the rated line voltage on the parallel point is 690 V (1.0 p.u.), the RMS of the voltage line voltage on parallel point after fault is 317 V (0.46 pu), the PI controller parameter k p = 2, k i = 200, the rated voltage of the DC bus is 1000 V, and the DC bus capacitor is 8000 uF.The calculation results of PV power failure characteristic index are shown in Table 4.It can be seen from Table 4 that the free component frequency and the decay time constant are independent of the PV power load level.However, with the increase of the PV power load, the free component peak gradually increases in proportion to the load increase, and the steady state value of the fault current continuously increases until the limit value is reached.

Conclusions
In order to comprehensively analyze the fault characteristic of PV power and its influencing factors, this paper proposes an analytic method and calculation model for the fault current of PV power by taking account of the DC bus voltage fluctuation during fault.The correctness of the method is verified by the simulation and experiment results, and the main factors affecting the fault current characteristics are analyzed, and the conclusions obtained are as follows: (1) The structural parameters and control parameters of PV power will affect the fault transient characteristics.The fault current may contain the free component of fundamental frequency or free component of non-fundamental frequency under different parameter design, and their fault characteristics are quite different.When there are two different real roots in the characteristic equation, the fault current transient component of PV power is composed of two kinds of attenuated fundamental frequency components, and their initial value and decay time constant are different, but their phases are opposite.When there are two conjugate complex roots in the characteristic equation, the fault current transient component is composed of two kinds of attenuated free non-fundamental components with same initial value and the decay time constant but different frequency and phase.
(2) As the fault voltage sags deeper and the PV power load increases greater, the larger the peak value of the fault current, the more severe the transient fluctuation.The PI controller parameter largely affects the frequency of the free component.When the proportional controller parameter k p takes a small value or the integral controller parameter k i takes a large value, the free component frequency will be far from the fundamental frequency.When the PI controller parameter refers to the value in a certain range in Table 1, the free component frequency will be the fundamental frequency, and the peak of the free component will be small, with the whole transient process approaching a smooth state.
(3) When the fault voltage sags deeply, the start time of the DC unloading circuit will be later than the time when the output current reaches the limit value.Therefore, if the DC unloading circuit starts, it means that the output current has already reached the limit value.As a result, the DC unloading circuit and current limiting only affect the steady state of the fault current, but show no effect on the transient process.
(4) The amplitude and phase of the steady-state fundamental-frequency component of PV power mainly depend on the depth of voltage sag and the load level before the fault.The deeper the voltage sag, the greater the load, then the larger the fundamental-frequency component amplitude.The phase angle of fundamental-frequency component presents a large fluctuation range.The smaller the load, the deeper the voltage sag after the fault, then the greater the phase angle.
(5) In the calculation of steady-state short-circuit current, the inverter-type power can be equivalent to a voltage-controlled current source.At the same time, when the current does not reach the limit value during the fault, the inverter-type power can be regarded as a voltage-controlled current source model whose amplitude and phase are controlled in the short-circuit calculation.When the current reaches the limit value, the inverter-type power can be regarded as a voltage-controlled current source model whose phase is controlled in the short-circuit calculation.
The above conclusions can provide a reference for relay protection performance evaluation, setting calculation and inverter control parameter design.
signal of the unloading circuit is obtained by the DC voltage difference through the PI link and pulse width modulation (PWM) link, which can effectively reduce the fluctuation of the DC side voltage.

Figure 2 .
Figure 2. Control principle of relieving circuit on dc bus side.

Figure 3 .
Figure 3.Control block diagram of inverter of the external d-axis voltage loop.

Figure 2 .
Figure 2. Control principle of relieving circuit on dc bus side.

Energies 2018 ,
11, x FOR PEER REVIEW 4 of 21 signal of the unloading circuit is obtained by the DC voltage difference through the PI link and pulse width modulation (PWM) link, which can effectively reduce the fluctuation of the DC side voltage.

Figure 2 .
Figure 2. Control principle of relieving circuit on dc bus side.

Figure 3 .
Figure 3.Control block diagram of inverter of the external d-axis voltage loop.Figure 3. Control block diagram of inverter of the external d-axis voltage loop.

Figure 3 .
Figure 3.Control block diagram of inverter of the external d-axis voltage loop.Figure 3. Control block diagram of inverter of the external d-axis voltage loop.

Figure 4 .
Figure 4. Control block diagram of inverter of the external q-axis voltage external loop.

Figure 4 .
Figure 4. Control block diagram of inverter of the external q-axis voltage external loop.

Q
represent the double- frequency active and reactive power respectively; gd u + and gq u + represent the d-axis and q-axis components of the positive-sequence voltage respectively; gd u − and gq u − represent the d-axis and

Figure 5 .
Figure 5. Generation mechanism of positive-sequence triple-frequency current.

Figure 6 .
Figure 6.Simulation model of Large power grid including PV power.

Figure 6 .
Figure 6.Simulation model of Large power grid including PV power.
Figures 11 shows

Figure
Figure 8.(a) Waveforms of bus voltage fault component.(b) Waveforms of phase-A output current.

8 .
Figure 8.(a) Waveforms of bus voltage fault component.(b) Waveforms of phase-A output current.

Figure
Figure 9. (a) Waveforms of d-axis output current.(b) Waveforms of q-axis output current.

Figure 11 .
Figure 11.(a) Waveforms of d-axis output current.(b) Waveforms of q-axis output current.

Figure 13 .
Figure 13.(a) Waveforms of d-axis output current.(b) Waveforms of q-axis output current.

Figure 12 .Figure 13 .
Figure 12.(a) Waveforms of three-phase voltage.(b) Waveforms of phase-A output current when unloading circuit starts.

Figure 15 .
Figure 15.(a) Waveform of d-axis output current in phase to phase short circuit fault.(b) Waveform of phase-A current in phase to phase short circuit fault.

Figure 18 .
Figure 18.(a) Waveforms of d-axis output current.(b) Waveforms of q-axis output current.

Figure 17 .
Figure 17.(a) Wave-recorder graph of the low-voltage ride through (LVRT) experiment.(b) Wave-recorder graph of three-phase output current.

Figure 18 .
Figure 18.(a) Waveforms of d-axis output current.(b) Waveforms of q-axis output current.Figure 18.(a) Waveforms of d-axis output current.(b) Waveforms of q-axis output current.

Figure 19 .
Figure 19.Waveforms of phase-A output current.

Table 2 .
Influence of proportional integral (PI) controller parameters.

Table 3 .
Influence of fault voltage sag depth.

Table 4 .
Influence of PV power load.