Sector Subdivision Based SVPWM Strategy of Neutral-Point-Clamped Three-Level Inverter for Current Ripple Reduction

: This paper presents a sector subdivision based space vector pulse width modulation (SVPWM) strategy with reduced current ripple for a three-level inverter. Using the output current ripple theory, closed-form expressions of average current ripple vectors for both continuous and discontinuous switching sequences are derived. Based on the sector and triangle distributions of conventional SVPWM strategy, each triangle is further divided into three small-regions. Then the switching sequence with the lowest magnitude of the average current ripple vector is applied in every small-region, so that the advantages of continuous pulse width modulation (CPWM) and discontinuous pulse width modulation (DPWM) under di ﬀ erent modulation index conditions are combined to reduce the current ripple in the whole modulation range. The output performance of the proposed strategy is compared with the conventional CPWM and DPWM strategy, and experimental results verify that the proposed strategy could reduce the current ripple of three-level inverters e ﬀ ectively.


Introduction
Three-level inverters are possible to generate five-level-step-shaped line to line voltage and three-level-step-shaped phase voltage. So the harmonics of the output voltage and current are reduced compared with conventional two-level inverters. Additionally, the emitter-collector voltage is only one half of that of conventional two-level inverters. Due to the low stress to switching devices, switching loss and switching noise are reduced [1][2][3]. The topology of three-level inverters can be divided into three categories: cascade H-bridge (CHB) [4], flying capacitor (FC) [5], and neutral-point-clamped (NPC) [6]. Among them, NPC three-level inverters are the most widely used in medium-voltage high-power industrial applications, such as traction drive, mine hoister, and wind power generation [7][8][9]. The research of three-level inverter has been focused on output current ripple reduction [10], neutral-point potential fluctuation restraint [8, 11,12], common mode voltage reduction [13], switching loss suppression [14], and low switching frequency operation [15]. With these strategies, basic vectors used to synthesize the reference vector or dwell times of redundant switching states are changed to meet the requirement of a certain aspect of performance. When three-level inverters are applied in medium-voltage high-power motor drives, the output current ripple is increased because of the limitation of the switching frequency. Furthermore, with the increase of current harmonics and torque ripple, the additional loss and noise are introduced in both the inverter and the motor. As a result, how to evaluate and reduce the output current ripple of three-level inverters has been attracting attention from researchers all over the world.
In recent years, various evaluation methods, such as weighted total harmonic distortion (WTHD) [15,16], root-mean-square (RMS) value of stator flux ripple, [17], and magnitude of the average current ripple vector [10,18], are proposed to evaluate the output ripple of the three-level inverter. If WTHD is regarded as the evaluation indicator of the output current ripple, the expression of each harmonic needs to be obtain by using a double-fourier transform of the output voltage. Unfortunately, the computational process is very complicated. And in most cases, it is convenient to compare PWM strategies based on the overall quality of output waveform rather than the individual harmonic produced by them. Thus, the RMS value of stator flux ripple and the magnitude of the average current ripple vector could be adopted to evaluate the output current ripple. Compared with WTHD, the computational burdens are lower.
Based on the above evaluation methods, lots of modulation strategies are presented to reduce the output current ripple of three-level inverters [10,16,18], which can be divided into CPWM strategies and DPWM strategies. In reference [18], the magnitude of the average current ripple vector is used as the indicator, and the dwell times of the two redundant switching states in continuous switching sequences are redistributed to reduce the output current ripple. DPWM methods for three-level inverters are proposed in reference [16], and WTHD of the output voltage for both the CPWM and DPWM strategies are compared with each other. The concept of stator flux ripple is proposed in reference [17], and the closed-form expressions of stator flux ripple for different switching sequences are obtained, and then the output performance of different switching sequences are compared with each other.
According to the above modulation strategies, it can be concluded that the current ripple of CPWM strategies is lower than that of DPWM strategies under a lower modulation index condition, while the conclusion is reversed under a higher modulation index condition. Thus, CPWM and DPWM strategies are both adopted in this paper. The closed-form expressions of the average current ripple vector for both the continuous and discontinuous switching sequences are derived. The sub-regions of different switching sequences are determined on the basis of the minimum value of magnitude of the average current ripple vector. Then a sector subdivision based SVPWM strategy with a reduced current ripple can be obtained.

Analysis of Switching Sequence in Space Vector Modulation Strategies
The topology of the NPC three-level inverter is shown in Figure 1a. Each of three phases (A, B, and C) has three switching states (P, O, and N), so there are 3 3 = 27 switching state combinations for the three-level inverter. According to Park transformation in Equation (1), each combination can be represented by a basic space voltage vector V j , j = 0, 1, 2, . . . , 18, as shown in Figure 1b.
Based on the vector's magnitude, 19 basic vectors can be divided into four categories, which are zero-voltage, small-voltage, medium-voltage and large-voltage. Zero vector V 0 corresponds to three combinations, and each of small vectors V 7~V 12 corresponds to two combinations. Different switching state combinations corresponding to the same voltage vector are defied as redundant switching states in this paper. The space vector hexagon could be symmetrically divided into six sectors Z 1~Z6 , and every sector could be further divided into four triangles 1 to 4 .
The nearest three vectors are usually adopted to synthesize the reference voltage vector V ref in three-level space vector PWM strategies. The dwell time of each vector can be solved by the principle of voltage-second balance. For example, when V ref locates in triangle 3 of sector Z 1 , yields  Figure 2. The conditions that keep the switching loss as low as possible are listed as follows [17]: 1.
The switching exists in at most one phase leg during each state transition.

2.
The total number of switching sequences in each sample period must be less or equal to three.  All the possible switching sequences synthesized the reference voltage vector Vref in triangle ①-④ of sector Z1 are shown in Figure 2. The conditions that keep the switching loss as low as possible are listed as follows [17]: 1. The switching exists in at most one phase leg during each state transition. 2. The total number of switching sequences in each sample period must be less or equal to three. Based on the number of switching in each sample period, the switching sequences can be categorized into continuous switching sequences (Sequence11, 12, 13, 21, 22, 31, and 41) and discontinuous switching sequences (Sequence14, 15, 16, 23, 24, 25, 32, 33, 42, and 43). For discontinuous switching sequences, the switching only appears in two phase legs. Meanwhile for    Based on the number of switching in each sample period, the switching sequences can be categorized into continuous switching sequences (Sequence11, 12, 13, 21, 22, 31, and 41) and discontinuous switching sequences (Sequence14, 15, 16, 23, 24, 25, 32, 33, 42, and 43). For discontinuous switching sequences, the switching only appears in two phase legs. Meanwhile for continuous switching sequences, the switching appears in all the three phase legs.  Based on the number of switching in each sample period, the switching sequences can be categorized into continuous switching sequences (Sequence 11, 12, 13, 21, 22, 31, and 41) and discontinuous switching sequences (Sequence 14, 15, 16, 23, 24, 25, 32, 33, 42, and 43). For discontinuous switching sequences, the switching only appears in two phase legs. Meanwhile for continuous switching sequences, the switching appears in all the three phase legs.
The switching sequences of space vector PWM strategies must be arranged symmetrically on both sides so that the switching sequence in a certain sample period is reversed in the next sample period. For example, if the switching sequence in one sample period is POO→PON→PNN→ONN, the sequence in the next sample period will be ONN→PNN→PON→POO, as shown in Figure 3b. The switching sequences of space vector PWM strategies must be arranged symmetrically on both sides so that the switching sequence in a certain sample period is reversed in the next sample period. For example, if the switching sequence in one sample period is POO→PON→PNN→ONN, the sequence in the next sample period will be ONN→PNN→PON→POO, as shown in Figure 3b.
Different arrangements of the switching sequence will inherently offer different behavior with regard to the performance indicators that can be used to assess the quality of the output waveform. Output current ripple of three-level inverters is used as the evaluation indicator and is analyzed in the next section.

Analysis of the Output Current Ripple
At any arbitrary instant in each sample period, there is always an error between the applied voltage and the reference voltage vector according to the principle of space vector PWM. The vector difference between Vj and Vref is defined as the voltage ripple vector Vj,err. As shown in Figure 3a, when Vref is located in triangle ③ of sector Z1, voltage ripple vectors corresponding to V7, V1, and V13 are V7,err, V1,err, and V13,err, respectively.
When the motor is driven by the voltage source inverter and the stator and rotor resistances are neglected, the voltage ripple vector Vj,err will generate the current ripple vector ij,err in the motor. The relationship of voltage and current ripple vectors in each Ts can be indicated as follows where Lσ is the equivalent inductance of the motor. Take Sequence 31 as an example, as shown in Figure 3a, when t ∈ [0, T1/2], the switching state POO is applied, the start point of i7,err is at t0. The direction of current ripple vector ij,err lag the direction of voltage ripple vector Vj,err by π/2 so that the end point of i7,err travels from t0 to t1. When t = T1/2, |i7,err| equals to |V7,err·T1/2Lσ|. Similarly, the amplitude of current ripple vector are |V13,err·T0/Lσ|, |V1,err·T2/Lσ|, and |V7,err·T1/2Lσ| when the switching state PON, PNN, and ONN are applied alternatively. The instants t0~t8 shown in Figure 3a are corresponding to the instants shown in Figure 3b. The trajectory of ij,err during (0, Ts] is triangle t1-t2-t3-t1. And the trajectory during (Ts, 2Ts] is triangle t5-t6-t7-t5. The lengths of three sides are V7,err·T1/Lσ, V1,err·T2/Lσ, and V13,err·T0/Lσ, respectively. Different arrangements of the switching sequence will inherently offer different behavior with regard to the performance indicators that can be used to assess the quality of the output waveform. Output current ripple of three-level inverters is used as the evaluation indicator and is analyzed in the next section.

Analysis of the Output Current Ripple
At any arbitrary instant in each sample period, there is always an error between the applied voltage and the reference voltage vector according to the principle of space vector PWM. The vector difference between V j and V ref is defined as the voltage ripple vector V j,err . As shown in Figure 3a, when V ref is located in triangle 3 of sector Z 1 , voltage ripple vectors corresponding to V 7 , V 1 , and V 13 are V 7,err , V 1,err , and V 13,err , respectively.
When the motor is driven by the voltage source inverter and the stator and rotor resistances are neglected, the voltage ripple vector V j,err will generate the current ripple vector i j,err in the motor. The relationship of voltage and current ripple vectors in each T s can be indicated as follows where L σ is the equivalent inductance of the motor. Take Sequence 31 as an example, as shown in Figure 3a, when t ∈ [0, T 1 /2], the switching state POO is applied, the start point of i 7,err is at t 0 . The direction of current ripple vector i j,err lag the direction of voltage ripple vector V j,err by π/2 so that the end point of i 7,err travels from t 0 to t 1 . When t = T 1 /2, |i 7,err | equals to |V 7,err ·T 1 /2L σ |. Similarly, the amplitude of current ripple vector are |V 13,err ·T 0 /L σ |, |V 1,err ·T 2 /L σ |, and |V 7,err ·T 1 /2L σ | when the switching state PON, PNN, and ONN are applied alternatively. The instants t 0~t8 shown in Figure 3a are corresponding to the instants shown in Figure 3b. The trajectory of i j,err during (0, T s ] is triangle t 1 -t 2 -t 3 -t 1 . And the trajectory during (T s , 2T s ] is triangle t 5 -t 6 -t 7 -t 5 . The lengths of three sides are V 7,err ·T 1 /L σ , V 1,err ·T 2 /L σ , and V 13,err ·T 0 /L σ , respectively. The average current ripple vector in sample period (0, T s ] and (T s , 2T s ] are defined as follows As shown in Figure 3c, the shapes of triangle t 1 -t 2 -t 3 -t 1 and t 5 -t 6 -t 7 -t 5 are the same and are symmetrical about the origin. So i av1 and i av2 are equal in magnitude but opposite in direction. The conclusions derived in reference [18] are as follows: The terminal of the average current ripple vector is the mass center of the current ripple triangle.
In Figure 3b, point G and G are the mass center of triangle t 1 -t 2 -t 3 -t 1 and t 5 -t 6 -t 7 -t 5 , respectively. So the terminals of i av1 and i av2 are point G and G . The square RMS value of the output current ripple is normally introduced to estimate the performance of the inverter, which is defined as follows In sample period (0, T s ], the current ripple vector can be divided into two parts where auxiliary vector is the vector error between the current ripple vector i j,err and the average current ripple vector i av1 . In time interval (0, T s ], averaging Equation (6), yields Substituting Equations (6) and (7) into Equation (5), yields The trajectories of current ripple vector during (0, 2T s ] corresponding to Sequence 31, 32, and 33 are shown in Figure 3c. As can be seen, for different switching sequences, the relative positions of the mass center and the origin are different from each other, which means magnitudes of the average current ripple vectors are different. While shapes of current ripple triangles are the same. So the second item in the right side of Equation (8) is not changed. Then the following conclusion can be drawn: The value of I rip_rms is determined by the value of |i av1 | 2 . So the lower the value of |i av1 | 2 is, the better the output performance is.

The Expression of the Magnitude of the Average Current Ripple Vector
According to Conclusion 1 and Conclusion 2, the comparison of output performance for all the possible switching sequences can be replaced by the comparison of the distance between the mass center of current ripple triangle and the origin.
The modulation index m is defined as where V ref is the amplitude of reference voltage vector, V dc is the amplitude of dc-link voltage. As shown in Figure 3, the magnitudes of voltage ripple vector V 7,err , V 1,err , and V 13,err can be derived as follows where θ is the reference vector angle. According to Equation (2), the dwell time T 1 , T 2 , and T 0 corresponding to V 7 , V 1 , and V 13 during each sample period can be derived as follows Based on Equations (10) and (11), and the geometric relationship in Figure 3c, the closed-form expression of |i av1 | are listed in Table 1. Table 1. The expression of |i av1 | in Triangle 3 of Sector Z 1.
Similarly, the expressions of other switching sequences in Figure 2 also can be derived out. According to Equations (10) and (11), and Table 1, it can be concluded that expressions of the magnitude of the average current ripple vector are functions of variable V dc , T s , L σ , m and θ. By developing expressions in Table 1, it can be deduced that V dc T s /L σ is the common item so that expressions can be considered as a function of m and θ (The detailed derivation process of |i av1 | is presented in Appendix A).
Let x and y to be m·cosθ and m·sinθ, respectively. The magnitude of the average current ripple vector |i av1 | of sector Z 1 in x-y rectangle coordinate system and the contour lines of |i av1 | in x-y plane corresponding to Sequence 31-33 are shown in Figure 4. From Figure 4, variation trends of |i av1 | corresponding to different sequences are not the same. If the switching sequence with the lowest |i av1 | is adopted at any arbitrary position, the output current ripple of the inverter will be minimized.
Let x and y to be m·cosθ and m·sinθ, respectively. The magnitude of the average current ripple vector |iav1| of sector Z1 in x-y rectangle coordinate system and the contour lines of |iav1| in x-y plane corresponding to Sequence 31~Sequence 33 are shown in Figure 4. From Figure 4, variation trends of |iav1| corresponding to different sequences are not the same. If the switching sequence with the lowest |iav1| is adopted at any arbitrary position, the output current ripple of the inverter will be minimized.

The Boundaries of Different Switching Sequences
In order to obtain the boundary of the active area for Sequence 31 and 32, the intersection |i av1 |(sequence 31) = |i av1 |(sequence 32) need to be solved and the result is curve g in Figure 5c. Similarly, curve h is the intersection of |i av1 |(sequence 31) = |i av1 |(sequence 33) and curve l is the intersection of |i av1 |(sequence 32) = |i av1 |(sequence 33). When V ref is located in small triangle 1 , 2 , or 4 , expressions of |i av1 | can be derived out and the intersections can also be solved in the same manner. The distribution of sub-region for each switching sequence in small triangle 1 -4 corresponding to the minimum value of |i av1 | are shown in Figure 5a-d, respectively.

The Boundaries of Different Switching Sequences
In order to obtain the boundary of the active area for Sequence 31 and 32, the intersection |iav1|(sequence 31) = |iav1|(sequence 32) need to be solved and the result is curve g in Figure 5c. Similarly, curve h is the intersection of |iav1|(sequence 31) = |iav1|(sequence 33) and curve l is the intersection of |iav1|(sequence 32) = |iav1|(sequence 33). When Vref is located in small triangle ①, ②, or ④, expressions of |iav1| can be derived out and the intersections can also be solved in the same manner. The distribution of sub-region for each switching sequence in small triangle ①-④ corresponding to the minimum value of |iav1| are shown in Figure 5a-d, respectively. Each triangle is subdivided into three small-regions. In Figure 5a-d, the curve a~q are the boundaries of each sub-region. Equations of the boundaries can be solved off-line by the expressions of |iav1| of the two adjacent sub-regions. Omitting the tedious derivation process, the equation of a~q in x-y rectangle coordinate system are listed in Appendix B. Furthermore, the equations in Equation (b1) are independent of motor parameters, fundamental frequency, and dc bus voltage.

The Proposed Sector Subdivision Based SVPWM Strategy
According to Figure 5a-d, the sub-region of each switching sequence in the whole space vector diagram is shown in Figure 6. The sub-regions are different because the types of switching sequences (continuous and discontinuous) adopted in each triangle are different. Each triangle is subdivided into three small-regions. In Figure 5a-d, the curve a-q are the boundaries of each sub-region. Equations of the boundaries can be solved off-line by the expressions of |i av1 | of the two adjacent sub-regions. Omitting the tedious derivation process, the equation of a-q in x-y rectangle coordinate system are listed in Appendix B. Furthermore, the equations in Equation (A5) are independent of motor parameters, fundamental frequency, and dc bus voltage.

The Proposed Sector Subdivision Based SVPWM Strategy
According to Figure 5a-d, the sub-region of each switching sequence in the whole space vector diagram is shown in Figure 6. The sub-regions are different because the types of switching sequences (continuous and discontinuous) adopted in each triangle are different. (b1) are independent of motor parameters, fundamental frequency, and dc bus voltage.

The Proposed Sector Subdivision Based SVPWM Strategy
According to Figure 5a-d, the sub-region of each switching sequence in the whole space vector diagram is shown in Figure 6. The sub-regions are different because the types of switching sequences (continuous and discontinuous) adopted in each triangle are different.  Generally, the determination process of sub-regions for different switching sequences in sector Z 1 are taken as an example. The flowchart to find out the spatial region and switching sequence are shown in Figure 7. Generally, the determination process of sub-regions for different switching sequences in sector Z1 are taken as an example. The flowchart to find out the spatial region and switching sequence are shown in Figure 7.
Based on the sub-region and switching sequence distributions in Figure 6, a sector subdivision based SVPWM strategy combined of both continuous and discontinuous switching sequences can be presented to improve the output current performance. It is worth to be mentioned that the switching sequences adopted in the proposed strategy are all selected from Figure 2. And the switching sequence adopted in a certain sample period will be reversed in the next sample period so that the strategy is arranged symmetrically on both sides.

Experimental Verification
The proposed strategy, CPWM [19] and DPWM3 (with the lowest distortion among DPWM0-DPWM3) [20] are tested on the experimental prototype of three-level inverter fed induction motor shown in Figure 8. Parameters of the experimental prototype are listed in Table 2. The induction motor is driven with a constant V/f control.  Based on the sub-region and switching sequence distributions in Figure 6, a sector subdivision based SVPWM strategy combined of both continuous and discontinuous switching sequences can be presented to improve the output current performance. It is worth to be mentioned that the switching sequences adopted in the proposed strategy are all selected from Figure 2. And the switching sequence adopted in a certain sample period will be reversed in the next sample period so that the strategy is arranged symmetrically on both sides.

Experimental Verification
The proposed strategy, CPWM [19] and DPWM3 (with the lowest distortion among DPWM0-DPWM3) [20] are tested on the experimental prototype of three-level inverter fed induction motor shown in Figure 8. Parameters of the experimental prototype are listed in Table 2. The induction motor is driven with a constant V/f control. Instead of total harmonic distortion (THD), total demand distortion (TDD) is usually used as the output performance indicator of the inverter in a wide range of modulation index m [21], which is defined as follows  Figure 9 and Figure 10, respectively. From Figure 9 and 10, ITDD of the proposed strategy is lower than that of CPWM and DPWM3.

The Proposed Sector Subdivision Based SVPWM Strategy
Instead of total harmonic distortion (THD), total demand distortion (TDD) is usually used as the output performance indicator of the inverter in a wide range of modulation index m [21], which is defined as follows where I h is the hth component of the output current and I N is the rated current. I h and I N are both RMS values. Experimental waveforms of output voltage v AO and v AB , output current i A for CPWM, DPWM3, and the proposed strategy under conditions of m = 0.2 and m = 0.9 are presented in Figures 9 and 10, respectively. From Figures 9 and 10, I TDD of the proposed strategy is lower than that of CPWM and DPWM3.
According to experimental results, the fast fourier transformation (FFT) analysis tool in Matlab is used to calculate the I TDD and V WTHD under different modulation index conditions. Then variations of I TDD and V WTHD with the change of modulation index m for CPWM, DPWM3, and the proposed strategy can be obtained, which is illustrated in Figure 11a,b. where Ih is the hth component of the output current and IN is the rated current. Ih and IN are both RMS values.
Experimental waveforms of output voltage vAO and vAB, output current iA for CPWM, DPWM3, and the proposed strategy under conditions of m = 0.2 and m = 0.9 are presented in Figure 9 and Figure 10, respectively. From Figure 9 and 10, ITDD of the proposed strategy is lower than that of CPWM and DPWM3.    According to experimental results, the fast fourier transformation (FFT) analysis tool in Matlab is used to calculate the ITDD and VWTHD under different modulation index conditions. Then variations of ITDD and VWTHD with the change of modulation index m for CPWM, DPWM3, and the proposed strategy can be obtained, which is illustrated in Figure 11a,b.  According to experimental results, the fast fourier transformation (FFT) analysis tool in Matlab is used to calculate the ITDD and VWTHD under different modulation index conditions. Then variations of ITDD and VWTHD with the change of modulation index m for CPWM, DPWM3, and the proposed strategy can be obtained, which is illustrated in Figure 11a,b. The weighted total harmonic distortion of output voltage VWTHD is defined as where V1 and Vh are the rms value of fundamental and hth component of output voltage. As shown in Figure 11a, for the modulation index m < 0.38 and m ≥ 0.8, ITDD of the proposed strategy is lower than that of CPWM and DPWM3. For the modulation index 0.38 ≤ m < 0.8, output The weighted total harmonic distortion of output voltage V WTHD is defined as where V 1 and V h are the rms value of fundamental and hth component of output voltage. As shown in Figure 11a, for the modulation index m < 0.38 and m ≥ 0.8, I TDD of the proposed strategy is lower than that of CPWM and DPWM3. For the modulation index 0.38 ≤ m < 0.8, output waveform quality of the proposed strategy and CPWM are the same, which is still better than that of DPWM3. The same conclusion can be obtained from Figure 11b. The percentage improvement of proposed strategy versus CPWM and DPWM3 is shown in Figure 12. waveform quality of the proposed strategy and CPWM are the same, which is still better than that of DPWM3. The same conclusion can be obtained from Figure 11b. The percentage improvement of proposed strategy versus CPWM and DPWM3 is shown in Figure 12. At the rated frequency (modulation index m = 1), ITDD of the proposed strategy drops 33% and 3.5%, respectively, compared with CPWM and DPWM3. Thus, the output waveform quality of the proposed strategy is improved.
It is worth mentioning that the output waveform quality is also affected by the low frequency ripple in the neutral-point potential, as can be seen in Figure 9 and Figure 10. The dependence of neutral-point potential ripple vC1-vC2 on m and power factor angle φ for CPWM, DPWM3, and the proposed strategy can be calculated according to reference [22], as shown in Figure 13. The neutralpoint potential ripple vC1-vC2 for CPWM, DPWM3, and the proposed strategy are approximately the same, so their effect on the output current ripple are the same, too. At the rated frequency (modulation index m = 1), I TDD of the proposed strategy drops 33% and 3.5%, respectively, compared with CPWM and DPWM3. Thus, the output waveform quality of the proposed strategy is improved.
It is worth mentioning that the output waveform quality is also affected by the low frequency ripple in the neutral-point potential, as can be seen in Figures 9 and 10. The dependence of neutral-point potential ripple v C1 -v C2 on m and power factor angle ϕ for CPWM, DPWM3, and the proposed strategy can be calculated according to reference [22], as shown in Figure 13. The neutral-point potential ripple v C1 -v C2 for CPWM, DPWM3, and the proposed strategy are approximately the same, so their effect on the output current ripple are the same, too.
3.5%, respectively, compared with CPWM and DPWM3. Thus, the output waveform quality of the proposed strategy is improved.
It is worth mentioning that the output waveform quality is also affected by the low frequency ripple in the neutral-point potential, as can be seen in Figure 9 and Figure 10. The dependence of neutral-point potential ripple vC1-vC2 on m and power factor angle φ for CPWM, DPWM3, and the proposed strategy can be calculated according to reference [22], as shown in Figure 13. The neutralpoint potential ripple vC1-vC2 for CPWM, DPWM3, and the proposed strategy are approximately the same, so their effect on the output current ripple are the same, too.

Comparison of Power Losses
The switching losses of CPWM, DPWM3 and proposed strategy are calculated according to the method in reference [23], and the dependence of switching loss on m and power factor angle φ are shown in Figure 14.

Comparison of Power Losses
The switching losses of CPWM, DPWM3 and proposed strategy are calculated according to the method in reference [23], and the dependence of switching loss on m and power factor angle ϕ are shown in Figure 14. As can be seen, when the power factor is close to 1, the switching loss of proposed strategy is lower than CPWM and a little bit higher than DPWM3. However in other cases, the switching losses of these three strategies are approximately the same.

Comparison With Neutral Point Balancing Strategies
The dependence of ITDD and VWTHD on modulation index m for CPWM with a neutral-point balancing control [8], a virtual SVPWM (VSVPWM) [11], a hybrid strategy of these two methods [12] and the proposed method are shown in Figure 15. As can be seen, when the modulation index m > 0.1, ITDD and VWTHD of the proposed strategy is lower than the other three strategies. It can be concluded that the output performance of the proposed method is better than usual-adopted SVPWM with neutral-point potential balancing strategy and VSVPWM. As can be seen, when the power factor is close to 1, the switching loss of proposed strategy is lower than CPWM and a little bit higher than DPWM3. However in other cases, the switching losses of these three strategies are approximately the same.

Comparison with Neutral Point Balancing Strategies
The dependence of I TDD and V WTHD on modulation index m for CPWM with a neutral-point balancing control [8], a virtual SVPWM (VSVPWM) [11], a hybrid strategy of these two methods [12] and the proposed method are shown in Figure 15. As can be seen, when the modulation index m > 0.1, I TDD and V WTHD of the proposed strategy is lower than the other three strategies. It can be concluded that the output performance of the proposed method is better than usual-adopted SVPWM with neutral-point potential balancing strategy and VSVPWM.
The dependence of ITDD and VWTHD on modulation index m for CPWM with a neutral-point balancing control [8], a virtual SVPWM (VSVPWM) [11], a hybrid strategy of these two methods [12] and the proposed method are shown in Figure 15. As can be seen, when the modulation index m > 0.1, ITDD and VWTHD of the proposed strategy is lower than the other three strategies. It can be concluded that the output performance of the proposed method is better than usual-adopted SVPWM with neutral-point potential balancing strategy and VSVPWM.

Conclusions
A sector subdivision based modulation strategy combined with continuous and discontinuous switching sequences has been presented to promote the output performance of three-level inverters. The magnitude of the average current ripple vector was introduced as the performance indicator of the output current ripple. Then the optimal distribution of switching sequences has been derived. Compared with CPWM and DPWM3, the output current ripple of the proposed strategy was reduced. It can be concluded that the output current ripple are reduced significantly under the condition of m < 0.38 and m ≥ 0.8. At the rated frequency, ITDD of the proposed strategy drops by 33% and 3.5%, respectively, compared with CPWM and DPWM3. The power loss of the proposed strategy was medium among those three strategies. Additionally, compared with neutral-point balancing strategies, the improvement of the output waveform quality was also significant.

Conclusions
A sector subdivision based modulation strategy combined with continuous and discontinuous switching sequences has been presented to promote the output performance of three-level inverters. The magnitude of the average current ripple vector was introduced as the performance indicator of the output current ripple. Then the optimal distribution of switching sequences has been derived. Compared with CPWM and DPWM3, the output current ripple of the proposed strategy was reduced. It can be concluded that the output current ripple are reduced significantly under the condition of m < 0.38 and m ≥ 0.8. At the rated frequency, I TDD of the proposed strategy drops by 33% and 3.5%, respectively, compared with CPWM and DPWM3. The power loss of the proposed strategy was medium among those three strategies. Additionally, compared with neutral-point balancing strategies, the improvement of the output waveform quality was also significant.

Conflicts of Interest:
The authors declare no conflict of interest.

Appendix A
According to Conclusion 1, the terminal of the average current ripple vector is the mass center of the current ripple triangle. So the magnitude of the average current ripple vector i av1 is equal to the distance between the origin point and the mass center. The current ripple triangles and mass centers corresponding to Sequence 31-33 are shown in Figure A1.

Appendix A
According to Conclusion 1, the terminal of the average current ripple vector is the mass center of the current ripple triangle. So the magnitude of the average current ripple vector iav1 is equal to the distance between the origin point and the mass center. The current ripple triangles and mass centers corresponding to Sequence 31-33 are shown in Figure a1. The coordinate of three vertexes A(α1, β1), B(α2, β2) and C(α3, β3) of current ripple triangle are shown in Table a1. α +α +α β +β +β Substituting the coordinates in Table B1 into Equation (A1), the expressions of |iav1| corresponding to Sequence 31-33 are as follow: Substituting the coordinates in Table A1 into Equation (A1), the expressions of |i av1 | corresponding to Sequence 31-33 are as follow: The dwell time T 1 , T 2 , T 3 , the magnitude of voltage ripple vector V 7,err , V 1,err , V 13,err and the expressions of γ 1 , γ 2 , γ 3 are shown in Equations (10) and (11) and Table 1, respectively. According to Equation (10), the expressions ofγ 1 , γ 2 , γ 3 can be further deduced as follow: As can be seen, γ 1 , γ 2 , and γ 3 are the function of m and θ. Substituting Equations (10), (11) and (A3) into (A2), yields As can be seen, the expressions of |i av1 | are the function of m, θ, V dc , T s , and L σ . V dc T s /L σ is the common item, and the value of V dc T s /L σ doesn't affect the comparison of |i av1 |, so the expressions of |i av1 | can be considered as the function of m and θ.