Adaptive and Nonlinear Control Techniques Applied to SEPIC Converter in DC-DC, PFC, CCM and DCM Modes Using HIL Simulation

In this paper, we propose adaptive nonlinear controllers for the Single-Ended Primary Inductance Converter (SEPIC). We also consider four distinct situations: AC-DC, DC-DC, Continuous Conduction Mode (CCM) and Discontinuous Conduction Mode (DCM). A comparative analysis between classic linear and nonlinear approaches to regulate the control loop is made. Three adaptive nonlinear control laws are designed: Feedback Linearization Control (FLC), Passivity-Based Control (PBC) and Interconnection and Damping Assignment Passivity-Based Control (IDAPBC). In order to compare the performance of these control techniques, numerical simulations were made in Software and Hardware in the Loop (HIL) for nominal conditions and operation disturbances. We recommend adaptive controllers for the two different situations: Adaptive Passivity-Based Feedback Linearization Control (APBFLC) for the PFC (Power Factor Correction) AC-DC system and IDAPBC-BB (IDAPBC Based on Boost converter) for the regulator DC-DC system.


Introduction
Conventional power supplies usually only have one full-bridge diode rectifier and one large capacitive filter in the input stage.This front-end circuit operates with a high Total Harmonic Distortion (THDi) in the grid current, a low power factor (0.5-0.7) and normally does not meet regulatory standards, such as the important international standard IEC 61000-3-2 [1].Among the possible alternatives to improve the performance of switched sources, a highlight is the use of a DC-DC converter to creation a Power Factor Correction (PFC) system.As shown in Figure 1, this solution makes it possible to build nearly ideal rectifiers (emulates a resistor) and still achieve voltage, current or power regulation.Several topologies of converters used in power factor correction are present in the literature [2,3].Among them, the most popular topology is the boost converter [4,5].However, this converter has some disadvantages:

•
Relatively high output voltage (at least equal to the AC source voltage), which can generate over-voltage stress in the switches; • Difficulty in implementing insulation between input and output; • Lack of overload and over-current control due to the absence of a serial switch between the input and the output; • Inability to start-up.
However, the CUK and SEPIC topologies overcome these drawbacks presented by the boost converter, which becomes a good choice in PFC applications.In time, SEPIC converters have attracted much attention from modern applications, especially those involving renewable energy [6] such as LED (Light Emitting Diode) [7,8], fuel cells [9], battery chargers [10], photovoltaics [11] and eolic systems [12,13].
In this work, the operation characteristics, the modeling and control system of the SEPIC PFC converter in CCM and DCM are presented.Initially, a comparative analysis between two control techniques will be performed for this converter.The first one deals with the Classical Linear Control (CLC) based on the small-signal model, and the other is based on the Feedback Linearization Control (FLC) approach.Next, we suggest a new nonlinear controller, which works around the drawbacks of the CLC and FLC methods.The proposed control law, explained in the dedicated section, we call Adaptive Passivity-Based Feedback Linearization Control (APBFLC).
In order to analyze the operation of the SEPIC PFC converter, numerical simulations were performed in software for both the nominal condition and disturbances in the operation of this converter, by analyzing the Power Factor (PF) on the AC side, the harmonic distortion (THDi) of the input current and the DC side voltage regulation.
We list the main contributions of this paper: • a comparative analysis between linear and nonlinear control; This work is organized as follows.Section 2 introduces the modeling and analysis of the converters in CCM and DCM.The description of the design and the control techniques implemented for the PFC system, as well as the control law for DC-DC are shown in Section 3. Section 4 presents the proposed APBFLC controller.Section 5 includes the adaptation of new and efficient boost control laws to SEPIC converters.Section 6 demonstrates and discusses the main simulations and the HIL experimental results.Finally, in Section 7, the final comments and conclusions are presented.

Modeling
The PFC and DC-DC SEPIC converter circuits are illustrated in Figure 2. Based on [14,15], the average State-Space Model (SSM) and Euler-Lagrange Model (ELM) are presented in Table 1.Note that i L1 and i L2 are the average currents in the inductors L 1 and L 2 , v C1 is the capacitor voltage C 1 , v o is the output voltage across the capacitor C o , d is duty cycle, G is the load conductance and v g is the input voltage.Note in Table 1 that the differences between the two conduction modes basically consist of the residual term presented in the states representing the inductors currents (I sig = 0 for CCM and I sig = 0 for DCM).

CCM and DCM Analysis
The operation details of the SEPIC converter in DCM, illustrated in Figure 3, outline three mode configurations, which depend on the states of the semiconductor switch S and the diode D. The third configuration (c) represents the discontinuous operation mode, which is characterized by the annulment of the current drained through the diode.This is due to the inversion in one of the inductor currents of the converter, which will also equal in intensity the current of the other inductor; so the sum of these currents (i L1 + i L2 ) will become zero during a short time interval.If the sum of these currents is always greater than zero (i L1 + i L2 ) > 0 over the entire span where the switch remains open, there will be a current across the diode, and only the configurations (a) and (b) will be observed, which will represent the operation of the converter in continuous mode.According to [14], the operation of the SEPIC converter in DCM can be analytically represented by (1), where S Q and θ L 1 +L 2 are the switching and the threshold functions, respectively.These functions of the switch model are presented in (2) and (3), where z = i L1 + i L2 .In addition, S Q and are their respective complements.
Let us derive the state-space averaging approach of (1), considering the DCM SEPIC converter operation, to obtain: where d is the duty cycle of the semiconductor switch.According to [16], the average output current of the SEPIC converter in DCM for a half cycle of the AC line and the AC current grid can be written, respectively, as follows: i in = I in sin(wt) where L eq is the equivalent inductance derived from the parallel association of the inductors and I in is given by:

PFC Converter Characteristics
In power factor correction applications (AC-DC), as shown in Figure 4, the input voltage and current can be described by: where V in and I in are the amplitude values of these input quantities and w is the angular frequency.
Note that for a DC-DC system, the input v g is constant.
On the other hand, the output voltage v o remains practically constant throughout each half cycle due to the presence of the large output capacitor C o .Hence, this voltage can be approximated by a constant value v o V o .In addition, the PFC converter operates under very special conditions where the nominal DC voltage transformation m wt and the load r wt "seen" by the converter, at each period, are given by: where these quantities periodically vary from a minimum value M and R/2 (wt = π/2) to infinity (wt = kπ, with k = 0, 1, 2, 3, ...) in each half cycle of the grid frequency.Such features extend to any type of DC-DC converter used as PFC.

CIECA Modeling
The CIECA approach (Current Injected Equivalent Circuit Approach), proposed by [17], works to simplify the DCM SEPIC modeling taking into account some desired characteristics: • Simple, clear, works in both continuous and discontinuous conduction mode (CCM or DCM); • Can produce a well-suited approximated version of a real converter; • The equivalent circuit can be used directly in digital software simulators (SPICE, MATLAB, PSIM and others).
In the CIECA design procedure, the first step is to identify the nonlinear part of the converter circuit (containing the switch).The second is the linearization, which is done through the average current.This fact makes simple the application of this approach, and the final result of the modeling becomes a set of small-signal equations.Therefore, a linear equivalent circuit model for the nonlinear converter is sketched in Figure 5, representing the transfer ratios of the converter.The CIECA modeling can be applied to CLC control.
The dynamic properties of the converter are determined from an introduction of an AC small-signal variation on the steady-state operating point, where the small signal values are considered to be much smaller than the quiescent values: where "−" indicates the steady-state value and "∼" represents the small-signal disturbance introduced.Applying these disturbances in (5), which shows the value of the output current, and upon eliminating nonlinear second-order terms, this leads to: where: . Using these same perturbations in (7), we have: where: The expressions ( 12) and ( 13) represent the model of small low-frequency signals of the SEPIC converter.They are also used to obtain the equivalent small-signal circuit, illustrated in Figure 5. From this equivalent circuit, the desired transfer functions of the SEPIC converter can be obtained.In addition, it should be noted that the equivalent small signal impedance of the load (Z load ) directly depends on the load to which the PFC converter is connected.In this case, making use of a purely resistive load (R L ), the equivalent small signal impedance shall be considered equal to the load itself, i.e., Z load = R L .

Control System
Several control techniques for switched converters are presented in the literature.In this work, an initial comparison is made between two of them: the traditional approach, using a Proportional-Integral (PI) controller and the nonlinear technique based on FLC (Feedback Linearization Control).A generalized procedure for both linear and non-linear control is shown in Figure 6.The complementary flowchart, sketched in Figure 7, outlines important observations: When considering the classic control system of the PFC converters, there are two main methods: the multiplicative and the follower voltage, portrayed in [16].In the case of SEPIC PFC in DCM mode operation, there is an inherent characteristic that simplifies and establishes the control system, explained in the following subsection.

Classic Control
In the traditional linear approach, the control system is reduced to a single voltage loop, which is sketched in Figure 4.This control system can also be represented in the form of block diagrams of Figure 8, where the SEPIC converter and the PWM controller (Pulse-Width Modulation) are replaced by their respective transfer functions: G vd(s) and G C(s) .The other elements correspond to the amplitude of the triangular wave V M and voltage sensor gain H (s) .The voltage-proportional-integral PWM controller is designed using the classical frequency domain technique presented in [18].The transfer function G vd(s) relates the output voltage to the duty cycle, obtained from the small-signal equivalent circuit of the Figure 5, as follows: In addition, this classical PI controller adjustment is based on the definition of the transfer function T (s) , which is given by:

Feedback Linearization Control
In the case of the FLC technique, there is a linearization of the nonlinear dynamics of the system by state feedback, which is applied to the entire domain of the state space except for some singular points, so, it is global.Thus, this approach differs from linearization in the neighborhood of an equilibrium point, which was used to construct the equivalent model of Figure 5.
The design of the control system in the FLC approach is performed including a variable change, which shows the structure of the designed controller [14].In addition, the control law is based on the knowledge of the average converter model, which was presented in (4).In relation to this model, it is observed that the system presents a unity relative degree.This fact makes possible the derivation of the current control law from the first equation of this average model: which: where u i is the output of the FLC controller, V M corresponds to the amplitude of the triangular wave and v i is the new variable, given by: In turn, the reference current i * L1 , whose amplitude was defined in (7), is represented by: In addition, due to possible regime errors caused by the parametric uncertainties and in order to regulate the output voltage at the desired value V * o , it is necessary to introduce an integral action, which is represented as follows: Finally, Figure 9 shows the control system in the FLC approach, where the function T represents the relation between the auxiliary variable v i and the controller output u i .Such a function can be obtained by solving the expressions ( 16)- (18).FLC and PBC control equations for CCM and DCM SEPIC are summarized in Table 3.Note that PBC has the same first Equation ( 16) and three morestate equations.

Numerical and Initial Implementations for SEPIC DCM PFC
The reactive power elements of SEPIC is presented in Appendix A. An important quantity to be calculated is the transfer function G vd(s) shown in (14), which is given numerically by: G vd(s) = 400 0.016S + 1 (21) where: j 2 = 8.06 and r 2 = 99.20.This transfer function has great importance for the control loop adjustment in the classical approach, which must be sufficiently slow in order to avoid the injection of the second harmonic of the output in the input current.In this case, an expressive third order harmonic component can appear.As suggested in [19,20], it is necessary to allocate the crossover frequency of the control at least three times less than the AC input frequency, which makes the control system naturally slow.
Again, the PI controller was tuned using the classical frequency domain technique.The characteristics of this control system are shown in Table 2 together with the FLC control parameters.The next step is to analyze the AC side Power Factor (PF), the Total Harmonic Distortion of the input current (THDi) and the DC side voltage regulation in the simulated system for both the nominal condition and operation disturbances.The first analysis considers the operation of the full load converter (100 W), as shown in Figure 10a.In this figure, it is possible to observe the power factor correction characteristic of the SEPIC PFC converter, which has a high power factor (Linear-0.9975,FLC-0.9971),low harmonic content (Linear-6.33%;FLC-7.60%) and is still able to maintain the output voltage at the reference of 100 V within the limits imposed by the design.The low harmonic content of the input current is evidenced in the spectral analysis shown in Figure 11, where it is noted that the values obtained in the two control approaches are far below the limits imposed by the IEC 61000-3-2, Standard Class C.  It can be seen from Figure 10b that the dynamic behavior of the SEPIC converter is able to regulate the output voltage in both control strategies, although it takes different times to achieve this regulation, for a load variation of 50 W-100 W. In the case of the linear approach, the SEPIC converter spends approximately 120 ms to perform the voltage regulation, allowing that voltage to decrease by approximately 20 V. On the other hand, the converter has been able to regulate this output voltage in less than one grid cycle in the FLC approach.In addition, in the nonlinear technique, an overvoltage or current signal is not verified in the voltage regulation, surpassing the linear approach in this discussion point.
Finally, an analysis of the power factor and harmonic distortion of the AC input current is performed for both the universal input voltage values (90-265 V peak) at full load (100 W) and for different values of the load connected to the SEPIC converter.The first one is presented in Figure 12a and shows that the converter has a high power factor and low harmonic content in the AC current along the entire voltage range of the universal input in both methods.However, it is noted that the linear technique presents a slight superiority in this test.The other analysis is presented in Figure 12b, and again, the converter is able to maintain a high power factor and low harmonic content in both control approaches, now for different load values.In addition, it is observed that there is a more evident superiority of the linear approach in this last analysis to the different values of the load, which can be explained by the distortion in the waveform of the current in the passage through zero due to the presence of a derivative action in the FLC methodology.

Proposed Adaptive Non Linear Control Law
The two control laws discussed above, both linear and non-linear, have some drawbacks, which will be discussed below.First, for the classic controller shown in Figure 7, the control structure directly depends on the output signal of a voltage error amplifier (which contains a second harmonic component) and the input rectified sine wave voltage.As explained in [20], the linear controller ends up leading to higher levels in the third harmonic of the input current.To minimize this aggravating factor, the control loop is intentionally slow.The other disadvantage is the restriction at the operation point of the system since linearization is local around the equilibrium point.It should also be added that linear control works for DCM mode; the same performance does not occur in CCM mode.
The FLC control presents a major practical implementation problem: it needs the known value of the load G.Note that (7) depends on the desired current value in the primary inductor, which in turn depends on the value of G. Figure 11 shows this deficiency in the FLC control.In view of these two major disadvantages, we propose the following adaptive control law based on the passivity-based control and feedback linearization control Table 3, which we call APBFLC.

SEPIC CCM SEPIC DCM
When the load is unknown, although constant, an adaptive control strategy, as presented in [21], can be applied, where the unknown load conductance is adapted as follows: For a DC-DC system: Note that it is necessary to estimate an additional state: the output voltage v o given by ( 23).The integral action, given by (20), can also be included in the control law.We list the following advantages of the proposed law:

•
In contrast to the classical control, it gives an indirect and less dependent control of the 120-Hz ripple output voltage, which, therefore, allows for lower THDi levels; a higher phase margin due to non-restriction operating point.The integral gain can be stipulated for a faster response.

•
Complements the FLC control and allows load estimation given by ( 26), being more robust to load disturbances; • Given the caveats imposed by (22), the adaptive control law works for both conduction current modes (DCM and CCM); • Neglecting the current measurement of the intermediate inductor L 2 ; this characteristic is motivated by the analysis discussed in the following section.

Revised SEPIC as a Boost Converter and Derived Equations
The SEPIC converter has two inductors and two capacitors (a fourth order system), so it is necessary to reduce the number of states and measurements, for cost and error propagation reasons.In view of this concern, Ref. [15,22] use observers and immersion techniques.In [23], the fourth order transfer function of SEPIC is reduced to second order using the Pade approximation method, where the designed compensator closely follows the original system's response.Furthermore, Ref. [24] employ a simplified second order state-averaged model, using the sliding surface-regulated current-mode PWM controller.In addition, the CIECA modeling discussed in Section 2.3 motivates an interesting question: Is it possible to reduce the states of the SEPIC converter, for example, considering only the output voltage and the input current?
In Figure 13, the boost and SEPIC converters are placed side by side for comparison.It is observed that when removing the intermediate elements (L 2 , C 1 ) highlighted by the dotted line, the SEPIC converter becomes similar to the boost converter, having similar equilibrium points as shown in Table 4.This is the reason that these converters are recommended to work in PFC systems.What is the advantage of this adaptation?
Energies 2018, 11, 602 Therefore, we can use the boost equations and apply them to control the SEPIC converter replacing the state variables eliminated (i L2 and v c1 ) by the equilibrium points, provided in Table 4, represented by dependent sources in the model.If we substitute, for example, v c1 by v g and i L2 by GV * o in the SEPIC converter, it saves two sensors.Figure 13 summarizes this process.The other option is to replace the desired state reference by the measurement of the state itself, as seen in ( 23).
To illustrate an example application, we consider two control laws based on IDAPBC.In [22], IDAPBC control is applied to boost converters achieving an effortless and open loop control equation: IDAPBC-1: Yet, Ref. [25] proposed an evolution of (28) given by: IDAPBC-2: Equations ( 28) and ( 29) can be applied to SEPIC converters, which we denominate as IDAPBC-BB control equations.Again, the integral action, given by ( 20), can also be added.In order to illustrate how to insert this term in the control law, just replace the desired variable in the output voltage (V * o ) by the integral of the error between the measured variable (v o ) and the reference constant value (V * o ).Thus, the new control law becomes: The boost IDAPBC control equations are presented in Appendix B.

Main Results
In order to verify the performance of the control systems applied to the SEPIC DC-DC CCM and SEPIC PFC DCM, software and HIL simulations were performed using the specifications presented in Table 5.This section presents the digital simulation results using MATLAB and Hardware in the Loop (HIL) procedure described in [26].The converter is implemented according to the design specifications of Table 5 and the three control laws: FLC, APBFLC and IDAPBC-BB.
Figure 14 shows the capacitor voltage and inductor current response for load perturbation, respectively, in the SEPIC converter simulated in software.In the same way, Figure 15 presents the voltage and current response to an input voltage variation.In both input and load variation, consecutive steps of 50-100% are applied in the simulated systems.Figure 16 shows the out capacitor voltage of SEPIC converter, respectively, for the HIL application.
As seen in Figures 14-16, both software simulations and HIL results converged to the steady state value after the consecutive step applications.It is notable that the behavior of the systems are compatible, since the same transient dynamics is seen, even for the IDA-PBC's oscillatory dynamics.None of the implemented systems in software or in HIL converged to instability.This means that the embedded models and control equations are capable of controlling the systems, so validating the control techniques.
The processing time for the DSP to compute the control law and therefore to run a real-time simulation is 1.2 µs.Using a switching frequency of 50 kHz (20 µs), the processing time of all control equations (1.2 µs) demands 6% of the bandwidth.

APBFLC Results
As sketched in Figure 17, the output voltage can asymptotically track the set-point even if the load perturbation is present.The APBFLC controller features low THDi (<2%), low overshoot (<10%) and fast response speed (<0.05 s).The power factor achieved for the nominal condition is PF = 0.99.

IDAPBC-BB Results
Next, the two control laws (28) and (29) are validated in simulation.We can again observe the stability of the adapted nonlinear controllers by analyzing the change in perturbation of the output voltage waveform over a load step (note the insignificant overshoot of IDAPBC-BB-2 response).Hence, this variable is controlled at the desired value V o * .The steady-state and perturbed waveforms are sketched in Figure 18 showing that the two methods have low overshoot and fast response, even considering a control law adapted from the boost converter, taking into account only the measurement of the output voltage.

Conclusions
The intrinsic power factor correction includes SEPIC in a particular group of converters.Hence, the design of the control system derived from the model based on CIECA and the boost converter is satisfactory, revealing that it is possible to obtain high performance controllers using a simplified modeling.In addition, the effectiveness of the nonlinear approaches was verified, whose control laws proved to be efficient, especially for the voltage regulation and transient dynamics.
The performance of the proposed nonlinear controllers was analyzed under variations in load and input voltage.The software and HIL simulations demonstrated the feasibility of the nonlinear algorithms that can be used in embedded systems and practical applications, with simplicity and high accuracy.
Thus, we recommend: • For DC-DC SEPIC: the IDAPBC-BB-2 controller, because it presents ultra-low overshoot and ultra-fast response speed; all these benefits are sufficiently attained using only one measure (output voltage v o ); • For PFC SEPIC: the APBFLC control method, which offers high robustness, low THDi, low overshoot, load estimation possibility and fast response; all these advantages were achieved regardless of mode operation (CCM or DCM).

Figure 1 .
Figure 1.Schematic diagram of the DC-rectification system with the power factor correction stage.

Figure 3 .
Figure 3. Electrical configuration of the SEPIC DCM converter operation: (a) closed switch; (b) open switch and diode conduction; and (c) open switch and blocked diode.

Figure 5 .
Figure 5. Equivalent small-signal circuit of the SEPIC PFC.

•
CLC needs CIECA modeling (Section 3.1); • FLC and PBC employ SSM and ELM models, respectively; • The APBFLC control (Section 4) incorporates the advantages of FLC and PBC.The integral action used in the classical control can also be added.• The IDAPBC-BB control (Section 5) is obtained through the simplified modeling based on the boost converter and the IDABPBC control, which utilizes the Port-Controlled Hamiltonian (PCH) model (Appendix B);

Figure 6 .
Figure 6.Standard control procedure.The control goal is to get the equation for d.With the signal of the duty cycle synthesized, it is necessary to limit it between zero and one, and then, the corresponding PWM (Pulse Width Modulation) signal is produced for input to the converter.Therefore, it is necessary to estimate the value of the load represented by G s and add an integral action.

Figure 7 .
Figure 7. Flowchart of the methods used in this work.

Figure 8 .
Figure 8. Block diagram of the control system in voltage mode.

Figure 11 .
Figure 11.Comparison of the harmonic current with the limits imposed by IEC 61000-3-2.

Figure 17 .
Figure 17.Detail of the input current (A continue) and normalized grid voltage (A dashed) and the output voltage transient (B) with a load change from R = 100 Ω to R = 50 Ω for APBFLC control.

Table 2 .
Control system specifications.

Table 3 .
FLC and PBC control equations in CCM and DCM SEPIC.

Table 4 .
Equilibrium points of the converters.

Table 5 .
Initial and converters parameters.