A Unified Control Strategy for Inductor-Based Active Battery Equalisation Schemes

Series battery equalisation can improve battery charge and discharge reliability and extend battery life. Inductor-based battery equalisation schemes have the advantages of simple topologies and control strategies. According to the energy transfer pathway, inductor-based battery equalisation schemes can be divided into cell-to-cell and cell-to-pack equalisation schemes. The control strategies of the cell-to-cell schemes are simple; the inductor can only transfer energy between the neighbouring cells, so the equalisation speed is low. The cell-to-pack schemes are able to accomplish energy transfer between the cells and pack by charging and discharging the inductors. The equalisation speed is high, but the control strategies may be complex. In this paper, different equalisation topologies are reviewed, then a unified control strategy which is applicable to all of the inductor-based equalisation topologies is proposed. The equalisation speeds and efficiencies of these different schemes, including the newly-proposed unified control strategy, are analysed and compared. Based on the theoretical analysis, simulations, and experimental verifications, it is concluded that this unified control strategy can perform the battery equalisation process quickly and efficiently.


Introduction
A lithium-ion battery has certain advantages, such as large capacity and small size. Lithium-ion batteries are widely applied in the fields of electric vehicles and energy storage systems [1][2][3][4][5]. The voltage and capacity of a single lithium cell is too low to satisfy the demands of many electrical applications [6]; as a result, the cells should be connected in series. The production process and the external environment of the battery are different, leading to minor inconsistencies of the cells in a battery pack. After many charging and discharging cycles, the differences of the cell capacities become obvious, thereby decreasing the capacity of the battery pack [7]. In addition, the life of the battery pack decreases if the cells always have inconsistent capacities. Therefore, equalisation of batteries in series is necessary to avoid the overcharge or overdischarge caused by the cell inconsistency. Application of such equalisation techniques ensures the reliability of the pack.
Generally equalisation schemes consist of passive and active equalisation schemes. The passive equalisation scheme uses external power resistors to consume excessive energy of the cell. This scheme has disadvantages, such as power loss and circuit heat [8][9][10]. The active equalisation scheme includes methods based on inductors, capacitors, multi-tap transformers, or complex bidirectional DC/DC converters [11][12][13][14][15][16][17]. Compared to the capacitor-based equalisation scheme, the inductor-based equalisation scheme has the advantages of simple switching logic and portability. Compared to schemes based on the multi-tap transformer and complex bidirectional DC/DC converter, the inductor-based equalisation The residual capacity of the cell can be characterised by the state of charge (SOC). According to the Nernst model [27], the relationship between the cell voltage and SOC can be expressed as: where U 0 is the open circuit voltage, R is the internal resistance, K is a constant coefficient, and i c contains the external current generated by the charging/discharging process and the inner current generated by the equalisation circuit. The parameters in Equation (1) can be identified by experiment [28]. Different cells have different SOCs. The open circuit voltages and internal resistances may also be different if the cells are aged. In this paper, a Li-ion battery is applied and the capacity is 20 Ah. According to the parameter identification of a new cell, U 0 is 3.44 V, R is 3 mΩ, and K is 0.1. Figure 2 shows the influence of the parameters U 0 , R, and SOC on U. The x-axis and y-axis are the standard unitary values of Cell 1 and Cell 2, respectively. The z-axis is the voltage difference ∆U. i c is 0.1 C (discharge-rate), which is 2A. The standard unitary values of the parameters are listed in Table 1. The residual capacity of the cell can be characterised by the state of charge (SOC). According to the Nernst model [27], the relationship between the cell voltage and SOC can be expressed as: In SOC (1) where U0 is the open circuit voltage, R is the internal resistance, K is a constant coefficient, and ic contains the external current generated by the charging/discharging process and the inner current generated by the equalisation circuit. The parameters in Equation (1) can be identified by experiment [28].
Different cells have different SOCs. The open circuit voltages and internal resistances may also be different if the cells are aged. In this paper, a Li-ion battery is applied and the capacity is 20 Ah. According to the parameter identification of a new cell, U0 is 3.44 V, R is 3 mΩ, and K is 0.1. Figure 2 shows the influence of the parameters U0, R, and SOC on U. The x-axis and y-axis are the standard unitary values of Cell 1 and Cell 2, respectively. The z-axis is the voltage difference ΔU. ic is 0.1 C (discharge-rate), which is 2A. The standard unitary values of the parameters are listed in Table 1.   When the cells are new, the differences of the open circuit voltages and internal resistances are slight. Therefore, in the ICE, the equalisation of SOC1 and SOC2 can be realised by the equalisation of U1 and U2. When the cells are old, the influence of SOC on U is much more significant than that of the other parameters, therefore, the equalisation of U1 and U2 is also effective to equalise the SOC. Figure 3 shows the equalisation structure of the cell-to-cell scheme. Figure 3a is the series-based battery equalisation system, where the equalisation speed is low. Figure 3b is the layer-based battery equalisation system. The number of the ICEs is the same in the two systems. There are N cells The residual capacity of the cell can be characterised by the state of charge (SOC). According to the Nernst model [27], the relationship between the cell voltage and SOC can be expressed as: In SOC (1) where U0 is the open circuit voltage, R is the internal resistance, K is a constant coefficient, and ic contains the external current generated by the charging/discharging process and the inner current generated by the equalisation circuit. The parameters in Equation (1) can be identified by experiment [28].
Different cells have different SOCs. The open circuit voltages and internal resistances may also be different if the cells are aged. In this paper, a Li-ion battery is applied and the capacity is 20 Ah. According to the parameter identification of a new cell, U0 is 3.44 V, R is 3 mΩ, and K is 0.1. Figure 2 shows the influence of the parameters U0, R, and SOC on U. The x-axis and y-axis are the standard unitary values of Cell 1 and Cell 2, respectively. The z-axis is the voltage difference ΔU. ic is 0.1 C (discharge-rate), which is 2A. The standard unitary values of the parameters are listed in Table 1.   When the cells are new, the differences of the open circuit voltages and internal resistances are slight. Therefore, in the ICE, the equalisation of SOC1 and SOC2 can be realised by the equalisation of U1 and U2. When the cells are old, the influence of SOC on U is much more significant than that of the other parameters, therefore, the equalisation of U1 and U2 is also effective to equalise the SOC. Figure 3 shows the equalisation structure of the cell-to-cell scheme. Figure 3a is the series-based battery equalisation system, where the equalisation speed is low. Figure 3b is the layer-based battery equalisation system. The number of the ICEs is the same in the two systems. There are N cells  When the cells are new, the differences of the open circuit voltages and internal resistances are slight. Therefore, in the ICE, the equalisation of SOC 1 and SOC 2 can be realised by the equalisation of U 1 and U 2 . When the cells are old, the influence of SOC on U is much more significant than that of the other parameters, therefore, the equalisation of U 1 and U 2 is also effective to equalise the SOC. Figure 3 shows the equalisation structure of the cell-to-cell scheme. Figure 3a is the series-based battery equalisation system, where the equalisation speed is low. Figure 3b is the layer-based battery    Figure 4a shows the topology of the bridge type equalisation scheme. There are N cells connected in series. The inductor L is the only energy storage device. There are 2N + 2 switches. If cell U n needs to discharge, then the switches SP n and SN n+1 turn on and L is charged. After SP n and SN 1 turn off, SP 1 and SN N+1 turn on and L releases energy to the battery pack [29]. In addition, the topology can operate in the pack-to-cell mode. If the cell U n must be charged, then the inductor releases energy to U n . The disadvantage of this scheme is that there are too many switches, and the control system is complex. Figure 4b shows the topology of the inductor symmetrically distributed equalisation scheme. There are N inductors and N switches, and N is an even number. For any n less than or equal to N/2, if the cell U n must discharge, then the switch S n turns on, and the corresponding inductor L n is charged. After S n turns off, L n releases energy to the downstream cells. When n is greater than N/2, L n releases energy to the upper cells. The control strategy based on the SOC is applied. The duty cycle of the switches can be expressed as follows:

Cell-to-Pack Equalisation Topologies
where S pn is the SOC of the cell U n , T is the switching cycle, and T s is the sampling cycle. In the analysis of [19], the equalisation scheme operates in the stage that the voltages of the cells are close to the nominal voltage U B . As a result, the duty cycle does not apply to the whole charging/ discharging process.  Figure 4a shows the topology of the bridge type equalisation scheme. There are N cells connected in series. The inductor L is the only energy storage device. There are 2N + 2 switches. If cell Un needs to discharge, then the switches SPn and SNn+1 turn on and L is charged. After SPn and SN1 turn off, SP1 and SNN+1 turn on and L releases energy to the battery pack [29]. In addition, the topology can operate in the pack-to-cell mode. If the cell Un must be charged, then the inductor releases energy to Un. The disadvantage of this scheme is that there are too many switches, and the control system is complex. Figure 4b shows the topology of the inductor symmetrically distributed equalisation scheme. There are N inductors and N switches, and N is an even number. For any n less than or equal to N/2, if the cell Un must discharge, then the switch Sn turns on, and the corresponding inductor Ln is charged. After Sn turns off, Ln releases energy to the downstream cells. When n is greater than N/2, Ln releases energy to the upper cells. The control strategy based on the SOC is applied. The duty cycle of the switches can be expressed as follows:

Cell-to-Pack Equalisation Topologies
where Spn is the SOC of the cell Un, T is the switching cycle, and Ts is the sampling cycle. In the analysis of [19], the equalisation scheme operates in the stage that the voltages of the cells are close to the nominal voltage UB. As a result, the duty cycle does not apply to the whole charging/discharging process.
(a) (b)  Figure 5 shows the simplified cell-to-pack topology, where U1-UN are the voltages of the cells, L1-LN−1 are the energy storage inductors, S1-SN are the power switches, and D1-DN are the anti-parallel diodes of S1-SN. These diodes can provide a continuous flow path of the inductor current. The principle of the topology is similar to that of the inductor symmetrically distributed equalisation topology. However, the number of inductors here is smaller and the freewheeling diodes can be replaced by the body diodes of the MOSFETs. Thus, external diodes will no longer be needed.  The principle of the topology is similar to that of the inductor symmetrically distributed equalisation topology. However, the number of inductors here is smaller and the freewheeling diodes can be replaced by the body diodes of the MOSFETs. Thus, external diodes will no longer be needed.
There are N − 1 ICEs in Figure 5, which is the same as the cell-to-cell topologies. In Figure 3, each ICE has only two switches and any of them cannot be used in two or more ICEs. In contrast, the switches in Figure 5 can be shared by different ICEs, which makes the number of switches in the simplified cell-to-pack topology smaller than that in the cell-to-cell topologies.
According to Figure 5, there are N cells, and the equalisation topology requires N − 1 inductors and N MOSFETs. The circuit is very simple. The shorting problem occurs only when S 1 -S n or D 1 -D n are all turned on, which does not occur in principle. The case that S 1 -S n are turned on at the same time corresponds to the situation that all the cells are being discharged without an external discharger. Similarly, D 1 -D n freewheeling at the same time corresponds to the cells being charged without an external charger. During the balancing process, some of the cells are discharged, and some others are charged. Thus, S 1 -S n or D 1 -D n all being turned on cannot occur. In the control system, the speed of the driving signals of the switches cannot be at a high level at the same time. There are N-1 ICEs in Figure 5, which is the same as the cell-to-cell topologies. In Figure 3, each ICE has only two switches and any of them cannot be used in two or more ICEs. In contrast, the switches in Figure 5 can be shared by different ICEs, which makes the number of switches in the simplified cell-to-pack topology smaller than that in the cell-to-cell topologies.
According to Figure 5, there are N cells, and the equalisation topology requires N -1 inductors and N MOSFETs. The circuit is very simple. The shorting problem occurs only when S1-Sn or D1-Dn are all turned on, which does not occur in principle. The case that S1-Sn are turned on at the same time corresponds to the situation that all the cells are being discharged without an external discharger. Similarly, D1-Dn freewheeling at the same time corresponds to the cells being charged without an external charger. During the balancing process, some of the cells are discharged, and some others are charged. Thus, S1-Sn or D1-Dn all being turned on cannot occur. In the control system, the speed of the driving signals of the switches cannot be at a high level at the same time.  Figure 6 shows a unified control strategy of the inductor-based equalisation topologies. It is also the control strategy of the ICE. The closed-loop control strategy is shown in Figure 6a, where d1 and d2 are the driving signals of S1 and S2, ΔU is the voltage difference of U1 and U2, ΔU* is the reference of the voltage difference and should be 0 in the ideal condition. The positive constant K is the gain of the voltage error. Figure 5. Simplified cell-to-pack topology. Figure 6 shows a unified control strategy of the inductor-based equalisation topologies. It is also the control strategy of the ICE. The closed-loop control strategy is shown in Figure 6a, where d 1 and d 2 are the driving signals of S 1 and S 2 , ∆U is the voltage difference of U 1 and U 2 , ∆U* is the reference of the voltage difference and should be 0 in the ideal condition. The positive constant K is the gain of the voltage error. There are N-1 ICEs in Figure 5, which is the same as the cell-to-cell topologies. In Figure 3, each ICE has only two switches and any of them cannot be used in two or more ICEs. In contrast, the switches in Figure 5 can be shared by different ICEs, which makes the number of switches in the simplified cell-to-pack topology smaller than that in the cell-to-cell topologies.

Unified Control Strategy
According to Figure 5, there are N cells, and the equalisation topology requires N -1 inductors and N MOSFETs. The circuit is very simple. The shorting problem occurs only when S1-Sn or D1-Dn are all turned on, which does not occur in principle. The case that S1-Sn are turned on at the same time corresponds to the situation that all the cells are being discharged without an external discharger. Similarly, D1-Dn freewheeling at the same time corresponds to the cells being charged without an external charger. During the balancing process, some of the cells are discharged, and some others are charged. Thus, S1-Sn or D1-Dn all being turned on cannot occur. In the control system, the speed of the driving signals of the switches cannot be at a high level at the same time.  Figure 6 shows a unified control strategy of the inductor-based equalisation topologies. It is also the control strategy of the ICE. The closed-loop control strategy is shown in Figure 6a, where d1 and d2 are the driving signals of S1 and S2, ΔU is the voltage difference of U1 and U2, ΔU* is the reference of the voltage difference and should be 0 in the ideal condition. The positive constant K is the gain of the voltage error. The output of the gain controller is −KΔU. Two different triangle carriers are compared in Figure  6b. The triangle carrier of S1 is the negative inverted triangle. The triangle carrier of S2 is the positive regular triangle. When the voltage U1 is higher than U2, −KΔU is less than zero. This triangle carrier does not intersect with the positive regular triangle, and S2 is off. S1 is controlled by Pulse Width Modulation (PWM). The more significant the difference of U1 and U2 is, the lower −KΔU is. In that case, the duty cycle of d1 increases, and U1 discharges quickly. Similarly, when U1 is lower than U2, the discharging process of U2 is managed by the closed-loop controller. Figure 6c shows the control flowchart. If the voltage difference is higher than the upper limit εmax, then the corresponding switch works with the maximum duty cycle. If the voltage difference is higher than the lower limit εmin, then both of the two switches turn off.

Unified Control Strategy
Without the closed-loop control step in the dashed box of Figure 6c, the control strategy becomes the usual control strategy of the ICE, which is shown in Figure 6d. In that case, εmin can be treated as the charging threshold and εmax the discharging threshold. Note that εmin and εmax are very small values; thus, the equalisation speed can be improved. However, the cells may be overcharged or overdischarged. The equalisation result may not be good under the usual control strategy.

Application of the Unified Control Strategy
If the unified control strategy is applied in the cell-to-cell topologies, the difference between different ICEs in Figure 6 lies on the different values of ΔU. The application of the unified control strategy in the cell-to-cell topologies is shown in Figure 7a, where ΔU can be calculated as: Figure 7b shows the application in the cell-to-pack topologies. If the voltage of the cell Un is higher than the average value, then the corresponding Sn switches, and ΔU can be rewritten as: This strategy can be directly used in the topology shown in Figure 4b. For the topology shown in Figure 4a, the corresponding relation between the driving signals and the switches is shown in Table 2. The output of the gain controller is −K∆U. Two different triangle carriers are compared in Figure 6b. The triangle carrier of S 1 is the negative inverted triangle. The triangle carrier of S 2 is the positive regular triangle. When the voltage U 1 is higher than U 2 , −K∆U is less than zero. This triangle carrier does not intersect with the positive regular triangle, and S 2 is off. S 1 is controlled by Pulse Width Modulation (PWM). The more significant the difference of U 1 and U 2 is, the lower −K∆U is. In that case, the duty cycle of d 1 increases, and U 1 discharges quickly. Similarly, when U 1 is lower than U 2 , the discharging process of U 2 is managed by the closed-loop controller. Figure 6c shows the control flowchart. If the voltage difference is higher than the upper limit ε max , then the corresponding switch works with the maximum duty cycle. If the voltage difference is higher than the lower limit ε min , then both of the two switches turn off.
Without the closed-loop control step in the dashed box of Figure 6c, the control strategy becomes the usual control strategy of the ICE, which is shown in Figure 6d. In that case, ε min can be treated as the charging threshold and ε max the discharging threshold. Note that ε min and ε max are very small values; thus, the equalisation speed can be improved. However, the cells may be overcharged or overdischarged. The equalisation result may not be good under the usual control strategy.

Application of the Unified Control Strategy
If the unified control strategy is applied in the cell-to-cell topologies, the difference between different ICEs in Figure 6 lies on the different values of ∆U. The application of the unified control strategy in the cell-to-cell topologies is shown in Figure 7a, where ∆U can be calculated as: Figure 7b shows the application in the cell-to-pack topologies. If the voltage of the cell U n is higher than the average value, then the corresponding S n switches, and ∆U can be rewritten as: This strategy can be directly used in the topology shown in Figure 4b. For the topology shown in Figure 4a, the corresponding relation between the driving signals and the switches is shown in Table 2.

Comparison of the Equalisation Schemes
In the equalisation process, the capacity of Cell n can be expressed as: where 0 n Q is the initial capacity of cell n. The maximum equalisation current of each cell has an upper limit to protect the cells. In order to simplify the analysis, the equalisation current of each cell is assumed to be the constant I. The charging threshold is set as εmin and the discharging threshold is εmax. Figure 8 shows the equalisation processes of the inductor-based equalisation schemes. The bridge-type equalisation scheme in Figure 4a is not the main focuses so it is not analysed in this paper.

Driving Signal
Corresponding Switches Driving Signal Corresponding Switches

Comparison of the Equalisation Schemes
In the equalisation process, the capacity of Cell n can be expressed as: where Q n 0 is the initial capacity of cell n. The maximum equalisation current of each cell has an upper limit to protect the cells. In order to simplify the analysis, the equalisation current of each cell is assumed to be the constant I. The charging threshold is set as ε min and the discharging threshold is ε max . Figure 8 shows the equalisation processes of the inductor-based equalisation schemes. The bridge-type equalisation scheme in Figure 4a is not the main focuses so it is not analysed in this paper.

Comparison of the Equalisation Schemes
In the equalisation process, the capacity of Cell n can be expressed as: (5) where 0 n Q is the initial capacity of cell n. The maximum equalisation current of each cell has an upper limit to protect the cells. In order to simplify the analysis, the equalisation current of each cell is assumed to be the constant I. The charging threshold is set as εmin and the discharging threshold is εmax. Figure 8 shows the equalisation processes of the inductor-based equalisation schemes. The bridge-type equalisation scheme in Figure 4a is not the main focuses so it is not analysed in this paper. In Figure 8a, the equalisation time is determined by the maximum difference of the cell capacity and the average value, which is expressed as: In Figure 8a, the equalisation time is determined by the maximum difference of the cell capacity and the average value, which is expressed as: The equalisation process is similar to that of the inductor symmetrically distributed equalisation scheme shown in Figure 4b, but its topology is simplified. If the pack is charged or discharged by an external charger, the equalisation time will not be affected and, thus, the speed of equalisation is high. However, the switches are shared in multiple ICEs, and they also work in series. Compared to the scheme shown in Figure 4b, the simplified scheme in Figure 4a has higher loss.
In the series-based equalisation scheme, energy can only be transferred cell by cell. If a cell is charged by one ICE and discharged by an adjacent ICE, the capacity will not change; however, the loss of the two ICEs cannot be avoided. Thus, the efficiency of the series-based equalisation scheme is low. Additionally, the equalisation time would be extended by the charging threshold ε min and the discharging threshold ε max . In Figure 8b, Cell 4 releases energy to Cell 3 and Cell 3 releases energy to Cell 2 in the beginning. Then Q 3 does not change. If the difference between Q 4 and (Q 4 + Q 3 )/2 reduces to ε min , the ICE of Cell 4 and Cell 3 will stop working. The ICE of Cell 3 and Cell 2 continues working and Q 3 reduces. If the difference between Q 4 and (Q 4 + Q 3 )/2 increases to ε max , the ICE of Cell 4 and Cell 3 starts to work again. This process would repeat multiple times, which results in a low equalisation speed. The additional time can be expressed as: In the layer-based equalisation scheme, the equalisation time depends on the top ICE and can be calculated as: This equalisation speed is high. Furthermore, the cell charged by one ICE and discharged by the adjacent ICE can be avoided and the equalisation efficiency can be improved. Table 3 shows the characteristics of the equalisation schemes. Different equalisation schemes have different advantages and disadvantages, which further determine their applications. In Table 3, the first column refers to the following five schemes: 1: The simplified equalisation scheme 2: The series-based equalisation scheme 3: The layer-based equalisation scheme 4: The inductor symmetrically distributed equalisation scheme 5: The bridge-type equalisation scheme With the unified control strategy, the limit of the inductor symmetrically-distributed equalisation scheme described in [14] can be avoided. Indeed, if the method in [17] is adopted, external diodes will be needed, and the circuit will be slightly complicated. The number of cells in the layer-based equalisation scheme is required to be a power of 2. We can find that although the structure of the series-based equalisation scheme is not complex and it does not have any particular requirement on the number of cells, it still suffers from low speed and low efficiency. The simplified equalization scheme has a relatively simple structure, it can also work in a high speed efficiently, and does not have a specific requirement on the number of cells. The bridge-type equalisation scheme also does not require cell numbers to be a power of 2. Although its equalisation speed is high, it performs inefficiently, and its structure is very complex.

Simulation and Experimental Results
The  Figure 9 shows the SOC of the cells with different equalisation schemes. The initial SOCs of these cells are different to each other. After the implementation of an equalisation scheme, the SOCs of these cells tend to be the same. The equalisation speeds of the simplified equalisation scheme and the layer-based equalisation scheme are high. The final SOCs of the three schemes are 0.868, 0.860, and 0.872, respectively. The equalisation efficiency of the layer-based equalisation scheme is the highest.

5: The bridge-type equalisation scheme
With the unified control strategy, the limit of the inductor symmetrically-distributed equalisation scheme described in [14] can be avoided. Indeed, if the method in [17] is adopted, external diodes will be needed, and the circuit will be slightly complicated. The number of cells in the layer-based equalisation scheme is required to be a power of 2. We can find that although the structure of the series-based equalisation scheme is not complex and it does not have any particular requirement on the number of cells, it still suffers from low speed and low efficiency. The simplified equalization scheme has a relatively simple structure, it can also work in a high speed efficiently, and does not have a specific requirement on the number of cells. The bridge-type equalisation scheme also does not require cell numbers to be a power of 2. Although its equalisation speed is high, it performs inefficiently, and its structure is very complex.

Simulation and Experimental Results
The  Figure 9 shows the SOC of the cells with different equalisation schemes. The initial SOCs of these cells are different to each other. After the implementation of an equalisation scheme, the SOCs of these cells tend to be the same. The equalisation speeds of the simplified equalisation scheme and the layer-based equalisation scheme are high. The final SOCs of the three schemes are 0.868, 0.860, and 0.872, respectively. The equalisation efficiency of the layer-based equalisation scheme is the highest.  Figures 10a and 11a show the current of the inductors decreases with time. It can be seen that the greater the distribution between initial SOC and the final equilibrium SOC is, the larger the corresponding balanced inductor current is. In Figure 11a, the inductor current in the simplified equalisation scheme drops to zero for a short  Figures 10 and 11 show the key waveforms of the layer-based equalisation scheme and the simplified equalisation scheme. The switching frequency is 10 kHz. Figures 10a and 11a show the current of the inductors decreases with time. It can be seen that the greater the distribution between initial SOC and the final equilibrium SOC is, the larger the corresponding balanced inductor current is. In Figure 11a, the inductor current in the simplified equalisation scheme drops to zero for a short period of time, indicating that it can achieve fast equalization. Figures 10b and 11b show the current of the switches. The changes of the current are similar to that of the SOCs. Figures 10c and 11c show the voltage of the switches. In Figure 11c, the maximum voltage of the cells is the sum of the cell voltages, and it is higher than the switch voltage of the layer-based equalisation scheme. In the layer-based equalisation scheme, the average of the voltage stress of the switch is lower than that of the simplified equalisation scheme.
From the above comparison of the different equalisation schemes, the simplified equalisation scheme has simpler structure and higher equalisation speed. Thus, an experiment has been designed to implement the simplified equalisation scheme. An equalisation principle prototype was established. The parameters are the same as that of the simulation. Figure 12 shows the experimental device. The equalisation circuit is integrated with the battery management system (BMS). The control strategy is also implemented by the BMS.
(c) Figure 9. SOC of the cells. (a) The simplified equalisation scheme; (b) the series-based equalisation scheme; and (c) the layer-based equalisation scheme. Figures 10 and 11 show the key waveforms of the layer-based equalisation scheme and the simplified equalisation scheme. The switching frequency is 10 kHz. Figures 10a and 11a show the current of the inductors decreases with time. It can be seen that the greater the distribution between initial SOC and the final equilibrium SOC is, the larger the corresponding balanced inductor current is. In Figure 11a, the inductor current in the simplified equalisation scheme drops to zero for a short period of time, indicating that it can achieve fast equalization. Figures 10b and 11b show the current of the switches. The changes of the current are similar to that of the SOCs. Figures 10c and 11c show the voltage of the switches. In Figure 11c, the maximum voltage of the cells is the sum of the cell voltages, and it is higher than the switch voltage of the layer-based equalisation scheme. In the layerbased equalisation scheme, the average of the voltage stress of the switch is lower than that of the simplified equalisation scheme.
From the above comparison of the different equalisation schemes, the simplified equalisation scheme has simpler structure and higher equalisation speed. Thus, an experiment has been designed to implement the simplified equalisation scheme. An equalisation principle prototype was established. The parameters are the same as that of the simulation. Figure 12 shows the experimental device. The equalisation circuit is integrated with the battery management system (BMS). The control strategy is also implemented by the BMS.  Figure 13 shows the key waveforms with different duty ratios. These waveforms in Figure 13 include the inductor current i L_1 , the charging current of the bottom cell i U_N , and the driving signal of S 1 . The waveforms are consistent with the theoretical analysis in Section 3.
Energies 2018, 11, x 12 of 16 Figure 10. Key waveforms of the layer-based equalisation scheme in the discharging process of U1.
(a) The current of L1 and the driving signal of S1; (b) The current of L1, U2, U3, and U4. (c) voltage of the switches. Figure 13 shows the key waveforms with different duty ratios. These waveforms in Figure 13 include the inductor current iL_1, the charging current of the bottom cell iU_N, and the driving signal of S1. The waveforms are consistent with the theoretical analysis in Section 3.  Figure 13 shows the key waveforms with different duty ratios. These waveforms in Figure 13 include the inductor current iL_1, the charging current of the bottom cell iU_N, and the driving signal of S1. The waveforms are consistent with the theoretical analysis in Section 3.  Figure 13 shows the distribution of the cell voltage. In Figure 14a, the difference of the relevant voltage is obvious. In Figure 14b, the equalisation scheme is applied; as a result, the distribution of the cell voltage is narrower. We can learn from Figure 14 that the distribution of the cell voltage becomes much smaller, which verifies that the equalization scheme works perfectly. The experimental results with and without equalisation demonstrate that the equalisation scheme can equalise the battery pack.
(a) Figure 13. Key waveforms with different duty ratios: (a) 45% duty ratio; and (b) 30% duty ratio. Figure 13 shows the distribution of the cell voltage. In Figure 14a, the difference of the relevant voltage is obvious. In Figure 14b, the equalisation scheme is applied; as a result, the distribution of the cell voltage is narrower. We can learn from Figure 14 that the distribution of the cell voltage becomes much smaller, which verifies that the equalization scheme works perfectly. The experimental results with and without equalisation demonstrate that the equalisation scheme can equalise the battery pack.  Figure 13 shows the distribution of the cell voltage. In Figure 14a, the difference of the relevant voltage is obvious. In Figure 14b, the equalisation scheme is applied; as a result, the distribution of the cell voltage is narrower. We can learn from Figure 14 that the distribution of the cell voltage becomes much smaller, which verifies that the equalization scheme works perfectly. The experimental results with and without equalisation demonstrate that the equalisation scheme can equalise the battery pack.

Conclusions
After reviewing different existing studies on inductor-based active battery equalisation schemes, a unified control strategy is proposed in this paper. These different equalisation schemes are then analysed and compared. A common layer-based equalisation scheme has obvious advantages, but the number of the cells must be a power of 2, which increases exponentially when the system is large. Thus, the application of this scheme is limited. In the simplified equalisation scheme, rated voltage needs to be higher than the voltage of the battery pack, which is sometimes a disadvantage of this scheme. Note that the number of the cells in a BMS is less than 16 due to the limitations of the ports on the control chip are limited. Therefore, MOSFETs, which can only withstand the lowvoltage, can still meet this requirement. The newly-proposed unified control strategy is applicable to all of the schemes and can realise real-time equalisation which meets the requirement of actual use. Through the quantitative analysis of the existing typical schemes, the advantages and disadvantages of different schemes are compared, which provides a basis for balanced designs. As a future work, a new topology of equalization will be studied to apply to a chain-stored, cascaded, multilevel converter.

Conclusions
After reviewing different existing studies on inductor-based active battery equalisation schemes, a unified control strategy is proposed in this paper. These different equalisation schemes are then analysed and compared. A common layer-based equalisation scheme has obvious advantages, but the number of the cells must be a power of 2, which increases exponentially when the system is large. Thus, the application of this scheme is limited. In the simplified equalisation scheme, rated voltage needs to be higher than the voltage of the battery pack, which is sometimes a disadvantage of this scheme. Note that the number of the cells in a BMS is less than 16 due to the limitations of the ports on the control chip are limited. Therefore, MOSFETs, which can only withstand the low-voltage, can still meet this requirement. The newly-proposed unified control strategy is applicable to all of the schemes and can realise real-time equalisation which meets the requirement of actual use. Through the quantitative analysis of the existing typical schemes, the advantages and disadvantages of different schemes are compared, which provides a basis for balanced designs. As a future work, a new topology of equalization will be studied to apply to a chain-stored, cascaded, multilevel converter.