Two-Stage Battery Energy Storage System ( BESS ) in AC Microgrids with Balanced State-of-Charge and Guaranteed Small-Signal Stability

In this paper, a two-stage battery energy storage system (BESS) is implemented to enhance the operation condition of conventional battery storage systems in a microgrid. Particularly, the designed BESS is composed of two stages, i.e., Stage I: integration of dispersed energy storage units (ESUs) using parallel DC/DC converters, and Stage II: aggregated ESUs in grid-connected operation. Different from a conventional BESS consisting of a battery management system (BMS) and power conditioning system (PCS), the developed two-stage architecture enables additional operation and control flexibility in balancing the state-of-charge (SoC) of each ESU and ensures the guaranteed small-signal stability, especially in extremely weak grid conditions. The above benefits are achieved by separating the control functions between the two stages. In Stage I, a localized power sharing scheme based on the SoC of each particular ESU is developed to manage the SoC and avoid over-charge or over-discharge issues; on the other hand, in Stage II, an additional virtual impedance loop is implemented in the grid-interactive DC/AC inverters to enhance the stability margin with multiple parallel-connected inverters integrating at the point of common coupling (PCC) simultaneously. A simulation model based on MATLAB/Simulink is established, and simulation results verify the effectiveness of the proposed BESS architecture and the corresponding control diagram.


Introduction
Given the environmental issues that are induced by the deployment of fossil fuels, renewable energy sources (RES) are widely adopted in today's electric grids [1][2][3].It is necessary to develop efficient and high-performance grid-interactive inverters to interface the RES into the grid [4][5][6][7].
To facilitate the integration of multiple RES simultaneously, parallel power electronic interface inverters are usually employed at the same time, and sometimes microgrids can be formulated so that dispersed sources and loads can be managed and controlled in a specific region [8][9][10][11].
Even though there are many advantages of RES, e.g., low CO 2 emission, higher energy conversion efficiency, etc., their drawbacks should still be noticed.For most RES, such as photovoltaic (PV), wind turbines, small hydro, etc., their output power is not as stable as conventional synchronous generators [12][13][14].Hence, it is possible that the variations of their output power may further trigger oscillations in their output voltage.Furthermore, this type of oscillation may induce severe instabilities throughout the system.In order to mitigate the impacts of voltage and power fluctuations and alleviate the negative influence of intermittent sources, energy storage systems (ESS) are commonly used to assist the RES so that they can be used as a buffer to balance the power mismatch between sources and loads [15][16][17].Considering the distributed nature of RES in today's distribution systems and microgrids, it should be noted that most of the ESS is comprised of multiple decentralized energy storage units (ESUs).Meanwhile, among different types of ESUs (e.g., flywheels, batteries, ultra-capacitors, etc.), a battery energy storage system (BESS) plays a significant role considering their relatively low cost, simplicity in installation, and higher controllability.Therefore, the control and operation of a BESS is an important aspect of increasing the penetration level of RES.
Conventionally, in microgrid applications, a BESS is commonly interfaced via power electronic inverters.This inverter is used for controlling the power exchange between the battery and the external grid or the point of common coupling (PCC) of a microgrid.This interface inverter is called a power conditioning system (PCS).Meanwhile, for the battery itself, sometimes a dedicated battery management system (BMS) is also involved to monitor the online operation status and even predict the future status of a particular battery.Hence, as a summary, each battery is associated with a PCS and a BMS.These two dedicated systems are used as a full solution to implement all of the necessary functions of a battery.Although the above method has been demonstrated as an effective solution for controlling and integrating a BESS, it can be easily noticed that it may not be a cost-effective solution for microgrid applications, considering that multiple distributed batteries coexist in the system and multiple PCSs and BMSs are required to achieve the hardware architecture.The need to lower the investment cost calls for a compact architecture of BESS and the corresponding control diagram that satisfies all of the necessary operation conditions and requirements.
There are multiple applications being investigated with respect to the BESS.This includes both system-level coordinated control and inverter-level modeling and operation.From the system-level coordination perspective, a BESS can be used in hybrid systems with RES to compensate for the stochastic power fluctuations induced by renewables [18] and flexibly modeled and embedded in the supervisory control system in community microgrids [19].Meanwhile, from the inverter control perspective, there are different controls.As mentioned above, multiple batteries coexist in a BESS.Therefore, it is necessary to maintain effective control and operation of all of the battery sets simultaneously and collaboratively, as well as to guarantee that over-charging and over-discharging situations are avoided through the whole lifecycle of a BESS.In order to achieve this goal, a distributed architecture of a BESS based on multibank module is proposed in Reference [20], where a self-reconfigurable and compact design is implemented with soft-switching and dual-active-bridge (DAB) technology taken into account.Meanwhile, to keep the state-of-charge (SoC) of each ESU within the safe region (e.g., 40~90%), in Reference [21], an online SoC calculation method is proposed based on an extended Kalman filter, so that the proposed method can be adaptable to the parameter change and become less sensitive to parameter variations.In Reference [22], a decentralized SoC balancing method is proposed, focusing on both charging and discharging processes, which is implemented based upon conventional droop control.By using the above methods, SoC calculation and balancing can be all effectively achieved.However, they mostly focus on a single-stage BESS without sufficiently considering the coordination between different enabling components inside a BESS.
In addition to SoC balancing, which focuses on the status and parameters of a battery itself, also from the inverter control perspective, it is necessary to consider the operation performance at the grid side when integrating the BESS into the grid.Especially for an AC microgrid, the BESS is commonly connected to the PCC of a microgrid, requiring that the BESS should effectively balance the source and load inside a microgrid.Meanwhile, it should be able to provide the required active or reactive power to respond to the grid commands.Note that inductive-capacitive-inductive (LCL) filters are commonly used as the output filter of each battery inverter.Besides the advantages of LCL filters, it should also be noted that the instabilities may be induced due to the resonance problems [23,24].In practical application, especially in a large renewable energy farm, the interface converters are usually connected in parallel, in order to meet the requirement of distributed characteristic and increase the power rating of the inverter system.In this way, due to the parallel structure, the analyses of the resonance problem should be expanded; therefore, it is necessary to analyze the resonance propagation in the parallel-operated inverter system with multiple LCL filters [25,26].In Reference [27], a comprehensive z-domain model is derived in terms of a renewable energy system with parallel inverters, and a dead-band control with virtual impedance is applied to dampen the instabilities.In References [28,29], an inductive (L) or inductive-capacitive (LC) filtered damper is involved to actively regulate the impedance at the point of common coupling.A reliable operation with guaranteed small-signal stability should be realized to achieve the desired control objectives in a BESS, especially considering the LCL filters.
In this paper, a two-stage BESS is designed and implemented to facilitate the operation of AC microgrids.In particular, the proposed two-stage BESS does not include the conventional dedicated BMS and PCS for each single battery.Instead, intermediate DC links are involved to aggregate multiple batteries in a modular way.In this two-stage BESS, at Stage I, multiple DC/DC converters are used to interface the batteries.Several neighboring batteries are clustered as an aggregated module and one BMS is designed to control and coordinate the operation of the batteries inside this cluster.At Stage II, for each aggregated module there is a shared intermediate DC link at its DC output terminal.Only one DC/AC inverter is used for each aggregated module so the number of PCSs can be reduced.For the above BESS with a two-stage architecture, two control modules are integrated.For Stage I, besides the conventional control diagram used for voltage and current control, SoC balancing is achieved in the regional BMS by online monitoring of the SoC of each battery cell.Meanwhile, for Stage II, in addition to achieving the conventional grid support functions, an additional virtual impedance loop is involved to achieve resonance damping in an active way so that a guaranteed small signal stability can be reached, even in ultra-weak grid operation conditions.This paper is organized in the following way.Section 2 introduces the detailed system configuration of the proposed two-stage BESS with the related control modules included in the overall architecture.Section 3 describes the detailed control diagram of each stage, especially focusing on the specific functional modules of SoC balancing at Stage I and resonance damping at Stage II.Meanwhile, considering the charging and discharging nature of BESS, charging and discharging coordination is also designed and implemented in this section.Section 4 introduces the comprehensive simulation model implemented using MATLAB/Simulink, and the simulation results of two test cases, i.e., SoC balancing among multiple ESUs and stable power conditioning, are shown to verify the effectiveness of the proposed two-stage architecture and the corresponding control diagram.Section 5 summarizes the paper and offers conclusions.

System Configuration
As mentioned above in Section 1, the proposed BESS features a two-stage and modular configuration.In particular, as shown in Figure 1, in Stage I of the BESS, battery sets #1-#n are aggregated in a local module, where a BMS is designed to achieve localized control of multiple batteries, as highlighted in the gray box.Similarly, the other battery modules are also composed of multiple battery sets and each battery module is equipped with a BMS for local control.For each battery set in a particular module, to achieve a controllable operation, it is interfaced with a DC/DC converter, also as shown in Figure 1 as highlighted in blue.Note that each battery module has multiple battery sets dispersedly integrated at the input side of the corresponding DC/DC converter.Meanwhile, all the batteries share a common DC link at the output side of the DC/DC converter.As shown in Figure 1, the functionalities of the BMS for each battery module include: (1) online monitoring of the status of each battery set inside a battery module; (2) charging and discharging coordination of the battery sets; and (3) SoC balancing of multiple battery sets.
On the other hand, in Stage II of the BESS, it should be mentioned that only one DC/AC inverter is used as the PCS for each battery module.For example, for the top module in Figure 1, a PCS (i.e., a DC/AC inverter), highlighted in red, is designed to coordinate the grid interactive operation.The input of each PCS is the common DC link at the output side of each battery module, and its output side is connected to the grid or the PCC of a microgrid.Meanwhile, also as shown in Figure 1, the function of the PCS includes: (1)

Control System Design in Stage I
As indicated in Section 2, Stage I in the proposed two-stage BESS is responsible for managing and controlling the batteries in a regional battery module.In particular, the proposed control diagram is designed and implemented to not only achieve conventional local battery voltage and current control, but also realize SoC balancing in each battery module.The conventional local voltage and current control are implemented using a traditional proportional-integral (PI) controller, while the SoC balancing is achieved based on an average-based control scheme.For each battery module, the SoC of each battery set is measured and monitored, and their average is calculated in the decentralized controller of each DC/DC interface inverter.The control objective is to guarantee that the average of all SoC values is equal to that of each SoC.Therefore, the final goal is to equalize the SoC values of each battery set.
Given the slow dynamics of SoC, the average-based control loop is designed as the outer loop of the overall control diagram.In the meantime, the output of the average-based SoC control loop is fed into the inner voltage and current cascaded control loops as an add-on term.Therefore, the emerging control objective (i.e., to balance the SoC of each battery set) and the conventional control object (i.e., voltage and current control) can be obtained simultaneously.The detailed control diagram is shown in Figure 2.
Based on the control diagram detailed in Figure 2, it can be derived that: where SoCk is the state-of-charge of the kth battery set, Gpisoc is the PI controller of the SoC average controller, vdc* is the reference value of the DC link voltage, vdc is the actual DC link voltage, Gpiv is the PI controller of the voltage control loop, and idc* is the reference voltage of the DC link current.Since the proposed additional control loop is implemented based on the average SoC, it should be noted that:

Control System Design in Stage I
As indicated in Section 2, Stage I in the proposed two-stage BESS is responsible for managing and controlling the batteries in a regional battery module.In particular, the proposed control diagram is designed and implemented to not only achieve conventional local battery voltage and current control, but also realize SoC balancing in each battery module.The conventional local voltage and current control are implemented using a traditional proportional-integral (PI) controller, while the SoC balancing is achieved based on an average-based control scheme.For each battery module, the SoC of each battery set is measured and monitored, and their average is calculated in the decentralized controller of each DC/DC interface inverter.The control objective is to guarantee that the average of all SoC values is equal to that of each SoC.Therefore, the final goal is to equalize the SoC values of each battery set.
Given the slow dynamics of SoC, the average-based control loop is designed as the outer loop of the overall control diagram.In the meantime, the output of the average-based SoC control loop is fed into the inner voltage and current cascaded control loops as an add-on term.Therefore, the emerging control objective (i.e., to balance the SoC of each battery set) and the conventional control object (i.e., voltage and current control) can be obtained simultaneously.The detailed control diagram is shown in Figure 2.
Based on the control diagram detailed in Figure 2, it can be derived that: where SoC k is the state-of-charge of the kth battery set, G pisoc is the PI controller of the SoC average controller, v dc * is the reference value of the DC link voltage, v dc is the actual DC link voltage, G piv is the PI controller of the voltage control loop, and i dc * is the reference voltage of the DC link current.
Since the proposed additional control loop is implemented based on the average SoC, it should be noted that: where SoC i and SoC j are the state-of-charge of the neighboring units of the corresponding battery set.
Energies 2018, 11, x FOR PEER REVIEW 5 of 14 where SoCi and SoCj are the state-of-charge of the neighboring units of the corresponding battery set.Note that to release the communication stress, it is not necessary to use a global communication network and cover all of the point-to-point communication channels among all of the active nodes.
Since multi-loop control diagram is used in Stage I, in order to stabilize the whole system without violating the dynamic operation performance, the interactions between different sections in the converter systems should be finely designed.In other words, it is necessary to adjust the output impedances of the converters in Stage I and the input impedance of the inverter in Stage II to satisfy the Middlebrook criteria [30,31].It is worth mentioning that the stability criteria is established based on the comparison of output and input impedances as per the requirements in Middlebrook criteria.Therefore, two cutting frequencies are defined, as flow and fhigh, which are used to represent the two intersection frequencies when comparing the output and input impedances in the frequency domain.If denoting the output and input impedances as |ZoS| and |ZiL|, respectively, the stability criteria can be represented as below: where ( ) In order to further expand the operation range of the proposed two-stage BESS, a virtual impedance is deployed at the input terminal of the inverter in Stage II.Note that this virtual impedance at Stage II is not regulated within a very large range.It is only adjustable between the frequency boundaries of flow and fhigh.The goal of involving this virtual impedance is to guarantee that the equivalent output impedance and input impedance between Stage I and Stage II meet the requirements as set forth in (3).
By adding the additional virtual impedance in the input side of the inverter at Stage II, it can be derived that the equivalent virtual input impedance is shown as: Note that to release the communication stress, it is not necessary to use a global communication network and cover all of the point-to-point communication channels among all of the active nodes.
Since multi-loop control diagram is used in Stage I, in order to stabilize the whole system without violating the dynamic operation performance, the interactions between different sections in the converter systems should be finely designed.In other words, it is necessary to adjust the output impedances of the converters in Stage I and the input impedance of the inverter in Stage II to satisfy the Middlebrook criteria [30,31].It is worth mentioning that the stability criteria is established based on the comparison of output and input impedances as per the requirements in Middlebrook criteria.Therefore, two cutting frequencies are defined, as f low and f high , which are used to represent the two intersection frequencies when comparing the output and input impedances in the frequency domain.If denoting the output and input impedances as |Z oS | and |Z iL |, respectively, the stability criteria can be represented as below: |ϕ where ϕ(Z oS ) and ϕ(Z iL ) are phase angles of Z oS and Z iL , respectively, and (3) should be satisfied between f low and f high .
In order to further expand the operation range of the proposed two-stage BESS, a virtual impedance is deployed at the input terminal of the inverter in Stage II.Note that this virtual impedance at Stage II is not regulated within a very large range.It is only adjustable between the frequency boundaries of f low and f high .The goal of involving this virtual impedance is to guarantee that the equivalent output impedance and input impedance between Stage I and Stage II meet the requirements as set forth in (3).
By adding the additional virtual impedance in the input side of the inverter at Stage II, it can be derived that the equivalent virtual input impedance is shown as: where Z iL is the original input impedance, Z vi is the virtual impedance, and Z iL is the modified virtual impedance.
To implement the virtual impedance at the input side of the inverter, the reference of DC link voltage can be modified to equivalently manipulate the input impedance, which yields: where G in is the transfer function equivalently involved in the DC-link voltage loop, and G loopd , G vd , G pwmd , and G id are the transfer functions used in the control diagrams of the downstream inverters.Among them, G vd and G id are the voltage and current loops, G loopd is the original loop gain of the original control loop, and G pwmd is the pulse width modulation (PWM) delay.
In (5), the transfer function G in is used to indirectly implement the virtual impedance by changing the DC link voltage reference.The reason for this is that, by re-orienting the control implementation into DC link voltage rather than using DC link input current directly, the proposed control diagram can be easily integrated with the DC-link voltage controller.Meanwhile, there are commonly rich disturbances and switching oscillations in the DC link current.Using the DC link voltage, it is possible to stabilize the system more easily, without being influenced by the high-frequency harmonics.

Control System Design in Stage II
As mentioned above, each battery module is associated with a PCS to achieve a stable power exchange between the BESS and the external grid or the PCC of a microgrid.In addition to the traditional control loops, as shown in Figure 3, which are designed for voltage and current control, an extra virtual impedance loop is employed to facilitate the integration of multiple PCSs at the common coupling and to mitigate the impacts induced by instabilities.Note that the proposed virtual impedance loop is implemented based on PCC voltage feedback.By inserting the virtual impedance loop, it is equivalent to adding a physical resistor at the PCC, as shown in Figure 4.
Energies 2018, 11, x FOR PEER REVIEW 6 of 14 where ZiL is the original input impedance, Zvi is the virtual impedance, and ZiL′ is the modified virtual impedance.
To implement the virtual impedance at the input side of the inverter, the reference of DC link voltage can be modified to equivalently manipulate the input impedance, which yields: where Gin is the transfer function equivalently involved in the DC-link voltage loop, and Gloopd, Gvd, Gpwmd, and Gid are the transfer functions used in the control diagrams of the downstream inverters.Among them, Gvd and Gid are the voltage and current loops, Gloopd is the original loop gain of the original control loop, and Gpwmd is the pulse width modulation (PWM) delay.In ( 5), the transfer function Gin is used to indirectly implement the virtual impedance by changing the DC link voltage reference.The reason for this is that, by re-orienting the control implementation into DC link voltage rather than using DC link input current directly, the proposed control diagram can be easily integrated with the DC-link voltage controller.Meanwhile, there are commonly rich disturbances and switching oscillations in the DC link current.Using the DC link voltage, it is possible to stabilize the system more easily, without being influenced by the highfrequency harmonics.

Control System Design in Stage II
As mentioned above, each battery module is associated with a PCS to achieve a stable power exchange between the BESS and the external grid or the PCC of a microgrid.In addition to the traditional control loops, as shown in Figure 3, which are designed for voltage and current control, an extra virtual impedance loop is employed to facilitate the integration of multiple PCSs at the common coupling and to mitigate the impacts induced by instabilities.Note that the proposed virtual impedance loop is implemented based on PCC voltage feedback.By inserting the virtual impedance loop, it is equivalent to adding a physical resistor at the PCC, as shown in Figure 4.  Energies 2018, 11, x FOR PEER REVIEW 6 of 14 where ZiL is the original input impedance, Zvi is the virtual impedance, and ZiL′ is the modified virtual impedance.
To implement the virtual impedance at the input side of the inverter, the reference of DC link voltage can be modified to equivalently manipulate the input impedance, which yields: where Gin is the transfer function equivalently involved in the DC-link voltage loop, and Gloopd, Gvd, Gpwmd, and Gid are the transfer functions used in the control diagrams of the downstream inverters.Among them, Gvd and Gid are the voltage and current loops, Gloopd is the original loop gain of the original control loop, and Gpwmd is the pulse width modulation (PWM) delay.In ( 5), the transfer function Gin is used to indirectly implement the virtual impedance by changing the DC link voltage reference.The reason for this is that, by re-orienting the control implementation into DC link voltage rather than using DC link input current directly, the proposed control diagram can be easily integrated with the DC-link voltage controller.Meanwhile, there are commonly rich disturbances and switching oscillations in the DC link current.Using the DC link voltage, it is possible to stabilize the system more easily, without being influenced by the highfrequency harmonics.

Control System Design in Stage II
As mentioned above, each battery module is associated with a PCS to achieve a stable power exchange between the BESS and the external grid or the PCC of a microgrid.In addition to the traditional control loops, as shown in Figure 3, which are designed for voltage and current control, an extra virtual impedance loop is employed to facilitate the integration of multiple PCSs at the common coupling and to mitigate the impacts induced by instabilities.Note that the proposed virtual impedance loop is implemented based on PCC voltage feedback.By inserting the virtual impedance loop, it is equivalent to adding a physical resistor at the PCC, as shown in Figure 4.The overall control diagram of multiple PCSs can be regarded as a multiple input multiple output (MIMO) system.Based on the circuit interaction, it can be noted that multiple PCSs are coupled at the PCC, which means that the multiple output terminals of the MIMO system are coupled as well.
To better understand the interactions among multiple outputs of the MIMO system and design the corresponding virtual impedance loops, the MIMO system can be implemented below: Simplifying ( 6), it yields that: where Note that G control represents the inner control loops.Therefore, by using the aggregated transfer function (7), the transfer functions from the reference value of the grid-connected current to the actual grid-connected current can be obtained.Therefore, the frequency domain analysis can be obtained by analyzing the corresponding transfer functions in (7) in the z-domain.Taking the transfer function from I g1 * to I g1 as an example, the derived bode plot is shown in Figure 5a.Here, the Tustin discretization is used, as shown below: where T pwm is the PWM delay.Note that the z-domain stability analysis results show that there is a pair of unstable poles, which are 0.49 ± j 0.89.Here, a zoom-in result is shown in Figure 5a since the positive and negative planes are symmetric.The poles are indicated by the blue cross.is observed that this pair of poles is located outside the unit circuit, which indicates that the system is unstable.
After activating the additional virtual impedance loops, it is noticed that the unstable poles move into the unit circuit, which indicates that the system is stable.Therefore, the effectiveness of the proposed method can be validated.

Charging and Discharging Coordination
Considering both charging and discharging operations, it is necessary to discuss and ensure that safe operation can be guaranteed in both of the above processes.The charging and discharging of multiple battery sets are coordinated following the two-stage architecture.
In Stage I, the charging and discharging procedures are coordinated and implemented using the additional average-based SoC control loop, which means that the SoC is balanced in each battery module.Therefore, the charging and discharging process can be coordinated with the SoC of each battery set balanced.In other words, with a balanced SoC in each battery set, neither the overcharging nor the over-discharging procedure will be triggered.On the other hand, in Stage II, the charging and discharging of multiple battery modules are coordinated in the PCSs.The direction of power flow in the multiple PCSs are determined based on the grid-side dispatch command.When the whole BESS is requested to provide active power support, multiple PCSs are controlled simultaneously to support power (i.e., operated with power flowing from the BESS to the external grid); when the whole BESS is requested to absorb active power, multiple PCSs are controlled to absorb power instead (i.e., operated with power flowing from the external grid to the BESS).

Simulation Validation
In order to verify the proposed two-stage BESS and the corresponding control diagram, a comprehensive simulation model is established in MATLAB/Simulink (MATLAB2015a, MathWorks, Natick, MA, USA).For Stage I, there are two battery modules, and each battery module includes two battery sets.Meanwhile, for Stage II, there are two PCS, which are connected to each battery module.

Charging and Discharging Coordination
Considering both charging and discharging operations, it is necessary to discuss and ensure that safe operation can be guaranteed in both of the above processes.The charging and discharging of multiple battery sets are coordinated following the two-stage architecture.
In Stage I, the charging and discharging procedures are coordinated and implemented using the additional average-based SoC control loop, which means that the SoC is balanced in each battery module.Therefore, the charging and discharging process can be coordinated with the SoC of each battery set balanced.In other words, with a balanced SoC in each battery set, neither the over-charging nor the over-discharging procedure will be triggered.On the other hand, in Stage II, the charging and discharging of multiple battery modules are coordinated in the PCSs.The direction of power flow in the multiple PCSs are determined based on the grid-side dispatch command.When the whole BESS is requested to provide active power support, multiple PCSs are controlled simultaneously to support power (i.e., operated with power flowing from the BESS to the external grid); when the whole BESS is requested to absorb active power, multiple PCSs are controlled to absorb power instead (i.e., operated with power flowing from the external grid to the BESS).

Simulation Validation
In order to verify the proposed two-stage BESS and the corresponding control diagram, a comprehensive simulation model is established in MATLAB/Simulink (MATLAB2015a, MathWorks, Natick, MA, USA).For Stage I, there are two battery modules, and each battery module includes two battery sets.Meanwhile, for Stage II, there are two PCS, which are connected to each battery module.In other words, each PCS is connected to a battery module.The diagram of the test system is represented in Figure 6 and the system parameters are shown in Table 1.Note that LCL filters are used for PCS inverters.The typical design procedure of the LCL filter is listed as follows.
Step 1: The inverter-side inductance is selected to minimize the current ripple in the inverter output current waveform; Step 2: The filter capacitance is selected to maintain a sufficient damping ratio at the high-frequency range, i.e., to ensure a sufficient stability margin; Step 3: The grid-side inductance is selected after Steps 1 and 2 to further suppress the steady-state error in the grid-connected current [32].Meanwhile, the DC-link capacitance of the PCS inverter is 650 µF, which is determined by considering the maximum ripple voltage as well as the power balance between DC and AC sides of the inverter so that the AC-side voltage can be held up temporarily even though the AC grid voltage is interrupted.
Two test scenarios are considered, including SoC balancing among multiple ESUs at Stage I and stable power conditioning at Stage II.In other words, each PCS is connected to a battery module.The diagram of the test system is represented in Figure 6 and the system parameters are shown in Table 1.Note that LCL filters are used for PCS inverters.The typical design procedure of the LCL filter is listed as follows.
Step 1: The inverter-side inductance is selected to minimize the current ripple in the inverter output current waveform; Step 2: The filter capacitance is selected to maintain a sufficient damping ratio at the highfrequency range, i.e., to ensure a sufficient stability margin; Step 3: The grid-side inductance is selected after Steps 1 and 2 to further suppress the steady-state error in the grid-connected current [32].Meanwhile, the DC-link capacitance of the PCS inverter is 650 μF, which is determined by considering the maximum ripple voltage as well as the power balance between DC and AC sides of the inverter so that the AC-side voltage can be held up temporarily even though the AC grid voltage is interrupted.

Case I: SoC Balancing among Multiple ESUs at Stage I
Considering the same control diagram in Modules #1 and #2, Module #1 is taken as an example (i.e., the top half section of the circuits in Figure 6), as shown in Figures 7−10, the SoC of each ESU is balanced in both charging and discharging processes.In Figure 7, with decreasing SoC, since the average of the SoCs are controlled, they gradually become equal to each other, while as shown in Figure 9, on the other hand, in the charging process, with increasing SoC, since the average of all the two SoCs are controlled, they also gradually become equal.Note that the curve of SoC1/SoC2 is shown in these two figures to highlight that the SoC of each battery set is gradually equalized.Meanwhile, the corresponding waveforms of the discharging and charging power are shown in Figures 8 and 10, respectively.

Case I: SoC Balancing among Multiple ESUs at Stage I
Considering the same control diagram in Modules #1 and #2, Module #1 is taken as an example (i.e., the top half section of the circuits in Figure 6), as shown in Figures 7-10, the SoC of each ESU is balanced in both charging and discharging processes.In Figure 7, with decreasing SoC, since the average of the SoCs are controlled, they gradually become equal to each other, while as shown in Figure 9, on the other hand, in the charging process, with increasing SoC, since the average of all the two SoCs are controlled, they also gradually become equal.Note that the curve of SoC 1 /SoC 2 is shown in these two figures to highlight that the SoC of each battery set is gradually equalized.Meanwhile, the corresponding waveforms of the discharging and charging power are shown in Figures 8 and 10, respectively.

Conclusions
In this paper, a two-stage BESS is designed and implemented.In Stage I, a modular design is implemented to aggregate multiple battery sets and one BMS is associated with one aggregated battery module; in Stage II, one PCS is used to connect each aggregated battery module to the external grid or PCC of a microgrid.By using the above modular BESS, less BMSs and PCSs are used, so the system cost can be lowered.Meanwhile, from the inverter control standing point, SoC balancing is achieved in each aggregated battery module to equalize the charging and discharging power among multiple battery sets.Meanwhile, an extra virtual impedance loop is employed to facilitate the integration of multiple PCSs in Stage II so that resonance issues can be mitigated.

Conclusions
In this paper, a two-stage BESS is designed and implemented.In Stage I, a modular design is implemented to aggregate multiple battery sets and one BMS is associated with one aggregated battery module; in Stage II, one PCS is used to connect each aggregated battery module to the external grid or PCC of a microgrid.By using the above modular BESS, less BMSs and PCSs are used, so the system cost can be lowered.Meanwhile, from the inverter control standing point, SoC balancing is achieved in each aggregated battery module to equalize the charging and discharging power among multiple battery sets.Meanwhile, an extra virtual impedance loop is employed to facilitate the integration of multiple PCSs in Stage II so that resonance issues can be mitigated.

Figure 1 .
Figure 1.Configuration of the two-stage battery energy storage system (BESS).

Figure 1 .
Figure 1.Configuration of the two-stage battery energy storage system (BESS).

Figure 2 .
Figure 2. Control diagram of Stage I: average-based state-of-charge (SoC) balancing and conventional DC voltage and current control loops.
of ZoS and ZiL, respectively, and (3) should be satisfied between flow and fhigh.

Figure 2 .
Figure 2. Control diagram of Stage I: average-based state-of-charge (SoC) balancing and conventional DC voltage and current control loops.

Figure 3 .Figure 4 .
Figure 3.Control diagram of the power conditioning system (PCS).PCC DC AC

Figure 3 .
Figure 3.Control diagram of the power conditioning system (PCS).

Figure 3 .Figure 4 .
Figure 3.Control diagram of the power conditioning system (PCS).PCC DC AC

Figure 4 .
Figure 4. Virtual impedance equivalently connected at the capacitor branch.Figure 4. Virtual impedance equivalently connected at the capacitor branch.

Figure 5 .
Figure 5. Z-domain analysis of the transfer from I g1 * to I g1 : (a) unstable (b) stable.

Figure 12 .
Figure 12.Fast Fourier Transform (FFT) analysis results of the grid-connected current without or with the additional virtual impedance loop: (a) without virtual impedance loop; (b) with virtual impedance loop.

Figure 12 .
Figure 12.Fast Fourier Transform (FFT) analysis results of the grid-connected current without or with the additional virtual impedance loop: (a) without virtual impedance loop; (b) with virtual impedance loop.
grid-connected current control; (2) local voltage regulation; and (3) stability enhancement based on virtual impedance.The additional virtual impedance loop is designed to mitigate the impacts of resonance issues in the microgrid with multiple battery modules and thereby multiple PCSs.2018, 11, x FOR PEER REVIEW 4 of 14 stability enhancement based on virtual impedance.The additional virtual impedance loop is designed to mitigate the impacts of resonance issues in the microgrid with multiple battery modules and thereby multiple PCSs.

Table 1 .
Two test scenarios are considered, including SoC balancing among multiple ESUs at Stage I and stable power conditioning at Stage II.System parameters.