A Simple Method for Reducing THD and Improving the Efficiency in CSI Topology Based on SiC Power Devices

Silicon carbide (SiC)-based switching devices provide significant performance improvements in many aspects, including lower power dissipation, higher operating temperatures, and faster switching; compared with conventional Si devices, all these features contribute to these devices generating interest in applications for electric traction systems. The topology that is frequently used in these systems is the voltage source inverter (VSI), but the use of SiC devices in the current source inverter topology (CSI), which is considered as an emerging topology, generates interest. This paper presents a method for improving total harmonic distortion (THD) in the currents of output and efficiency in SiC current source inverter for future application in an electric traction system. The method that is proposed consists of improving the coupling of a bidirectional converter topology, voltage current (V-I) and CSI. The V-I converter serves as a current regulator for the CSI, and allows for the recovery of energy. The method involves an effective selection of the switching frequencies and phase angles for the carrier signals that are present in each converter topology. With this method, it is expected to have a reduction of the total harmonic distortion, THD in the output currents. In addition, a comparative analysis between converters with all-SiC technology and converters with hybrid technology is realized, to verify the impact of the SiC devices in the power converters efficiency.


Introduction
The constant growth of hybrid and electric vehicles (EHV/EV) promotes new challenges to achieve the total integration of these vehicles in the transportation field.High power density and high efficiency powertrains are among other important drawbacks in the EHV/EV designs.The electric traction systems play an important role for addressing these issues.Therefore, the new technologies study, and the search for alternatives to traditional power converters and switching devices, and control are important within the design requirements of electric traction systems for EHV/EV.
Silicon carbide devices (SiC) are a mature technology, and examples are widely found in the market [1][2][3][4].Recent research has shown the advantages and disadvantages of the SiC devices.These elements possess better characteristics than silicon devices, such as low switching losses, higher switching frequencies, and higher temperature operation ranges [4][5][6][7][8].Accordingly, the SiC devices allow for the design of power converters with high-power densities and high efficiencies.
In [9][10][11][12], several studies of power converter topologies with SiC devices for electric traction systems are presented.The switching frequency ranges that are used in the different studies are

V-I Converter and CSI Inverter Analysis
The proposed converter topology shown in Figure 1 uses a V-I converter to regulate the current input.Also, a CSI inverter that generates three-phase currents of output with SiC devices is proposed.Based on the previous analyses presented in [20,21], this topology can be analyzed in two modes, as shown in Figure 2. It is assumed that the output current Iout maintains a constant for a one state of the converter control.In the first mode, the SiC MOSFETs T1 and T2 are turned ON, and a DC voltage delivered by a battery is applied to the converter.The inductor L1 converts to storage energy.Current returns through the activation of SiC MOSFETs T2, during Toff modulation state and the diodes D1, and D2 are in reverse bias; therefore, they are not activated.A current Iout and a voltage Vout are obtained in the V-I converter output where VBat depends on the converter control.In the second mode (Figure 2b) the MOSFETs are turned off, and the current flows through the diodes D1 and D2, this mode can be implemented in the case when the CSI current converter returns the energy to recharge the high voltage battery Vout = −VBat.The model dynamic of V-I converter is governed by (1): where the output voltage Vout of the V-I converter can take three values: the battery voltage (Vout = VBat) when the V-I converter operates in the first state, also, Vout = 0 when T1 and T2 are OFF, or Vout = −VBat.To maintain a desired level of the dc choke current, the V-I converter alternates between the first state and ON-OFF of T1 or T2.
The CSI inverter has six transistors and six Schottky diodes connected in series; all devices are made of silicon carbide.Depending on the modulation technique implemented, the CSI inverter is responsible for directing the current through the load by the ON and OFF control of each transistor.
For the operation of the CSI topology, it is necessary to generate typical patterns, and to add short-circuit pulses to obtain the activation signals; for this reason it is necessary for the use of the Based on the previous analyses presented in [20,21], this topology can be analyzed in two modes, as shown in Figure 2. It is assumed that the output current I out maintains a constant for a one state of the converter control.In the first mode, the SiC MOSFETs T 1 and T 2 are turned ON, and a DC voltage delivered by a battery is applied to the converter.The inductor L 1 converts to storage energy.Current returns through the activation of SiC MOSFETs T 2 , during T off modulation state and the diodes D 1 , and D 2 are in reverse bias; therefore, they are not activated.A current I out and a voltage V out are obtained in the V-I converter output where V Bat depends on the converter control.In the second mode (Figure 2b) the MOSFETs are turned off, and the current flows through the diodes D 1 and D 2 , this mode can be implemented in the case when the CSI current converter returns the energy to recharge the high voltage battery V out = −V Bat .

V-I Converter and CSI Inverter Analysis
The proposed converter topology shown in Figure 1 uses a V-I converter to regulate the current input.Also, a CSI inverter that generates three-phase currents of output with SiC devices is proposed.Based on the previous analyses presented in [20,21], this topology can be analyzed in two modes, as shown in Figure 2. It is assumed that the output current Iout maintains a constant for a one state of the converter control.In the first mode, the SiC MOSFETs T1 and T2 are turned ON, and a DC voltage delivered by a battery is applied to the converter.The inductor L1 converts to storage energy.Current returns through the activation of SiC MOSFETs T2, during Toff modulation state and the diodes D1, and D2 are in reverse bias; therefore, they are not activated.A current Iout and a voltage Vout are obtained in the V-I converter output where VBat depends on the converter control.In the second mode (Figure 2b) the MOSFETs are turned off, and the current flows through the diodes D1 and D2, this mode can be implemented in the case when the CSI current converter returns the energy to recharge the high voltage battery Vout = −VBat.The model dynamic of V-I converter is governed by (1): where the output voltage Vout of the V-I converter can take three values: the battery voltage (Vout = VBat) when the V-I converter operates in the first state, also, Vout = 0 when T1 and T2 are OFF, or Vout = −VBat.To maintain a desired level of the dc choke current, the V-I converter alternates between the first state and ON-OFF of T1 or T2.
The CSI inverter has six transistors and six Schottky diodes connected in series; all devices are made of silicon carbide.Depending on the modulation technique implemented, the CSI inverter is responsible for directing the current through the load by the ON and OFF control of each transistor.
For the operation of the CSI topology, it is necessary to generate typical patterns, and to add short-circuit pulses to obtain the activation signals; for this reason it is necessary for the use of the The model dynamic of V-I converter is governed by (1): where the output voltage V out of the V-I converter can take three values: the battery voltage (V out = V Bat ) when the V-I converter operates in the first state, also, V out = 0 when T 1 and T 2 are OFF, or V out = −V Bat .To maintain a desired level of the dc choke current, the V-I converter alternates between the first state and ON-OFF of T 1 or T 2 .
The CSI inverter has six transistors and six Schottky diodes connected in series; all devices are made of silicon carbide.Depending on the modulation technique implemented, the CSI inverter is responsible for directing the current through the load by the ON and OFF control of each transistor.
For the operation of the CSI topology, it is necessary to generate typical patterns, and to add short-circuit pulses to obtain the activation signals; for this reason it is necessary for the use of the (SPWM) sine-wave modulation technique, which generate pulses for the activation of power transistors.These pulses create a short circuit through one leg of the inverter, whenever either top or all bottom switches are open.

Proposed Method Description
An important challenge of the topology shown in Figure 1 is the synchronization between the two modulations of the converters for achieving high performance and low THD.As previously mentioned, the CSI required a controlled output current with as low ripple as possible.Besides, the CSI required a control to deliver an AC output current.
Therefore the method proposed has two stages, the first stage consists of implementing a control to regulate the output current of the V-I converter, taking into account the requirements of the CSI.In addition, a PWM control was designed for the CSI, and adapted with the V-I converter conditions.
The CSI used a PWM technique, which required two carriers A and B for generating the pulse of the transistors, as depicted in Figure 3. Accordingly, the second stage of the method consisted of searching for the best operating frequency in both V-I and CSI converters, and also to determinate the angle between, to achieve synchronization between the two controls.(SPWM) sine-wave modulation technique, which generate pulses for the activation of power transistors.These pulses create a short circuit through one leg of the inverter, whenever either top or all bottom switches are open.

Proposed Method Description
An important challenge of the topology shown in Figure 1 is the synchronization between the two modulations of the converters for achieving high performance and low THD.As previously mentioned, the CSI required a controlled output current with as low ripple as possible.Besides, the CSI required a control to deliver an AC output current.
Therefore the method proposed has two stages, the first stage consists of implementing a control to regulate the output current of the V-I converter, taking into account the requirements of the CSI.In addition, a PWM control was designed for the CSI, and adapted with the V-I converter conditions.
The CSI used a PWM technique, which required two carriers A and B for generating the pulse of the transistors, as depicted in Figure 3. Accordingly, the second stage of the method consisted of searching for the best operating frequency in both V-I and CSI converters, and also to determinate the angle between, to achieve synchronization between the two controls.For the first part, the control technique used was a proportional-integrator control (PI).The design of the control PI for the current in the V-I converter is summarized as follows: the circuit shown in Figure 4 describes the behavior of the currents and voltages generated when it is placed with an RLC load.Also, for the analysis, the internal resistances of the SiC MOSFETs (Rds = Ron), inductance (RL), and capacitance (RC) (first state) were considered.The equations obtained in the function of the circuit shown in Figure 4 are described in ( 2) and (3): For the first part, the control technique used was a proportional-integrator control (PI).The design of the control PI for the current in the V-I converter is summarized as follows: the circuit shown in Figure 4 describes the behavior of the currents and voltages generated when it is placed with an RLC load.Also, for the analysis, the internal resistances of the SiC MOSFETs (R ds = R on ), inductance (RL), and capacitance (RC) (first state) were considered.For the first part, the control technique used was a proportional-integrator control (PI).The design of the control PI for the current in the V-I converter is summarized as follows: the circuit shown in Figure 4 describes the behavior of the currents and voltages generated when it is placed with an RLC load.Also, for the analysis, the internal resistances of the SiC MOSFETs (Rds = Ron), inductance (RL), and capacitance (RC) (first state) were considered.The equations obtained in the function of the circuit shown in Figure 4 are described in ( 2) and (3): The equations obtained in the function of the circuit shown in Figure 4 are described in ( 2) and (3): From Equations ( 2)-( 5) can represented a state space system: Theses equations can be expressed in the matrix form: V o (t) dt Then, with the previous analysis, the transfer function could be calculated.After that, a PI controller was designed and tuned for achieving the expected outputs.The simulation results of the PI controller tuning of the system are shown in Figure 5.
Energies 2018, 9, x FOR PEER REVIEW 5 of 24 From Equations ( 2)-( 5) can represented a state space system: Theses equations can be expressed in the matrix form: Then, with the previous analysis, the transfer function could be calculated.After that, a PI controller was designed and tuned for achieving the expected outputs.The simulation results of the PI controller tuning of the system are shown in Figure 5.For the tuning of the PI controller, the auto-tuning tool of the proportional-integrator-derivate block (PID) of Simulink was used.The results are shown in Figure 6 and Table 1.For the tuning of the PI controller, the auto-tuning tool of the proportional-integrator-derivate block (PID) of Simulink was used.The results are shown in Figure 6 and Table 1.The second stage for the control development began with the search of the switching frequency for each converter.For doing the search, a random frequency (fs) was assigned, and with this frequency, three conditions for the analysis were established by (8): The first condition assigned the same value of the switching frequency for the V-I power converter and the CSI.The second condition indicated that the value of the switching frequency of the CSI was the double that of the V-I converter.Finally, the third condition indicated that the switching frequency of V-I converter was double of the CSI.Considering these three conditions, the analysis followed the flowchart shown in Figure 7.The second stage for the control development began with the search of the switching frequency for each converter.For doing the search, a random frequency (f s ) was assigned, and with this frequency, three conditions for the analysis were established by (8): The first condition assigned the same value of the switching frequency for the V-I power converter and the CSI.The second condition indicated that the value of the switching frequency of the CSI was the double that of the V-I converter.Finally, the third condition indicated that the switching frequency of V-I converter was double of the CSI.Considering these three conditions, the analysis followed the flowchart shown in Figure 7.
Regarding state-of-the-art methods, the switching frequencies in applications with SiC devices are around 50 kHz to 200 kHz.However, even with the low losses achieved using silicon carbide devices, it is important that a compensation is made between the switching frequency and switching losses.Thus, after a study, the switching frequency of the V-I converter was fixed at 35 kHz in all simulation cases, A, B, and C.Meanwhile, the switching frequency for the CSI converter was set at 70 kHz.Later a THD analysis of the output currents was performed and the THD value for each option was obtained.This analysis consisted of defining the two carrier signals of each converter.The carrier signal of the V-I was considered as the reference signal (Figure 8).Subsequently, it displaced the angle of the signals carrier between a range of 0 • to 180 • , in steps of 30 degrees.With the results obtained, a new THD analysis was carried out.Besides, if the value of THD was further reduced for some phase angle, the condition was validated and the tuning was done.Regarding state-of-the-art methods, the switching frequencies in applications with SiC devices are around 50 kHz to 200 kHz.However, even with the low losses achieved using silicon carbide devices, it is important that a compensation is made between the switching frequency and switching losses.Thus, after a study, the switching frequency of the V-I converter was fixed at 35 kHz in all simulation cases, A, B, and C.Meanwhile, the switching frequency for the CSI converter was set at 70 kHz.Later a THD analysis of the output currents was performed and the THD value for each option was obtained.This analysis consisted of defining the two carrier signals of each converter.The carrier signal of the V-I was considered as the reference signal (Figure 8).Subsequently, it displaced the angle of the signals carrier between a range of 0° to 180°, in steps of 30 degrees.With the results obtained, a new THD analysis was carried out.Besides, if the value of THD was further reduced for some phase angle, the condition was validated and the tuning was done.

Operation of CSI and Validation
This section presents the implementation of the proposed method.The operation of combined modulations and synchronization of the topologies were analyzed and validated by simulations.The

Fs=35kHz
In Regarding state-of-the-art methods, the switching frequencies in applications with SiC devices are around 50 kHz to 200 kHz.However, even with the low losses achieved using silicon carbide devices, it is important that a compensation is made between the switching frequency and switching losses.Thus, after a study, the switching frequency of the V-I converter was fixed at 35 kHz in all simulation cases, A, B, and C.Meanwhile, the switching frequency for the CSI converter was set at 70 kHz.Later a THD analysis of the output currents was performed and the THD value for each option was obtained.This analysis consisted of defining the two carrier signals of each converter.The carrier signal of the V-I was considered as the reference signal (Figure 8).Subsequently, it displaced the angle of the signals carrier between a range of 0° to 180°, in steps of 30 degrees.With the results obtained, a new THD analysis was carried out.Besides, if the value of THD was further reduced for some phase angle, the condition was validated and the tuning was done.

Operation of CSI and Validation
This section presents the implementation of the proposed method.The operation of combined modulations and synchronization of the topologies were analyzed and validated by simulations.The

Operation of CSI and Validation
This section presents the implementation of the proposed method.The operation of combined modulations and synchronization of the topologies were analyzed and validated by simulations.The transistors of CSI were activated using a PWM modulation technique under conditions that will be explained later.

Technique of Modulation
In the designed PWM, some conditions were defined.First, a constant current source must be guaranteed at all times.Second, the transistors must work in such a way that an open circuit in the DC link or a short circuit in the output capacitors is avoided.Any sudden loss of the current results in a large dv/dt value, due to the DC-link inductor; this would cause damage to the components.Third, only two switches will be activated at any time.If more than two are activated, the waveforms of the PWM current cannot be defined.To comply with these conditions, the modulation technique presented in [22,23] was used.It consisted of four main blocks (Figure 9) that satisfied the required constraints, and extended the duality between VSI and CSI beyond the power circuit topology [23].Using this technique allows us to guarantee a continuous current input to the CSI inverter.

Technique of Modulation
In the designed PWM, some conditions were defined.First, a constant current source must be guaranteed at all times.Second, the transistors must work in such a way that an open circuit in the DC link or a short circuit in the output capacitors is avoided.Any sudden loss of the current results in a large dv/dt value, due to the DC-link inductor; this would cause damage to the components.Third, only two switches will be activated at any time.If more than two are activated, the waveforms of the PWM current cannot be defined.
To comply with these conditions, the modulation technique presented in [22,23] was used.It consisted of four main blocks (Figure 9) that satisfied the required constraints, and extended the duality between VSI and CSI beyond the power circuit topology [23].Using this technique allows us to guarantee a continuous current input to the CSI inverter.The map gating signals obtained in the simulation of the PWM technique used, is present in Figure 10.

Implementation of the Proposed Method
The converter topology driven by the method proposed was simulated using the MATLAB-SIMULINK toolbox.The parameters for the simulation are shown in Table 2.The Fs value was The map gating signals obtained in the simulation of the PWM technique used, is present in Figure 10.

Technique of Modulation
In the designed PWM, some conditions were defined.First, a constant current source must be guaranteed at all times.Second, the transistors must work in such a way that an open circuit in the DC link or a short circuit in the output capacitors is avoided.Any sudden loss of the current results in a large dv/dt value, due to the DC-link inductor; this would cause damage to the components.Third, only two switches will be activated at any time.If more than two are activated, the waveforms of the PWM current cannot be defined.
To comply with these conditions, the modulation technique presented in [22,23] was used.It consisted of four main blocks (Figure 9) that satisfied the required constraints, and extended the duality between VSI and CSI beyond the power circuit topology [23].Using this technique allows us to guarantee a continuous current input to the CSI inverter.The map gating signals obtained in the simulation of the PWM technique used, is present in Figure 10.

Implementation of the Proposed Method
The converter topology driven by the method proposed was simulated using the MATLAB-SIMULINK toolbox.The parameters for the simulation are shown in Table 2.The Fs value was

Implementation of the Proposed Method
The converter topology driven by the method proposed was simulated using the MATLAB-SIMULINK toolbox.The parameters for the simulation are shown in Table 2.The F s value was selected as 35 kHz, and the THD was analyzed under the three conditions A, B, and C, as previously defined.The results are shown in Figure 11, which indicate that condition B has less THD harmonic distortion than the other two conditions.Thus, it can be concluded that a better response was obtained when the CSI works at a higher frequency than the V-I converter.
Once the modulations condition C was selected (f svi = 35 kHz and f scsi = 70 kHz), an analysis was performed to validate this selection.This pretended to demonstrate the switching pattern that followed, to obtain a current output in V-I with less harmonic content.The analysis is shown in Figure 12. selected as 35 kHz, and the THD was analyzed under the three conditions A, B, and C, as previously defined.The results are shown in Figure 11, which indicate that condition B has less THD harmonic distortion than the other two conditions.Thus, it can be concluded that a better response was obtained when the CSI works at a higher frequency than the V-I converter.Once the modulations condition C was selected (fsvi = 35 kHz and fscsi = 70 kHz), an analysis was performed to validate this selection.This pretended to demonstrate the switching pattern that followed, to obtain a current output in V-I with less harmonic content.The analysis is shown in Figure 12.The two states ON/OFF of the V-I have a time duration Ton and Toff, in which several commutations occur in the CSI converter.The current of the CSI was short-circuited when two transistors of one leg were switched at the same time (T3 and T4 in Ts1).In Ts2, two transistors were closed in the upper and lower aspects of different branches (T3 and T8), and the current flowed through the load connected to the CSI.This occurred as long as transistors of V-I and T1-T2 were turned on (Ton).In time, Ts3, the conduction of the current, continued, but now it passed through T3, which was in the upper part of the branch, and through T6, which belonged to the lower part of the leg 2, and also through the load that of CSI.These sequences were repeated, whereas the V-I converter was in the ON state.If the transistors were open, the current descended and presented a slope of fall for the duration of Toff, as shown in Figure 12.The two states ON/OFF of the V-I have a time duration T on and T off , in which several commutations occur in the CSI converter.The current of the CSI was short-circuited when two transistors of one leg were switched at the same time (T 3 and T 4 in T s1 ).In T s2 , two transistors were closed in the upper and lower aspects of different branches (T 3 and T 8 ), and the current flowed through the load connected to the CSI.This occurred as long as transistors of V-I and T 1 -T 2 were turned on (T on ).In time, T s3 , the conduction of the current, continued, but now it passed through T 3 , which was in the upper part of the branch, and through T 6 , which belonged to the lower part of the leg 2, and also through the load that of CSI.These sequences were repeated, whereas the V-I converter was in the ON state.If the transistors were open, the current descended and presented a slope of fall for the duration of T off , as shown in Figure 12.
Under modulation conditions of B, the frequency of V-I was double that of CSI, and the current of CSI was again short-circuited, when two transistors of one leg were switched at the same time (T s1 ), the current having a slope positive.In the next period T s2 , the current flowed by transistors of two different legs (T 3 -T 8 ), and closed for the load that was connected to CSI, then having a positive ramp but a lower slope.This happened as long as the transistors of V-I T A -T B were turned on (T on ) (Figure 13).The two states ON/OFF of the V-I have a time duration Ton and Toff, in which several commutations occur in the CSI converter.The current of the CSI was short-circuited when two transistors of one leg were switched at the same time (T3 and T4 in Ts1).In Ts2, two transistors were closed in the upper and lower aspects of different branches (T3 and T8), and the current flowed through the load connected to the CSI.This occurred as long as transistors of V-I and T1-T2 were turned on (Ton).In time, Ts3, the conduction of the current, continued, but now it passed through T3, which was in the upper part of the branch, and through T6, which belonged to the lower part of the leg 2, and also through the load that of CSI.These sequences were repeated, whereas the V-I converter was in the ON state.If the transistors were open, the current descended and presented a slope of fall for the duration of Toff, as shown in Figure 12.
Under modulation conditions of B, the frequency of V-I was double that of CSI, and the current of CSI was again short-circuited, when two transistors of one leg were switched at the same time (Ts1), the current having a slope positive.In the next period Ts2, the current flowed by transistors of two different legs (T3-T8), and closed for the load that was connected to CSI, then having a positive ramp but a lower slope.This happened as long as the transistors of V-I TA-TB were turned on (Ton) (Figure 13).These two cases were compared, and the THD of the V-I output current was analyzed with a DC component.The results obtained were shown in Figure 14.As shown, somewhat less distortion with a higher harmonic order appeared in case B, i.e., the CSI switching frequency was double the V-I one.These two cases were compared, and the THD of the V-I output current was analyzed with a DC component.The results obtained were shown in Figure 14.As shown, somewhat less distortion with a higher harmonic order appeared in case B, i.e., the CSI switching frequency was double the V-I one.
The next step was to develop an analysis that consisted of moving the angle-shift for the carrier signals of the converters.The displacement was a range of 0 • to 180 • in steps of 30 grades.After that, performing a calculation of THD for each set point of phase-shift with the previously selected frequency values regarding the result shown in Figure 15, the THD was reduced to 1.98% when the shifting between the carrier signals was 90 • .
To understand the THD related to the phase change between carrier signals, the CSI and V-I activation signal map was analyzed.Also, the conduction and short-circuit sequence were established for each instant of turning ON and OFF the V-I converter.For the situation of 0 • degrees of phase shift, the signal activation map of CSI and V-I is shown in Figure 16.
Where C is the situation of conduction, and * is the situation of the short circuit.The sequence for this situation is C*CC*CC|C*CC*CC, and it is repeated for all cycles.The signals map for the phase angles of 90 • and 120 • are shown in Figure 17; in these situations, the highest and lowest value of THD is produced.
In the first situation, (a) it was observed that there were two short-circuit states with short durations when the V-I converter was in the OFF state, and two short-circuits with a short times of duration in the ON state.In (b) situation, it was observed that there were three short-circuit states for each ON and OFF state of the V-I.From this analysis, it can be concluded that the more short-circuit states a with minor time of duration in the CSI, the higher a THD is generated, and when there are less short-circuit states with minor times, a reduction in the THD is obtained.Finally, the duration time of the short-circuit also increments the THD for the same number of short-circuit states.Table 3 shows the result of THD for each situation of angle shift and sequence of the conduction-short circuit that is obtained.
The output currents and the THD analysis for the condition of f svi = 35 kHz and f scsi = 70 kHz with an offset angle between the signals carriers of 90 • are shown in Figure 18.
In addition, the same analysis was realized but now with the V-I frequency ratio of 70 kHz, the CSI at 35 kHz and shift-angles of 0 • , 90 • and 120 • .The results are shown in Figure 19.
The results of these switching patterns indicate that if the frequency of the V-I is double that of the CSI, the short-circuit the time increase.This produces a greater harmonic distortion in the output currents.The THD obtained in these three phase situations are shown in Table 4.
In this way it was determined that situation B is the most optimal, and when the shift angle between the carriers is 90 • in this condition, the smallest THD value of the whole analysis is obtained.The next step was to develop an analysis that consisted of moving the angle-shift for the carrier signals of the converters.The displacement was a range of 0° to 180° in steps of 30 grades.After that, performing a calculation of THD for each set point of phase-shift with the previously selected frequency values regarding the result shown in Figure 15, the THD was reduced to 1.98% when the shifting between the carrier signals was 90°.The next step was to develop an analysis that consisted of moving the angle-shift for the carrier signals of the converters.The displacement was a range of 0° to 180° in steps of 30 grades.After that, performing a calculation of THD for each set point of phase-shift with the previously selected frequency values regarding the result shown in Figure 15, the THD was reduced to 1.98% when the shifting between the carrier signals was 90°.To understand the THD related to the phase change between carrier signals, the CSI and V-I activation signal map was analyzed.Also, the conduction and short-circuit sequence were established for each instant of turning ON and OFF the V-I converter.For the situation of 0° degrees of phase shift, the signal activation map of CSI and V-I is shown in Figure 16.Where C is the situation of conduction, and * is the situation of the short circuit.The sequence for this situation is C*CC*CC|C*CC*CC, and it is repeated for all cycles.The signals map for the phase angles of 90° and 120° are shown in Figure 17; in these situations, the highest and lowest value of THD is produced.Where C is the situation of conduction, and * is the situation of the short circuit.The sequence for this situation is C*CC*CC|C*CC*CC, and it is repeated for all cycles.The signals map for the phase angles of 90° and 120° are shown in Figure 17; in these situations, the highest and lowest value of THD is produced.In the first situation, (a) it was observed that there were two short-circuit states with short durations when the V-I converter was in the OFF state, and two short-circuits with a short times of duration in the ON state.In (b) situation, it was observed that there were three short-circuit states for each ON and OFF state of the V-I.From this analysis, it can be concluded that the more short-circuit states a with minor time of duration in the CSI, the higher a THD is generated, and when there are less short-circuit states with minor times, a reduction in the THD is obtained.Finally, the duration time of the short-circuit also increments the THD for the same number of short-circuit states.Table 3 shows the result of THD for each situation of angle shift and sequence of the conduction-short circuit that is obtained.The output currents and the THD analysis for the condition of fsvi = 35 kHz and fscsi =70 kHz with an offset angle between the signals carriers of 90° are shown in Figure 18.In addition, the same analysis was realized but now with the V-I frequency ratio of 70 kHz, the CSI at 35 kHz and shift-angles of 0°, 90° and 120°.The results are shown in Figure 19.

Shift-Angle
Values of THD In addition, the same analysis was realized but now with the V-I frequency ratio of 70 kHz, the CSI at 35 kHz and shift-angles of 0°, 90° and 120°.The results are shown in Figure 19.The results of these switching patterns indicate that if the frequency of the V-I is double that of the CSI, the short-circuit the time increase.This produces a greater harmonic distortion in the output currents.The THD obtained in these three phase situations are shown in Table 4.

Shift-Angle
Values of THD

Power Losses and Efficiency in the V-I Power Converter
The power losses analyzed were the conduction and switching losses.The parameters of device SiC are shown in Table 5.The conduction losses in the MOSFET SiC and diode SiC could be expressed for ( 9) and ( 10); the switching losses in the Mosfet SiC and SiC diode were expressed in ( 11) and ( 12) : where R ds is the drain-source resistor of SiC MOSFET, I rms were the effective current flowing in the device.I Dc is the value of the current flowing through the diode, respectively: where E ON is the turn-on switching energy, E OFF is the turn-off switching energy in the MOSFET SiC and E swD is the energy of switching in the SiC Schottky diode [18].The E on , E off , and E swD are calculated by ( 13)-( 15): where V DS is the voltage drain source, I D the continuous drain current, V dc is the voltage Dc link; the t ri , t fv , and Q rr are the current rise time, voltage fall time, and the reverse recovery charge, respectively [24].All these parameters are in the datasheet of the devices.

Inductor Core Losses
The losses in the inductors are from the following sources, hysteresis loss, copper or winding loss and eddy current loss.The hysteresis loss is due to the materials intrinsic properties, due to the energy used to align and re-align the magnetic domains.The general form of the losses for hysteresis P m is calculated by the Expression ( 16): where a, d, and k are constants, depending of the type of material, for this case is ferrite.Eddy current loss from the circulating currents within the magnetic materials, due to the differential in flux voltage inside the cores itself [25].These losses were highly dependent upon the thickness of the walls of the cores.The eddy current loss per unit of volume could be calculated by Expression (17): where η is the Steinmetz hysteresis constant, and ρ is the density of the material.The copper losses in the inductor are calculated by Expression (18): The total power losses in the inductor are obtained by the Expression (19) and are shown in Table 6: The rated power of the V-I converter is 1 kW. Figure 20 shows the analysis of power losses and efficiency in the V-I power converter switching at 35 kHz, with a phase-shift of 90 • in PWM carriers.Efficiency is calculated with Expression (20): Energies 2018, 9, x FOR PEER REVIEW 17 of 24 where η is the Steinmetz hysteresis constant, and ρ is the density of the material.The copper losses in the inductor are calculated by Expression (18): The total power losses in the inductor are obtained by the Expression (19) and are shown in Table 6: The rated power of the V-I converter is 1 kW. Figure 20 shows the analysis of power losses and efficiency in the V-I power converter switching at 35 kHz, with a phase-shift of 90° in PWM carriers.Efficiency is calculated with Expression ( 20

Power Losses and Efficiency in the Current Source Inverter
In the case of the CSI converter, the important rule for the calculation of losses is that there is at least one device turned on in the converter [24].The expressions that were implemented to calculate the losses for switching and conduction were as in the previous section.However, this time the topology

Power Losses and Efficiency in the Current Source Inverter
In the case of the CSI converter, the important rule for the calculation of losses is that there is at least one device turned on in the converter [24].The expressions that were implemented to calculate the losses for switching and conduction were as in the previous section.However, this time the topology of a Schottky SiC diode connected in series with each SiC MOSFET was considered.The results of power losses in the CSI converter by switching and conduction to 70 kHz, and 90 • of phase shift in the PWM carriers are presented in Figure 21.The rated power CSI converter was 1.5 kW.

Power Losses in the Electric Motor
This section presents the analysis of the power losses in the electric motor, considering four situations of operation previously analyzed, 0 degrees, 60 degrees, 90 degrees (angle with lower THD), 120 degrees of phase shift in PWM carriers for V-I and CSI converters.This analysis aims to perform a comparative study and to show that the reduction of harmonics allows for the improvement of the efficiency of the electric motor.
In the permanent magnet synchronous motor (PMSM), there are two main electrical losses, the core losses in the iron core, and the copper losses in the winding.The fundamental iron loss consisted of hysteresis loss and eddy current loss, and copper losses, which were caused by the stator coil resistance Rs [26,27].The copper losses were the losses due to the heat (Joule effect) that produced the current when it was circulated by a conductor, and it could be expressed by (21).In the analysis, the data of a PMSM engine implemented in another previous study was considered [27,28].
where m is the number of phases, Rs is the resistance, and I is the DC current, In is the root mean square (RMS) of the nth current harmonic.Rn,ac is the value of the ohmic for the nth harmonic that is determined by Expression (22).

(
) where Knse is the resistance gain cause for the effect skin, and Kn,pe is the resistance gain caused by the proximity effect.The iron losses are calculated on the basis of Expression (23): where k is the coefficient of additional losses in iron, PFEo, for magnetic sheet M250-50A, fo is the frequency, Bo is the maximum induction value, Bd is the maximum induction in the teeth, Bce is the maximum induction in the stator crown, Md is mass of the teeth, and Mce is the mass of the stator crown.The result of power losses in the PMSM for the four situations are showed in Figure 22.

Power Losses in the Electric Motor
This section presents the analysis of the power losses in the electric motor, considering four situations of operation previously analyzed, degrees, 60 degrees, 90 degrees (angle with lower THD), 120 degrees of phase shift in PWM carriers for V-I and CSI converters.This analysis aims to perform a comparative study and to show that the reduction of harmonics allows for the improvement of the efficiency of the electric motor.
In the permanent magnet synchronous motor (PMSM), there are two main electrical losses, the core losses in the iron core, and the copper losses in the winding.The fundamental iron loss consisted of hysteresis loss and eddy current loss, and copper losses, which were caused by the stator coil resistance R s [26,27].The copper losses were the losses due to the heat (Joule effect) that produced the current when it was circulated by a conductor, and it could be expressed by (21).In the analysis, the data of a PMSM engine implemented in another previous study was considered [27,28].
where m is the number of phases, R s is the resistance, and I is the DC current, I n is the root mean square (RMS) of the nth current harmonic.R n,ac is the value of the ohmic for the nth harmonic that is determined by Expression (22).R n,ac = R dc K n.se +K n,pe (22) where K nse is the resistance gain cause for the effect skin, and K n,pe is the resistance gain caused by the proximity effect.The iron losses are calculated on the basis of Expression (23): where k is the coefficient of additional losses in iron, P FEo , for magnetic sheet M250-50A, f o is the frequency, B o is the maximum induction value, B d is the maximum induction in the teeth, B ce is the maximum induction in the stator crown, M d is mass of the teeth, and M ce is the mass of the stator crown.The result of power losses in the PMSM for the four situations are showed in Figure 22.The representation of the efficiency of the motor for the situations of shift phase angles (0°, 60°, 90°, and 120°) are shown in Figure 23 are compared for outputs.The weighted average efficiency of the whole system (power converters + motor) in the situations of 0° and 90° is shown in Table 7 and Figure 24.The study allows for the demonstration that by using the proposed method, an improvement in the efficiency of the systems analyzed is obtained.The weighted average efficiency of the whole system (power converters + motor) in the situations of 0° and 90° is shown in Table 7 and Figure 24.The study allows for the demonstration that by using the proposed method, an improvement in the efficiency of the systems analyzed is obtained.The weighted average efficiency of the whole system (power converters + motor) in the situations of 0 • and 90 • is shown in Table 7 and Figure 24.The study allows for the demonstration that by using the proposed method, an improvement in the efficiency of the systems analyzed is obtained.Application of the proposed modulation patterns produced a gain in efficiency that was not highly significant (0.91%), but it was good enough to reduce the thermal stress of the power converters, the thermal behavior of the whole system, as well as the improvement of the wave shape of motor currents.
Finally, a comparative study was carried out with a hybrid DC-DC converter and VSI topology with silicon IGBTs and SiC diodes.This was done for the purpose of comparing and validating the efficiency between these topologies with frequency of operation of 5 kHz for DC-DC, and 10 kHz for VSI.The features of devices used for the hybrid DC-DC and VSI topologies are presented in Table 8.The comparison between the two topologies in terms of power losses are shown in Table 9 and Figure 25.Application of the proposed modulation patterns produced a gain in efficiency that was not highly significant (0.91%), but it was good enough to reduce the thermal stress of the power converters, the thermal behavior of the whole system, as well as the improvement of the wave shape of motor currents.
Finally, a comparative study was carried out with a hybrid DC-DC converter and VSI topology with silicon IGBTs and SiC diodes.This was done for the purpose of comparing and validating the efficiency between these topologies with frequency of operation of 5 kHz for DC-DC, and 10 kHz for VSI.The features of devices used for the hybrid DC-DC and VSI topologies are presented in Table 8.The comparison between the two topologies in terms of power losses are shown in Table 9 and Figure 25.
When obtaining the THD of the currents of the VSI topology (Figure 26) and comparing it with the previous analysis, it can be seen that the harmonic distortion increases to 2.52%.This causes losses throughout the system to increase.
These results justify us that the V-I topology with the CSI inverter of SiC devices presents better responses in losses and in harmonic distortion, with respect to the proposed VSI topology for the comparison.When obtaining the THD of the currents of the VSI topology (Figure 26) and comparing it with the previous analysis, it can be seen that the harmonic distortion increases to 2.52%.This causes losses throughout the system to increase.These results justify us that the V-I topology with the CSI inverter of SiC devices presents better responses in losses and in harmonic distortion, with respect to the proposed VSI topology for the comparison.When obtaining the THD of the currents of the VSI topology (Figure 26) and comparing it with the previous analysis, it can be seen that the harmonic distortion increases to 2.52%.This causes losses throughout the system to increase.These results justify us that the V-I topology with the CSI inverter of SiC devices presents better responses in losses and in harmonic distortion, with respect to the proposed VSI topology for the comparison.

Heatsink Estimation
The use of a cooling system or heat sink is important for the operation of converter topologies.Using a simple thermal model for SiC devices, containing a junction and a case before the heatsink, and assuming that all devices are placed on the same plate, a maximum thermal resistance for the heatsink can be estimated following the method described in [29].The maximum allowable thermal resistance for the heatsink is calculated for Expression ( 24 where the R thhs is the heatsink temperature, T a is the ambient temperature, and P d is the power dissipated by the component.Applying this method gives a heatsink estimate of the heatsink of 0.68 • C/W for the V-I converter, and 0.22 • C/W for the CSI inverter, with an operating temperature of 142 • C and 25 • C of the ambient temperature.

Conclusions
This paper presents a method for reducing the total harmonic distortion in the output currents of a CSI topology, with a V-I power converter based on SiC.The method consists of adjusting the switching frequency and the phase-shift angle between two carrier signals.The method proposed shows positive results that allow accurate synchronization between converter topologies.Among the results obtained, it is observed that the frequency of operation of the CSI has to be higher (double), that of the V-I, to obtain a reduction of the THD.
In addition, an improvement in the efficiency is observed by varying the phase angle between PWM carriers of both power converters switching modulators, V-I and CSI.According to the comparative analysis, the results show that the efficiency increases from 91.08% to 92% by changing the phase angle from 0 • to 90 • of shift angle.
Finally, as a general conclusion, the use of SiC devices in the topologies of inverters with current sources (CSI) allows for an increase in the frequency of switching, and improvements in their efficiency.This efficiency could even be increased by a proper adjustment of switching frequencies.These advantages could translate into a substantial reduction of inverter cost and volume, higher reliability, greater power, and improved engine efficiency, allowing for the consolidation of these topologies in electric traction systems.

Figure 1 .
Figure 1.Topology proposed for the study.

Figure 2 .
Figure 2. Current trajectory in V-I and CSI converter V-I.(a) First state of operation; (b) second state of operation.

Figure 1 .
Figure 1.Topology proposed for the study.

Figure 1 .
Figure 1.Topology proposed for the study.

Figure 2 .
Figure 2. Current trajectory in V-I and CSI converter V-I.(a) First state of operation; (b) second state of operation.

Figure 2 .
Figure 2. Current trajectory in V-I and CSI converter V-I.(a) First state of operation; (b) second state of operation.

Figure 3 .
Figure 3. Schematic of operation and synchronization of power converters.

Figure 4 .
Figure 4. V-I converter: first state of operation circuit (supplying energy).

Figure 3 .
Figure 3. Schematic of operation and synchronization of power converters.

Figure 4 .
Figure 4. V-I converter: first state of operation circuit (supplying energy).

Figure 4 .
Figure 4. V-I converter: first state of operation circuit (supplying energy).

Figure 5 .
Figure 5. Simulation results of the PI controller.(a) Output current response, (b) detail of the current reference at 10 A.

Figure 5 .
Figure 5. Simulation results of the PI controller.(a) Output current response, (b) detail of the current reference at 10 A.

Figure 6 .
Figure 6.Tuning of the PI controller for the V-I converter response to a step

Figure 6 .
Figure 6.Tuning of the PI controller for the V-I converter response to a step.

Figure 11 .
Figure 11.Total harmonic distortion (THD) spectrum results.(a) THD spectrum for situation A, (b) THD spectrum for situation B, (c) THD spectrum for situation C, (d) comparative results graph.

Figure 12 .
Figure 12.Switching pattern signals for V-I-CSI to f svi = 35 kHz and f scsi = 70 kHz.

Figure 13 .
Figure 13.Switching pattern signals in V-I-CSI to f svi = 70 kHz and f Scsi = 35 kHz.

Figure 14 .
Figure 14.THD comparison.(a) THD in the DC output current in V-I-CSI to fsvi = 35 kHz and fscsi =70 kHz.(b) THD in the DC output current in V-I-CSI to fsvi = 70 kHz and fscsi =35 kHz.

Figure 14 .Figure 14 .
Figure 14.THD comparison.(a) THD in the DC output current in V-I-CSI to f svi = 35 kHz and f scsi = 70 kHz.(b) THD in the DC output current in V-I-CSI to f svi = 70 kHz and f scsi = 35 kHz.

Figure 15 .
Figure 15.THD results for f svi = 35 kHz and f scsi = 70 kHz when the carrier phase is sifting.

Figure 16 .
Figure 16.Map signal in CSI and V-I with 0° of phase shift between the signal carrier.

Figure 16 . 24 Figure 16 .
Figure 16.Map signal in CSI and V-I with 0 • of phase shift between the signal carrier.

Figure 17 .Figure 18 .
Figure 17.Signal map in CSI and V-I: (a) Situation for 90 • of phase shift, (b) situation for 120 • of phase shift.Energies 2018, 9, x FOR PEER REVIEW 14 of 24

Figure 18 .
Figure 18.Simulation results of the method for the second part: (a) currents of output in situation B and a 90 • shift angle; (b) THD analysis of the output current.

Table 4 .
Result of THD with an angle shift.

Figure 18 .
Figure 18.Simulation results of the method for the second part: (a) currents of output in situation B and a 90° shift angle; (b) THD analysis of the output current.

Figure 19 .
Figure 19.Simulation results for f SV-I = 70 kHz and f scsi = 35 kHz.(a) Situation at 0 • of shift angle.(b) Situation at 90 • of shift angle.(c) Situation at 120 • of shift-angle.

Figure 20 .
Figure 20.Result of analysis in the V-I power converter.(a) Power losses (b) Efficiency.

Figure 20 .
Figure 20.Result of analysis in the V-I power converter.(a) Power losses (b) Efficiency.

Energies 2018, 9 ,
x FOR PEER REVIEW 18 of 24 of a Schottky SiC diode connected in series with each SiC MOSFET was considered.The results of power losses in the CSI converter by switching and conduction to 70 kHz, and 90° of phase shift in the PWM carriers are presented in Figure21.The rated power of the CSI converter was 1.5 kW.

Figure 21 .
Figure 21.Power losses and efficiency in the CSI power converter.

Figure 21 .
Figure 21.Power losses and efficiency in the CSI power converter.

Figure 22 . 24 Figure 22 .
Figure 22.Power losses in permanent magnet synchronous motor (PMSM)with shift angle in 0 • , 60 • , 90 • , and 120 • in the power converters.The representation of the efficiency of the motor for the situations of shift phase angles (0 • , 60 • , 90 • , and 120 • ) are shown in Figure 23 are compared for different power outputs.

Figure 24 .
Figure 24.Efficiency in all systems.

Figure 25 .
Figure 25.Power losses comparison results.(a) Power losses in V-I SiC vs. DC-DC hybrid topologies.(b) Power losses in CSI SiC vs. VSI hybrid topologies.

Figure 26 .
Figure 26.Results in VSI topology.(a) Current of output in VSI topology.(b) THD spectrum result for 6.76%.

Figure 25 .Figure 25 .
Figure 25.Power losses comparison results.(a) Power losses in V-I SiC vs. DC-DC hybrid topologies.(b) Power losses in CSI SiC vs. VSI hybrid topologies.

Figure 26 .
Figure 26.Results in VSI topology.(a) Current of output in VSI topology.(b) THD spectrum result for 6.76%.

Figure 26 .
Figure 26.Results in VSI topology.(a) Current of output in VSI topology.(b) THD spectrum result for 6.76%.

Table 1 .
Parameters of simulations of the PI control.

Table 1 .
Parameters of simulations of the PI control.

Table 2 .
Parameters of simulations.

Table 2 .
Parameters of simulations.

Table 3 .
THD result with angle-shift and sequence.

Table 3 .
THD result with angle-shift and sequence.

Table 4 .
Result of THD with an angle shift.

Table 5 .
Parameters of simulations.

Table 7 .
Parameters of simulations.

Table 7 .
Parameters of simulations.

Table 7 .
Parameters of simulations.

Table 8 .
Parameters of simulations.

Table 9 .
Power losses between SiC topology and Hybrid Topology.
Figure 24.Efficiency in all systems.

Table 8 .
Parameters of simulations.

Table 9 .
Power losses between SiC topology and Hybrid Topology.