Modular Multi-Port Ultra-High Power Level Power Converter Integrated with Energy Storage for High Voltage Direct Current ( HVDC ) Transmission

Sen Song 1, Wei Li 2, Kai Ni 1,* , Hui Xu 1, Yihua Hu 1 and Jikai Si 3 1 Department of Electrical Engineering and Electronics, The University of Liverpool, Liverpool L69 3BX, UK; sgssong2@student.liverpool.ac.uk (S.S.); Xuhui-cumt@126.com (H.X.); y.hu35@liverpool.ac.uk (Y.H.) 2 State Grid International Development Co., Ltd., Beijing 100031, China; li.wei@stategrid.com.br 3 School of Electrical Engineering and Automation, Henan Polytechnic University, Jiaozuo 454003, China; sijikai527@126.com * Correspondence: k.ni@student.liverpool.ac.uk; Tel.: +44-751-920-3720


Introduction
Solar and wind power are the dominant renewable energy sources (RESs) nowadays, whose average levelised cost of electricity (LCOE) falls within the fossil fuel-fired cost range as USD 0.05~0.17/kWh[1].For example, the global weighted average LCOE of utility-scale solar power has decreased by 73% since 2010, to USD 0.10/kWh for new projects commissioned in 2017 [1].However, the variability of RESs caused by the weather fluctuation is a challenge to connecting RESs with grid-tie systems.For example, passing clouds can affect up to 70% of daytime solar capacity, and 100% of wind capacity is reduced in calm days for individual generation assets, which have a negative impact on the stability and power quality of electric power systems [2].To address this issue, energy storage (ES) systems with the ability to store and dispatch electricity are connected to compensate for the generation fluctuations of RESs.The battery has become a candidate of grid-tie large scale RESs power plants with its increasing deployable capability and reducing cost [3].Additionally, the high voltage direct current (HVDC) transmission method is preferred for large-scale renewable power plants that have a large output power scale and long-distance transmission because HVDC transmission has the advantages of low cost and high transfer efficiency [4][5][6] compared with the conventional high voltage alternating current (HVAC) transmission.Therefore, RESs such as solar and wind power are delivered Energies 2018, 11, 2711 2 of 17 to the unity grid through HVDC transmission in conjunction with ES systems to improve the reliability, power quality, and efficiency of the overall system.
Four dominant configurations illustrated in Figure 1 show the integration of battery (ES system) with HVDC transmission, where the red arrow indicates the power flow direction.As illustrated in Figure 1a,b, the battery is either connected to DC link through an additional bidirectional DC/DC converter [7,8] or integrated into the grid side using a separate bidirectional inverter [9,10].Both configurations use a large number of components.Additionally, for the configuration illustrated in Figure 1b, due to the direct connection with the unity grid, extra circuit protection for the battery port is demanded and the power rate of the bidirectional inverter connected with the battery is as high as that of the inverter connected with the grid, which leads to a high cost.Thanks to the application of multi-port converters (MPCs), the configuration in Figure 1c solves the problems caused by the configurations in Figure 1a,b.Additionally, it has a reduced component count, fewer conversion stages, higher compactness, and improved reliability because the power conversion between any two of the source-battery outputs can be completed within one stage [11,12].
Energies 2018, 11, x FOR PEER REVIEW 2 of 18 and wind power are delivered to the unity grid through HVDC transmission in conjunction with ES systems to improve the reliability, power quality, and efficiency of the overall system.Four dominant configurations illustrated in Figure 1 show the integration of battery (ES system) with HVDC transmission, where the red arrow indicates the power flow direction.As illustrated in Figure 1a,b, the battery is either connected to DC link through an additional bidirectional DC/DC converter [7,8] or integrated into the grid side using a separate bidirectional inverter [9,10].Both configurations use a large number of components.Additionally, for the configuration illustrated in Figure 1b, due to the direct connection with the unity grid, extra circuit protection for the battery port is demanded and the power rate of the bidirectional inverter connected with the battery is as high as that of the inverter connected with the grid, which leads to a high cost.Thanks to the application of multi-port converters (MPCs), the configuration in Figure 1c solves the problems caused by the configurations in Figure 1a,b.Additionally, it has a reduced component count, fewer conversion stages, higher compactness, and improved reliability because the power conversion between any two of the source-battery outputs can be completed within one stage [11,12].The MPC design is a technical challenge to meet the HVDC requirement due to the required high DC voltage, e.g., ±800 kV [13] and the large power scale, which requires a large amount of battery cells connected in series.Battery management systems (BMS) are necessary to monitor and balance the state of charge (SOC) of each battery cell for safe operation.To design an MPC suitable for the grid-tie system, isolated, partially-isolated, and non-isolated MPCs are extensively studied.
The representative isolated MPCs install two transformers or one tri-winding transformer to extend the output ports of conventional dual-active-bridge (DAB) converters, which can achieve high DC/DC voltage conversion ratios [14][15][16].However, the voltage stress on their semiconductor components is high.[17] eliminates the active switches that are connected with the output port by series-connecting the secondary sides of two transformers, whose primary sides are linked with two DC power sources, while the converter is only suitable for unidirectional power flow.Non-isolated MPCs use modules in parallel connection to obtain the multi-port configurations, which reduce the volume due to the elimination of bulky transformers [18][19][20].However, they are mainly applied for the stand-alone systems such as electric vehicles (EVs) because galvanic isolation is preferred for the grid-tie systems for the safety reason.The partially-isolated MPCs reduce the switch count by sharing the switches of DAB converters, full bridge (FB), half-bridge (HB), or phase-shift converters [21][22][23].In [24], an interleaved HB three-port converter can achieve free power flows among the RES-ES-output loop.Nevertheless, its output voltage has been determined at the design stage according to the characteristics of the installed capacitors, inductors and transformers, which causes low control flexibility.Furthermore, the voltage and current ratings of their semiconductor components are high in the scenario of HVDC transmission.By adding submodules (SMs), modular multilevel converters (MMCs) can achieve high voltage conversion ratio without increasing the voltage stress of components.Additionally, for MMCs [25,26], the high voltage and large size batteries can be distributed into several relatively smaller ones by connecting them with SMs.However, the battery cells are series connected to achieve a high voltage level, which requires BMS for them, resulting in high complexity [27].Alternatively, the batteries cells can be decentralized into each submodule of multi-module converters [28,29] so that the distributed control of battery cells is achieved, and the BMS among isolated battery modules can be eliminated.
In this paper, based on the multi-module converter in [28], a novel bidirectional MPC is developed and adopted as the SM.The desired advantages such as power stage integration, low voltage stress of semiconductor components, expandable output voltage and power remain.Additionally, the power flow control of PV-battery output is more flexible because battery cells are controlled individually by each power cells with phase-shift (PS) as well as pulse width modulation (PWM) control.Moreover, the fault tolerant capability is improved to increase the reliability.
The paper is organised as follows: the basic cell is analysed in Section 2; the scalable topology design, operation and the fault tolerance strategy are discussed in Section 3; then, Section 4 presents the simulation results to verify the operation of the converter; finally, Section 5 concludes the main points of this paper.

Topology of the Basic Cell
The topology of the basic power cell with PV panel is shown in Figure 2, consisting of the primary circuit, the battery side circuit, and the single-phase bridge rectifier linked through a transformer with four windings.The components in the primary circuit contains two main switches S M1 -S M2 , three clamp switches S C0 -S C1 , one clamp capacitor C c , one input inductor L 1 , and one input diode D in .The battery side circuit is formed by two phase legs consisting of switches S 1 , S 4 and S 2 , S 3 , and the inductor L 2 .The output is in series connection with the single-phase bridge rectifier consisting of four diodes D 1 -D 4 .The transformer has the turns ratio as N p1 :N p2 :N s1 :N s2 = 1:1:1:n, and the leakage inductance connected with the output side is L k .
Topology of the basic cell.

Operation of the Basic Cell with PV Source
The equivalent circuits of different operation modes and the steady-state waveforms for the basic cell with PV source are illustrated in Figures 3 and 4 When there is the PV source, the switch SC0 is on permanently and Db = 0.5.The PWM control for CFPP and the phase shift angle θ1 between the VCFPP and VFB regulates the voltage level and power of the battery and output.To simplify the analysis, all switches and diodes are assumed to be identical, and the clamp capacitor is large enough so that the voltage ripple can be ignored.

Operation of the Basic Cell with PV Source
The equivalent circuits of different operation modes and the steady-state waveforms for the basic cell with PV source are illustrated in Figures 3 and 4. V gsM1 -V gsM2 are the control signals with the duty cycle D p for the two main switches S M1 -S M2 , which have a 180 • phase shift angle.V gsc1 -V gsc2 are the control signals for the two clamp switches S C1 -S C2 , which are complementary to V gsM1 -V gsM2 , respectively.V gs1 -V gs4 are the control signals for switches S 1 -S 4 , which are set as V gs1 = V gs4 , and V gs2 = V gs3 .V gs1 and V gs3 have the same duty cycle D b .V dsM1 -V dsM2 , V dsc1 -V dsc2 , and V ds1 -V ds4 are the drain-source voltages of switches S M1 -S M2 , S C1 -S C2 , and S 1 -S 4 .When there is the PV source, the switch S C0 is on permanently and D b = 0.5.The PWM control for CFPP and the phase shift angle θ 1 between the V CFPP and V FB regulates the voltage level and power of the battery and output.To simplify the analysis, all switches and diodes are assumed to be identical, and the clamp capacitor is large enough so that the voltage ripple can be ignored.
Energies 2018, 11, x FOR PEER REVIEW 4 of 18 Figure 2. Topology of the basic cell.

Operation of the Basic Cell with PV Source
The equivalent circuits of different operation modes and the steady-state waveforms for the basic cell with PV source are illustrated in Figures 3 and 4. VgsM1-VgsM2 are the control signals with the duty cycle Dp for the two main switches SM1-SM2, which have a 180° phase shift angle.Vgsc1-Vgsc2 are the control signals for the two clamp switches SC1-SC2, which are complementary to VgsM1-VgsM2, respectively.Vgs1-Vgs4 are the control signals for switches S1-S4, which are set as Vgs1 = Vgs4, and Vgs2 = Vgs3.Vgs1 and Vgs3 have the same duty cycle Db.VdsM1-VdsM2, Vdsc1-Vdsc2, and Vds1-Vds4 are the drain-source voltages of switches SM1-SM2, SC1-SC2, and S1-S4.When there is the PV source, the switch SC0 is on permanently and Db = 0.5.The PWM control for CFPP and the phase shift angle θ1 between the VCFPP and VFB regulates the voltage level and power of the battery and output.To simplify the analysis, all switches and diodes are assumed to be identical, and the clamp capacitor is large enough so that the voltage ripple can be ignored.In this example, the battery is charged.Only the operation of the basic cell during t0-t6 is introduced in this part because of the symmetrical operation.
Mode 1 (t0~t1): In this mode, the main switches SM1 and SM2 are on.The primary sides Np1, Np2 are short-circuited.All the four diodes are reverse biased.At the same time, S1 and S4 are on.The voltage of the battery side Ns1 is negative.
Mode 2 (t1~t2): At t1, the main switch SM2 is turned off.The primary-side referred inductance resonates with the parasitic capacitances of SM2 and SC2.The voltage across SC2 drops to zero at t3 so that ZVS turn-on of SC2 is obtained.
Mode 3 (t2~t3): At t2, the clamping switch SC2 is turned on with zero voltage.The energy is transferred from the PV and input inductor L1 to the output.The diodes D1 and D3 are forward biased, and the current is increases.
Mode 4 (t3~t4): At t3, switches S1 and S4 are turned off.The voltage VFB becomes positive.The inductor L2 resonates with the parasitic capacitances of S1-S4.The voltage across S2 and S3 drops to zero at t5 so that ZVS turn-on of S2 and S3 is obtained.
Mode 5 (t4~t5): At t4, switches S2 and S3 are turned on with zero-voltage.The power starts to be delivered into the FB circuit.
Mode 6 (t5~t6): At t5, the clamp switch SC2 is turned off.The primary-side referred inductance resonates with the parasitic capacitances of SM2 and SC2.The voltage across SM2 drops to zero at t6 so that ZVS turn-on of SM2 is obtained.In this example, the battery is charged.Only the operation of the basic cell during t0-t6 is introduced in this part because of the symmetrical operation.
Mode 1 (t0~t1): In this mode, the main switches SM1 and SM2 are on.The primary sides Np1, Np2 are short-circuited.All the four diodes are reverse biased.At the same time, S1 and S4 are on.The voltage of the battery side Ns1 is negative.
Mode 2 (t1~t2): At t1, the main switch SM2 is turned off.The primary-side referred inductance resonates with the parasitic capacitances of SM2 and SC2.The voltage across SC2 drops to zero at t3 so that ZVS turn-on of SC2 is obtained.
Mode 3 (t2~t3): At t2, the clamping switch SC2 is turned on with zero voltage.The energy is transferred from the PV and input inductor L1 to the output.The diodes D1 and D3 are forward biased, and the current is increases.
Mode 4 (t3~t4): At t3, switches S1 and S4 are turned off.The voltage VFB becomes positive.The inductor L2 resonates with the parasitic capacitances of S1-S4.The voltage across S2 and S3 drops to zero at t5 so that ZVS turn-on of S2 and S3 is obtained.
Mode 5 (t4~t5): At t4, switches S2 and S3 are turned on with zero-voltage.The power starts to be delivered into the FB circuit.
Mode 6 (t5~t6): At t5, the clamp switch SC2 is turned off.The primary-side referred inductance resonates with the parasitic capacitances of SM2 and SC2.The voltage across SM2 drops to zero at t6 so that ZVS turn-on of SM2 is obtained.In this example, the battery is charged.Only the operation of the basic cell during t 0 -t 6 is introduced in this part because of the symmetrical operation.
Mode 1 (t 0 ~t1 ): In this mode, the main switches S M1 and S M2 are on.The primary sides N p1 , N p2 are short-circuited.All the four diodes are reverse biased.At the same time, S 1 and S 4 are on.The voltage of the battery side N s1 is negative.
Mode 2 (t 1 ~t2 ): At t 1 , the main switch S M2 is turned off.The primary-side referred inductance resonates with the parasitic capacitances of S M2 and S C2 .The voltage across S C2 drops to zero at t 3 so that ZVS turn-on of S C2 is obtained.
Mode 3 (t 2 ~t3 ): At t 2, the clamping switch S C2 is turned on with zero voltage.The energy is transferred from the PV and input inductor L 1 to the output.The diodes D 1 and D 3 are forward biased, and the current i s increases.
Mode 4 (t 3 ~t4 ): At t 3, switches S 1 and S 4 are turned off.The voltage V FB becomes positive.The inductor L 2 resonates with the parasitic capacitances of S 1 -S 4 .The voltage across S 2 and S 3 drops to zero at t 5 so that ZVS turn-on of S 2 and S 3 is obtained.
Mode 5 (t 4 ~t5 ): At t 4 , switches S 2 and S 3 are turned on with zero-voltage.The power starts to be delivered into the FB circuit.Mode 6 (t 5 ~t6 ): At t 5 , the clamp switch S C2 is turned off.The primary-side referred inductance resonates with the parasitic capacitances of S M2 and S C2 .The voltage across S M2 drops to zero at t 6 so that ZVS turn-on of S M2 is obtained.
Altering the duty cycle D p , the three-level voltage waveforms V Np1,2 and V Ns2 are generated in the primary side and the rectifier bridge.According to the flux balance of the input inductor L 1 , the clamp voltage can be derived as The output voltage can be determined as Additionally, based on the average power flow calculation of bidirectional power converters [30,31], the power transfer between P in and P bat with the switching frequency f s is obtained in Equation ( 5).A specific phase shift θ 1 controls the power delivered to the battery.When 0 < θ 1 < π, the power can be transferred from the PV to battery and vice versa.Additionally, the power transfer between P in and P bat with the switching frequency f s is obtained as where ω = 2πf s .

Operation of the Basic Cell without PV Source
When there is no PV source, the equivalent circuits of different modes and the steady-state waveforms for the basic cell are illustrated in Figures 5 and 6.V gs1 and V gs3 have a 180 • phase shift angle with the duty cycle D b ≤ 0.5.V gs2 , V gs4 are complementary to V gs1 , V gs3 respectively.Additionally, the primary circuits are blocked to reduce the conduction losses.Because the operation is symmetrical, only the operation during t 0 -t 5 is introduced in this part.Altering the duty cycle Dp, the three-level voltage waveforms VNp1,2 and VNs2 are generated in the primary side and the rectifier bridge.According to the flux balance of the input inductor L1, the clamp voltage can be derived as (1 ) The output voltage can be determined as 2 ( 1) Additionally, based on the average power flow calculation of bidirectional power converters [30,31], the power transfer between Pin and Pbat with the switching frequency fs is obtained in Equation (5).A specific phase shift θ1 controls the power delivered to the battery.When 0<θ1<π, the power can be transferred from the PV to battery and vice versa.Additionally, the power transfer between Pin and Pbat with the switching frequency fs is obtained as where ω = 2πfs.

Operation of the Basic Cell without PV Source
When there is no PV source, the equivalent circuits of different modes and the steady-state waveforms for the basic cell are illustrated in Figure 5 and 6.Vgs1 and Vgs3 have a 180° phase shift angle with the duty cycle Db ≤ 0.5.Vgs2, Vgs4 are complementary to Vgs1, Vgs3 respectively.Additionally, the primary circuits are blocked to reduce the conduction losses.Because the operation is symmetrical, only the operation during t0-t5 is introduced in this part.Mode 1 (t0-t1): At t0, switch S3 is turned on.There is a phase shift θ2 between VNs1 and VNs2, which is dependent on the inductance L2, Lk and the output load.The battery-side current is1 recovers to zero at t1.The current is1 as a function of β = ωt is derived as where V'o is the battery-side referred output voltage, which equals to Vout/n; L'bat is the battery-side referred inductance and L'bat = L2+Lout/n 2 .Mode 2 (t1-t2): At t2, is1 starts to decrease.The voltage of VNs2 becomes positive.In this mode, is1 is determined as Mode 3 (t2-t3): At t2, switch S3 is turned off.The voltage VNs1 drops to zero.The battery-side referred inductance resonates with the parasitic capacitances of switches S3 and S4.The parasitic capacitor of S4 is discharged to zero.Therefore, ZVS turn-on of S4 is obtained at t3. Mode 4 (t3-t4): At t4, switch S4 is turned on with zero voltage.The current is1 starts to increase as shown in Equation ( 8): where tds is the dead time between switches S1-S2 and S3-S4.Mode 1 (t0-t1): At t0, switch S3 is turned on.There is a phase shift θ2 between VNs1 and VNs2, which is dependent on the inductance L2, Lk and the output load.The battery-side current is1 recovers to zero at t1.The current is1 as a function of β = ωt is derived as where V'o is the battery-side referred output voltage, which equals to Vout/n; L'bat is the battery-side referred inductance and L'bat = L2+Lout/n 2 .Mode 2 (t1-t2): At t2, is1 starts to decrease.The voltage of VNs2 becomes positive.In this mode, is1 is determined as Mode 3 (t2-t3): At t2, switch S3 is turned off.The voltage VNs1 drops to zero.The battery-side referred inductance resonates with the parasitic capacitances of switches S3 and S4.The parasitic capacitor of S4 is discharged to zero.Therefore, ZVS turn-on of S4 is obtained at t3. Mode 4 (t3-t4): At t4, switch S4 is turned on with zero voltage.The current is1 starts to increase as shown in Equation ( 8): where tds is the dead time between switches S1-S2 and S3-S4.Mode 1 (t 0 -t 1 ): At t 0 , switch S 3 is turned on.There is a phase shift θ 2 between V Ns1 and V Ns2 , which is dependent on the inductance L 2 , L k and the output load.The battery-side current i s1 recovers to zero at t 1 .The current i s1 as a function of β = ωt is derived as where V o is the battery-side referred output voltage, which equals to V out /n; L bat is the battery-side referred inductance and Mode 2 (t 1 -t 2 ): At t 2 , i s1 starts to decrease.The voltage of V Ns2 becomes positive.In this mode, i s1 is determined as Mode 3 (t 2 -t 3 ): At t 2 , switch S 3 is turned off.The voltage V Ns1 drops to zero.The battery-side referred inductance resonates with the parasitic capacitances of switches S 3 and S 4 .The parasitic capacitor of S 4 is discharged to zero.Therefore, ZVS turn-on of S 4 is obtained at t 3 .
Mode 4 (t 3 -t 4 ): At t 4 , switch S 4 is turned on with zero voltage.The current i s1 starts to increase as shown in Equation (8): where t ds is the dead time between switches S 1 -S 2 and S 3 -S 4 .
Mode 5 (t 4 -t 5 ): At t 4 , switch S 2 is turned off.The voltage V Ns1 drops to negative.The battery-side referred inductance resonates with the parasitic capacitances of switches S 1 and S 2 .The voltage across S 1 is discharged to zero so that ZVS turn-on of S 1 can be achieved at t 5 .
Because the dead time t ds is relatively short, modes 3, 5 can be neglected in the calculation and the phase shift between voltage V Ns1 and V Ns2 defined as θ 2 .Therefore, Equation ( 9) is derived according to Equation (8).
At t 5 , i(t 5 ) = −i(t 0 ) since it is the end of half cycle.Additionally, i(θ 2 ) = 0.Then, θ 2 can be derived as shown in Equation ( 10): where d is defined as V o /V bat .The power transfer is obtained as

Analysis of the Proposed Converter with Scalable Topology
As shown in Figure 7, the proposed modular multi-port bidirectional converter is composed of the basic cell illustrated in Figure 2 The primary sides are in parallel connection with the PV source V in .The battery cells are decentralized into each basic cell to obtain individual control.Additionally, the output-side windings N s2 of transformers are connected in an s × p matrix configuration, where s is the row number, and p is the column number.The matrix configuration of the converter can be easily expanded to achieve high output voltage and power rating by increasing its row number and column number respectively.Therefore, the converter can satisfy the RESs applications demanding high voltage step-up ratios and high power scales.
Energies 2018, 11, x FOR PEER REVIEW 8 of 18 Mode 5 (t4-t5): At t4, switch S2 is turned off.The voltage VNs1 drops to negative.The battery-side referred inductance resonates with the parasitic capacitances of switches S1 and S2.The voltage across S1 is discharged to zero so that ZVS turn-on of S1 can be achieved at t5.
Because the dead time tds is relatively short, modes 3, 5 can be neglected in the calculation and the phase shift between voltage VNs1 and VNs2 defined as θ2.Therefore, Equation ( 9) is derived according to Equation (8).
At t5, i(t5) = −i(t0) since it is the end of half cycle.Additionally, i(θ2) = 0.Then, θ2 can be derived as shown in Equation ( 10): where d is defined as Vo ' /Vbat.The power transfer is obtained as

Analysis of the Proposed Converter with Scalable Topology
As shown in Figure 7, the proposed modular multi-port bidirectional converter is composed of the basic cell illustrated in Figure 2 The primary sides are in parallel connection with the PV source Vin.The battery cells are decentralized into each basic cell to obtain individual control.Additionally, the output-side windings Ns2 of transformers are connected in an s × p matrix configuration, where s is the row number, and p is the column number.The matrix configuration of the converter can be easily expanded to achieve high output voltage and power rating by increasing its row number and column number respectively.Therefore, the converter can satisfy the RESs applications demanding high voltage step-up ratios and high power scales.

Operation Principle of the Scalable Topology
Cells of the scalable topology have similar operations with those for one basic cell except that the drive signals of switches in adjacent cells have a 180 • phase shift.For example, cells 12, 21, 23, and 32 have the same drive signals, whose phases are shifted by 180 • from the corresponding drive signals of cell 22.Hence, the polarities of output voltages V s2 and currents i s2 for adjacent cells are opposite.Then, the column interleaved working strategy of matrix topology is shown in Figure 8.
the drive signals of switches in adjacent cells have a 180° phase shift.For example, cells 12, 21, 23, and 32 have the same drive signals, whose phases are shifted by 180° from the corresponding drive signals of cell 22.Hence, the polarities of output voltages Vs2 and currents is2 for adjacent cells are opposite.Then, the column interleaved working strategy of matrix topology is shown in Figure 8.
The output voltage is the sum of the voltages Vs2 of cells in the same column, and the output current is the sum of the currents is2 in every column, which are shown in Equation (12) with the assumption that every cell has the identical output voltage and current.Therefore, the high output voltage and power rating can be easily obtained by increasing the row and column number of the matrix topology., Due to the parallel connection of primary-side circuit and individual battery-side circuit, all switches have the low voltage rating with high output voltage.The voltage ratings of switches in basic cells are derived as shown in Equation (13).
The current stress of diodes in columns 0 and p has half the value of Is2, which is the average output current of the basic cell.Nevertheless, the diodes in columns 1 to p − 1 have twice the current stress higher than that of other diodes, since they are connected with two basic cells.The sum of average currents of diodes in all columns equals the output current as shown in Equation ( 14), and the current stress of diodes is derived in Equation (15).Similarly, the voltage stress of diodes is obtained in Equation (16).For diodes in rows 1 to s − 1, the voltage stress has twice the value larger than that of the diodes in rows 0 and s.The output voltage is the sum of the voltages V s2 of cells in the same column, and the output current is the sum of the currents i s2 in every column, which are shown in Equation ( 12) with the assumption that every cell has the identical output voltage and current.Therefore, the high output voltage and power rating can be easily obtained by increasing the row and column number of the matrix topology.
Due to the parallel connection of primary-side circuit and individual battery-side circuit, all switches have the low voltage rating with high output voltage.The voltage ratings of switches in basic cells are derived as shown in Equation ( 13).
Energies 2018, 11, 2711 10 of 17 The current stress of diodes in columns 0 and p has half the value of I s2 , which is the average output current of the basic cell.Nevertheless, the diodes in columns 1 to p − 1 have twice the current stress higher than that of other diodes, since they are connected with two basic cells.The sum of average currents of diodes in all columns equals the output current as shown in Equation ( 14), and the current stress of diodes is derived in Equation (15).Similarly, the voltage stress of diodes is obtained in Equation ( 16).For diodes in rows 1 to s − 1, the voltage stress has twice the value larger than that of the diodes in rows 0 and s. p The maximum current and voltage stress of diodes in the s × p topology are only twice larger than that of one single cell, which is much lower than the average output voltage V o,s×p and current I o,s×p .Therefore, the low voltage/current rating semiconductor components such as switches and diodes can be used to achieve a high voltage step-up ratio and output power.

Control Scheme
Since the number of working rows determines the value of output voltage and that of working columns determines the output current, the variable output power can be obtained.As shown in Figure 9, power control is achieved by controlling the working columns according to the input current and battery charged/discharged power value.The voltage control is mandatory to meet the system operation requirements by the PS-PWM control of switches in the primary-side and battery-side circuits.Since the number of working rows determines the value of output voltage and that of working columns determines the output current, the variable output power can be obtained.As shown in Figure 9, power control is achieved by controlling the working columns according to the input current and battery charged/discharged power value.The voltage control is mandatory to meet the system operation requirements by the PS-PWM control of switches in the primary-side and batteryside circuits.

Fault Tolerance
For power electronics systems, semiconductor components are vulnerable devices [32].With unexpectedly damaged devices, the whole system has to stop and wait for maintenance, resulting in high cost and loss.Figure 10 shows the fault tolerant operation with redundancy.In normal operation, the redundant cells in columns p1 and p2 are inactive, and the converter is working with

Fault Tolerance
For power electronics systems, semiconductor components are vulnerable devices [32].With unexpectedly damaged devices, the whole system has to stop and wait for maintenance, resulting in high cost and loss.Figure 10 shows the fault tolerant operation with redundancy.In normal operation, the redundant cells in columns p1 and p2 are inactive, and the converter is working with the column interleaved strategy as shown in Figure 8.When there are failed cells, the converter can maintain normal operation by replacing the faulty column with one redundant column.For the damaged diodes in columns 1 to p − 1, two redundant columns are necessary.For example, when cell 11 fails, the column in the red dotted rectangle is replaced by the redundancy in another red dotted box.For the defective diode D 11 , columns 1 and 2 in the blue dotted box are idle, and the redundant columns p1 and p2 are applied.Additionally, owing to the matrix configuration and flexible control, the converter can still btain fault tolerance of cells and diodes without redundancy as depicted in Figure 11.When there re failed cells or short-circuited diodes, the converter can still work as in Figure 11a,b.When diode 11 is short-circuited, its connecting rows 1 and 2 are inactive to block the damaged devices.The other ells still operate with the column interleaved strategy and the duty cycle Dp of them is increased to btain the normal output voltage with fewer working rows.The fault tolerance of the open-circuited iode can be achieved as shown in Figure 11b,c.The fault tolerance operating group consists of the djacent columns of the failed diode D11, where the drive signals of cells in adjacent rows have a 180° hase shift and the cells in the same row have the same signals.Then, the adjacent rows have opposite olarities, and the cells in the same rows have the same polarity.Therefore, all cells in the faulty roup are connected in series to block the damaged diode.To achieve the same terminal voltage, the utput voltages of cells in the faulty group is half of that in the normal operation groups since the umber of cells series-connected in the faulty group is twice larger than that in the normal operation roup.Additionally, owing to the matrix configuration and flexible control, the converter can still obtain fault tolerance of cells and diodes without redundancy as depicted in Figure 11.When there are failed cells or short-circuited diodes, the converter can still work as in Figure 11a,b.When diode D 11 is short-circuited, its connecting rows 1 and 2 are inactive to block the damaged devices.The other cells still operate with the column interleaved strategy and the duty cycle D p of them is increased to obtain the normal output voltage with fewer working rows.The fault tolerance of the open-circuited diode can be achieved as shown in Figure 11b,c.The fault tolerance operating group consists of the adjacent columns of the failed diode D 11 , where the drive signals of cells in adjacent rows have a 180 • phase shift and the cells in the same row have the same signals.Then, the adjacent rows have opposite polarities, and the cells in the same rows have the same polarity.Therefore, all cells in the faulty group are connected in series to block the damaged diode.To achieve the same terminal voltage, the output voltages of cells in the faulty group is half of that in the normal operation groups since the number of cells series-connected in the faulty group is twice larger than that in the normal operation group.
polarities, and the cells in the same rows have the same polarity.Therefore, all cells in the faulty group are connected in series to block the damaged diode.To achieve the same terminal voltage, the output voltages of cells in the faulty group is half of that in the normal operation groups since the number of cells series-connected in the faulty group is twice larger than that in the normal operation group.Furthermore, as illustrated in Figure 12, the diodes in the secondary circuits can be prevented from damage under DC fault condition, which is similar to the MMC converter by adding thyristors because they have a higher I 2 t capacity compared with diodes.

Simulation Results and Discussion
To verify the functionality of the proposed converter, a simulation model consisting of six rows×six columns that is similar to the one shown in Figure 7 is built in the software PSIM.For the six columns, columns 1-4 are active, while columns 5-6 are redundant.Table 1 presents the simulation parameters Table 1.Simulation parameters.

System Parameters Values Components Values
Cell_31 Cell_32 Furthermore, as illustrated in Figure 12, the diodes in the secondary circuits can be prevented from damage under DC fault condition, which is similar to the MMC converter by adding thyristors because they have a higher I 2 t capacity compared with diodes.Furthermore, as illustrated in Figure 12, the diodes in the secondary circuits can be prevented from damage under DC fault condition, which is similar to the MMC converter by adding thyristors because they have a higher I 2 t capacity compared with diodes.

Simulation Results and Discussion
To verify the functionality of the proposed converter, a simulation model consisting of six rows×six columns that is similar to the one shown in Figure 7 is built in the software PSIM.For the six columns, columns 1-4 are active, while columns 5-6 are redundant.Table 1 presents the simulation parameters

Simulation Results and Discussion
To verify the functionality of the proposed converter, a simulation model consisting of six rows×six columns that is similar to the one shown in Figure 7 is built in the software PSIM.
For the six columns, columns 1-4 are active, while columns 5-6 are redundant.Table 1 presents the simulation parameters The steady-state waveforms of the converter are shown in Figures 13 and 14.All cells in columns 1-4 work with the column interleaved strategy.The adjacent cells have the opposite voltage and current polarities.With six rows in the matrix structure, the power switches have low voltage stress, which is 1/6 of the output voltage, and the voltage and current ratings of all diodes are as low as 1/6 or 1/3 of the output voltage and current respectively.As illustrated in Figure 15, before turning on switch SM1 or SC1 in the primary circuits, the drainsource currents of both switches, idsM1 and idsC1, are negative which shows the currents flow through their parasitic diodes so that zero-voltage turn-on is achieved for SM1 or SC1.Similarly, the switches SM2 and SC2 can also obtain ZVS due to symmetrical operation.As illustrated in Figure 15, before turning on switch SM1 or SC1 in the primary circuits, the drainsource currents of both switches, idsM1 and idsC1, are negative which shows the currents flow through their parasitic diodes so that zero-voltage turn-on is achieved for SM1 or SC1.Similarly, the switches SM2 and SC2 can also obtain ZVS due to symmetrical operation.As illustrated in Figure 15, before turning on switch S M1 or S C1 in the primary circuits, the drain-source currents of both switches, i dsM1 and i dsC1 , are negative which shows the currents flow through their parasitic diodes so that zero-voltage turn-on is achieved for S M1 or S C1 .Similarly, the switches S M2 and S C2 can also obtain ZVS due to symmetrical operation.As illustrated in Figure 15, before turning on switch SM1 or SC1 in the primary circuits, the drainsource currents of both switches, idsM1 and idsC1, are negative which shows the currents flow through their parasitic diodes so that zero-voltage turn-on is achieved for SM1 or SC1.Similarly, the switches SM2 and SC2 can also obtain ZVS due to symmetrical operation.The voltage-current waveforms for switches S 1 -S 4 are depicted in Figure 16 where D b is set as 0.5.As shown in Figure 16a, when the battery is charged, the currents flow through the parasitic diodes of the corresponding switch before the switch is turned on so that ZVS is achieved.When the battery is discharged in Figure 16b, four switches still can be turned on with zero voltage due to the resonance between the inductance L 2 and the parasitic capacitance of switches.Therefore, all switches can achieve ZVS turn-on, which significantly reduces the switching loss.The voltage-current waveforms for switches S1-S4 are depicted in Figure 16 where Db is set as 0.5.As shown in Figure 16a, when the battery is charged, the currents flow through the parasitic diodes of the corresponding switch before the switch is turned on so that ZVS is achieved.When the battery is discharged in Figure 16b, four switches still can be turned on with zero voltage due to the resonance between the inductance L2 and the parasitic capacitance of switches.Therefore, all switches can achieve ZVS turn-on, which significantly reduces the switching loss.Figure 17 illustrates the fault tolerance capability with redundancy.At 0.1 s, columns 1-2 are inactive in the case that there are fault cells in columns 1-2 or diodes in columns 0-1.Then the redundant columns 5-4 start to work to guarantee the normal operation.Figure 18 presents the fault tolerance operation without redundancy, where only columns 1-4 are active.In Figure 18a, when diode D11 is short-circuited, the cells in rows 1-2 are inactive at 0.1 s to block the defective component.The duty cycle of switches in primary circuits is modified according to Equation ( 9) to maintain the normal output voltage.In Figure 18b, diode D11 is open-circuited at 0.1 s.To block the failed components, the cells in the columns adjacent to D11 are all in seriesconnection by changing the voltage polarities of the cells in column 1.Furthermore, the voltages of cells in the faulty group are reduced to half of that in the normal operation group to obtain the same  The voltage-current waveforms for switches S1-S4 are depicted in Figure 16 where Db is set as 0.5.As shown in Figure 16a, when the battery is charged, the currents flow through the parasitic diodes of the corresponding switch before the switch is turned on so that ZVS is achieved.When the battery is discharged in Figure 16b, four switches still can be turned on with zero voltage due to the resonance between the inductance L2 and the parasitic capacitance of switches.Therefore, all switches can achieve ZVS turn-on, which significantly reduces the switching loss.Figure 18 presents the fault tolerance operation without redundancy, where only columns 1-4 are active.In Figure 18a, when diode D11 is short-circuited, the cells in rows 1-2 are inactive at 0.1 s to block the defective component.The duty cycle of switches in primary circuits is modified according to Equation ( 9) to maintain the normal output voltage.In Figure 18b, diode D11 is open-circuited at 0.1 s.To block the failed components, the cells in the columns adjacent to D11 are all in series- Figure 18 presents the fault tolerance operation without redundancy, where only columns 1-4 are active.In Figure 18a, when diode D 11 is short-circuited, the cells in rows 1-2 are inactive at 0.1 s to block the defective component.The duty cycle of switches in primary circuits is modified according to Equation ( 9) to maintain the normal output voltage.In Figure 18b, diode D 11 is open-circuited at 0.1 s.To block the failed components, the cells in the columns adjacent to D 11 are all in series-connection by changing the voltage polarities of the cells in column 1.Furthermore, the voltages of cells in the faulty group are reduced to half of that in the normal operation group to obtain the same terminal voltage.

Conclusions
A modular multi-port bidirectional high power level DC/DC power converter applied for HVDC transmission of RESs is proposed in this paper.Thanks to the three-port basic cell, ES can be integrated with HVDC system with low component count as well as high compactness, and the power is transferred within one conversion stage.Additionally, due to the modularity, the proposed converter can achieve high output voltage and power by adding SMs.
The performances of isolated MPCs, partial-isolated MPCs, MMCs with ES system, and the proposed converter are compared.The proposed model appears to be more efficient and reliable, presenting the features of low switching loss, high DC voltage conversion ratio, high control flexibility, and high reliability.
The simulation results verify the advantages of the proposed converter such as the low voltage and current ratings of semiconductor components, ZVS turn-on of power switches, flexible control and improved fault tolerance operation.

Conclusions
A modular multi-port bidirectional high power level DC/DC power converter applied for HVDC transmission of RESs is proposed in this paper.Thanks to the three-port basic cell, ES can be integrated with HVDC system with low component count as well as high compactness, and the power is transferred within one conversion stage.Additionally, due to the modularity, the proposed converter can achieve high output voltage and power by adding SMs.
The performances of isolated MPCs, partial-isolated MPCs, MMCs with ES system, and the proposed converter are compared.The proposed model appears to be more efficient and reliable, presenting the features of low switching loss, high DC voltage conversion ratio, high control flexibility, and high reliability.

Figure 2 .
Figure 2. Topology of the basic cell.

Figure 4 .
Figure 4. Operating waveforms of the basic cell with PV source.

Figure 4 .
Figure 4. Operating waveforms of the basic cell with PV source.

Figure 4 .
Figure 4. Operating waveforms of the basic cell with PV source.

Figure 6 .
Figure 6.Operating waveform of the basic cell without PV source.

Figure 6 .
Figure 6.Operating waveform of the basic cell without PV source.

Figure 6 .
Figure 6.Operating waveform of the basic cell without PV source.

Figure 7 .
Figure 7. Topology of the proposed converter with s rows and p columns: (a) primary circuits with ES system; (b) secondary circuits connecting.3.1.Operation Principle of the Scalable TopologyCells of the scalable topology have similar operations with those for one basic cell except that the drive signals of switches in adjacent cells have a 180° phase shift.For example, cells 12, 21, 23, and 32 have the same drive signals, whose phases are shifted by 180° from the corresponding drive signals of cell 22.Hence, the polarities of output voltages Vs2 and currents is2 for adjacent cells are opposite.Then, the column interleaved working strategy of matrix topology is shown in Figure8.

Figure 7 .
Figure 7. Topology of the proposed converter with s rows and p columns: (a) primary circuits with ES system; (b) secondary circuits connecting.

Figure 8 .
Figure 8. Equivalent secondary circuits of the s × p topology in the column interleaved strategy: (a) column interleaved mode 1; (b) column interleaved mode 2.

Figure 8 .
Figure 8. Equivalent secondary circuits of the s × p topology in the column interleaved strategy: (a) column interleaved mode 1; (b) column interleaved mode 2.

Figure 9 .
Figure 9.Control scheme of the s × p topology.

Figure 9 .
Figure 9.Control scheme of the s × p topology.

Figure 12 .
Figure 12.Addition of thyristors to protect secondary diodes under DC fault.

Figure 12 .
Figure 12.Addition of thyristors to protect secondary diodes under DC fault.

Figure 14 .
Figure 14.Steady-state waveforms of voltage/current of basic cells without PV source.

Figure 14 .
Figure 14.Steady-state waveforms of voltage/current of basic cells without PV source.

Figure 14 .
Figure 14.Steady-state waveforms of voltage/current of basic cells without PV source.

Figure 14 .
Figure 14.Steady-state waveforms of voltage/current of basic cells without PV source.

Figure 15 .
Figure 15.Zero voltage switching (ZVS) of switches in the primary circuit.

Figure 15 .
Figure 15.Zero voltage switching (ZVS) of switches in the primary circuit.

Figure 16 .
Figure 16.Zero voltage switching (ZVS) of switches in the battery side circuit: (a) battery is charged; (b) battery is discharged.

Figure 16 .
Figure 16.Zero voltage switching (ZVS) of switches in the battery side circuit: (a) battery is charged; (b) battery is discharged.

Figure 17
Figure17illustrates the fault tolerance capability with redundancy.At 0.1 s, columns 1-2 are inactive in the case that there are fault cells in columns 1-2 or diodes in columns 0-1.Then the redundant columns 5-4 start to work to guarantee the normal operation.

Figure 16 .
Figure 16.Zero voltage switching (ZVS) of switches in the battery side circuit: (a) battery is charged; (b) battery is discharged.

Figure 17
Figure17illustrates the fault tolerance capability with redundancy.At 0.1 s, columns 1-2 are inactive in the case that there are fault cells in columns 1-2 or diodes in columns 0-1.Then the redundant columns 5-4 start to work to guarantee the normal operation.

Figure 18 .
Figure 18.Fault tolerance operation without redundancy: (a) Without redundancy for D 11 short-circuit; (b) Without redundancy for D 11 open-circuit.

Table 1 .
Simulation parameters.Addition of thyristors to protect secondary diodes under DC fault.