A Novel Step-Up Converter with an Ultrahigh Voltage Conversion Ratio

A new step-up converter with an ultrahigh voltage conversion ratio is proposed in this paper. Two power switches of such a converter, which conduct synchronically, and its output voltage, which has common ground and common polarity with its input voltage, lead to the simple control circuit. No abrupt changes in the capacitor voltage and the inductor current of the proposed step-up converter mean that it does not suffer from infinite capacitor current and inductor voltage. Two input inductors with different values can still allow the proposed step-up converter to work appropriately. An averaged model of the proposed step-up converter was built and one could see that it was still fourth-order even with its five storage elements. Some theoretical derivations, theoretical analysis, Saber simulations, and circuit experiments are provided to validate the effectiveness of the proposed step-up converter.


Introduction
As part of a DC switching power supply, the step-up converter is important for transforming low input voltage into the desired high output voltage to satisfy the requirements of practical applications, such as photovoltaic (PV) systems, fuel-cell systems, etc. Step-up converters can be classified into two types: non-isolated and isolated.An isolated step-up converter is generally constructed by inserting a transformer into a non-isolated step-up converter to enlarge the voltage conversion ratio.However, switch voltage overshoot and EMI problems caused by the transformer make the whole system suffer from low efficiency and huge volume [1,2].Therefore, the non-isolated step-up converter is the focus of many researchers and engineers.It is well known that the traditional boost converter with a voltage conversion ratio of 1/(1 − D), where D is the duty cycle, is a good topology to realize the boost ability because it has a simple structure [3].Nevertheless, under certain input voltages, if an extremely high output voltage is required, the duty cycle must be close to 1.0, and this cannot generally be achieved because of the limitations of real semiconductors.Accordingly, in the last few decades, many researchers and engineers have made much effort to explore a novel step-up converter with a high voltage conversion ratio, and many effective topologies have been proposed.For example, for realizing a voltage conversion ratio of (1 + D)/(1 − D), which is higher than that of the traditional boost converter, Yang et al. constructed a transformerless step-up converter [4], Gules et al. introduced a modified single-ended primary-inductor converter (Sepic) [5], and Mummadi proposed a fifth-order boost converter [6].However, that voltage conversion ratio was limited to some extent.To achieve a voltage conversion ratio which is higher than (1 + D)/(1 − D) within a certain area of D, several step-up converters have been proposed.For example, for obtaining a voltage conversion ratio of (2 − D)/(1 − D), the following converters have been proposed: KY boost converter constructed by combining a KY converter with a traditional synchronously rectified boost converter [7], a step-up converter constructed by combining KY and buck-boost converters [8], and an elementary positive output super-lift Luo converter [9].For obtaining a voltage conversion ratio of 2/(1 − D), Hwu et al. combined the charge pump concept with the traditional boost converter to construct a fourth-order step-up converter [10], and Al-Saffar et al. integrated the traditional boost converter with a self-lift Sepic converter to introduce a sixth-order step-up converter [11].Also, Hwu et al. proposed two voltage-boosting converters with a voltage conversion ratios of (3 − D)/(1 − D) and (3 + D)/(1 − D) by using bootstrap capacitors and boost inductors [12].Chen et al. proposed an interleaved step-up converter with the voltage conversion ratio being 3/(1 − D) [13].However, all of the above step-up converters possess an abrupt change in voltage across the capacitor, which limits them in practical applications to some extent.Moreover, like a boost converter, if an ultrahigh output voltage from those converters is required, the duty cycle D must be close to 1.0, and this also cannot generally be achieved because of the limitations of real semiconductors.
Therefore, for acquiring a higher output voltage with the same polarity as the input voltage with the duty cycle D being close to 0.5, which is very easy to implement in practical situations, some new DC-DC converters have been proposed.For example, in [14], based on a Sheppard-Taylor converter whose voltage conversion ratio of −D/(1 − 2D) is negative, a modified Sheppard-Taylor converter with a voltage conversion ratio of D/((1 − D)(1 − 2D)) was proposed.Also, by removing some components of the Sheppard-Taylor converter, a simple modified Sheppard-Taylor converter with a voltage conversion ratio of 1/(1 − 2D) was proposed in [15].However, its voltage conversion ratio of 1/(1 − 2D) was obtained under the unreasonable assumption that the voltages across its two capacitors were equal.In fact, its voltage conversion ratio was related to not only the duty cycle D, but also the load resistor and the switch frequency, so its load regulation is not good enough [16].In addition, a fourth-order step-up converter with a voltage conversion ratio of (1 − D)/(1 − 2D) was presented in [17] and a pulse-width modulation (PWM) Z-source DC-DC converter with the same voltage conversion ratio was investigated in [18].However, their voltage conversion ratios were also limited to some extent.In particular, the output voltage of the PWM Z-source DC-DC converter was floating.Hence, exploring new step-up converters with good performance is very important and valuable.In this study, a new step-up converter with an ultrahigh voltage conversion ratio is proposed.In this converter, the output voltage is common-grounded with the input voltage, and its two power switches conduct synchronically.Even if the two input inductors have different values, the proposed step-up converter can still work appropriately.Additionally, there is no abruptly changing on the current through the inductors and the voltage across the capacitors.
This paper is organized as follows.In Section 2, the structure and basic principle of the proposed step-up converter in continuous conduction mode (CCM) is presented in detail.In Section 3, the averaged model and corresponding small-signal model are established and analyzed.Comparisons among existing step-up converters and the proposed step-up converter are presented in Section 4. Some Saber simulations and circuit experiments for confirmation are presented in Section 5. Finally, some concluding remarks and comments are given in Section 6.

Novel Topology's Structure and Its Basic Principle
A circuit schematic of the proposed step-up converter is shown in Figure 1.It consists of two power switches (Q 1 and Q 2 ), five diodes (D 1 , D 2 , D 3 , D 4 , and D 5 ), three inductors (L 1 , L 2 , and L 3 ), two capacitors (C 1 and C 2 ), and the resistive load R. Two power switches conduct synchronically and are driven by the same PWM signal v d , with the period being T and duty cycle being d.The currents through the three inductors are denoted by i L1 , i L2 and i L3 .The voltages across the two capacitors are defined as v C1 and v 0 .Notably, the proposed step-up converter operating in the continuous conduction mode (CCM) is the only concern here, and its possible stages are shown in Figure 2. Based on the relation between inductors L 1 and L 2 , there are three cases for the proposed step-up converter, case 1: L 1 = L 2 , case 2: L 1 < L 2 and case 3: L 1 > L 2 .The principle of the proposed step-up converter under the three cases is discussed in detail in the following subsections.on the relation between inductors L1 and L2, there are three cases for the proposed step-up converter, case 1: L1 = L2, case 2: L1 < L2 and case 3: L1 > L2.The principle of the proposed step-up converter under the three cases is discussed in detail in the following subsections.
Circuit schematic of the proposed step-up converter.

Case 1: L1 = L2
For this case, the proposed step-up converter has only two operation stages; their equivalent circuits are shown in Figure 2a,b.

Stage 1
Figure 2a shows that two power switches (Q1 and Q2) are turned on for the high level of PWM signal vd, and three of the diodes D2, D4 and D5 do not conduct for the inverse biased voltage, whereas two of the diodes (D1 and D3) conduct for the forward biased voltage.That is, the state of power switches and diodes is: (Q1, Q2, D1, D2, D3, D4, D5≡ON, ON, ON, OFF, ON, OFF, OFF) within NT < t ≤ NT + dT where N is a natural number.Accordingly, the input voltage source supplies the energy to two input inductors (L1 and L2) so that both of them are magnetized and their currents increase.Because L1 = L2, the currents through these two inductors are equal, that is, iL1 = iL2.Capacitor C1 is in parallel with inductor L3.Consequently, capacitor C1 is discharged so that its voltage decreases and inductor L3 is demagnetized so that its current also decreases.In addition, capacitor C2 delivers energy to the resistive load R. The associated equations for stage 1 are: on the relation between inductors L1 and L2, there are three cases for the proposed step-up converter, case 1: L1 = L2, case 2: L1 < L2 and case 3: L1 > L2.The principle of the proposed step-up converter under the three cases is discussed in detail in the following subsections.
Circuit schematic of the proposed step-up converter.

Case 1: L1 = L2
For this case, the proposed step-up converter has only two operation stages; their equivalent circuits are shown in Figure 2a,b.

Stage 1
Figure 2a shows that two power switches (Q1 and Q2) are turned on for the high level of PWM signal vd, and three of the diodes D2, D4 and D5 do not conduct for the inverse biased voltage, whereas two of the diodes (D1 and D3) conduct for the forward biased voltage.That is, the state of power switches and diodes is: (Q1, Q2, D1, D2, D3, D4, D5≡ON, ON, ON, OFF, ON, OFF, OFF) within NT < t ≤ NT + dT where N is a natural number.Accordingly, the input voltage source supplies the energy to two input inductors (L1 and L2) so that both of them are magnetized and their currents increase.Because L1 = L2, the currents through these two inductors are equal, that is, iL1 = iL2.Capacitor C1 is in parallel with inductor L3.Consequently, capacitor C1 is discharged so that its voltage decreases and inductor L3 is demagnetized so that its current also decreases.In addition, capacitor C2 delivers energy to the resistive load R. The associated equations for stage 1 are:

Case 1: L 1 = L 2
For this case, the proposed step-up converter has only two operation stages; their equivalent circuits are shown in Figure 2a,b.

Stage 1
Figure 2a shows that two power switches (Q 1 and Q 2 ) are turned on for the high level of PWM signal v d , and three of the diodes D 2 , D 4 and D 5 do not conduct for the inverse biased voltage, whereas two of the diodes (D 1 and D 3 ) conduct for the forward biased voltage.That is, the state of power switches and diodes is: (Q 1 , Q 2 , D 1 , D 2 , D 3 , D 4 , D 5 ≡ON, ON, ON, OFF, ON, OFF, OFF) within NT < t ≤ NT + dT where N is a natural number.Accordingly, the input voltage source supplies the energy to two input inductors (L 1 and L 2 ) so that both of them are magnetized and their currents increase.Because L 1 = L 2 , the currents through these two inductors are equal, that is, i L1 = i L2 .Capacitor C 1 is in parallel with inductor L 3 .Consequently, capacitor C 1 is discharged so that its voltage decreases and inductor L 3 is demagnetized so that its current also decreases.In addition, capacitor C 2 delivers energy to the resistive load R. The associated equations for stage 1 are:

Stage 2
Figure 2b shows that two power switches (Q 1 and Q 2 ) are turned off for the low level of PWM signal v d .Three diodes (D 2 , D 4 , and D 5 ) conduct, and the remaining diodes (D 1 and D 3 ) do not conduct.That is, the state of power switches and diodes is: , and together with the input voltage v in , they supply the energy to inductor L 3 and capacitor C 1 .The corresponding equations for stage 2 are: For case 2, besides stage 1 and stage 2, it has stage 3, as shown in Figure 2c, corresponding to (Q 1 , Q 2 , D 1 , D 2 , D 3 , D 4 , D 5 ≡OFF, OFF, OFF, ON, ON, ON, ON) within NT + dT < t ≤ NT + dT + d 11 T because diode D 3 is still conducting for i L1 > i L2 .Its mathematical model is: Notably, stage 3 will last until i L1 = i L2 , leading to the diode D 3 being off and the proposed step-up converter immediately operating in stage 2. Therefore, the sequence of operations of the proposed step-up converter in case 2 is: stage 1 (Figure 2a) during NT < t ≤ NT + dT, stage 3 (Figure 2c) during NT + dT < t ≤ NT + dT + d 11 T, and stage 2 (Figure 2b) during NT + dT + d 11 T < t ≤ NT + T.

Case 3: L 1 > L 2
For case 3, besides stage 1 and stage 2, it has stage 4, as shown in Figure 2d, corresponding to Please note that stage 4 will end if i L1 =i L2 , which prevents diode D 1 from conducting and the proposed step-up converter will immediately operate in stage 2. Therefore, the sequence of operations of the proposed step-up converter in case 3 is: stage 1 (Figure 2a) during NT < t ≤ NT + dT, stage 4 (Figure 2d) during NT + dT < t ≤ NT + dT + d 22 T, and stage 2 (Figure 2b) during NT + dT + d 22 T < t ≤ NT + T.

Modeling and Theoretical Analysis
Based on the averaging method in [19], the averaged model for the proposed step-up converter under the three cases are established and analyzed.Firstly, some symbols are defined.x is defined as the variables of the proposed step-up converter, such as i L1 , i L2 , i L3 , v C1 , v 0 , d, and v in .x , X and x are denoted by their averaged, DC and small AC values, respectively.Also, the following items are assumed: x = X + x with x << X (5) For this case, L 1 = L 2 so that i L1 = i L2 .From ( 1) and ( 2), and using the averaging method in [19], the averaged model of the proposed step-up converter in case 1 can be directly derived as follows: As described in Section 2, there are three stages of the proposed step-up converter in case 2. The typical time-domain waveforms for the inductor currents i L1 and i L2 and the PWM signal v d are plotted in Figure 3, where I LN , I LM , and I LN1 are the values of i L1 and i L2 at t = NT, t = (N + d + d 11 )T, and t = (N + 1)T, respectively, and I L1P is the value of i L1 at t = (N + d + d 11 )T.
Based on (1), ( 2), (3), and Figure 3 and using the geometrical technique, the following equations can be derived: As described in Section 2, there are three stages of the proposed step-up converter in case 2. The typical time-domain waveforms for the inductor currents iL1 and iL2 and the PWM signal vd are plotted in Figure 3, where ILN, ILM, and ILN1 are the values of iL1 and iL2 at t = NT, t = (N + d + d11)T, and t = (N + 1)T, respectively, and IL1P is the value of iL1 at t = (N + d + d11)T.
Based on (1), ( 2), (3), and Figure 3 and using the geometrical technique, the following equations can be derived: . Typical time-domain waveforms about iL1, iL2 and vd for the proposed step-up converter under L1 < L2.
Hence, the expressions for d11 and iL2 can be derived as follows: where K = 1/L1 − 1/L2.Thereby, the completed averaged model of the proposed step-up converter in case 2 can be obtained by using the averaging method in (1)-( 3), and then combining (10) and (11).The result is: Hence, the expressions for d 11 and i L2 can be derived as follows: where Thereby, the completed averaged model of the proposed step-up converter in case 2 can be obtained by using the averaging method in (1)-( 3), and then combining (10) and (11).The result is: 3.1.3.Case 3: As indicated in Section 2, for case 3, the proposed step-up converter also has three stages, and its typical domain waveforms are shown in Figure 4, where I LN , I LM , and I LN1 are the values of i L1 and i L2 at t = NT, t = (N + d + d 22 )T and t = (N + 1)T, respectively, and I L2P is the value of i L2 at t = (N + d + d 22 )T.Because case 3 is similar to case 2, the completed averaged model of the proposed step-up converter for case 3 is directly derived as follows: Energies 2018, 11, 2693 )

DC Equilibrium Point
By substituting ( 5) into ( 6), (12), and ( 13), and then separating DC items, the DC equilibrium points of the proposed step-up converter under three cases can be derived; they are shown in Table 1.

DC Equilibrium Point
By substituting ( 5) into ( 6), (12), and ( 13), and then separating DC items, the DC equilibrium points of the proposed step-up converter under three cases can be derived; they are shown in Table 1.

Items
Case 1: where From Table 1, it can be seen that the expressions for the DC voltage V 0 under the three cases are equal.In other words, no matter what the relation between L 1 and L 2 is, the voltage conversion ratio M of the proposed step-up converter can be described as follows: Also, the expressions for the DC voltage V C1 under three cases are also equal.In conclusion, the relation between L 1 and L 2 does not influence V 0 and V C1 .

Voltage Stress of Power Switches and Diodes under Three Cases
Based on the definition of the voltage stress on the power switch and diode, the corresponding results for the proposed step-up converter under the three cases can be derived; they are shown in Table 2.One can see that the voltage stresses on the power switches (Q 1 and Q 2 ) and diodes (D 2 , D 4 and D 5 ) under the three cases are equal except for the diodes D 1 and D 3 .

Ripples for Inductor Currents and Capacitor Voltages
The ripples for the inductor currents and the capacitor voltages can be obtained by using ( 1) and Table 1.The results are shown in Table 3.

Items
Case 1: Hence, unlike the voltage ripple for capacitor C 1 , the current ripples for inductors (L 1 , L 2 and L 3 ) and the voltage ripples for capacitor C 2 under the three cases are equal.Generally, the ripple ratio, which is defined by the ripple over the corresponding DC value, can be used to select the values of the inductors and capacitors.

Transfer Functions
The transfer function is fundamental for the consequent controller design for DC-DC converters.By substituting ( 5) into ( 6), (12), and (13), and then separating AC items and ignoring the second-and higher-order AC terms because their values are very small, the corresponding transfer functions for the proposed step-up converter under the three cases can be derived by using their respective definitions.
The control-to-output voltage transfer function G vd (s), the input voltage-to-output voltage transfer function G vv (s), the control-to-inductor current i L1 transfer function G i1d (s), and the input voltage-to-inductor current i L1 transfer function G i1v (s) of the proposed step-up converter can be obtained as follows: where the expressions for A, B d and B v under the three cases are presented in Table 4.

Case A B d B v
Case 1: where

Topology
MSTC in [14] ZSC in [18] SMSTC in [15] PSUC Although the proposed step-up converter has five diodes, while others have less, from Figure 5, which shows the comparisons of the voltage conversion ratio M among these converters under different duty cycle D, it can be seen that the proposed step-up converter possesses the highest voltage conversion ratio.For example, the voltage conversion ratio M of the proposed step-up converter is up to 46.224 at D = 0.47.Additionally, the ZSC's output voltage is floating, whereas those of the others are not.

Topology
MSTC in [14] ZSC in [18] SMSTC in [15] PSUC Although the proposed step-up converter has five diodes, while others have less, from Figure 5, which shows the comparisons of the voltage conversion ratio M among these converters under different duty cycle D, it can be seen that the proposed step-up converter possesses the highest voltage conversion ratio.For example, the voltage conversion ratio M of the proposed step-up converter is up to 46.224 at D = 0.47.Additionally, the ZSC's output voltage is floating, whereas those of the others are not.

Saber Simulations and Circuit Experiments
For validation purposes, the circuit for the proposed step-up converter is designed.The given specifications are described as V in = 12 V, V 0 = 90 V, f = 32 kHz, R = 300 Ω.Thus, from (14), the duty cycle D should be equal to 0.358742.Based on the voltage stresses of the power switches and diodes in Table 2, the HEXFET Power MOSFET IRFP4668 whose V DSS = 200 V was selected for power switches Q 1 and Q 2 , and the Switchmode Schotty Power Rectifier MBR40250 rated for 250 V was selected for diodes D 1 , D 2 , D 3 , D 4 , and D 5 .Inductors (L 1 , L 2 and L 3 ) can be designed by using their current ripple ratios ε L = ∆i L /I L whose values should generally be less than 45%.Capacitors C 1 and C 2 can be designed by using their voltage ripple ratios ε C = ∆v C /V C whose values should be less than 20% and 0.5%, respectively.Thereby, from Tables 1 and 3, the current ripple ratio for each inductor and the voltage ripple ratio for each capacitor under each case can be calculated, and accordingly the selected inductors and capacitors in each case should satisfy conditions: L 1 > 1048 µH, L 2 > 1048 µH, L 3 > 1210 µH, C 1 > 2.06 µF and C 2 > 7.47 µF.Here, C 1 = 4.7 µF with r C1 = 10 mΩ, C 2 = 40 µF with r C2 = 6 mΩ, and L 3 = 2.76 mH with r L3 = 164 mΩ were selected for the proposed step-up converter.Additionally, L 1 = L 2 = 1.2 mH with r L1 = r L2 = 70 mΩ were selected for case 1, L 1 = 1.2 mH with r L1 = 70 mΩ and L 2 = 2.27 mH with r L2 = 156 mΩ were selected for case 2, and L 1 = 2.27 mH with r L1 = 156 mΩ and L 2 = 1.2 mH with r L2 = 70 mΩ were selected for case 3.
From the above-designed circuit parameters, the simulated model in Saber software, which is widely used in the field of power electronics [20], for the proposed step-up converter is constructed, and some measured results on the output voltage V 0 from the saber simulations were presented in Table 6.One can see that the output voltages V 0 for the proposed step-up converter in the three cases were close, and their values were smaller than the required 90 V because the parasitic parameters were considered in the Saber simulations.Table 6.Comparisons of the output voltage V 0 between the calculations and the saber simulations.
Calculations for V 0 90.000V 90.000 V 90.000 V Simulations for V 0 84.217V 83.362 V 83.363 V Moreover, a hardware circuit for the proposed step-up converter with the same circuit parameters and selected power switches and diodes was also constructed.Notably, in the experiments, the photocoupler TLP250H was applied to drive the power switches.The averaged values of the input voltage V in , the input current I in and the output voltage V 0 with different duty cycle D for the proposed step-up converter under case 1 were measured.In addition, then, the voltage conversion ratio M = V 0 /V in and the efficiency η = V 0 2 /(RV in I in ) with different duty cycle D for the proposed step-up converter in case 1 were calculated and plotted in Figure 6a,b, respectively.Simultaneously, the corresponding Saber simulations were also detected, calculated, and plotted in Figure 6a,b.It can be seen that the experimental results were in basic agreement with the Saber simulations.
As shown in Table 6, it is necessary to design an appropriate controller for this proposed step-up converter.Based on the circuit parameters, the zeros of G vd (s) (shown in (15)) can be calculated.The results showed that G vd (s) was a fourth-order and non-minimum phase since it had right-half side zeros, so that it was difficult to select only the single voltage loop to obtain good performance [21].Alternatively, an average current mode controller shown in Figure 7 was selected and designed for the proposed step-up converter.This controller had an outer voltage loop and an inner current loop.For the outer voltage loop, it was necessary to detect the output voltage v 0 and design a voltage compensator.For the inner current loop, it was necessary to select one of the inductor currents in the proposed step-up converter and design a current compensator.Due to all the G i1d (s)'s poles and zeros being in the left-half side of the s-plane, that is, G i1d (s) is stable and minimum phase, the inductor current i L1 was selected and measured for the average current mode controller.Notably, the inductor current i L1 here was transformed into a voltage with the same value through the current transducer LA55-A.The current compensator's output voltage is denoted by v vi .AM1 and AM2 were realized by the operational amplifiers LF356 and COM was realized by the voltage comparator LM311.The corresponding parameters were: R vi = 1000 kΩ, R vd =20 kΩ, R vf = 200 kΩ, C vf = 10 nF, R i = 20 kΩ, R p = 180 kΩ, C p = 10 nF, C i = 100 pF, V ref = 1.76 V.The PWM signal v d was generated by comparing the voltage v vi with the ramp signal V ramp , whose expression was given as follows: where V L = 0 V, V U = 10 V and T = 1/f.
where VL = 0 V, VU = 10 V and T = 1/f.(a) (b)  The experimental results for the output voltage v0, the inductor currents iL1 and iL2, and the PWM signal vd for the average-current mode controlled proposed step-up converter under the three cases are presented in Figure 8a-c, respectively.One can see that the output voltages v0 for the systems under the three cases are really the same, despite different relations between the inductors L1 and L2.Moreover, the response of the output voltage v0, the inductor current iL1, and the PWM signal vd for the average-current mode controlled proposed step-up converter with the step changing of the load R being 300 Ω-600 Ω-300 Ω is shown in Figure 9.One can see that the closed-loop controlled proposed step-up converter had good performance.
where VL = 0 V, VU = 10 V and T = 1/f.(a) (b)  The experimental results for the output voltage v0, the inductor currents iL1 and iL2, and the PWM signal vd for the average-current mode controlled proposed step-up converter under the three cases are presented in Figure 8a-c, respectively.One can see that the output voltages v0 for the systems under the three cases are really the same, despite different relations between the inductors L1 and L2.Moreover, the response of the output voltage v0, the inductor current iL1, and the PWM signal vd for the average-current mode controlled proposed step-up converter with the step changing of the load R being 300 Ω-600 Ω-300 Ω is shown in Figure 9.One can see that the closed-loop controlled proposed step-up converter had good performance.The experimental results for the output voltage v 0 , the inductor currents i L1 and i L2 , and the PWM signal v d for the average-current mode controlled proposed step-up converter under the three cases are presented in Figure 8a-c, respectively.One can see that the output voltages v 0 for the systems under the three cases are really the same, despite different relations between the inductors L 1 and L 2 .Moreover, the response of the output voltage v 0 , the inductor current i L1 , and the PWM signal v d for the average-current mode controlled proposed step-up converter with the step changing of the load R being 300 Ω-600 Ω-300 Ω is shown in Figure 9.One can see that the closed-loop controlled proposed step-up converter had good performance.

Conclusions
This paper introduces a new step-up converter.The results from theoretical analysis, the Saber simulations, and the circuit experiments show that, even if it has five diodes and five storage elements, it still has the following five good features:

Figure 1 .
Figure 1. Circuit schematic of the proposed step-up converter.

Figure 3 .
Figure 3.Typical time-domain waveforms about i L1 , i L2 and v d for the proposed step-up converter under L 1 < L 2 .

Figure 4 .
Figure 4. Typical time-domain waveforms about iL1, iL2 and vd for the proposed step-up converter under L1 > L2.

Figure 4 .
Figure 4. Typical time-domain waveforms about i L1 , i L2 and v d for the proposed step-up converter under L 1 > L 2 .

Figure 6 .
Figure 6.The Saber simulations and the experiments about the voltage conversion ratio M and the efficiency for the proposed step-up converter under case 1.(a) The voltage conversion ratio M; (b) The efficiency.

Figure 7 .
Figure 7. Circuit schematic for the average current mode controller.

Figure 6 .
Figure 6.The Saber simulations and the experiments about the voltage conversion ratio M and the efficiency for the proposed step-up converter under case 1.(a) The voltage conversion ratio M; (b) The efficiency.

Figure 6 .
Figure 6.The Saber simulations and the experiments about the voltage conversion ratio M and the efficiency for the proposed step-up converter under case 1.(a) The voltage conversion ratio M; (b) The efficiency.

Figure 7 .
Figure 7. Circuit schematic for the average current mode controller.

Figure 7 .
Figure 7. Circuit schematic for the average current mode controller.

G
vd (s) Control-to-output voltage transfer function G vv (s) Input voltage-to-output voltage transfer functionG i1d (s) Control-to-inductor current i L1 transfer function G i1v (s) Input voltage-to-inductor current i L1 transfer function R vi , R vd , R vf , R i , R p (kΩ)Resistors of average current mode controllerC vf , C p , C i (µF)Capacitors of average current mode controllerV ref (V) Reference voltage V L , V U (V)Lower and upper threshold of ramp signal

Table 1 .
DC equilibrium points of proposed step-up converter.

Table 4 .
Expressions for A, B d and B v for the proposed step-up converter.

Table 5 .
Comparisons among the converters.

Table 5 .
Comparisons among the converters.